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RISC-V: define elf_backend_dtrel_excludes_plt

Message ID 20260724012642.21997-1-juewang@linux.alibaba.com
State New
Headers
Series RISC-V: define elf_backend_dtrel_excludes_plt |

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linaro-tcwg-bot/tcwg_binutils_build--master-aarch64 success Build passed
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Commit Message

wangjue July 24, 2026, 1:26 a.m. UTC 
  From: juewang <juewang@linux.alibaba.com>

The RISC-V port never defined elf_backend_dtrel_excludes_plt, unlike
x86-64, AArch64, arm, ppc, mips and s390.  As a result DT_RELASZ counted
.rela.dyn + .rela.plt instead of just .rela.dyn.

With an empty .rela.dyn this makes DT_RELA alias DT_JMPREL (DT_RELA ==
DT_JMPREL, DT_RELASZ == DT_PLTRELSZ).  glibc accepts the aliased range,
but tools that read the two ranges independently, such as llvm-bolt, then
process .rela.plt twice.

Define the macro so DT_RELASZ excludes .rela.plt, matching every other
target.  When .rela.dyn is empty DT_RELA is now zeroed and the aliasing
is gone.

	* elfnn-riscv.c (elf_backend_dtrel_excludes_plt): Define.

Signed-off-by: wangjue.wangjue <wangjue.wangjue@alibaba-inc.com>
---
 bfd/elfnn-riscv.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Nelson Chu July 29, 2026, 11:30 a.m. UTC | #1 
wangjue <juewang@linux.alibaba.com>

> From: juewang <juewang@linux.alibaba.com>
>
> The RISC-V port never defined elf_backend_dtrel_excludes_plt, unlike
> x86-64, AArch64, arm, ppc, mips and s390.  As a result DT_RELASZ counted
> .rela.dyn + .rela.plt instead of just .rela.dyn.
>
> With an empty .rela.dyn this makes DT_RELA alias DT_JMPREL (DT_RELA ==
> DT_JMPREL, DT_RELASZ == DT_PLTRELSZ).  glibc accepts the aliased range,
> but tools that read the two ranges independently, such as llvm-bolt, then
> process .rela.plt twice.
>
> Define the macro so DT_RELASZ excludes .rela.plt, matching every other
> target.  When .rela.dyn is empty DT_RELA is now zeroed and the aliasing
> is gone.


Sounds reasonable, please commit.

Thanks
Nelson


>         * elfnn-riscv.c (elf_backend_dtrel_excludes_plt): Define.
>
> Signed-off-by: wangjue.wangjue <wangjue.wangjue@alibaba-inc.com>
> ---
>  bfd/elfnn-riscv.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c
> index 1c1c3ea36c5..1ca23e4964a 100644
> --- a/bfd/elfnn-riscv.c
> +++ b/bfd/elfnn-riscv.c
> @@ -5587,6 +5587,7 @@ elfNN_riscv_merge_gnu_properties (struct
> bfd_link_info *info, bfd *abfd,
>  #define elf_backend_got_header_size            (ARCH_SIZE / 8)
>  #define elf_backend_want_dynrelro              1
>  #define elf_backend_rela_normal                        1
> +#define elf_backend_dtrel_excludes_plt 1
>  #define elf_backend_default_execstack          0
>
>  #undef  elf_backend_obj_attrs_vendor
> --
> 2.34.1
>
>
wangjue July 30, 2026, 12:44 a.m. UTC | #2 
Thanks for the review, Nelson!
I don't have write access to binutils-gdb, so could you please commit it on my behalf?
Best regards,
Wang Jue
diff mbox series

Patch

diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c
index 1c1c3ea36c5..1ca23e4964a 100644
--- a/bfd/elfnn-riscv.c
+++ b/bfd/elfnn-riscv.c
@@ -5587,6 +5587,7 @@  elfNN_riscv_merge_gnu_properties (struct bfd_link_info *info, bfd *abfd,
 #define elf_backend_got_header_size		(ARCH_SIZE / 8)
 #define elf_backend_want_dynrelro		1
 #define elf_backend_rela_normal			1
+#define elf_backend_dtrel_excludes_plt	1
 #define elf_backend_default_execstack		0
 
 #undef  elf_backend_obj_attrs_vendor