diff mbox series

[v1,1/2] Support AVX10_V2_AUX instructions

Message ID 20260627095543.1627012-2-Ganesh.Gopalasubramanian@amd.com
State New
Headers
Series Support AVX10_V2_AUX and x86 ACE ISA |

Checks

Context Check Description
linaro-tcwg-bot/tcwg_binutils_build--master-aarch64 success Build passed
linaro-tcwg-bot/tcwg_binutils_check--master-aarch64 fail Patch failed to apply

Commit Message

Ganesh Gopalasubramanian June 27, 2026, 9:55 a.m. UTC 
  - AVX10_V1_AUX instructions are already present as part of AVX10.2
instructions. They are just available under new cpuid bit.
- AVX10_V2_AUX are new x86 instructions.

Reference: AI Compute Extensions (ACE) Specification, v1.15
https://x86ecosystem.org/wp-content/uploads/2026/06/ACE_v1_Specification_public_1_15.pdf

Co-authored-by: Umesh Kalvakuntla
---
 gas/NEWS                                      |    3 +
 gas/config/tc-i386.c                          |    1 +
 gas/doc/c-i386.texi                           |    3 +-
 .../gas/i386/x86-64-avx10_v2_aux-intel.d      |  116 +
 gas/testsuite/gas/i386/x86-64-avx10_v2_aux.d  |  116 +
 gas/testsuite/gas/i386/x86-64-avx10_v2_aux.s  |  149 +
 gas/testsuite/gas/i386/x86-64.exp             |    2 +
 opcodes/i386-dis-evex-prefix.h                |   52 +
 opcodes/i386-dis-evex-w.h                     |   20 +
 opcodes/i386-dis-evex.h                       |   22 +-
 opcodes/i386-dis.c                            |   14 +
 opcodes/i386-gen.c                            |    3 +
 opcodes/i386-init.h                           |  812 ++--
 opcodes/i386-mnem.h                           | 4179 +++++++++--------
 opcodes/i386-opc.h                            |    3 +
 opcodes/i386-opc.tbl                          |   89 +
 opcodes/i386-tbl.h                            |  622 ++-
 17 files changed, 3719 insertions(+), 2487 deletions(-)
 create mode 100644 gas/testsuite/gas/i386/x86-64-avx10_v2_aux-intel.d
 create mode 100644 gas/testsuite/gas/i386/x86-64-avx10_v2_aux.d
 create mode 100644 gas/testsuite/gas/i386/x86-64-avx10_v2_aux.s

Comments

Jiang, Haochen June 29, 2026, 3:41 a.m. UTC | #1 
> From: Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com>
> Sent: Saturday, June 27, 2026 5:56 PM

Hi Ganesh,

First of all, you should always omit those generated files like what you
have done in ACE patch.

> 
> - AVX10_V1_AUX instructions are already present as part of AVX10.2
> instructions. They are just available under new cpuid bit.

What is your plan on supporting that bit?

> diff --git a/gas/testsuite/gas/i386/x86-64-avx10_v2_aux.d
> b/gas/testsuite/gas/i386/x86-64-avx10_v2_aux.d
> +[ 	]*[a-f0-9]+:[ 	]*62 f5 7d 08 38 01[ 	]*vcvtrops2hf8
> \(%rcx\),%xmm0

Your test did not cover the full set of the insts. You could only emit
128 bit memory here, no 256/512 bit according to your upcoming
Implementation.

> diff --git a/gas/testsuite/gas/i386/x86-64-avx10_v2_aux.s
> b/gas/testsuite/gas/i386/x86-64-avx10_v2_aux.s
> new file mode 100644
> index 00000000000..24c2901f599
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/x86-64-avx10_v2_aux.s
> @@ -0,0 +1,149 @@
> +	.text
> +	.arch .avx10_v2_aux
> +_start:
> +	# VCVTPS2BF8 - F3.MAP5.W0 opcode 39
> +	vcvtps2bf8	%xmm1, %xmm0
> +	vcvtps2bf8	%ymm1, %xmm0
> +	vcvtps2bf8	%zmm1, %xmm0
> +	vcvtps2bf8	(%rcx), %xmm0
> +	vcvtps2bf8	0x10(%rcx), %xmm0
> +	vcvtps2bf8	%xmm1, %xmm0{%k1}
> +	vcvtps2bf8	%xmm1, %xmm0{%k1}{z}
> +
> +	# VCVTPS2BF8S - F3.MAP5.W0 opcode 3B
> +	vcvtps2bf8s	%xmm1, %xmm0
> +	vcvtps2bf8s	%ymm1, %xmm0
> +	vcvtps2bf8s	%zmm1, %xmm0
> +	vcvtps2bf8s	(%rcx), %xmm0
> +	vcvtps2bf8s	%xmm1, %xmm0{%k1}
> +
> +	# VCVTPS2HF8 - F3.MAP5.W0 opcode 38
> +	vcvtps2hf8	%xmm1, %xmm0
> +	vcvtps2hf8	%ymm1, %xmm0
> +	vcvtps2hf8	%zmm1, %xmm0
> +	vcvtps2hf8	(%rcx), %xmm0
> +	vcvtps2hf8	%xmm1, %xmm0{%k1}
> +
> +	# VCVTPS2HF8S - F3.MAP5.W0 opcode 3A
> +	vcvtps2hf8s	%xmm1, %xmm0
> +	vcvtps2hf8s	%ymm1, %xmm0
> +	vcvtps2hf8s	%zmm1, %xmm0
> +	vcvtps2hf8s	(%rcx), %xmm0
> +	vcvtps2hf8s	%xmm1, %xmm0{%k1}

Please use .irp to shrink the testcase lines.

> diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
> index be580d48a18..11cc4ff19dc 100644
> --- a/opcodes/i386-gen.c
> +++ b/opcodes/i386-gen.c
> @@ -249,6 +249,8 @@ static const dependency isa_dependencies[] =
> 
> "|AVX512_VNNI|AVX512_BF16|AVX512_FP16|AVX512_VPOPCNTDQ|AVX
> 512_BITALG" },
>    { "AVX10_2",
>      "AVX10_1" },
> +  { "AVX10_V2_AUX",
> +    "AVX10_2" },

Are you sure this should be AVX10_2 but not AVX10_1? According to the
documentation for CPUID ACEv1 emulation:

"
To detect full ACE v1 support, software should verify:
1. (AVX10.1 and AVX10_V1_AUX) or AVX10.2
2. AVX10_V2_AUX
"

There will be possibilities for some x86 vendors have not full AVX10.2
support but AVX10_V2_AUX support, or the documentation won't do
so.

Now it is the assembler and disassembler part. Before the comments
coming in, I would like to mention for those convert insts:

When the encoding is designed as this, we are trying to keep the
encoding as consistent as we can. We have the following rules for
convert when assigning encoding:

For down convert:
- The different dst size will result in different opcode.
- W bit will indicate the src size pairs, i.e., PS=PD, PH-BF16, HF8-BF8, etc.
The former is always at W0, the latter is always at W1.
- The different type of convert is indicated at prefixes, where cvtbias at
NP, cvt at F3, cvt2 at F2, leaving 66 for special types in case we need it
(Here is the cvtro).

For up covert, since we have fewer variants for convert (we definitely
won't have cvt2), we may choose to fold them a little bit, but we will still
keep the W rule in down convert.

Then it is the comment part. If you don't want to do some of the combine
or table pass simplification, I will have an upcoming patch to do so. We
need at least to keep the implementation is correct, i.e, all the tables
needed are passed and the assembler/disassembler is doing what they
should do.

> diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h
> index 1aeac210c5d..ffecef5e796 100644
> --- a/opcodes/i386-dis-evex-prefix.h
> +++ b/opcodes/i386-dis-evex-prefix.h
> +  /* PREFIX_EVEX_MAP5_36 */
> +  {
> +    { VEX_W_TABLE (EVEX_W_MAP5_36_P_0) },
> +  },

You could avoid W table pass by adding a macro like
%XF, to output hf for W1 and bf for W0. And the same
for similar both hf/bf existing cases. For those only
one of them exists, you still need to pass W table to
invalid the other one, like...

> +  /* PREFIX_EVEX_MAP5_37 */
> +  {
> +    { "vcvtbf42hf8",	{ XM, EXxmmq }, 0 },

... here. You need to pass W table.

> +    { Bad_Opcode },
> +    { VEX_W_TABLE (EVEX_W_MAP5_37_P_2) },
> +  },
> +  /* PREFIX_EVEX_MAP5_38 */
> +  {
> +    { "vcvtbiasps2hf8",	{ XMM, Vex, EXx }, 0 },
> +    { "vcvtps2hf8",	{ XMM, EXx }, 0 },
> +    { "vcvtrops2hf8",	{ XMM, EXx }, 0 },

It is what I mentioned in testcase part, you will need
a suffix for ATT syntax if memory is involved and you
could not determine the memory size according to
other operands. Unlike Intel syntax has the memory
size directly at memory operand, ATT syntax won't.
The only way to distinguish them is adding x/y/z
when needed at the end of the mnemonics.

Take this scenario as example, here we need suffix
for vcvtps2hf8 and vcvtrops2hf8, since the other
operand will always be xmm, it does not contain
any info to indicate the other operand. Adding %XZ
is needed since it needs all x/y/z.
vcvtbiasps2hf8 does not need that suffix because the
second operand contains the info.

Please also check other similar scenarios. If I don't
miss something, should be vcvt[ro,]ps2[h,b]f8[,s] if
they exists.

> +  /* PREFIX_EVEX_MAP5_3C */
> +  {
> +    { Bad_Opcode },
> +    { "vcvthf82hf6s",	{ XM, EXx }, 0 },
> +  },

There are several mod table pass missing throughout
the implementation. You need restrict MOD.R/M as
11 here.

Also, for non-broadcast operands, please use
EXEvexXNoBcst instead of EXx.

Similar for vunpackb and vcvtbf82bf6s.

> +  /* PREFIX_EVEX_MAP5_3D */
> +  {
> +    { Bad_Opcode },
> +    { VEX_W_TABLE (EVEX_W_MAP5_3D_P_1) },
> +  },
> +  /* PREFIX_EVEX_MAP5_3E */
> +  {
> +    { Bad_Opcode },
> +    { VEX_W_TABLE (EVEX_W_MAP5_3E_P_1) },
> +  },
>    /* PREFIX_EVEX_MAP5_74 */
>    {
>      { "vcvtbiasp%XH2bf8s",	{ XMxmmq, Vex, EXxh }, 0 },
> diff --git a/opcodes/i386-dis-evex-w.h b/opcodes/i386-dis-evex-w.h
> index 310f121f499..6e94bc45fe1 100644
> --- a/opcodes/i386-dis-evex-w.h
> +++ b/opcodes/i386-dis-evex-w.h
> +  /* EVEX_W_MAP5_3E_P_1 */
> +  {
> +    { Bad_Opcode },
> +    { "vcvtbf82bf6s",	{ XM, EXx }, 0 },
> +  },

Please pass W table before prefix table to reduce
potential tree size.

> diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h
> index b2f02e494f9..7d555aa9e11 100644
> --- a/opcodes/i386-dis-evex.h
> +++ b/opcodes/i386-dis-evex.h
> @@ -652,7 +652,7 @@ static const struct dis386 evex_table[][256] = {
>      { EVEX_LEN_TABLE (EVEX_LEN_0F3A3A) },
>      { EVEX_LEN_TABLE (EVEX_LEN_0F3A3B) },
>      { Bad_Opcode },
> -    { Bad_Opcode },
> +    { "vunpackb",	{ XM, EXx, Ib }, 0 },

Missing W and prefix table pass here.

> diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
> index 7042ca4512e..3d3e37b09aa 100644
> --- a/opcodes/i386-opc.tbl
> +++ b/opcodes/i386-opc.tbl
> @@ -3620,6 +3620,95 @@ vucomxs<sdh>, 0x<sdh:spfx>2e, AVX10_2,
> Modrm|EVexLIG|<sdh:spc1>|<sdh:vexw>|Disp8
> 
>  // AVX10.2 instructions end.
> 
> +// AVX10_V2_AUX instructions.
> +
> +// VCVTPS2BF8, VCVTPS2BF8S, VCVTPS2HF8, VCVTPS2HF8S - narrowing 2-
> op (F3.MAP5)
> +// VCVTROPS2HF8, VCVTROPS2HF8S - narrowing 2-op (66.MAP5)
> +
> +<cvtps8:opc:pfx, +
> +    bf8:39:f3, +
> +    bf8s:3b:f3, +
> +    hf8:38:f3, +
> +    hf8s:3a:f3>

Why do you need to put pfx in iterator? They are all f3.

And we could simply separate them as <fp8> and <sat> here, not <cvtps8>,
<cvtrops8>, <cvtbiasps8>, where <fp8> has the base opcode 38 and 39,
<sat> add 2 for them when there is saturation.

And just as mentioned, you will also need to handle ATT Syntax here, you will
need a new <Exyz>.

> +
> +vcvtps2<cvtps8>, 0x<cvtps8:pfx><cvtps8:opc>, AVX10_V2_AUX,
> Modrm|Map5|EVex128|VexW0|Masking|Broadcast|Disp8MemShift=4|NoS
> uf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM }
> +vcvtps2<cvtps8>, 0x<cvtps8:pfx><cvtps8:opc>, AVX10_V2_AUX,
> Modrm|Map5|EVex256|VexW0|Masking|Broadcast|Disp8MemShift=5|NoS
> uf, { RegYMM|Dword|Unspecified|BaseIndex, RegXMM }
> +vcvtps2<cvtps8>, 0x<cvtps8:pfx><cvtps8:opc>, AVX10_V2_AUX,
> Modrm|Map5|EVex512|VexW0|Masking|Broadcast|Disp8MemShift=6|NoS
> uf, { RegZMM|Dword|Unspecified|BaseIndex, RegXMM }

Disp8ShiftVL will combine Disp8MemShift=4/5/6. Then you could combine the
templates. Similar for vcvtro and vcvtbias.

> +
> +<cvtps8>
> +
> +<cvtrops8:opc, +
> +    hf8:38, +
> +    hf8s:3a>
> +
> +vcvtrops2<cvtrops8>, 0x66<cvtrops8:opc>, AVX10_V2_AUX,
> Modrm|Map5|EVex128|VexW0|Masking|Broadcast|Disp8MemShift=4|NoS
> uf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM }
> +vcvtrops2<cvtrops8>, 0x66<cvtrops8:opc>, AVX10_V2_AUX,
> Modrm|Map5|EVex256|VexW0|Masking|Broadcast|Disp8MemShift=5|NoS
> uf, { RegYMM|Dword|Unspecified|BaseIndex, RegXMM }
> +vcvtrops2<cvtrops8>, 0x66<cvtrops8:opc>, AVX10_V2_AUX,
> Modrm|Map5|EVex512|VexW0|Masking|Broadcast|Disp8MemShift=6|NoS
> uf, { RegZMM|Dword|Unspecified|BaseIndex, RegXMM }
> +
> +<cvtrops8>
> +
> +// VCVTBIASPS2BF8, VCVTBIASPS2BF8S, VCVTBIASPS2HF8,
> VCVTBIASPS2HF8S - 3-op narrowing (NP.MAP5)
> +
> +<cvtbiasps:opc, +
> +    bf8:39, +
> +    bf8s:3b, +
> +    hf8:38, +
> +    hf8s:3a>
> +
> +vcvtbiasps2<cvtbiasps>, 0x<cvtbiasps:opc>, AVX10_V2_AUX,
> Modrm|Map5|EVex128|Src1VVVV|VexW0|Masking|Broadcast|Disp8Mem
> Shift=4|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM,
> RegXMM }
> +vcvtbiasps2<cvtbiasps>, 0x<cvtbiasps:opc>, AVX10_V2_AUX,
> Modrm|Map5|EVex256|Src1VVVV|VexW0|Masking|Broadcast|Disp8Mem
> Shift=5|NoSuf, { RegYMM|Dword|Unspecified|BaseIndex, RegYMM,
> RegXMM }
> +vcvtbiasps2<cvtbiasps>, 0x<cvtbiasps:opc>, AVX10_V2_AUX,
> Modrm|Map5|EVex512|Src1VVVV|VexW0|Masking|Broadcast|Disp8Mem
> Shift=6|NoSuf, { RegZMM|Dword|Unspecified|BaseIndex, RegZMM,
> RegXMM }
> +
> +<cvtbiasps>
> +
> +// VCVTBF82PS (NP.MAP5.W1) and VCVTHF82PS (NP.MAP5.W0) - widening
> xmm/m to xmm/ymm/zmm
> +vcvtbf82ps, 0x36, AVX10_V2_AUX,
> Modrm|Map5|EVex128|VexW1|Masking|Disp8MemShift=2|NoSuf,
> { RegXMM|Dword|Unspecified|BaseIndex, RegXMM }
> +vcvtbf82ps, 0x36, AVX10_V2_AUX,
> Modrm|Map5|EVex256|VexW1|Masking|Disp8MemShift=3|NoSuf,
> { RegXMM|Qword|Unspecified|BaseIndex, RegYMM }
> +vcvtbf82ps, 0x36, AVX10_V2_AUX,
> Modrm|Map5|EVex512|VexW1|Masking|Disp8MemShift=4|NoSuf,
> { RegXMM|Unspecified|BaseIndex, RegZMM }
> +
> +vcvthf82ps, 0x36, AVX10_V2_AUX,
> Modrm|Map5|EVex128|VexW0|Masking|Disp8MemShift=2|NoSuf,
> { RegXMM|Dword|Unspecified|BaseIndex, RegXMM }
> +vcvthf82ps, 0x36, AVX10_V2_AUX,
> Modrm|Map5|EVex256|VexW0|Masking|Disp8MemShift=3|NoSuf,
> { RegXMM|Qword|Unspecified|BaseIndex, RegYMM }
> +vcvthf82ps, 0x36, AVX10_V2_AUX,
> Modrm|Map5|EVex512|VexW0|Masking|Disp8MemShift=4|NoSuf,
> { RegXMM|Unspecified|BaseIndex, RegZMM }

You could combine bf and hf with <fp>, where bf as VexW1, hf as VexW0.
Similar for other cases.

> +
> +// VCVTBF82BF4S (F3.MAP5.W1) and VCVTHF82BF4S (F3.MAP5.W0) -
> narrowing, no mask
> +vcvtbf82bf4s, 0xf33d, AVX10_V2_AUX,
> Modrm|Map5|EVex128|VexW1|Disp8MemShift=3|NoSuf, { RegXMM,
> RegXMM|Qword|Unspecified|BaseIndex }

We may need RegMem to swap the operand.

If I miss something, I will reply afterwards.

Thx,
Haochen
Jan Beulich June 29, 2026, 6:21 a.m. UTC | #2 
On 29.06.2026 05:41, Jiang, Haochen wrote:
>> From: Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com>
>> Sent: Saturday, June 27, 2026 5:56 PM
>> +  /* PREFIX_EVEX_MAP5_3C */
>> +  {
>> +    { Bad_Opcode },
>> +    { "vcvthf82hf6s",	{ XM, EXx }, 0 },
>> +  },
> 
> There are several mod table pass missing throughout
> the implementation. You need restrict MOD.R/M as
> 11 here.
> 
> Also, for non-broadcast operands, please use
> EXEvexXNoBcst instead of EXx.

Except that in cases where memory operands aren't allowed in the first place,
that won't be necessary (nor wanted, for adding clutter).

>> --- a/opcodes/i386-dis-evex-w.h
>> +++ b/opcodes/i386-dis-evex-w.h
>> +  /* EVEX_W_MAP5_3E_P_1 */
>> +  {
>> +    { Bad_Opcode },
>> +    { "vcvtbf82bf6s",	{ XM, EXx }, 0 },
>> +  },
> 
> Please pass W table before prefix table to reduce
> potential tree size.

Judging from the name of the identifier in the comment that's the case already?
With major opcodes 0x3c and 0x3e having only a single code point for now, there
may also be no difference in table size.

>> --- a/opcodes/i386-dis-evex.h
>> +++ b/opcodes/i386-dis-evex.h
>> @@ -652,7 +652,7 @@ static const struct dis386 evex_table[][256] = {
>>      { EVEX_LEN_TABLE (EVEX_LEN_0F3A3A) },
>>      { EVEX_LEN_TABLE (EVEX_LEN_0F3A3B) },
>>      { Bad_Opcode },
>> -    { Bad_Opcode },
>> +    { "vunpackb",	{ XM, EXx, Ib }, 0 },
> 
> Missing W and prefix table pass here.

Going through prefix_table[] shouldn't be needed: NO_PREFIX could be used to
"replace" that.

>> --- a/opcodes/i386-opc.tbl
>> +++ b/opcodes/i386-opc.tbl
>> @@ -3620,6 +3620,95 @@ vucomxs<sdh>, 0x<sdh:spfx>2e, AVX10_2,
>> Modrm|EVexLIG|<sdh:spc1>|<sdh:vexw>|Disp8
>>
>>  // AVX10.2 instructions end.
>>
>> +// AVX10_V2_AUX instructions.

AVX10.2-aux

>> +// VCVTPS2BF8, VCVTPS2BF8S, VCVTPS2HF8, VCVTPS2HF8S - narrowing 2-
>> op (F3.MAP5)
>> +// VCVTROPS2HF8, VCVTROPS2HF8S - narrowing 2-op (66.MAP5)

Please limit such commentary to what you find elsewhere. That is, nothing at
all here. Unexpected aspects, anomalies, etc of course want commenting.

>> +<cvtps8:opc:pfx, +
>> +    bf8:39:f3, +
>> +    bf8s:3b:f3, +
>> +    hf8:38:f3, +
>> +    hf8s:3a:f3>
> 
> Why do you need to put pfx in iterator? They are all f3.
> 
> And we could simply separate them as <fp8> and <sat> here, not <cvtps8>,
> <cvtrops8>, <cvtbiasps8>, where <fp8> has the base opcode 38 and 39,
> <sat> add 2 for them when there is saturation.

Splitting likely won't be a benefit here, and we didn't do so for AVX10.1 (see
<cvt8:...> there.

Jan
Jan Beulich June 29, 2026, 7:57 a.m. UTC | #3 
On 27.06.2026 11:55, Ganesh Gopalasubramanian wrote:
> - AVX10_V1_AUX instructions are already present as part of AVX10.2
> instructions. They are just available under new cpuid bit.
> - AVX10_V2_AUX are new x86 instructions.
> 
> Reference: AI Compute Extensions (ACE) Specification, v1.15
> https://x86ecosystem.org/wp-content/uploads/2026/06/ACE_v1_Specification_public_1_15.pdf

Is there going to be a more dedicated revision of the AVX10 spec, covering
10.2-aux?

Jan
Jan Beulich June 29, 2026, 8:03 a.m. UTC | #4 
On 29.06.2026 08:21, Jan Beulich wrote:
> On 29.06.2026 05:41, Jiang, Haochen wrote:
>>> --- a/opcodes/i386-dis-evex-w.h
>>> +++ b/opcodes/i386-dis-evex-w.h
>>> +  /* EVEX_W_MAP5_3E_P_1 */
>>> +  {
>>> +    { Bad_Opcode },
>>> +    { "vcvtbf82bf6s",	{ XM, EXx }, 0 },
>>> +  },
>>
>> Please pass W table before prefix table to reduce
>> potential tree size.
> 
> Judging from the name of the identifier in the comment that's the case already?

Scratch this part of my earlier reply.

Jan
Jan Beulich June 29, 2026, 8:23 a.m. UTC | #5 
On 27.06.2026 11:55, Ganesh Gopalasubramanian wrote:
> --- a/opcodes/i386-opc.tbl
> +++ b/opcodes/i386-opc.tbl
> @@ -3620,6 +3620,95 @@ vucomxs<sdh>, 0x<sdh:spfx>2e, AVX10_2, Modrm|EVexLIG|<sdh:spc1>|<sdh:vexw>|Disp8
>  
>  // AVX10.2 instructions end.
>  
> +// AVX10_V2_AUX instructions.
> +
> +// VCVTPS2BF8, VCVTPS2BF8S, VCVTPS2HF8, VCVTPS2HF8S - narrowing 2-op (F3.MAP5)
> +// VCVTROPS2HF8, VCVTROPS2HF8S - narrowing 2-op (66.MAP5)
> +
> +<cvtps8:opc:pfx, +
> +    bf8:39:f3, +
> +    bf8s:3b:f3, +
> +    hf8:38:f3, +
> +    hf8s:3a:f3>
> +
> +vcvtps2<cvtps8>, 0x<cvtps8:pfx><cvtps8:opc>, AVX10_V2_AUX, Modrm|Map5|EVex128|VexW0|Masking|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM }
> +vcvtps2<cvtps8>, 0x<cvtps8:pfx><cvtps8:opc>, AVX10_V2_AUX, Modrm|Map5|EVex256|VexW0|Masking|Broadcast|Disp8MemShift=5|NoSuf, { RegYMM|Dword|Unspecified|BaseIndex, RegXMM }
> +vcvtps2<cvtps8>, 0x<cvtps8:pfx><cvtps8:opc>, AVX10_V2_AUX, Modrm|Map5|EVex512|VexW0|Masking|Broadcast|Disp8MemShift=6|NoSuf, { RegZMM|Dword|Unspecified|BaseIndex, RegXMM }

To extend what Haochen has said, please go look at pre-existing templates (preferably
ones added more recently, as older ones may have legacy quirks) to see how patterns
like this want handling.

> +// VCVTBF82BF6S (F3.MAP5.W1) - reg-reg only, no mask
> +vcvtbf82bf6s, 0xf33e, AVX10_V2_AUX, Modrm|Map5|EVex128|VexW1|NoSuf, { RegXMM, RegXMM }
> +vcvtbf82bf6s, 0xf33e, AVX10_V2_AUX, Modrm|Map5|EVex256|VexW1|NoSuf, { RegYMM, RegYMM }
> +vcvtbf82bf6s, 0xf33e, AVX10_V2_AUX, Modrm|Map5|EVex512|VexW1|NoSuf, { RegZMM, RegZMM }

These and ...

> +// VCVTHF82HF6S (F3.MAP5.W0) - reg-reg only, no mask
> +vcvthf82hf6s, 0xf33c, AVX10_V2_AUX, Modrm|Map5|EVex128|VexW0|NoSuf, { RegXMM, RegXMM }
> +vcvthf82hf6s, 0xf33c, AVX10_V2_AUX, Modrm|Map5|EVex256|VexW0|NoSuf, { RegYMM, RegYMM }
> +vcvthf82hf6s, 0xf33c, AVX10_V2_AUX, Modrm|Map5|EVex512|VexW0|NoSuf, { RegZMM, RegZMM }

... these want folding into one (each). Just like you have it ...

> +// VUNPACKB (NP.0F3A.W0) - with imm8
> +vunpackb, 0x3d, AVX10_V2_AUX, Modrm|Masking|Space0F3A|VexW0|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8, RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
... here.

Jan
Jiang, Haochen June 29, 2026, 8:51 a.m. UTC | #6 
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Monday, June 29, 2026 3:57 PM
> 
> On 27.06.2026 11:55, Ganesh Gopalasubramanian wrote:
> > - AVX10_V1_AUX instructions are already present as part of AVX10.2
> > instructions. They are just available under new cpuid bit.
> > - AVX10_V2_AUX are new x86 instructions.
> >
> > Reference: AI Compute Extensions (ACE) Specification, v1.15
> > https://x86ecosystem.org/wp-
> content/uploads/2026/06/ACE_v1_Specification_public_1_15.pdf
> 
> Is there going to be a more dedicated revision of the AVX10 spec, covering
> 10.2-aux?
> 

I don't see that on the table currently since there is a joint documentation
already. But it should happen one day since we have AVX10_V1_AUX in avx10
spec.

Thx,
Haochen
Jan Beulich July 10, 2026, 10:44 a.m. UTC | #7 
On 29.06.2026 05:41, Jiang, Haochen wrote:
>> From: Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com>
>> Sent: Saturday, June 27, 2026 5:56 PM
> 
>> - AVX10_V1_AUX instructions are already present as part of AVX10.2
>> instructions. They are just available under new cpuid bit.
> 
> What is your plan on supporting that bit?

Just to mention that I have a patch in the works to separate 10.1-aux from
10.2.

Jan
diff mbox series

Patch

diff --git a/gas/NEWS b/gas/NEWS
index 4c55a544f25..ef4bd048e4b 100644
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -1,5 +1,8 @@ 
 -*- text -*-
 
+* Add support for the x86 AVX10_V2_AUX instructions, providing FP8, FP4
+  and FP6 format conversion instructions.
+
 * The legacy .vtable_entry and .vtable_inherit directives that were
   needed for versions of GCC prior to gcc-3.0 (when the generic C++
   ABI was adopted) are now considered obsolete.  They are now deprecated
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 9b3f527d2c1..d82ed061a78 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -1253,6 +1253,7 @@  static const arch_entry cpu_arch[] =
   SUBARCH (apx_nf, APX_NF, ANY_APX_NF, false),
   SUBARCH (apx_nci_ndd_nf, APX_NCI_NDD_NF, ANY_APX_NCI_NDD_NF, false),
   VECARCH (avx10.2, AVX10_2, ANY_AVX10_2, set),
+  VECARCH (avx10_v2_aux, AVX10_V2_AUX, ANY_AVX10_V2_AUX, set),
   SUBARCH (gmism2, GMISM2, GMISM2, false),
   SUBARCH (gmiccs, GMICCS, GMICCS, false),
   SUBARCH (msr_imm, MSR_IMM, MSR_IMM, false),
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index b25a4fbc70e..9f6e8da443d 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -230,6 +230,7 @@  accept various extension mnemonics.  For example,
 @code{avx10.2/512},
 @code{avx10.2/256},
 @code{avx10.2/128},
+@code{avx10_v2_aux},
 @code{movrs},
 @code{amx_int8},
 @code{amx_bf16},
@@ -1723,7 +1724,7 @@  supported on the CPU specified.  The choices for @var{cpu_type} are:
 @item @samp{.avx_ne_convert} @tab @samp{.rao_int} @tab @samp{.fred} @tab @samp{.lkgs}
 @item @samp{.avx_vnni_int16} @tab @samp{.sha512} @tab @samp{.sm3} @tab @samp{.sm4}
 @item @samp{.pbndkb} @tab @samp{.user_msr} @tab @samp{.msr_imm} @tab @samp{.avx10.2}
-@item @samp{.movrs}
+@item @samp{.avx10_v2_aux} @tab @samp{.movrs}
 @item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote}
 @item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq}
 @item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd} @tab @samp{.tsxldtrk}
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_v2_aux-intel.d b/gas/testsuite/gas/i386/x86-64-avx10_v2_aux-intel.d
new file mode 100644
index 00000000000..bd80ca77107
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_v2_aux-intel.d
@@ -0,0 +1,116 @@ 
+#as: -march=+avx10_v2_aux
+#objdump: -dw -Mintel
+#name: x86-64 AVX10_V2_AUX (Intel disassembly)
+#source: x86-64-avx10_v2_aux.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 08 39 c1[ 	]*vcvtps2bf8 xmm0,xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 28 39 c1[ 	]*vcvtps2bf8 xmm0,ymm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 48 39 c1[ 	]*vcvtps2bf8 xmm0,zmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 08 39 01[ 	]*vcvtps2bf8 xmm0,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 08 39 41 01[ 	]*vcvtps2bf8 xmm0,XMMWORD PTR \[rcx\+0x10\]
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 09 39 c1[ 	]*vcvtps2bf8 xmm0\{k1\},xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 89 39 c1[ 	]*vcvtps2bf8 xmm0\{k1\}\{z\},xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 08 3b c1[ 	]*vcvtps2bf8s xmm0,xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 28 3b c1[ 	]*vcvtps2bf8s xmm0,ymm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 48 3b c1[ 	]*vcvtps2bf8s xmm0,zmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 08 3b 01[ 	]*vcvtps2bf8s xmm0,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 09 3b c1[ 	]*vcvtps2bf8s xmm0\{k1\},xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 08 38 c1[ 	]*vcvtps2hf8 xmm0,xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 28 38 c1[ 	]*vcvtps2hf8 xmm0,ymm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 48 38 c1[ 	]*vcvtps2hf8 xmm0,zmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 08 38 01[ 	]*vcvtps2hf8 xmm0,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 09 38 c1[ 	]*vcvtps2hf8 xmm0\{k1\},xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 08 3a c1[ 	]*vcvtps2hf8s xmm0,xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 28 3a c1[ 	]*vcvtps2hf8s xmm0,ymm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 48 3a c1[ 	]*vcvtps2hf8s xmm0,zmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 08 3a 01[ 	]*vcvtps2hf8s xmm0,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 09 3a c1[ 	]*vcvtps2hf8s xmm0\{k1\},xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7d 08 38 c1[ 	]*vcvtrops2hf8 xmm0,xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7d 28 38 c1[ 	]*vcvtrops2hf8 xmm0,ymm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7d 48 38 c1[ 	]*vcvtrops2hf8 xmm0,zmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7d 08 38 01[ 	]*vcvtrops2hf8 xmm0,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7d 09 38 c1[ 	]*vcvtrops2hf8 xmm0\{k1\},xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7d 08 3a c1[ 	]*vcvtrops2hf8s xmm0,xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7d 28 3a c1[ 	]*vcvtrops2hf8s xmm0,ymm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7d 48 3a c1[ 	]*vcvtrops2hf8s xmm0,zmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7d 08 3a 01[ 	]*vcvtrops2hf8s xmm0,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7d 09 3a c1[ 	]*vcvtrops2hf8s xmm0\{k1\},xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 08 39 c2[ 	]*vcvtbiasps2bf8 xmm0,xmm1,xmm2
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 28 39 c2[ 	]*vcvtbiasps2bf8 xmm0,ymm1,ymm2
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 48 39 c2[ 	]*vcvtbiasps2bf8 xmm0,zmm1,zmm2
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 08 39 01[ 	]*vcvtbiasps2bf8 xmm0,xmm1,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 09 39 c2[ 	]*vcvtbiasps2bf8 xmm0\{k1\},xmm1,xmm2
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 89 39 c2[ 	]*vcvtbiasps2bf8 xmm0\{k1\}\{z\},xmm1,xmm2
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 08 3b c2[ 	]*vcvtbiasps2bf8s xmm0,xmm1,xmm2
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 28 3b c2[ 	]*vcvtbiasps2bf8s xmm0,ymm1,ymm2
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 48 3b c2[ 	]*vcvtbiasps2bf8s xmm0,zmm1,zmm2
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 08 3b 01[ 	]*vcvtbiasps2bf8s xmm0,xmm1,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 09 3b c2[ 	]*vcvtbiasps2bf8s xmm0\{k1\},xmm1,xmm2
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 08 38 c2[ 	]*vcvtbiasps2hf8 xmm0,xmm1,xmm2
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 28 38 c2[ 	]*vcvtbiasps2hf8 xmm0,ymm1,ymm2
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 48 38 c2[ 	]*vcvtbiasps2hf8 xmm0,zmm1,zmm2
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 08 38 01[ 	]*vcvtbiasps2hf8 xmm0,xmm1,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 09 38 c2[ 	]*vcvtbiasps2hf8 xmm0\{k1\},xmm1,xmm2
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 08 3a c2[ 	]*vcvtbiasps2hf8s xmm0,xmm1,xmm2
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 28 3a c2[ 	]*vcvtbiasps2hf8s xmm0,ymm1,ymm2
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 48 3a c2[ 	]*vcvtbiasps2hf8s xmm0,zmm1,zmm2
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 08 3a 01[ 	]*vcvtbiasps2hf8s xmm0,xmm1,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 09 3a c2[ 	]*vcvtbiasps2hf8s xmm0\{k1\},xmm1,xmm2
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fc 08 36 c1[ 	]*vcvtbf82ps xmm0,xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fc 28 36 c1[ 	]*vcvtbf82ps ymm0,xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fc 48 36 c1[ 	]*vcvtbf82ps zmm0,xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fc 08 36 01[ 	]*vcvtbf82ps xmm0,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fc 09 36 c1[ 	]*vcvtbf82ps xmm0\{k1\},xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fc 89 36 c1[ 	]*vcvtbf82ps xmm0\{k1\}\{z\},xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7c 08 36 c1[ 	]*vcvthf82ps xmm0,xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7c 28 36 c1[ 	]*vcvthf82ps ymm0,xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7c 48 36 c1[ 	]*vcvthf82ps zmm0,xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7c 08 36 01[ 	]*vcvthf82ps xmm0,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7c 09 36 c1[ 	]*vcvthf82ps xmm0\{k1\},xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fe 08 3d c8[ 	]*vcvtbf82bf4s xmm0,xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fe 28 3d c8[ 	]*vcvtbf82bf4s xmm0,ymm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fe 48 3d c8[ 	]*vcvtbf82bf4s ymm0,zmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fe 08 3d 09[ 	]*vcvtbf82bf4s QWORD PTR \[rcx\],xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 08 3d c8[ 	]*vcvthf82bf4s xmm0,xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 28 3d c8[ 	]*vcvthf82bf4s xmm0,ymm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 48 3d c8[ 	]*vcvthf82bf4s ymm0,zmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 08 3d 09[ 	]*vcvthf82bf4s QWORD PTR \[rcx\],xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fe 08 3e c1[ 	]*vcvtbf82bf6s xmm0,xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fe 28 3e c1[ 	]*vcvtbf82bf6s ymm0,ymm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fe 48 3e c1[ 	]*vcvtbf82bf6s zmm0,zmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 08 3c c1[ 	]*vcvthf82hf6s xmm0,xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 28 3c c1[ 	]*vcvthf82hf6s ymm0,ymm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 48 3c c1[ 	]*vcvthf82hf6s zmm0,zmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7c 08 37 c1[ 	]*vcvtbf42hf8 xmm0,xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7c 28 37 c1[ 	]*vcvtbf42hf8 ymm0,xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7c 48 37 c1[ 	]*vcvtbf42hf8 zmm0,ymm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7c 08 37 01[ 	]*vcvtbf42hf8 xmm0,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7c 09 37 c1[ 	]*vcvtbf42hf8 xmm0\{k1\},xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7c 89 37 c1[ 	]*vcvtbf42hf8 xmm0\{k1\}\{z\},xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fd 08 37 c1[ 	]*vcvtbf62hf8 xmm0,xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fd 28 37 c1[ 	]*vcvtbf62hf8 ymm0,ymm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fd 48 37 c1[ 	]*vcvtbf62hf8 zmm0,zmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fd 09 37 c1[ 	]*vcvtbf62hf8 xmm0\{k1\},xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fd 89 37 c1[ 	]*vcvtbf62hf8 xmm0\{k1\}\{z\},xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7d 08 37 c1[ 	]*vcvthf62hf8 xmm0,xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7d 28 37 c1[ 	]*vcvthf62hf8 ymm0,ymm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7d 48 37 c1[ 	]*vcvthf62hf8 zmm0,zmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7d 09 37 c1[ 	]*vcvthf62hf8 xmm0\{k1\},xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f2 7e 08 41 c8[ 	]*vpmovssdb xmm0,xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f2 7e 28 41 c8[ 	]*vpmovssdb xmm0,ymm1
+[ 	]*[a-f0-9]+:[ 	]*62 f2 7e 48 41 c8[ 	]*vpmovssdb xmm0,zmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f2 7e 08 41 09[ 	]*vpmovssdb DWORD PTR \[rcx\],xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f2 7e 09 41 c8[ 	]*vpmovssdb xmm0\{k1\},xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f2 7e 89 41 c8[ 	]*vpmovssdb xmm0\{k1\}\{z\},xmm1
+[ 	]*[a-f0-9]+:[ 	]*62 f3 7c 08 3d c1 01[ 	]*vunpackb xmm0,xmm1,0x1
+[ 	]*[a-f0-9]+:[ 	]*62 f3 7c 28 3d c1 01[ 	]*vunpackb ymm0,ymm1,0x1
+[ 	]*[a-f0-9]+:[ 	]*62 f3 7c 48 3d c1 01[ 	]*vunpackb zmm0,zmm1,0x1
+[ 	]*[a-f0-9]+:[ 	]*62 f3 7c 08 3d 01 01[ 	]*vunpackb xmm0,XMMWORD PTR \[rcx\],0x1
+[ 	]*[a-f0-9]+:[ 	]*62 f3 7c 09 3d c1 01[ 	]*vunpackb xmm0\{k1\},xmm1,0x1
+[ 	]*[a-f0-9]+:[ 	]*62 f3 7c 89 3d c1 01[ 	]*vunpackb xmm0\{k1\}\{z\},xmm1,0x1
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_v2_aux.d b/gas/testsuite/gas/i386/x86-64-avx10_v2_aux.d
new file mode 100644
index 00000000000..5b78457045d
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_v2_aux.d
@@ -0,0 +1,116 @@ 
+#as: -march=+avx10_v2_aux
+#objdump: -dw -Mx86-64
+#name: x86-64 AVX10_V2_AUX
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 08 39 c1[ 	]*vcvtps2bf8 %xmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 28 39 c1[ 	]*vcvtps2bf8 %ymm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 48 39 c1[ 	]*vcvtps2bf8 %zmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 08 39 01[ 	]*vcvtps2bf8 \(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 08 39 41 01[ 	]*vcvtps2bf8 0x10\(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 09 39 c1[ 	]*vcvtps2bf8 %xmm1,%xmm0\{%k1\}
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 89 39 c1[ 	]*vcvtps2bf8 %xmm1,%xmm0\{%k1\}\{z\}
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 08 3b c1[ 	]*vcvtps2bf8s %xmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 28 3b c1[ 	]*vcvtps2bf8s %ymm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 48 3b c1[ 	]*vcvtps2bf8s %zmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 08 3b 01[ 	]*vcvtps2bf8s \(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 09 3b c1[ 	]*vcvtps2bf8s %xmm1,%xmm0\{%k1\}
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 08 38 c1[ 	]*vcvtps2hf8 %xmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 28 38 c1[ 	]*vcvtps2hf8 %ymm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 48 38 c1[ 	]*vcvtps2hf8 %zmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 08 38 01[ 	]*vcvtps2hf8 \(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 09 38 c1[ 	]*vcvtps2hf8 %xmm1,%xmm0\{%k1\}
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 08 3a c1[ 	]*vcvtps2hf8s %xmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 28 3a c1[ 	]*vcvtps2hf8s %ymm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 48 3a c1[ 	]*vcvtps2hf8s %zmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 08 3a 01[ 	]*vcvtps2hf8s \(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 09 3a c1[ 	]*vcvtps2hf8s %xmm1,%xmm0\{%k1\}
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7d 08 38 c1[ 	]*vcvtrops2hf8 %xmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7d 28 38 c1[ 	]*vcvtrops2hf8 %ymm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7d 48 38 c1[ 	]*vcvtrops2hf8 %zmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7d 08 38 01[ 	]*vcvtrops2hf8 \(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7d 09 38 c1[ 	]*vcvtrops2hf8 %xmm1,%xmm0\{%k1\}
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7d 08 3a c1[ 	]*vcvtrops2hf8s %xmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7d 28 3a c1[ 	]*vcvtrops2hf8s %ymm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7d 48 3a c1[ 	]*vcvtrops2hf8s %zmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7d 08 3a 01[ 	]*vcvtrops2hf8s \(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7d 09 3a c1[ 	]*vcvtrops2hf8s %xmm1,%xmm0\{%k1\}
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 08 39 c2[ 	]*vcvtbiasps2bf8 %xmm2,%xmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 28 39 c2[ 	]*vcvtbiasps2bf8 %ymm2,%ymm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 48 39 c2[ 	]*vcvtbiasps2bf8 %zmm2,%zmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 08 39 01[ 	]*vcvtbiasps2bf8 \(%rcx\),%xmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 09 39 c2[ 	]*vcvtbiasps2bf8 %xmm2,%xmm1,%xmm0\{%k1\}
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 89 39 c2[ 	]*vcvtbiasps2bf8 %xmm2,%xmm1,%xmm0\{%k1\}\{z\}
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 08 3b c2[ 	]*vcvtbiasps2bf8s %xmm2,%xmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 28 3b c2[ 	]*vcvtbiasps2bf8s %ymm2,%ymm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 48 3b c2[ 	]*vcvtbiasps2bf8s %zmm2,%zmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 08 3b 01[ 	]*vcvtbiasps2bf8s \(%rcx\),%xmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 09 3b c2[ 	]*vcvtbiasps2bf8s %xmm2,%xmm1,%xmm0\{%k1\}
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 08 38 c2[ 	]*vcvtbiasps2hf8 %xmm2,%xmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 28 38 c2[ 	]*vcvtbiasps2hf8 %ymm2,%ymm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 48 38 c2[ 	]*vcvtbiasps2hf8 %zmm2,%zmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 08 38 01[ 	]*vcvtbiasps2hf8 \(%rcx\),%xmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 09 38 c2[ 	]*vcvtbiasps2hf8 %xmm2,%xmm1,%xmm0\{%k1\}
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 08 3a c2[ 	]*vcvtbiasps2hf8s %xmm2,%xmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 28 3a c2[ 	]*vcvtbiasps2hf8s %ymm2,%ymm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 48 3a c2[ 	]*vcvtbiasps2hf8s %zmm2,%zmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 08 3a 01[ 	]*vcvtbiasps2hf8s \(%rcx\),%xmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 74 09 3a c2[ 	]*vcvtbiasps2hf8s %xmm2,%xmm1,%xmm0\{%k1\}
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fc 08 36 c1[ 	]*vcvtbf82ps %xmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fc 28 36 c1[ 	]*vcvtbf82ps %xmm1,%ymm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fc 48 36 c1[ 	]*vcvtbf82ps %xmm1,%zmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fc 08 36 01[ 	]*vcvtbf82ps \(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fc 09 36 c1[ 	]*vcvtbf82ps %xmm1,%xmm0\{%k1\}
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fc 89 36 c1[ 	]*vcvtbf82ps %xmm1,%xmm0\{%k1\}\{z\}
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7c 08 36 c1[ 	]*vcvthf82ps %xmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7c 28 36 c1[ 	]*vcvthf82ps %xmm1,%ymm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7c 48 36 c1[ 	]*vcvthf82ps %xmm1,%zmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7c 08 36 01[ 	]*vcvthf82ps \(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7c 09 36 c1[ 	]*vcvthf82ps %xmm1,%xmm0\{%k1\}
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fe 08 3d c8[ 	]*vcvtbf82bf4s %xmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fe 28 3d c8[ 	]*vcvtbf82bf4s %ymm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fe 48 3d c8[ 	]*vcvtbf82bf4s %zmm1,%ymm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fe 08 3d 09[ 	]*vcvtbf82bf4s %xmm1,\(%rcx\)
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 08 3d c8[ 	]*vcvthf82bf4s %xmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 28 3d c8[ 	]*vcvthf82bf4s %ymm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 48 3d c8[ 	]*vcvthf82bf4s %zmm1,%ymm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 08 3d 09[ 	]*vcvthf82bf4s %xmm1,\(%rcx\)
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fe 08 3e c1[ 	]*vcvtbf82bf6s %xmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fe 28 3e c1[ 	]*vcvtbf82bf6s %ymm1,%ymm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fe 48 3e c1[ 	]*vcvtbf82bf6s %zmm1,%zmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 08 3c c1[ 	]*vcvthf82hf6s %xmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 28 3c c1[ 	]*vcvthf82hf6s %ymm1,%ymm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7e 48 3c c1[ 	]*vcvthf82hf6s %zmm1,%zmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7c 08 37 c1[ 	]*vcvtbf42hf8 %xmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7c 28 37 c1[ 	]*vcvtbf42hf8 %xmm1,%ymm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7c 48 37 c1[ 	]*vcvtbf42hf8 %ymm1,%zmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7c 08 37 01[ 	]*vcvtbf42hf8 \(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7c 09 37 c1[ 	]*vcvtbf42hf8 %xmm1,%xmm0\{%k1\}
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7c 89 37 c1[ 	]*vcvtbf42hf8 %xmm1,%xmm0\{%k1\}\{z\}
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fd 08 37 c1[ 	]*vcvtbf62hf8 %xmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fd 28 37 c1[ 	]*vcvtbf62hf8 %ymm1,%ymm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fd 48 37 c1[ 	]*vcvtbf62hf8 %zmm1,%zmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fd 09 37 c1[ 	]*vcvtbf62hf8 %xmm1,%xmm0\{%k1\}
+[ 	]*[a-f0-9]+:[ 	]*62 f5 fd 89 37 c1[ 	]*vcvtbf62hf8 %xmm1,%xmm0\{%k1\}\{z\}
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7d 08 37 c1[ 	]*vcvthf62hf8 %xmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7d 28 37 c1[ 	]*vcvthf62hf8 %ymm1,%ymm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7d 48 37 c1[ 	]*vcvthf62hf8 %zmm1,%zmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f5 7d 09 37 c1[ 	]*vcvthf62hf8 %xmm1,%xmm0\{%k1\}
+[ 	]*[a-f0-9]+:[ 	]*62 f2 7e 08 41 c8[ 	]*vpmovssdb %xmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f2 7e 28 41 c8[ 	]*vpmovssdb %ymm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f2 7e 48 41 c8[ 	]*vpmovssdb %zmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f2 7e 08 41 09[ 	]*vpmovssdb %xmm1,\(%rcx\)
+[ 	]*[a-f0-9]+:[ 	]*62 f2 7e 09 41 c8[ 	]*vpmovssdb %xmm1,%xmm0\{%k1\}
+[ 	]*[a-f0-9]+:[ 	]*62 f2 7e 89 41 c8[ 	]*vpmovssdb %xmm1,%xmm0\{%k1\}\{z\}
+[ 	]*[a-f0-9]+:[ 	]*62 f3 7c 08 3d c1 01[ 	]*vunpackb \$0x1,%xmm1,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f3 7c 28 3d c1 01[ 	]*vunpackb \$0x1,%ymm1,%ymm0
+[ 	]*[a-f0-9]+:[ 	]*62 f3 7c 48 3d c1 01[ 	]*vunpackb \$0x1,%zmm1,%zmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f3 7c 08 3d 01 01[ 	]*vunpackb \$0x1,\(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f3 7c 09 3d c1 01[ 	]*vunpackb \$0x1,%xmm1,%xmm0\{%k1\}
+[ 	]*[a-f0-9]+:[ 	]*62 f3 7c 89 3d c1 01[ 	]*vunpackb \$0x1,%xmm1,%xmm0\{%k1\}\{z\}
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_v2_aux.s b/gas/testsuite/gas/i386/x86-64-avx10_v2_aux.s
new file mode 100644
index 00000000000..24c2901f599
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_v2_aux.s
@@ -0,0 +1,149 @@ 
+	.text
+	.arch .avx10_v2_aux
+_start:
+	# VCVTPS2BF8 - F3.MAP5.W0 opcode 39
+	vcvtps2bf8	%xmm1, %xmm0
+	vcvtps2bf8	%ymm1, %xmm0
+	vcvtps2bf8	%zmm1, %xmm0
+	vcvtps2bf8	(%rcx), %xmm0
+	vcvtps2bf8	0x10(%rcx), %xmm0
+	vcvtps2bf8	%xmm1, %xmm0{%k1}
+	vcvtps2bf8	%xmm1, %xmm0{%k1}{z}
+
+	# VCVTPS2BF8S - F3.MAP5.W0 opcode 3B
+	vcvtps2bf8s	%xmm1, %xmm0
+	vcvtps2bf8s	%ymm1, %xmm0
+	vcvtps2bf8s	%zmm1, %xmm0
+	vcvtps2bf8s	(%rcx), %xmm0
+	vcvtps2bf8s	%xmm1, %xmm0{%k1}
+
+	# VCVTPS2HF8 - F3.MAP5.W0 opcode 38
+	vcvtps2hf8	%xmm1, %xmm0
+	vcvtps2hf8	%ymm1, %xmm0
+	vcvtps2hf8	%zmm1, %xmm0
+	vcvtps2hf8	(%rcx), %xmm0
+	vcvtps2hf8	%xmm1, %xmm0{%k1}
+
+	# VCVTPS2HF8S - F3.MAP5.W0 opcode 3A
+	vcvtps2hf8s	%xmm1, %xmm0
+	vcvtps2hf8s	%ymm1, %xmm0
+	vcvtps2hf8s	%zmm1, %xmm0
+	vcvtps2hf8s	(%rcx), %xmm0
+	vcvtps2hf8s	%xmm1, %xmm0{%k1}
+
+	# VCVTROPS2HF8 - 66.MAP5.W0 opcode 38
+	vcvtrops2hf8	%xmm1, %xmm0
+	vcvtrops2hf8	%ymm1, %xmm0
+	vcvtrops2hf8	%zmm1, %xmm0
+	vcvtrops2hf8	(%rcx), %xmm0
+	vcvtrops2hf8	%xmm1, %xmm0{%k1}
+
+	# VCVTROPS2HF8S - 66.MAP5.W0 opcode 3A
+	vcvtrops2hf8s	%xmm1, %xmm0
+	vcvtrops2hf8s	%ymm1, %xmm0
+	vcvtrops2hf8s	%zmm1, %xmm0
+	vcvtrops2hf8s	(%rcx), %xmm0
+	vcvtrops2hf8s	%xmm1, %xmm0{%k1}
+
+	# VCVTBIASPS2BF8 - NP.MAP5.W0 opcode 39
+	vcvtbiasps2bf8	%xmm2, %xmm1, %xmm0
+	vcvtbiasps2bf8	%ymm2, %ymm1, %xmm0
+	vcvtbiasps2bf8	%zmm2, %zmm1, %xmm0
+	vcvtbiasps2bf8	(%rcx), %xmm1, %xmm0
+	vcvtbiasps2bf8	%xmm2, %xmm1, %xmm0{%k1}
+	vcvtbiasps2bf8	%xmm2, %xmm1, %xmm0{%k1}{z}
+
+	# VCVTBIASPS2BF8S - NP.MAP5.W0 opcode 3B
+	vcvtbiasps2bf8s	%xmm2, %xmm1, %xmm0
+	vcvtbiasps2bf8s	%ymm2, %ymm1, %xmm0
+	vcvtbiasps2bf8s	%zmm2, %zmm1, %xmm0
+	vcvtbiasps2bf8s	(%rcx), %xmm1, %xmm0
+	vcvtbiasps2bf8s	%xmm2, %xmm1, %xmm0{%k1}
+
+	# VCVTBIASPS2HF8 - NP.MAP5.W0 opcode 38
+	vcvtbiasps2hf8	%xmm2, %xmm1, %xmm0
+	vcvtbiasps2hf8	%ymm2, %ymm1, %xmm0
+	vcvtbiasps2hf8	%zmm2, %zmm1, %xmm0
+	vcvtbiasps2hf8	(%rcx), %xmm1, %xmm0
+	vcvtbiasps2hf8	%xmm2, %xmm1, %xmm0{%k1}
+
+	# VCVTBIASPS2HF8S - NP.MAP5.W0 opcode 3A
+	vcvtbiasps2hf8s	%xmm2, %xmm1, %xmm0
+	vcvtbiasps2hf8s	%ymm2, %ymm1, %xmm0
+	vcvtbiasps2hf8s	%zmm2, %zmm1, %xmm0
+	vcvtbiasps2hf8s	(%rcx), %xmm1, %xmm0
+	vcvtbiasps2hf8s	%xmm2, %xmm1, %xmm0{%k1}
+
+	# VCVTBF82PS - NP.MAP5.W1 opcode 36
+	vcvtbf82ps	%xmm1, %xmm0
+	vcvtbf82ps	%xmm1, %ymm0
+	vcvtbf82ps	%xmm1, %zmm0
+	vcvtbf82ps	(%rcx), %xmm0
+	vcvtbf82ps	%xmm1, %xmm0{%k1}
+	vcvtbf82ps	%xmm1, %xmm0{%k1}{z}
+
+	# VCVTHF82PS - NP.MAP5.W0 opcode 36
+	vcvthf82ps	%xmm1, %xmm0
+	vcvthf82ps	%xmm1, %ymm0
+	vcvthf82ps	%xmm1, %zmm0
+	vcvthf82ps	(%rcx), %xmm0
+	vcvthf82ps	%xmm1, %xmm0{%k1}
+
+	# VCVTBF82BF4S - F3.MAP5.W1 opcode 3D (no masking)
+	vcvtbf82bf4s	%xmm1, %xmm0
+	vcvtbf82bf4s	%ymm1, %xmm0
+	vcvtbf82bf4s	%zmm1, %ymm0
+	vcvtbf82bf4s	%xmm1, (%rcx)
+
+	# VCVTHF82BF4S - F3.MAP5.W0 opcode 3D (no masking)
+	vcvthf82bf4s	%xmm1, %xmm0
+	vcvthf82bf4s	%ymm1, %xmm0
+	vcvthf82bf4s	%zmm1, %ymm0
+	vcvthf82bf4s	%xmm1, (%rcx)
+
+	# VCVTBF82BF6S - F3.MAP5.W1 opcode 3E (reg-reg only, no masking)
+	vcvtbf82bf6s	%xmm1, %xmm0
+	vcvtbf82bf6s	%ymm1, %ymm0
+	vcvtbf82bf6s	%zmm1, %zmm0
+
+	# VCVTHF82HF6S - F3.MAP5.W0 opcode 3C (reg-reg only, no masking)
+	vcvthf82hf6s	%xmm1, %xmm0
+	vcvthf82hf6s	%ymm1, %ymm0
+	vcvthf82hf6s	%zmm1, %zmm0
+
+	# VCVTBF42HF8 - NP.MAP5.W0 opcode 37
+	vcvtbf42hf8	%xmm1, %xmm0
+	vcvtbf42hf8	%xmm1, %ymm0
+	vcvtbf42hf8	%ymm1, %zmm0
+	vcvtbf42hf8	(%rcx), %xmm0
+	vcvtbf42hf8	%xmm1, %xmm0{%k1}
+	vcvtbf42hf8	%xmm1, %xmm0{%k1}{z}
+
+	# VCVTBF62HF8 - 66.MAP5.W1 opcode 37 (reg-reg only)
+	vcvtbf62hf8	%xmm1, %xmm0
+	vcvtbf62hf8	%ymm1, %ymm0
+	vcvtbf62hf8	%zmm1, %zmm0
+	vcvtbf62hf8	%xmm1, %xmm0{%k1}
+	vcvtbf62hf8	%xmm1, %xmm0{%k1}{z}
+
+	# VCVTHF62HF8 - 66.MAP5.W0 opcode 37 (reg-reg only)
+	vcvthf62hf8	%xmm1, %xmm0
+	vcvthf62hf8	%ymm1, %ymm0
+	vcvthf62hf8	%zmm1, %zmm0
+	vcvthf62hf8	%xmm1, %xmm0{%k1}
+
+	# VPMOVSSDB - F3.0F38.W0 opcode 41
+	vpmovssdb	%xmm1, %xmm0
+	vpmovssdb	%ymm1, %xmm0
+	vpmovssdb	%zmm1, %xmm0
+	vpmovssdb	%xmm1, (%rcx)
+	vpmovssdb	%xmm1, %xmm0{%k1}
+	vpmovssdb	%xmm1, %xmm0{%k1}{z}
+
+	# VUNPACKB - NP.0F3A.W0 opcode 3D
+	vunpackb	$1, %xmm1, %xmm0
+	vunpackb	$1, %ymm1, %ymm0
+	vunpackb	$1, %zmm1, %zmm0
+	vunpackb	$1, (%rcx), %xmm0
+	vunpackb	$1, %xmm1, %xmm0{%k1}
+	vunpackb	$1, %xmm1, %xmm0{%k1}{z}
diff --git a/gas/testsuite/gas/i386/x86-64.exp b/gas/testsuite/gas/i386/x86-64.exp
index 8ddf05481a5..d0d3cb47117 100644
--- a/gas/testsuite/gas/i386/x86-64.exp
+++ b/gas/testsuite/gas/i386/x86-64.exp
@@ -527,6 +527,8 @@  run_dump_test "x86-64-avx10_2-256-sm4-intel"
 run_dump_test "x86-64-avx10_2-512-sm4"
 run_dump_test "x86-64-avx10_2-512-sm4-intel"
 run_list_test "x86-64-avx10_2-sm4-inval"
+run_dump_test "x86-64-avx10_v2_aux"
+run_dump_test "x86-64-avx10_v2_aux-intel"
 run_dump_test "x86-64-amx-transpose"
 run_dump_test "x86-64-amx-transpose-intel"
 run_list_test "x86-64-amx-transpose-inval"
diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h
index 1aeac210c5d..ffecef5e796 100644
--- a/opcodes/i386-dis-evex-prefix.h
+++ b/opcodes/i386-dis-evex-prefix.h
@@ -243,6 +243,11 @@ 
     { VEX_W_TABLE (EVEX_W_0F383A_P_1) },
     { "%XEvpminuw",	{ XM, Vex, EXx }, 0 },
   },
+  /* PREFIX_EVEX_0F3841 */
+  {
+    { Bad_Opcode },
+    { "vpmovssdb",	{ EXxmmqd, XM }, 0 },
+  },
   /* PREFIX_EVEX_0F384A_W_0_L_2 */
   {
     { Bad_Opcode },
@@ -614,6 +619,53 @@ 
     { Bad_Opcode },
     { "vmovrs%BW",	{ XM, Mx }, 0 },
   },
+  /* PREFIX_EVEX_MAP5_36 */
+  {
+    { VEX_W_TABLE (EVEX_W_MAP5_36_P_0) },
+  },
+  /* PREFIX_EVEX_MAP5_37 */
+  {
+    { "vcvtbf42hf8",	{ XM, EXxmmq }, 0 },
+    { Bad_Opcode },
+    { VEX_W_TABLE (EVEX_W_MAP5_37_P_2) },
+  },
+  /* PREFIX_EVEX_MAP5_38 */
+  {
+    { "vcvtbiasps2hf8",	{ XMM, Vex, EXx }, 0 },
+    { "vcvtps2hf8",	{ XMM, EXx }, 0 },
+    { "vcvtrops2hf8",	{ XMM, EXx }, 0 },
+  },
+  /* PREFIX_EVEX_MAP5_39 */
+  {
+    { "vcvtbiasps2bf8",	{ XMM, Vex, EXx }, 0 },
+    { "vcvtps2bf8",	{ XMM, EXx }, 0 },
+  },
+  /* PREFIX_EVEX_MAP5_3A */
+  {
+    { "vcvtbiasps2hf8s",	{ XMM, Vex, EXx }, 0 },
+    { "vcvtps2hf8s",	{ XMM, EXx }, 0 },
+    { "vcvtrops2hf8s",	{ XMM, EXx }, 0 },
+  },
+  /* PREFIX_EVEX_MAP5_3B */
+  {
+    { "vcvtbiasps2bf8s",	{ XMM, Vex, EXx }, 0 },
+    { "vcvtps2bf8s",	{ XMM, EXx }, 0 },
+  },
+  /* PREFIX_EVEX_MAP5_3C */
+  {
+    { Bad_Opcode },
+    { "vcvthf82hf6s",	{ XM, EXx }, 0 },
+  },
+  /* PREFIX_EVEX_MAP5_3D */
+  {
+    { Bad_Opcode },
+    { VEX_W_TABLE (EVEX_W_MAP5_3D_P_1) },
+  },
+  /* PREFIX_EVEX_MAP5_3E */
+  {
+    { Bad_Opcode },
+    { VEX_W_TABLE (EVEX_W_MAP5_3E_P_1) },
+  },
   /* PREFIX_EVEX_MAP5_74 */
   {
     { "vcvtbiasp%XH2bf8s",	{ XMxmmq, Vex, EXxh }, 0 },
diff --git a/opcodes/i386-dis-evex-w.h b/opcodes/i386-dis-evex-w.h
index 310f121f499..6e94bc45fe1 100644
--- a/opcodes/i386-dis-evex-w.h
+++ b/opcodes/i386-dis-evex-w.h
@@ -486,6 +486,26 @@ 
     { "push2", { { PUSH2_POP2_Fixup, q_mode}, Eq }, 0 },
     { "push2p", { { PUSH2_POP2_Fixup, q_mode}, Eq }, 0 },
   },
+  /* EVEX_W_MAP5_36_P_0 */
+  {
+    { "vcvthf82ps",	{ XM, EXxmmqd }, 0 },
+    { "vcvtbf82ps",	{ XM, EXxmmqd }, 0 },
+  },
+  /* EVEX_W_MAP5_37_P_2 */
+  {
+    { "vcvthf62hf8",	{ XM, EXx }, 0 },
+    { "vcvtbf62hf8",	{ XM, EXx }, 0 },
+  },
+  /* EVEX_W_MAP5_3D_P_1 */
+  {
+    { "vcvthf82bf4s",	{ EXxmmq, XM }, 0 },
+    { "vcvtbf82bf4s",	{ EXxmmq, XM }, 0 },
+  },
+  /* EVEX_W_MAP5_3E_P_1 */
+  {
+    { Bad_Opcode },
+    { "vcvtbf82bf6s",	{ XM, EXx }, 0 },
+  },
   /* EVEX_W_MAP5_5B_P_0 */
   {
     { "vcvtdq2ph%XY",	{ XMxmmq, EXx, EXxEVexR }, 0 },
diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h
index b2f02e494f9..7d555aa9e11 100644
--- a/opcodes/i386-dis-evex.h
+++ b/opcodes/i386-dis-evex.h
@@ -366,7 +366,7 @@  static const struct dis386 evex_table[][256] = {
     { "%XEvpmaxu%DQ",	{ XM, Vex, EXx }, PREFIX_DATA },
     /* 40 */
     { "%XEvpmull%DQ",	{ XM, Vex, EXx }, PREFIX_DATA },
-    { Bad_Opcode },
+    { PREFIX_TABLE (PREFIX_EVEX_0F3841) },
     { "vgetexpp%XW",	{ XM, EXx, EXxEVexS }, PREFIX_DATA },
     { "vgetexps%XW",	{ XMScalar, VexScalar, EXdq, EXxEVexS }, PREFIX_DATA },
     { "vplzcnt%DQ",	{ XM, EXx }, PREFIX_DATA },
@@ -652,7 +652,7 @@  static const struct dis386 evex_table[][256] = {
     { EVEX_LEN_TABLE (EVEX_LEN_0F3A3A) },
     { EVEX_LEN_TABLE (EVEX_LEN_0F3A3B) },
     { Bad_Opcode },
-    { Bad_Opcode },
+    { "vunpackb",	{ XM, EXx, Ib }, 0 },
     { "vpcmpu%BW",	{ MaskG, Vex, EXx, VPCMP }, PREFIX_DATA },
     { "vpcmp%BW",	{ MaskG, Vex, EXx, VPCMP }, PREFIX_DATA },
     /* 40 */
@@ -1226,16 +1226,16 @@  static const struct dis386 evex_table[][256] = {
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { Bad_Opcode },
-    { Bad_Opcode },
+    { PREFIX_TABLE (PREFIX_EVEX_MAP5_36) },
+    { PREFIX_TABLE (PREFIX_EVEX_MAP5_37) },
     /* 38 */
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { Bad_Opcode },
+    { PREFIX_TABLE (PREFIX_EVEX_MAP5_38) },
+    { PREFIX_TABLE (PREFIX_EVEX_MAP5_39) },
+    { PREFIX_TABLE (PREFIX_EVEX_MAP5_3A) },
+    { PREFIX_TABLE (PREFIX_EVEX_MAP5_3B) },
+    { PREFIX_TABLE (PREFIX_EVEX_MAP5_3C) },
+    { PREFIX_TABLE (PREFIX_EVEX_MAP5_3D) },
+    { PREFIX_TABLE (PREFIX_EVEX_MAP5_3E) },
     { Bad_Opcode },
     /* 40 */
     { Bad_Opcode },
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 749c37e06e6..5643cfe55d5 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -1211,6 +1211,7 @@  enum
   PREFIX_EVEX_0F3838,
   PREFIX_EVEX_0F3839,
   PREFIX_EVEX_0F383A,
+  PREFIX_EVEX_0F3841,
   PREFIX_EVEX_0F384A_X86_64_W_0_L_2,
   PREFIX_EVEX_0F3852,
   PREFIX_EVEX_0F3853,
@@ -1272,6 +1273,15 @@  enum
   PREFIX_EVEX_MAP5_6D,
   PREFIX_EVEX_MAP5_6E_L_0,
   PREFIX_EVEX_MAP5_6F_X86_64,
+  PREFIX_EVEX_MAP5_36,
+  PREFIX_EVEX_MAP5_37,
+  PREFIX_EVEX_MAP5_38,
+  PREFIX_EVEX_MAP5_39,
+  PREFIX_EVEX_MAP5_3A,
+  PREFIX_EVEX_MAP5_3B,
+  PREFIX_EVEX_MAP5_3C,
+  PREFIX_EVEX_MAP5_3D,
+  PREFIX_EVEX_MAP5_3E,
   PREFIX_EVEX_MAP5_74,
   PREFIX_EVEX_MAP5_78,
   PREFIX_EVEX_MAP5_79,
@@ -1860,6 +1870,10 @@  enum
   EVEX_W_MAP4_F8_P3_M_1,
   EVEX_W_MAP4_FF_R_6,
 
+  EVEX_W_MAP5_36_P_0,
+  EVEX_W_MAP5_37_P_2,
+  EVEX_W_MAP5_3D_P_1,
+  EVEX_W_MAP5_3E_P_1,
   EVEX_W_MAP5_5B_P_0,
   EVEX_W_MAP5_6C_P_0,
   EVEX_W_MAP5_6C_P_2,
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index be580d48a18..11cc4ff19dc 100644
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -249,6 +249,8 @@  static const dependency isa_dependencies[] =
     "|AVX512_VNNI|AVX512_BF16|AVX512_FP16|AVX512_VPOPCNTDQ|AVX512_BITALG" },
   { "AVX10_2",
     "AVX10_1" },
+  { "AVX10_V2_AUX",
+    "AVX10_2" },
   { "SEV_ES",
     "SVME" },
   { "SNP",
@@ -450,6 +452,7 @@  static bitfield cpu_flags[] =
   BITFIELD (MSR_IMM),
   BITFIELD (APX_F),
   BITFIELD (AVX10_2),
+  BITFIELD (AVX10_V2_AUX),
   BITFIELD (MOVRS),
   BITFIELD (MWAITX),
   BITFIELD (CLZERO),
diff --git a/opcodes/i386-init.h b/opcodes/i386-init.h
index c10928125a7..eb2cc271bb3 100644
--- a/opcodes/i386-init.h
+++ b/opcodes/i386-init.h
@@ -27,7 +27,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_286_FLAGS \
   { { 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -38,7 +38,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_386_FLAGS \
   { { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -49,7 +49,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_486_FLAGS \
   { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -60,7 +60,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_586_FLAGS \
   { { 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -70,8 +70,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_686_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
@@ -81,8 +81,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_CMOV_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -93,7 +93,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_FXSR_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -104,7 +104,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_CLFLUSH_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -115,7 +115,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_NOP_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -126,7 +126,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_SYSCALL_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -137,7 +137,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_8087_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -148,7 +148,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_687_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
@@ -158,8 +158,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_FISTTP_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, \
@@ -169,8 +169,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_MMX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
@@ -181,7 +181,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_SSE_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
@@ -192,7 +192,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_SSE2_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
@@ -203,7 +203,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_SSE3_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -214,7 +214,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_PADLOCK_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
@@ -225,7 +225,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_PADLOCKRNG2_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, \
@@ -236,7 +236,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_PADLOCKPHE2_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
@@ -247,7 +247,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_PADLOCKXMODX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
@@ -258,7 +258,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_GMISM2_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -269,7 +269,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_GMICCS_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -280,7 +280,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_SVME_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -291,7 +291,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_VMX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -302,7 +302,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_SMX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -313,7 +313,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_SSSE3_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -324,7 +324,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_SSE4A_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -335,7 +335,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_LZCNT_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -346,7 +346,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_POPCNT_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -357,7 +357,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_MONITOR_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -368,7 +368,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_SSE4_1_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -379,7 +379,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_SSE4_2_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -390,7 +390,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AVX2_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -400,8 +400,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AVX512CD_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -411,8 +411,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AVX512ER_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -422,8 +422,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AVX512PF_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -433,8 +433,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AVX512DQ_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -444,8 +444,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AVX512BW_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -455,8 +455,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_IAMCU_FLAGS \
   { { 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -467,7 +467,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_XSAVE_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -478,7 +478,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_XSAVEOPT_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -489,7 +489,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AES_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
@@ -500,7 +500,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_PCLMULQDQ_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
@@ -511,7 +511,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_FMA_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -521,8 +521,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_FMA4_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -532,8 +532,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_XOP_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -543,8 +543,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_LWP_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -555,7 +555,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_BMI_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -566,7 +566,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_TBM_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -577,7 +577,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_MOVBE_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -588,7 +588,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_CX16_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -599,7 +599,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_LAHF_SAHF_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -610,7 +610,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_EPT_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -621,7 +621,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_RDTSCP_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -632,7 +632,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_FSGSBASE_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -643,7 +643,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_RDRND_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -654,7 +654,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_F16C_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -664,8 +664,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_BMI2_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -676,7 +676,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_RTM_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -687,7 +687,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_INVPCID_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -698,7 +698,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_VMFUNC_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -709,7 +709,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_MPX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -720,7 +720,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_RDSEED_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -731,7 +731,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ADX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -742,7 +742,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_PRFCHW_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -753,7 +753,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_SMAP_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -764,7 +764,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_SHA_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
@@ -775,7 +775,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_SHA512_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -785,8 +785,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_SM3_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -796,8 +796,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_SM4_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -807,8 +807,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_CLFLUSHOPT_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -819,7 +819,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_XSAVES_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -830,7 +830,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_XSAVEC_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -841,7 +841,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_PREFETCHWT1_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -852,7 +852,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_SE1_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -863,7 +863,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_CLWB_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -874,7 +874,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AVX512IFMA_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -884,8 +884,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AVX512VBMI_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -895,8 +895,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AVX512_4FMAPS_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -906,8 +906,8 @@ 
       1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AVX512_4VNNIW_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -917,8 +917,8 @@ 
       0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AVX512_VPOPCNTDQ_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -928,8 +928,8 @@ 
       0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AVX512_VBMI2_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -939,8 +939,8 @@ 
       0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AVX512_VNNI_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -950,8 +950,8 @@ 
       0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AVX512_BITALG_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -961,8 +961,8 @@ 
       0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AVX512_BF16_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -972,8 +972,8 @@ 
       0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AVX512_VP2INTERSECT_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -983,8 +983,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AVX512_BMM_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -994,8 +994,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_TDX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1006,7 +1006,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AVX_VNNI_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -1016,8 +1016,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AVX512_FP16_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -1027,8 +1027,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_PREFETCHI_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1039,7 +1039,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AVX_IFMA_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -1049,8 +1049,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AVX_VNNI_INT8_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -1060,8 +1060,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AVX_VNNI_INT16_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -1071,8 +1071,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_CMPCCXADD_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1083,7 +1083,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_WRMSRNS_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1094,7 +1094,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_MSRLIST_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1105,7 +1105,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AVX_NE_CONVERT_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -1115,8 +1115,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_RAO_INT_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1127,7 +1127,7 @@ 
       1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_FRED_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1138,7 +1138,7 @@ 
       0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_LKGS_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1149,7 +1149,7 @@ 
       0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_USER_MSR_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1160,7 +1160,7 @@ 
       0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_MSR_IMM_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1171,7 +1171,7 @@ 
       0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_MOVRS_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1182,7 +1182,7 @@ 
       0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_MWAITX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1193,7 +1193,7 @@ 
       0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_CLZERO_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1204,7 +1204,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_OSPKE_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1215,7 +1215,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_RDPID_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1226,7 +1226,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_PTWRITE_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1237,7 +1237,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_IBT_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1248,7 +1248,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_SHSTK_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1259,7 +1259,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AMX_INT8_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1270,7 +1270,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
       0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AMX_BF16_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1281,7 +1281,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
       0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AMX_FP16_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1292,7 +1292,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
       0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AMX_COMPLEX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1303,7 +1303,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
       0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AMX_TF32_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1314,7 +1314,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
       0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AMX_FP8_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1325,7 +1325,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
       0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AMX_MOVRS_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1336,7 +1336,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
       0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AMX_AVX512_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -1346,8 +1346,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AMX_TILE_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1358,7 +1358,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_GFNI_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
@@ -1369,7 +1369,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_VAES_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -1379,8 +1379,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_VPCLMULQDQ_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -1390,8 +1390,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_WBNOINVD_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1402,7 +1402,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_PCONFIG_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1413,7 +1413,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_PBNDKB_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1424,7 +1424,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_WAITPKG_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1435,7 +1435,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_UINTR_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1446,7 +1446,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_CLDEMOTE_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1457,7 +1457,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_MOVDIRI_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1468,7 +1468,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_MOVDIR64B_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1479,7 +1479,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ENQCMD_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1490,7 +1490,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_SERIALIZE_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1501,7 +1501,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_RDPRU_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1512,7 +1512,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_MCOMMIT_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1523,7 +1523,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_SEV_ES_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1534,7 +1534,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_TSXLDTRK_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1545,7 +1545,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_KL_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
@@ -1556,7 +1556,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_WIDEKL_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
@@ -1567,7 +1567,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
       1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_HRESET_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1578,7 +1578,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_INVLPGB_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1589,7 +1589,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_TLBSYNC_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1600,7 +1600,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_SNP_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1611,7 +1611,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
       0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_RMPQUERY_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1622,7 +1622,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
       0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_RMPREAD_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1633,7 +1633,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
       0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_APX_NCI_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1643,8 +1643,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 0, 0, 0 } }
 
 #define CPU_APX_NDD_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1654,8 +1654,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 0, 0, 0 } }
 
 #define CPU_APX_NF_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1665,8 +1665,19 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 0, 0, 0 } }
+
+#define CPU_AVX10_V2_AUX_FLAGS \
+  { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 1, 1, 1, 0, 0, 1, 1, \
+      0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, \
+      0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 1, \
+      0, 1, 0, 0, 0 } }
 
 #define CPU_287_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1676,8 +1687,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_387_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1687,8 +1698,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_3DNOW_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
@@ -1698,8 +1709,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_3DNOWA_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
@@ -1709,8 +1720,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AVX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -1720,8 +1731,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_HLE_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1731,8 +1742,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AVX512F_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -1742,8 +1753,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AVX512VL_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -1753,8 +1764,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_APX_F_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1764,8 +1775,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 0, 0, 0 } }
 
 #define CPU_AVX10_2_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -1775,8 +1786,8 @@ 
       0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, \
-      1, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, \
+      0, 1, 0, 0, 0 } }
 
 #define CPU_AMX_TRANSPOSE_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1787,7 +1798,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 1, 0, 0 } }
+      0, 0, 1, 0, 0 } }
 
 #define CPU_UNKNOWN_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
@@ -1798,7 +1809,7 @@ 
       1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
       1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
       1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
-      1, 0, 0, 0 } }
+      1, 1, 0, 0, 0 } }
 
 #define CPU_GENERIC32_FLAGS \
   { { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1809,7 +1820,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_GENERIC64_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 0, 1, 1, 1, 0, 0, 0, \
@@ -1819,8 +1830,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_NONE_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1831,7 +1842,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_PENTIUMPRO_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
@@ -1841,8 +1852,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_P2_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, \
@@ -1852,8 +1863,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_P3_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, \
@@ -1863,8 +1874,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_P4_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 0, 1, 1, 1, 0, 0, 0, \
@@ -1874,8 +1885,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_NOCONA_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, \
@@ -1885,8 +1896,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_CORE_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, \
@@ -1896,8 +1907,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_CORE2_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, \
@@ -1907,8 +1918,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_COREI7_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, \
@@ -1918,8 +1929,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_K6_FLAGS \
   { { 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
@@ -1929,8 +1940,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_K6_2_FLAGS \
   { { 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
@@ -1940,8 +1951,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ATHLON_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, \
@@ -1951,8 +1962,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_K8_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 0, 1, 0, 1, 1, 0, 1, 0, 1, 1, 1, 0, 0, 0, \
@@ -1962,8 +1973,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AMDFAM10_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 0, 1, 0, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, \
@@ -1973,8 +1984,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_BDVER1_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, \
@@ -1984,8 +1995,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_BDVER2_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, \
@@ -1995,8 +2006,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_BDVER3_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, \
@@ -2006,8 +2017,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_BDVER4_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, \
@@ -2017,8 +2028,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ZNVER1_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, \
@@ -2028,8 +2039,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ZNVER2_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, \
@@ -2039,8 +2050,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ZNVER3_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, \
@@ -2050,8 +2061,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-      0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ZNVER4_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, \
@@ -2061,8 +2072,8 @@ 
       0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-      0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 1, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 1, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ZNVER5_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, \
@@ -2072,8 +2083,8 @@ 
       0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 1, 0, 0, \
-      0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 1, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 1, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ZNVER6_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, \
@@ -2083,8 +2094,8 @@ 
       0, 0, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, \
       0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 1, 0, 0, \
-      0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 1, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 1, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_BTVER1_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, \
@@ -2094,8 +2105,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_BTVER2_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, \
@@ -2105,8 +2116,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ABM_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2117,7 +2128,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_AVX10_1_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -2127,8 +2138,8 @@ 
       0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_TSX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2138,8 +2149,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_APX_NCI_NDD_NF_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2149,8 +2160,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
+      1, 0, 0, 0, 0 } }
 
 #define CPU_ANY_FXSR_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, \
@@ -2161,7 +2172,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
       1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_8087_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, \
@@ -2171,8 +2182,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_687_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, \
@@ -2183,7 +2194,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_FISTTP_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
@@ -2194,7 +2205,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_MMX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
@@ -2204,8 +2215,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_SSE_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -2216,7 +2227,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
       1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_SSE2_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, \
@@ -2227,7 +2238,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
       1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_SSE3_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
@@ -2238,7 +2249,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_PADLOCK_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, \
@@ -2249,7 +2260,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_PADLOCKRNG2_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
@@ -2260,7 +2271,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_PADLOCKPHE2_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2271,7 +2282,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_PADLOCKXMODX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2282,7 +2293,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_SVME_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2293,7 +2304,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
       0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_VMX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2304,7 +2315,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_SSSE3_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2315,7 +2326,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_SSE4A_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2326,7 +2337,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_SSE4_1_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2337,7 +2348,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_SSE4_2_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2348,7 +2359,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX2_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2358,8 +2369,8 @@ 
       1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 1, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, \
-      1, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, \
+      0, 1, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512CD_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2369,8 +2380,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      1, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 1, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512ER_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2381,7 +2392,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512PF_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2392,7 +2403,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512DQ_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2402,8 +2413,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      1, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 1, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512BW_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2413,8 +2424,8 @@ 
       0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      1, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 1, 0, 0, 0 } }
 
 #define CPU_ANY_IAMCU_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2425,7 +2436,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_XSAVE_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2435,8 +2446,8 @@ 
       1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 1, \
       0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, \
       1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, \
-      1, 1, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 1, 1, \
+      1, 1, 1, 0, 0 } }
 
 #define CPU_ANY_XSAVEOPT_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2447,7 +2458,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AES_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2458,7 +2469,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_PCLMULQDQ_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2469,7 +2480,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_FMA_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2480,7 +2491,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_FMA4_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2491,7 +2502,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_XOP_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2502,7 +2513,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_LWP_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2513,7 +2524,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_EPT_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2524,7 +2535,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_F16C_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2535,7 +2546,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_RTM_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2546,7 +2557,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_VMFUNC_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2557,7 +2568,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_MPX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2568,7 +2579,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_SHA_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2579,7 +2590,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_SHA512_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2590,7 +2601,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_SM3_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2601,7 +2612,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_SM4_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2612,7 +2623,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_XSAVES_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2623,7 +2634,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_XSAVEC_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2634,7 +2645,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512IFMA_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2644,8 +2655,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      1, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 1, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512VBMI_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2655,8 +2666,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      1, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 1, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512_4FMAPS_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2667,7 +2678,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512_4VNNIW_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2678,7 +2689,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512_VPOPCNTDQ_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2688,8 +2699,8 @@ 
       0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      1, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 1, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512_VBMI2_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2699,8 +2710,8 @@ 
       0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      1, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 1, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512_VNNI_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2710,8 +2721,8 @@ 
       0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      1, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 1, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512_BITALG_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2721,8 +2732,8 @@ 
       0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      1, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 1, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512_BF16_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2732,8 +2743,8 @@ 
       0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      1, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 1, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512_VP2INTERSECT_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2744,7 +2755,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512_BMM_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2755,7 +2766,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX_VNNI_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2766,7 +2777,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512_FP16_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2776,8 +2787,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      1, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 1, 0, 0, 0 } }
 
 #define CPU_ANY_AVX_IFMA_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2788,7 +2799,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX_VNNI_INT8_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2799,7 +2810,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX_VNNI_INT16_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2810,7 +2821,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX_NE_CONVERT_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2821,7 +2832,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_FRED_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2832,7 +2843,7 @@ 
       0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_LKGS_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2843,7 +2854,7 @@ 
       0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_OSPKE_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2854,7 +2865,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AMX_INT8_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2865,7 +2876,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AMX_BF16_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2876,7 +2887,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AMX_FP16_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2887,7 +2898,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AMX_COMPLEX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2898,7 +2909,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AMX_TF32_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2909,7 +2920,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AMX_FP8_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2920,7 +2931,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AMX_MOVRS_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2931,7 +2942,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AMX_AVX512_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2942,7 +2953,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AMX_TILE_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2953,7 +2964,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, \
       1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 1, 0, 0 } }
+      0, 0, 1, 0, 0 } }
 
 #define CPU_ANY_GFNI_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2964,7 +2975,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_VAES_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2975,7 +2986,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_VPCLMULQDQ_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2986,7 +2997,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_SEV_ES_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2997,7 +3008,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
       0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_TSXLDTRK_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -3008,7 +3019,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_KL_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -3019,7 +3030,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
       1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_WIDEKL_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -3030,7 +3041,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_SNP_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -3041,7 +3052,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_RMPQUERY_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -3052,7 +3063,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_RMPREAD_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -3063,7 +3074,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_APX_NCI_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -3074,7 +3085,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_APX_NDD_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -3085,7 +3096,7 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_APX_NF_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -3096,7 +3107,18 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0 } }
+
+#define CPU_ANY_AVX10_V2_AUX_FLAGS \
+  { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_287_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, \
@@ -3106,8 +3128,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_387_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, \
@@ -3117,8 +3139,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_3DNOW_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -3128,8 +3150,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_3DNOWA_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -3139,8 +3161,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_64_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -3150,8 +3172,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 0, \
       0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, \
       1, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 1, 0, 0 } }
+      0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 1, 0, 0 } }
 
 #define CPU_ANY_AVX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -3161,8 +3183,8 @@ 
       1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 1, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, \
-      1, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 1, \
+      0, 1, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512F_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -3172,8 +3194,8 @@ 
       1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, \
-      1, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, \
+      0, 1, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512VL_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -3183,8 +3205,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-      1, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
+      0, 1, 0, 0, 0 } }
 
 #define CPU_ANY_APX_F_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -3194,8 +3216,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX10_2_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -3205,8 +3227,8 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      1, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 1, 0, 0, 0 } }
 
 #define CPU_ANY_AMX_TRANSPOSE_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -3217,5 +3239,5 @@ 
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 1, 0, 0 } }
+      0, 0, 1, 0, 0 } }
 
diff --git a/opcodes/i386-mnem.h b/opcodes/i386-mnem.h
index c44849c9984..764928a74a2 100644
--- a/opcodes/i386-mnem.h
+++ b/opcodes/i386-mnem.h
@@ -167,2470 +167,2491 @@  static const char i386_mnemonics[];
 #define MN_vcvt2ph2bf8 0x619
 #define MN_vcvtbiasph2bf8 0x625
 #define MN_vcvtph2bf8 0x634
-#define MN_vcvt2ph2hf8 0x63f
-#define MN_vcvtbiasph2hf8 0x64b
-#define MN_vcvtph2hf8 0x65a
-#define MN_vmovdqu8 0x665
-#define MN_vextractf32x8 0x66e
-#define MN_vinsertf32x8 0x67c
-#define MN_vbroadcastf32x8 0x689
-#define MN_vextracti32x8 0x699
-#define MN_vinserti32x8 0x6a7
-#define MN_vbroadcasti32x8 0x6b4
-#define MN_ud2a 0x6c4
-#define MN_aaa 0x6c9
-#define MN_daa 0x6cd
-#define MN_ssca 0x6d1
-#define MN_lea 0x6d6
-#define MN_invlpga 0x6da
-#define MN_pusha 0x6e2
-#define MN_ja 0x6e8
-#define MN_jna 0x6eb
-#define MN_ccmpna 0x6ef
-#define MN_setna 0x6f6
-#define MN_ctestna 0x6fc
-#define MN_setzuna 0x704
+#define MN_vcvtbiasps2bf8 0x63f
+#define MN_vcvtps2bf8 0x64e
+#define MN_vcvtbf42hf8 0x659
+#define MN_vcvtbf62hf8 0x665
+#define MN_vcvthf62hf8 0x671
+#define MN_vcvt2ph2hf8 0x67d
+#define MN_vcvtbiasph2hf8 0x689
+#define MN_vcvtph2hf8 0x698
+#define MN_vcvtrops2hf8 0x6a3
+#define MN_vcvtbiasps2hf8 0x6b0
+#define MN_vcvtps2hf8 0x6bf
+#define MN_vmovdqu8 0x6ca
+#define MN_vextractf32x8 0x6d3
+#define MN_vinsertf32x8 0x6e1
+#define MN_vbroadcastf32x8 0x6ee
+#define MN_vextracti32x8 0x6fe
+#define MN_vinserti32x8 0x70c
+#define MN_vbroadcasti32x8 0x719
+#define MN_ud2a 0x729
+#define MN_aaa 0x72e
+#define MN_daa 0x732
+#define MN_ssca 0x736
+#define MN_lea 0x73b
+#define MN_invlpga 0x73f
+#define MN_pusha 0x747
+#define MN_ja 0x74d
+#define MN_jna 0x750
+#define MN_ccmpna 0x754
+#define MN_setna 0x75b
+#define MN_ctestna 0x761
+#define MN_setzuna 0x769
 #define MN_cmovna (MN_fcmovna + 1)
 #define MN_fcmovna (MN_cfcmovna + 1)
-#define MN_cfcmovna 0x70c
-#define MN_ccmpa 0x715
-#define MN_popa 0x71b
+#define MN_cfcmovna 0x771
+#define MN_ccmpa 0x77a
+#define MN_popa 0x780
 #define MN_movntdqa (MN_vmovntdqa + 1)
-#define MN_vmovntdqa 0x720
+#define MN_vmovntdqa 0x785
 #define MN_movdqa (MN_vmovdqa + 1)
-#define MN_vmovdqa 0x72a
-#define MN_seta 0x732
-#define MN_prefetchnta 0x737
-#define MN_ctesta 0x743
-#define MN_setzua 0x74a
+#define MN_vmovdqa 0x78f
+#define MN_seta 0x797
+#define MN_prefetchnta 0x79c
+#define MN_ctesta 0x7a8
+#define MN_setzua 0x7af
 #define MN_cmova (MN_fcmova + 1)
 #define MN_fcmova (MN_cfcmova + 1)
-#define MN_cfcmova 0x751
-#define MN_rex_b 0x759
-#define MN_ud2b 0x75f
-#define MN_vpermi2b 0x764
-#define MN_vpmovm2b 0x76d
-#define MN_vpermt2b 0x776
-#define MN_movdir64b 0x77f
-#define MN_cmpxchg16b 0x789
-#define MN_cmpxchg8b 0x794
-#define MN_vpshab 0x79e
-#define MN_sbb 0x7a5
+#define MN_cfcmova 0x7b6
+#define MN_rex_b 0x7be
+#define MN_ud2b 0x7c4
+#define MN_vpermi2b 0x7c9
+#define MN_vpmovm2b 0x7d2
+#define MN_vpermt2b 0x7db
+#define MN_movdir64b 0x7e4
+#define MN_cmpxchg16b 0x7ee
+#define MN_cmpxchg8b 0x7f9
+#define MN_vpshab 0x803
+#define MN_sbb 0x80a
 #define MN_psubb (MN_vpsubb + 1)
-#define MN_vpsubb 0x7a9
-#define MN_xcrypt_ecb 0x7b0
-#define MN_xcryptecb 0x7bb
-#define MN_llwpcb 0x7c5
-#define MN_slwpcb 0x7cc
-#define MN_kaddb 0x7d3
+#define MN_vpsubb 0x80e
+#define MN_xcrypt_ecb 0x815
+#define MN_xcryptecb 0x820
+#define MN_llwpcb 0x82a
+#define MN_slwpcb 0x831
+#define MN_kaddb 0x838
 #define MN_paddb (MN_vpaddb + 1)
-#define MN_vpaddb 0x7d9
-#define MN_kandb 0x7e0
-#define MN_vpexpandb 0x7e6
-#define MN_vpmovusdb 0x7f0
-#define MN_vpmovsdb 0x7fa
-#define MN_udb 0x803
-#define MN_vpmovdb 0x807
-#define MN_vpcomgeb 0x80f
-#define MN_vpcomleb 0x818
-#define MN_vpcmpnleb 0x821
-#define MN_vpcmpleb 0x82b
-#define MN_vpcomfalseb 0x834
-#define MN_vpcomtrueb 0x840
-#define MN_xcrypt_cfb 0x84b
-#define MN_xcryptcfb 0x856
-#define MN_xcrypt_ofb 0x860
-#define MN_xcryptofb 0x86b
+#define MN_vpaddb 0x83e
+#define MN_kandb 0x845
+#define MN_vpexpandb 0x84b
+#define MN_vpmovssdb 0x855
+#define MN_vpmovusdb 0x85f
+#define MN_vpmovsdb 0x869
+#define MN_udb 0x872
+#define MN_vpmovdb 0x876
+#define MN_vpcomgeb 0x87e
+#define MN_vpcomleb 0x887
+#define MN_vpcmpnleb 0x890
+#define MN_vpcmpleb 0x89a
+#define MN_vpcomfalseb 0x8a3
+#define MN_vpcomtrueb 0x8af
+#define MN_xcrypt_cfb 0x8ba
+#define MN_xcryptcfb 0x8c5
+#define MN_xcrypt_ofb 0x8cf
+#define MN_xcryptofb 0x8da
 #define MN_pshufb (MN_vpshufb + 1)
-#define MN_vpshufb 0x875
-#define MN_invlpgb 0x87d
+#define MN_vpshufb 0x8e4
+#define MN_invlpgb 0x8ec
 #define MN_pavgb (MN_vpavgb + 1)
-#define MN_vpavgb 0x885
-#define MN_jb 0x88c
-#define MN_pbndkb 0x88f
+#define MN_vpavgb 0x8f4
+#define MN_jb 0x8fb
+#define MN_vunpackb 0x8fe
+#define MN_pbndkb 0x907
 #define MN_pmovmskb (MN_vpmovmskb + 1)
-#define MN_vpmovmskb 0x896
-#define MN_vpshlb 0x8a0
-#define MN_kshiftlb 0x8a7
+#define MN_vpmovmskb 0x90e
+#define MN_vpshlb 0x918
+#define MN_kshiftlb 0x91f
 #define MN_gf2p8mulb (MN_vgf2p8mulb + 1)
-#define MN_vgf2p8mulb 0x8b0
-#define MN_vpblendmb 0x8bb
-#define MN_vptestnmb 0x8c5
-#define MN_vpcomb 0x8cf
-#define MN_vpshufbitqmb 0x8d6
-#define MN_vpermb 0x8e3
-#define MN_vptestmb 0x8ea
-#define MN_kandnb 0x8f3
+#define MN_vgf2p8mulb 0x928
+#define MN_vpblendmb 0x933
+#define MN_vptestnmb 0x93d
+#define MN_vpcomb 0x947
+#define MN_vpshufbitqmb 0x94e
+#define MN_vpermb 0x95b
+#define MN_vptestmb 0x962
+#define MN_kandnb 0x96b
 #define MN_psignb (MN_vpsignb + 1)
-#define MN_vpsignb 0x8fa
-#define MN_jnb 0x902
-#define MN_ccmpnb 0x906
-#define MN_setnb 0x90d
-#define MN_ctestnb 0x913
-#define MN_setzunb 0x91b
+#define MN_vpsignb 0x972
+#define MN_jnb 0x97a
+#define MN_ccmpnb 0x97e
+#define MN_setnb 0x985
+#define MN_ctestnb 0x98b
+#define MN_setzunb 0x993
 #define MN_cmovnb (MN_fcmovnb + 1)
 #define MN_fcmovnb (MN_cfcmovnb + 1)
-#define MN_cfcmovnb 0x923
-#define MN_ccmpb 0x92c
-#define MN_vpcmpb 0x932
-#define MN_vpcomeqb 0x939
+#define MN_cfcmovnb 0x99b
+#define MN_ccmpb 0x9a4
+#define MN_vpcmpb 0x9aa
+#define MN_vpcomeqb 0x9b1
 #define MN_gf2p8affineqb (MN_vgf2p8affineqb + 1)
-#define MN_vgf2p8affineqb 0x942
-#define MN_vpcomneqb 0x951
-#define MN_vpcmpneqb 0x95b
+#define MN_vgf2p8affineqb 0x9ba
+#define MN_vpcomneqb 0x9c9
+#define MN_vpcmpneqb 0x9d3
 #define MN_pcmpeqb (MN_vpcmpeqb + 1)
-#define MN_vpcmpeqb 0x965
-#define MN_vpmovusqb 0x96e
-#define MN_vpmovsqb 0x978
-#define MN_vpmultishiftqb 0x981
+#define MN_vpcmpeqb 0x9dd
+#define MN_vpmovusqb 0x9e6
+#define MN_vpmovsqb 0x9f0
+#define MN_vpmultishiftqb 0x9f9
 #define MN_gf2p8affineinvqb (MN_vgf2p8affineinvqb + 1)
-#define MN_vgf2p8affineinvqb 0x990
-#define MN_vpmovqb 0x9a2
-#define MN_rex_rb 0x9aa
-#define MN_korb 0x9b1
-#define MN_kxnorb 0x9b6
-#define MN_kxorb 0x9bd
+#define MN_vgf2p8affineinvqb 0xa08
+#define MN_vpmovqb 0xa1a
+#define MN_rex_rb 0xa22
+#define MN_korb 0xa29
+#define MN_kxnorb 0xa2e
+#define MN_kxorb 0xa35
 #define MN_pinsrb (MN_vpinsrb + 1)
-#define MN_vpinsrb 0x9c3
-#define MN_kshiftrb 0x9cb
+#define MN_vpinsrb 0xa3b
+#define MN_kshiftrb 0xa43
 #define MN_pextrb (MN_vpextrb + 1)
-#define MN_vpextrb 0x9d4
-#define MN_rex_wrb 0x9dc
+#define MN_vpextrb 0xa4c
+#define MN_rex_wrb 0xa54
 #define MN_pabsb (MN_vpabsb + 1)
-#define MN_vpabsb 0x9e4
+#define MN_vpabsb 0xa5c
 #define MN_psubsb (MN_vpsubsb + 1)
-#define MN_vpsubsb 0x9eb
+#define MN_vpsubsb 0xa63
 #define MN_paddsb (MN_vpaddsb + 1)
-#define MN_vpaddsb 0x9f3
+#define MN_vpaddsb 0xa6b
 #define MN_pminsb (MN_vpminsb + 1)
-#define MN_vpminsb 0x9fb
-#define MN_vmovrsb 0xa03
-#define MN_vpcompressb 0xa0b
+#define MN_vpminsb 0xa73
+#define MN_vmovrsb 0xa7b
+#define MN_vpcompressb 0xa83
 #define MN_psubusb (MN_vpsubusb + 1)
-#define MN_vpsubusb 0xa17
+#define MN_vpsubusb 0xa8f
 #define MN_paddusb (MN_vpaddusb + 1)
-#define MN_vpaddusb 0xa20
-#define MN_pavgusb 0xa29
-#define MN_movsb 0xa31
+#define MN_vpaddusb 0xa98
+#define MN_pavgusb 0xaa1
+#define MN_movsb 0xaa9
 #define MN_pmaxsb (MN_vpmaxsb + 1)
-#define MN_vpmaxsb 0xa37
-#define MN_setb 0xa3f
-#define MN_vpcomgtb 0xa44
+#define MN_vpmaxsb 0xaaf
+#define MN_setb 0xab7
+#define MN_vpcomgtb 0xabc
 #define MN_pcmpgtb (MN_vpcmpgtb + 1)
-#define MN_vpcmpgtb 0xa4d
-#define MN_vpcomltb 0xa56
-#define MN_vpcmpnltb 0xa5f
-#define MN_vpcmpltb 0xa69
-#define MN_vpopcntb 0xa72
-#define MN_knotb 0xa7b
-#define MN_vprotb 0xa81
-#define MN_vpbroadcastb 0xa88
-#define MN_ctestb 0xa95
-#define MN_ktestb 0xa9c
-#define MN_kortestb 0xaa3
-#define MN_vpcomgeub 0xaac
-#define MN_vpcomleub 0xab6
-#define MN_vpcmpnleub 0xac0
-#define MN_vpcmpleub 0xacb
-#define MN_vpcomfalseub 0xad5
-#define MN_vpcomtrueub 0xae2
-#define MN_vpcomub 0xaee
+#define MN_vpcmpgtb 0xac5
+#define MN_vpcomltb 0xace
+#define MN_vpcmpnltb 0xad7
+#define MN_vpcmpltb 0xae1
+#define MN_vpopcntb 0xaea
+#define MN_knotb 0xaf3
+#define MN_vprotb 0xaf9
+#define MN_vpbroadcastb 0xb00
+#define MN_ctestb 0xb0d
+#define MN_ktestb 0xb14
+#define MN_kortestb 0xb1b
+#define MN_vpcomgeub 0xb24
+#define MN_vpcomleub 0xb2e
+#define MN_vpcmpnleub 0xb38
+#define MN_vpcmpleub 0xb43
+#define MN_vpcomfalseub 0xb4d
+#define MN_vpcomtrueub 0xb5a
+#define MN_vpcomub 0xb66
 #define MN_pminub (MN_vpminub + 1)
-#define MN_vpminub 0xaf6
-#define MN_vpcmpub 0xafe
-#define MN_vpcomequb 0xb06
-#define MN_vpcomnequb 0xb10
-#define MN_vpcmpnequb 0xb1b
-#define MN_vpcmpequb 0xb26
+#define MN_vpminub 0xb6e
+#define MN_vpcmpub 0xb76
+#define MN_vpcomequb 0xb7e
+#define MN_vpcomnequb 0xb88
+#define MN_vpcmpnequb 0xb93
+#define MN_vpcmpequb 0xb9e
 #define MN_sub (MN_fsub + 1)
 #define MN_fsub (MN_pfsub + 1)
-#define MN_pfsub 0xb30
-#define MN_fisub 0xb36
-#define MN_vpcomgtub 0xb3c
-#define MN_vpcomltub 0xb46
-#define MN_vpcmpnltub 0xb50
-#define MN_vpcmpltub 0xb5b
+#define MN_pfsub 0xba8
+#define MN_fisub 0xbae
+#define MN_vpcomgtub 0xbb4
+#define MN_vpcomltub 0xbbe
+#define MN_vpcmpnltub 0xbc8
+#define MN_vpcmpltub 0xbd3
 #define MN_pmaxub (MN_vpmaxub + 1)
-#define MN_vpmaxub 0xb65
-#define MN_setzub 0xb6d
+#define MN_vpmaxub 0xbdd
+#define MN_setzub 0xbe5
 #define MN_pblendvb (MN_vpblendvb + 1)
-#define MN_vpblendvb 0xb74
-#define MN_vbitrevb 0xb7e
+#define MN_vpblendvb 0xbec
+#define MN_vbitrevb 0xbf6
 #define MN_cmovb (MN_fcmovb + 1)
 #define MN_fcmovb (MN_cfcmovb + 1)
-#define MN_cfcmovb 0xb87
-#define MN_kmovb 0xb8f
-#define MN_rex_wb 0xb95
-#define MN_clwb 0xb9c
+#define MN_cfcmovb 0xbff
+#define MN_kmovb 0xc07
+#define MN_rex_wb 0xc0d
+#define MN_clwb 0xc14
 #define MN_packsswb (MN_vpacksswb + 1)
-#define MN_vpacksswb 0xba1
+#define MN_vpacksswb 0xc19
 #define MN_packuswb (MN_vpackuswb + 1)
-#define MN_vpackuswb 0xbab
-#define MN_vpmovuswb 0xbb5
-#define MN_vpmovswb 0xbbf
-#define MN_vpmovwb 0xbc8
-#define MN_rex_xb 0xbd0
-#define MN_rex_rxb 0xbd7
-#define MN_rex_wrxb 0xbdf
-#define MN_rex_wxb 0xbe8
-#define MN_movzb 0xbf0
-#define MN_clac 0xbf6
-#define MN_stac 0xbfb
-#define MN_xcrypt_cbc 0xc00
-#define MN_xcryptcbc 0xc0b
-#define MN_pfacc 0xc15
-#define MN_pfnacc 0xc1b
-#define MN_pfpnacc 0xc22
-#define MN_adc 0xc2a
+#define MN_vpackuswb 0xc23
+#define MN_vpmovuswb 0xc2d
+#define MN_vpmovswb 0xc37
+#define MN_vpmovwb 0xc40
+#define MN_rex_xb 0xc48
+#define MN_rex_rxb 0xc4f
+#define MN_rex_wrxb 0xc57
+#define MN_rex_wxb 0xc60
+#define MN_movzb 0xc68
+#define MN_clac 0xc6e
+#define MN_stac 0xc73
+#define MN_xcrypt_cbc 0xc78
+#define MN_xcryptcbc 0xc83
+#define MN_pfacc 0xc8d
+#define MN_pfnacc 0xc93
+#define MN_pfpnacc 0xc9a
+#define MN_adc 0xca2
 #define MN_dec (MN_aesdec + 3)
 #define MN_aesdec (MN_vaesdec + 1)
-#define MN_vaesdec 0xc2e
-#define MN_getsec 0xc36
-#define MN_xsavec 0xc3d
-#define MN_blcic 0xc44
-#define MN_blsic 0xc4a
-#define MN_jc 0xc50
-#define MN_t1mskc 0xc53
-#define MN_salc 0xc5a
-#define MN_clc 0xc5f
-#define MN_cmc 0xc63
+#define MN_vaesdec 0xca6
+#define MN_getsec 0xcae
+#define MN_xsavec 0xcb5
+#define MN_blcic 0xcbc
+#define MN_blsic 0xcc2
+#define MN_jc 0xcc8
+#define MN_t1mskc 0xccb
+#define MN_salc 0xcd2
+#define MN_clc 0xcd7
+#define MN_cmc 0xcdb
 #define MN_aesimc (MN_vaesimc + 1)
-#define MN_vaesimc 0xc67
-#define MN_rdpmc 0xc6f
+#define MN_vaesimc 0xcdf
+#define MN_rdpmc 0xce7
 #define MN_aesenc (MN_vaesenc + 1)
-#define MN_vaesenc 0xc75
-#define MN_inc 0xc7d
-#define MN_jnc 0xc81
-#define MN_ccmpnc 0xc85
-#define MN_setnc 0xc8c
-#define MN_ctestnc 0xc92
-#define MN_vmfunc 0xc9a
-#define MN_setzunc 0xca1
+#define MN_vaesenc 0xced
+#define MN_inc 0xcf5
+#define MN_jnc 0xcf9
+#define MN_ccmpnc 0xcfd
+#define MN_setnc 0xd04
+#define MN_ctestnc 0xd0a
+#define MN_vmfunc 0xd12
+#define MN_setzunc 0xd19
 #define MN_cmovnc (MN_cfcmovnc + 2)
-#define MN_cfcmovnc 0xca9
-#define MN_tlbsync 0xcb2
-#define MN_ccmpc 0xcba
-#define MN_rdtsc 0xcc0
-#define MN_btc 0xcc6
-#define MN_setc 0xcca
+#define MN_cfcmovnc 0xd21
+#define MN_tlbsync 0xd2a
+#define MN_ccmpc 0xd32
+#define MN_rdtsc 0xd38
+#define MN_btc 0xd3e
+#define MN_setc 0xd42
 #define MN_stc (MN_ctestc + 3)
-#define MN_ctestc 0xccf
-#define MN_setzuc 0xcd6
+#define MN_ctestc 0xd47
+#define MN_setzuc 0xd4e
 #define MN_cmovc (MN_cfcmovc + 2)
-#define MN_cfcmovc 0xcdd
-#define MN_vpermi2d 0xce5
-#define MN_vpmovm2d 0xcee
-#define MN_vpermt2d 0xcf7
-#define MN_vpbroadcastmw2d 0xd00
-#define MN_aad 0xd10
-#define MN_vmread 0xd14
-#define MN_rmpread 0xd1b
-#define MN_vpshad 0xd23
-#define MN_vmload 0xd2a
+#define MN_cfcmovc 0xd55
+#define MN_vpermi2d 0xd5d
+#define MN_vpmovm2d 0xd66
+#define MN_vpermt2d 0xd6f
+#define MN_vpbroadcastmw2d 0xd78
+#define MN_aad 0xd88
+#define MN_vmread 0xd8c
+#define MN_rmpread 0xd93
+#define MN_vpshad 0xd9b
+#define MN_vmload 0xda2
 #define MN_psrad (MN_vpsrad + 1)
-#define MN_vpsrad 0xd31
-#define MN_vphaddbd 0xd38
-#define MN_vphaddubd 0xd41
+#define MN_vpsrad 0xda9
+#define MN_vphaddbd 0xdb0
+#define MN_vphaddubd 0xdb9
 #define MN_phsubd (MN_vphsubd + 1)
-#define MN_vphsubd 0xd4b
+#define MN_vphsubd 0xdc3
 #define MN_psubd (MN_vpsubd + 1)
-#define MN_vpsubd 0xd53
+#define MN_vpsubd 0xdcb
 #define MN_pmovsxbd (MN_vpmovsxbd + 1)
-#define MN_vpmovsxbd 0xd5a
+#define MN_vpmovsxbd 0xdd2
 #define MN_pmovzxbd (MN_vpmovzxbd + 1)
-#define MN_vpmovzxbd 0xd64
+#define MN_vpmovzxbd 0xddc
 #define MN_add (MN_aadd + 1)
-#define MN_aadd 0xd6e
+#define MN_aadd 0xde6
 #define MN_fadd (MN_pfadd + 1)
-#define MN_pfadd 0xd73
-#define MN_fiadd 0xd79
-#define MN_tileloadd 0xd7f
+#define MN_pfadd 0xdeb
+#define MN_fiadd 0xdf1
+#define MN_tileloadd 0xdf7
 #define MN_xadd (MN_cmpnaxadd + 5)
-#define MN_cmpnaxadd 0xd89
-#define MN_cmpaxadd 0xd93
-#define MN_cmpnbxadd 0xd9c
-#define MN_cmpbxadd 0xda6
-#define MN_cmpncxadd 0xdaf
-#define MN_cmpcxadd 0xdb9
-#define MN_cmpnaexadd 0xdc2
-#define MN_cmpaexadd 0xdcd
-#define MN_cmpnbexadd 0xdd7
-#define MN_cmpbexadd 0xde2
-#define MN_cmpngexadd 0xdec
-#define MN_cmpgexadd 0xdf7
-#define MN_cmpnlexadd 0xe01
-#define MN_cmplexadd 0xe0c
-#define MN_cmpnexadd 0xe16
-#define MN_cmpexadd 0xe20
-#define MN_cmppexadd 0xe29
-#define MN_cmpngxadd 0xe33
-#define MN_cmpgxadd 0xe3d
-#define MN_cmpnlxadd 0xe46
-#define MN_cmplxadd 0xe50
-#define MN_cmpnoxadd 0xe59
-#define MN_cmpoxadd 0xe63
-#define MN_cmppoxadd 0xe6c
-#define MN_cmpnpxadd 0xe76
-#define MN_cmppxadd 0xe80
-#define MN_cmpnsxadd 0xe89
-#define MN_cmpsxadd 0xe93
-#define MN_cmpnzxadd 0xe9c
-#define MN_cmpzxadd 0xea6
+#define MN_cmpnaxadd 0xe01
+#define MN_cmpaxadd 0xe0b
+#define MN_cmpnbxadd 0xe14
+#define MN_cmpbxadd 0xe1e
+#define MN_cmpncxadd 0xe27
+#define MN_cmpcxadd 0xe31
+#define MN_cmpnaexadd 0xe3a
+#define MN_cmpaexadd 0xe45
+#define MN_cmpnbexadd 0xe4f
+#define MN_cmpbexadd 0xe5a
+#define MN_cmpngexadd 0xe64
+#define MN_cmpgexadd 0xe6f
+#define MN_cmpnlexadd 0xe79
+#define MN_cmplexadd 0xe84
+#define MN_cmpnexadd 0xe8e
+#define MN_cmpexadd 0xe98
+#define MN_cmppexadd 0xea1
+#define MN_cmpngxadd 0xeab
+#define MN_cmpgxadd 0xeb5
+#define MN_cmpnlxadd 0xebe
+#define MN_cmplxadd 0xec8
+#define MN_cmpnoxadd 0xed1
+#define MN_cmpoxadd 0xedb
+#define MN_cmppoxadd 0xee4
+#define MN_cmpnpxadd 0xeee
+#define MN_cmppxadd 0xef8
+#define MN_cmpnsxadd 0xf01
+#define MN_cmpsxadd 0xf0b
+#define MN_cmpnzxadd 0xf14
+#define MN_cmpzxadd 0xf1e
 #define MN_phaddd (MN_vphaddd + 1)
-#define MN_vphaddd 0xeaf
-#define MN_kaddd 0xeb7
+#define MN_vphaddd 0xf27
+#define MN_kaddd 0xf2f
 #define MN_paddd (MN_vpaddd + 1)
-#define MN_vpaddd 0xebd
-#define MN_vpshldd 0xec4
-#define MN_kandd 0xecc
-#define MN_vpandd 0xed2
-#define MN_vpexpandd 0xed9
-#define MN_vpblendd 0xee3
-#define MN_vpgatherdd 0xeec
-#define MN_vpscatterdd 0xef7
-#define MN_vpshrdd 0xf03
-#define MN_vpmacsdd 0xf0b
-#define MN_vpmacssdd 0xf14
-#define MN_rdseed 0xf1e
-#define MN_vpcomged 0xf25
-#define MN_vpcomled 0xf2e
-#define MN_vpcmpnled 0xf37
-#define MN_vpcmpled 0xf41
-#define MN_tilestored 0xf4a
-#define MN_vpcomfalsed 0xf55
-#define MN_ttransposed 0xf61
-#define MN_vpcomtrued 0xf6d
-#define MN_pi2fd 0xf78
+#define MN_vpaddd 0xf35
+#define MN_vpshldd 0xf3c
+#define MN_kandd 0xf44
+#define MN_vpandd 0xf4a
+#define MN_vpexpandd 0xf51
+#define MN_vpblendd 0xf5b
+#define MN_vpgatherdd 0xf64
+#define MN_vpscatterdd 0xf6f
+#define MN_vpshrdd 0xf7b
+#define MN_vpmacsdd 0xf83
+#define MN_vpmacssdd 0xf8c
+#define MN_rdseed 0xf96
+#define MN_vpcomged 0xf9d
+#define MN_vpcomled 0xfa6
+#define MN_vpcmpnled 0xfaf
+#define MN_vpcmpled 0xfb9
+#define MN_tilestored 0xfc2
+#define MN_vpcomfalsed 0xfcd
+#define MN_ttransposed 0xfd9
+#define MN_vpcomtrued 0xfe5
+#define MN_pi2fd 0xff0
 #define MN_pshufd (MN_vpshufd + 1)
-#define MN_vpshufd 0xf7e
-#define MN_vpternlogd 0xf86
-#define MN_pf2id 0xf91
-#define MN_invpcid 0xf97
-#define MN_rdpid 0xf9f
-#define MN_invvpid 0xfa5
-#define MN_cpuid 0xfad
-#define MN_fbld 0xfb3
-#define MN_cld 0xfb8
-#define MN_fld 0xfbc
+#define MN_vpshufd 0xff6
+#define MN_vpternlogd 0xffe
+#define MN_pf2id 0x1009
+#define MN_invpcid 0x100f
+#define MN_rdpid 0x1017
+#define MN_invvpid 0x101d
+#define MN_cpuid 0x1025
+#define MN_fbld 0x102b
+#define MN_cld 0x1030
+#define MN_fld 0x1034
 #define MN_shld (MN_vpshld + 2)
-#define MN_vpshld 0xfc0
-#define MN_fild 0xfc7
+#define MN_vpshld 0x1038
+#define MN_fild 0x103f
 #define MN_pslld (MN_vpslld + 1)
-#define MN_vpslld 0xfcc
+#define MN_vpslld 0x1044
 #define MN_pmulld (MN_vpmulld + 1)
-#define MN_vpmulld 0xfd3
-#define MN_vprold 0xfdb
+#define MN_vpmulld 0x104b
+#define MN_vprold 0x1053
 #define MN_psrld (MN_vpsrld + 1)
-#define MN_vpsrld 0xfe2
-#define MN_vmptrld 0xfe9
-#define MN_kshiftld 0xff1
-#define MN_enqcmd 0xffa
-#define MN_vpblendmd 0x1001
-#define MN_vptestnmd 0x100b
-#define MN_vpcomd 0x1015
-#define MN_vpermd 0x101c
-#define MN_vptestmd 0x1023
+#define MN_vpsrld 0x105a
+#define MN_vmptrld 0x1061
+#define MN_kshiftld 0x1069
+#define MN_enqcmd 0x1072
+#define MN_vpblendmd 0x1079
+#define MN_vptestnmd 0x1083
+#define MN_vpcomd 0x108d
+#define MN_vpermd 0x1094
+#define MN_vptestmd 0x109b
 #define MN_and (MN_aand + 1)
-#define MN_aand 0x102c
+#define MN_aand 0x10a4
 #define MN_pand (MN_vpand + 1)
-#define MN_vpand 0x1031
-#define MN_rdrand 0x1037
-#define MN_bnd 0x103e
-#define MN_kandnd 0x1042
-#define MN_vpandnd 0x1049
-#define MN_xend 0x1051
-#define MN_valignd 0x1056
+#define MN_vpand 0x10a9
+#define MN_rdrand 0x10af
+#define MN_bnd 0x10b6
+#define MN_kandnd 0x10ba
+#define MN_vpandnd 0x10c1
+#define MN_xend 0x10c9
+#define MN_valignd 0x10ce
 #define MN_psignd (MN_vpsignd + 1)
-#define MN_vpsignd 0x105e
-#define MN_bound 0x1066
-#define MN_slod 0x106c
-#define MN_vfmaddsub231pd 0x1071
-#define MN_vfmsub231pd 0x1080
-#define MN_vfnmsub231pd 0x108c
-#define MN_vfmsubadd231pd 0x1099
-#define MN_vfmadd231pd 0x10a8
-#define MN_vfnmadd231pd 0x10b4
-#define MN_vfmaddsub132pd 0x10c1
-#define MN_vfmsub132pd 0x10d0
-#define MN_vfnmsub132pd 0x10dc
-#define MN_vfmsubadd132pd 0x10e9
-#define MN_vfmadd132pd 0x10f8
-#define MN_vfnmadd132pd 0x1104
-#define MN_vcvtph2pd 0x1111
-#define MN_vpermi2pd 0x111b
-#define MN_cvtpi2pd 0x1125
-#define MN_vpermil2pd 0x112e
-#define MN_vexp2pd 0x1139
+#define MN_vpsignd 0x10d6
+#define MN_bound 0x10de
+#define MN_slod 0x10e4
+#define MN_vfmaddsub231pd 0x10e9
+#define MN_vfmsub231pd 0x10f8
+#define MN_vfnmsub231pd 0x1104
+#define MN_vfmsubadd231pd 0x1111
+#define MN_vfmadd231pd 0x1120
+#define MN_vfnmadd231pd 0x112c
+#define MN_vfmaddsub132pd 0x1139
+#define MN_vfmsub132pd 0x1148
+#define MN_vfnmsub132pd 0x1154
+#define MN_vfmsubadd132pd 0x1161
+#define MN_vfmadd132pd 0x1170
+#define MN_vfnmadd132pd 0x117c
+#define MN_vcvtph2pd 0x1189
+#define MN_vpermi2pd 0x1193
+#define MN_cvtpi2pd 0x119d
+#define MN_vpermil2pd 0x11a6
+#define MN_vexp2pd 0x11b1
 #define MN_cvtdq2pd (MN_vcvtdq2pd + 1)
-#define MN_vcvtdq2pd 0x1141
-#define MN_vcvtudq2pd 0x114b
-#define MN_vcvtqq2pd 0x1156
-#define MN_vcvtuqq2pd 0x1160
+#define MN_vcvtdq2pd 0x11b9
+#define MN_vcvtudq2pd 0x11c3
+#define MN_vcvtqq2pd 0x11ce
+#define MN_vcvtuqq2pd 0x11d8
 #define MN_cvtps2pd (MN_vcvtps2pd + 1)
-#define MN_vcvtps2pd 0x116b
-#define MN_vpermt2pd 0x1175
-#define MN_vfmaddsub213pd 0x117f
-#define MN_vfmsub213pd 0x118e
-#define MN_vfnmsub213pd 0x119a
-#define MN_vfmsubadd213pd 0x11a7
-#define MN_vfmadd213pd 0x11b6
-#define MN_vfnmadd213pd 0x11c2
-#define MN_vrcp14pd 0x11cf
-#define MN_vrsqrt14pd 0x11d8
-#define MN_vrcp28pd 0x11e3
-#define MN_vrsqrt28pd 0x11ec
+#define MN_vcvtps2pd 0x11e3
+#define MN_vpermt2pd 0x11ed
+#define MN_vfmaddsub213pd 0x11f7
+#define MN_vfmsub213pd 0x1206
+#define MN_vfnmsub213pd 0x1212
+#define MN_vfmsubadd213pd 0x121f
+#define MN_vfmadd213pd 0x122e
+#define MN_vfnmadd213pd 0x123a
+#define MN_vrcp14pd 0x1247
+#define MN_vrsqrt14pd 0x1250
+#define MN_vrcp28pd 0x125b
+#define MN_vrsqrt28pd 0x1264
 #define MN_movapd (MN_vmovapd + 1)
-#define MN_vmovapd 0x11f7
-#define MN_pswapd 0x11ff
+#define MN_vmovapd 0x126f
+#define MN_pswapd 0x1277
 #define MN_subpd (MN_addsubpd + 3)
 #define MN_addsubpd (MN_vfmaddsubpd + 3)
-#define MN_vfmaddsubpd 0x1206
-#define MN_vaddsubpd 0x1212
+#define MN_vfmaddsubpd 0x127e
+#define MN_vaddsubpd 0x128a
 #define MN_hsubpd (MN_vhsubpd + 1)
-#define MN_vhsubpd 0x121c
-#define MN_vfmsubpd 0x1224
-#define MN_vfnmsubpd 0x122d
-#define MN_vsubpd 0x1237
-#define MN_vgatherpf0dpd 0x123e
-#define MN_vscatterpf0dpd 0x124c
-#define MN_vgatherpf1dpd 0x125b
-#define MN_vscatterpf1dpd 0x1269
+#define MN_vhsubpd 0x1294
+#define MN_vfmsubpd 0x129c
+#define MN_vfnmsubpd 0x12a5
+#define MN_vsubpd 0x12af
+#define MN_vgatherpf0dpd 0x12b6
+#define MN_vscatterpf0dpd 0x12c4
+#define MN_vgatherpf1dpd 0x12d3
+#define MN_vscatterpf1dpd 0x12e1
 #define MN_addpd (MN_vfmsubaddpd + 6)
-#define MN_vfmsubaddpd 0x1278
+#define MN_vfmsubaddpd 0x12f0
 #define MN_haddpd (MN_vhaddpd + 1)
-#define MN_vhaddpd 0x1284
-#define MN_vfmaddpd 0x128c
-#define MN_vfnmaddpd 0x1295
-#define MN_vaddpd 0x129f
+#define MN_vhaddpd 0x12fc
+#define MN_vfmaddpd 0x1304
+#define MN_vfnmaddpd 0x130d
+#define MN_vaddpd 0x1317
 #define MN_andpd (MN_vexpandpd + 4)
-#define MN_vexpandpd 0x12a6
-#define MN_vandpd 0x12b0
+#define MN_vexpandpd 0x131e
+#define MN_vandpd 0x1328
 #define MN_blendpd (MN_vblendpd + 1)
-#define MN_vblendpd 0x12b7
+#define MN_vblendpd 0x132f
 #define MN_roundpd (MN_vroundpd + 1)
-#define MN_vroundpd 0x12c0
-#define MN_vgatherdpd 0x12c9
-#define MN_vscatterdpd 0x12d4
+#define MN_vroundpd 0x1338
+#define MN_vgatherdpd 0x1341
+#define MN_vscatterdpd 0x134c
 #define MN_cmpunordpd (MN_vcmpunordpd + 1)
-#define MN_vcmpunordpd 0x12e0
+#define MN_vcmpunordpd 0x1358
 #define MN_cmpordpd (MN_vcmpordpd + 1)
-#define MN_vcmpordpd 0x12ec
-#define MN_vreducepd 0x12f6
-#define MN_vrangepd 0x1300
-#define MN_vcmpngepd 0x1309
-#define MN_vcmpgepd 0x1313
-#define MN_vrndscalepd 0x131c
+#define MN_vcmpordpd 0x1364
+#define MN_vreducepd 0x136e
+#define MN_vrangepd 0x1378
+#define MN_vcmpngepd 0x1381
+#define MN_vcmpgepd 0x138b
+#define MN_vrndscalepd 0x1394
 #define MN_cmpnlepd (MN_vcmpnlepd + 1)
-#define MN_vcmpnlepd 0x1328
+#define MN_vcmpnlepd 0x13a0
 #define MN_cmplepd (MN_vcmplepd + 1)
-#define MN_vcmplepd 0x1332
-#define MN_vcmpfalsepd 0x133b
-#define MN_vcmptruepd 0x1347
-#define MN_vscalefpd 0x1352
+#define MN_vcmplepd 0x13aa
+#define MN_vcmpfalsepd 0x13b3
+#define MN_vcmptruepd 0x13bf
+#define MN_vscalefpd 0x13ca
 #define MN_shufpd (MN_vshufpd + 1)
-#define MN_vshufpd 0x135c
+#define MN_vshufpd 0x13d4
 #define MN_unpckhpd (MN_vunpckhpd + 1)
-#define MN_vunpckhpd 0x1364
+#define MN_vunpckhpd 0x13dc
 #define MN_movhpd (MN_vmovhpd + 1)
-#define MN_vmovhpd 0x136e
+#define MN_vmovhpd 0x13e6
 #define MN_movmskpd (MN_vmovmskpd + 1)
-#define MN_vmovmskpd 0x1376
-#define MN_vpermilpd 0x1380
+#define MN_vmovmskpd 0x13ee
+#define MN_vpermilpd 0x13f8
 #define MN_unpcklpd (MN_vunpcklpd + 1)
-#define MN_vunpcklpd 0x138a
+#define MN_vunpcklpd 0x1402
 #define MN_mulpd (MN_vmulpd + 1)
-#define MN_vmulpd 0x1394
+#define MN_vmulpd 0x140c
 #define MN_movlpd (MN_vmovlpd + 1)
-#define MN_vmovlpd 0x139b
-#define MN_vpcmpd 0x13a3
-#define MN_vblendmpd 0x13aa
-#define MN_vfixupimmpd 0x13b4
-#define MN_vpermpd 0x13c0
+#define MN_vmovlpd 0x1413
+#define MN_vpcmpd 0x141b
+#define MN_vblendmpd 0x1422
+#define MN_vfixupimmpd 0x142c
+#define MN_vpermpd 0x1438
 #define MN_andnpd (MN_vandnpd + 1)
-#define MN_vandnpd 0x13c8
+#define MN_vandnpd 0x1440
 #define MN_minpd (MN_vminpd + 1)
-#define MN_vminpd 0x13d0
+#define MN_vminpd 0x1448
 #define MN_dppd (MN_vdppd + 1)
-#define MN_vdppd 0x13d7
+#define MN_vdppd 0x144f
 #define MN_cmppd (MN_vcmppd + 1)
-#define MN_vcmppd 0x13dd
-#define MN_vgetexppd 0x13e4
-#define MN_vgatherpf0qpd 0x13ee
-#define MN_vscatterpf0qpd 0x13fc
-#define MN_vgatherpf1qpd 0x140b
-#define MN_vscatterpf1qpd 0x1419
-#define MN_vcmpunord_qpd 0x1428
-#define MN_vcmpord_qpd 0x1436
+#define MN_vcmppd 0x1455
+#define MN_vgetexppd 0x145c
+#define MN_vgatherpf0qpd 0x1466
+#define MN_vscatterpf0qpd 0x1474
+#define MN_vgatherpf1qpd 0x1483
+#define MN_vscatterpf1qpd 0x1491
+#define MN_vcmpunord_qpd 0x14a0
+#define MN_vcmpord_qpd 0x14ae
 #define MN_cmpneqpd (MN_vcmpneqpd + 1)
-#define MN_vcmpneqpd 0x1442
+#define MN_vcmpneqpd 0x14ba
 #define MN_cmpeqpd (MN_vcmpeqpd + 1)
-#define MN_vcmpeqpd 0x144c
-#define MN_vcmpge_oqpd 0x1455
-#define MN_vcmple_oqpd 0x1461
-#define MN_vcmpfalse_oqpd 0x146d
-#define MN_vcmpneq_oqpd 0x147c
-#define MN_vcmpeq_oqpd 0x1489
-#define MN_vcmpgt_oqpd 0x1495
-#define MN_vcmplt_oqpd 0x14a1
-#define MN_vgatherqpd 0x14ad
-#define MN_vscatterqpd 0x14b8
-#define MN_vcmpnge_uqpd 0x14c4
-#define MN_vcmpnle_uqpd 0x14d1
-#define MN_vcmptrue_uqpd 0x14de
-#define MN_vcmpneq_uqpd 0x14ec
-#define MN_vcmpeq_uqpd 0x14f9
-#define MN_vcmpngt_uqpd 0x1505
-#define MN_vcmpnlt_uqpd 0x1512
+#define MN_vcmpeqpd 0x14c4
+#define MN_vcmpge_oqpd 0x14cd
+#define MN_vcmple_oqpd 0x14d9
+#define MN_vcmpfalse_oqpd 0x14e5
+#define MN_vcmpneq_oqpd 0x14f4
+#define MN_vcmpeq_oqpd 0x1501
+#define MN_vcmpgt_oqpd 0x150d
+#define MN_vcmplt_oqpd 0x1519
+#define MN_vgatherqpd 0x1525
+#define MN_vscatterqpd 0x1530
+#define MN_vcmpnge_uqpd 0x153c
+#define MN_vcmpnle_uqpd 0x1549
+#define MN_vcmptrue_uqpd 0x1556
+#define MN_vcmpneq_uqpd 0x1564
+#define MN_vcmpeq_uqpd 0x1571
+#define MN_vcmpngt_uqpd 0x157d
+#define MN_vcmpnlt_uqpd 0x158a
 #define MN_orpd (MN_vorpd + 1)
-#define MN_vorpd 0x151f
+#define MN_vorpd 0x1597
 #define MN_xorpd (MN_vxorpd + 1)
-#define MN_vxorpd 0x1525
-#define MN_vcmpunord_spd 0x152c
-#define MN_vcmpord_spd 0x153a
-#define MN_vcmpge_ospd 0x1546
-#define MN_vcmple_ospd 0x1552
-#define MN_vcmpfalse_ospd 0x155e
-#define MN_vcmpneq_ospd 0x156d
-#define MN_vcmpeq_ospd 0x157a
-#define MN_vcmpgt_ospd 0x1586
-#define MN_vcmplt_ospd 0x1592
-#define MN_vfpclasspd 0x159e
-#define MN_incsspd 0x15a9
-#define MN_rdsspd 0x15b1
-#define MN_vcompresspd 0x15b8
-#define MN_vcmpnge_uspd 0x15c4
-#define MN_vcmpnle_uspd 0x15d1
-#define MN_vcmptrue_uspd 0x15de
-#define MN_vcmpneq_uspd 0x15ec
-#define MN_vcmpeq_uspd 0x15f9
-#define MN_vcmpngt_uspd 0x1605
-#define MN_vcmpnlt_uspd 0x1612
-#define MN_vcmpngtpd 0x161f
-#define MN_vcmpgtpd 0x1629
+#define MN_vxorpd 0x159d
+#define MN_vcmpunord_spd 0x15a4
+#define MN_vcmpord_spd 0x15b2
+#define MN_vcmpge_ospd 0x15be
+#define MN_vcmple_ospd 0x15ca
+#define MN_vcmpfalse_ospd 0x15d6
+#define MN_vcmpneq_ospd 0x15e5
+#define MN_vcmpeq_ospd 0x15f2
+#define MN_vcmpgt_ospd 0x15fe
+#define MN_vcmplt_ospd 0x160a
+#define MN_vfpclasspd 0x1616
+#define MN_incsspd 0x1621
+#define MN_rdsspd 0x1629
+#define MN_vcompresspd 0x1630
+#define MN_vcmpnge_uspd 0x163c
+#define MN_vcmpnle_uspd 0x1649
+#define MN_vcmptrue_uspd 0x1656
+#define MN_vcmpneq_uspd 0x1664
+#define MN_vcmpeq_uspd 0x1671
+#define MN_vcmpngt_uspd 0x167d
+#define MN_vcmpnlt_uspd 0x168a
+#define MN_vcmpngtpd 0x1697
+#define MN_vcmpgtpd 0x16a1
 #define MN_cmpnltpd (MN_vcmpnltpd + 1)
-#define MN_vcmpnltpd 0x1632
+#define MN_vcmpnltpd 0x16aa
 #define MN_cmpltpd (MN_vcmpltpd + 1)
-#define MN_vcmpltpd 0x163c
-#define MN_vgetmantpd 0x1645
+#define MN_vcmpltpd 0x16b4
+#define MN_vgetmantpd 0x16bd
 #define MN_movntpd (MN_vmovntpd + 1)
-#define MN_vmovntpd 0x1650
+#define MN_vmovntpd 0x16c8
 #define MN_sqrtpd (MN_vsqrtpd + 1)
-#define MN_vsqrtpd 0x1659
-#define MN_vtestpd 0x1661
+#define MN_vsqrtpd 0x16d1
+#define MN_vtestpd 0x16d9
 #define MN_movupd (MN_vmovupd + 1)
-#define MN_vmovupd 0x1669
+#define MN_vmovupd 0x16e1
 #define MN_blendvpd (MN_vblendvpd + 1)
-#define MN_vblendvpd 0x1671
+#define MN_vblendvpd 0x16e9
 #define MN_divpd (MN_vdivpd + 1)
-#define MN_vdivpd 0x167b
-#define MN_vmaskmovpd 0x1682
+#define MN_vdivpd 0x16f3
+#define MN_vmaskmovpd 0x16fa
 #define MN_maxpd (MN_vminmaxpd + 4)
-#define MN_vminmaxpd 0x168d
-#define MN_vmaxpd 0x1697
-#define MN_vfrczpd 0x169e
-#define MN_vpcomeqd 0x16a6
-#define MN_vpcomneqd 0x16af
-#define MN_vpcmpneqd 0x16b9
+#define MN_vminmaxpd 0x1705
+#define MN_vmaxpd 0x170f
+#define MN_vfrczpd 0x1716
+#define MN_vpcomeqd 0x171e
+#define MN_vpcomneqd 0x1727
+#define MN_vpcmpneqd 0x1731
 #define MN_pcmpeqd (MN_vpcmpeqd + 1)
-#define MN_vpcmpeqd 0x16c3
-#define MN_vpgatherqd 0x16cc
-#define MN_vpscatterqd 0x16d7
-#define MN_vpmovusqd 0x16e3
-#define MN_vpmovsqd 0x16ed
-#define MN_vpmovqd 0x16f6
-#define MN_shrd 0x16fe
-#define MN_kord 0x1703
-#define MN_kxnord 0x1708
-#define MN_vpord 0x170f
-#define MN_vprord 0x1715
+#define MN_vpcmpeqd 0x173b
+#define MN_vpgatherqd 0x1744
+#define MN_vpscatterqd 0x174f
+#define MN_vpmovusqd 0x175b
+#define MN_vpmovsqd 0x1765
+#define MN_vpmovqd 0x176e
+#define MN_shrd 0x1776
+#define MN_kord 0x177b
+#define MN_kxnord 0x1780
+#define MN_vpord 0x1787
+#define MN_vprord 0x178d
 #define MN_word (MN_aword + 1)
-#define MN_aword 0x171c
+#define MN_aword 0x1794
 #define MN_dword (MN_adword + 1)
-#define MN_adword 0x1722
-#define MN_kxord 0x1729
-#define MN_vpxord 0x172f
+#define MN_adword 0x179a
+#define MN_kxord 0x17a1
+#define MN_vpxord 0x17a7
 #define MN_pinsrd (MN_vpinsrd + 1)
-#define MN_vpinsrd 0x1736
-#define MN_kshiftrd 0x173e
+#define MN_vpinsrd 0x17ae
+#define MN_kshiftrd 0x17b6
 #define MN_pextrd (MN_vpextrd + 1)
-#define MN_vpextrd 0x1747
-#define MN_vfmsub231sd 0x174f
-#define MN_vfnmsub231sd 0x175b
-#define MN_vfmadd231sd 0x1768
-#define MN_vfnmadd231sd 0x1774
-#define MN_vfmsub132sd 0x1781
-#define MN_vfnmsub132sd 0x178d
-#define MN_vfmadd132sd 0x179a
-#define MN_vfnmadd132sd 0x17a6
-#define MN_vcvtsh2sd 0x17b3
+#define MN_vpextrd 0x17bf
+#define MN_vfmsub231sd 0x17c7
+#define MN_vfnmsub231sd 0x17d3
+#define MN_vfmadd231sd 0x17e0
+#define MN_vfnmadd231sd 0x17ec
+#define MN_vfmsub132sd 0x17f9
+#define MN_vfnmsub132sd 0x1805
+#define MN_vfmadd132sd 0x1812
+#define MN_vfnmadd132sd 0x181e
+#define MN_vcvtsh2sd 0x182b
 #define MN_cvtsi2sd (MN_vcvtsi2sd + 1)
-#define MN_vcvtsi2sd 0x17bd
-#define MN_vcvtusi2sd 0x17c7
+#define MN_vcvtsi2sd 0x1835
+#define MN_vcvtusi2sd 0x183f
 #define MN_cvtss2sd (MN_vcvtss2sd + 1)
-#define MN_vcvtss2sd 0x17d2
-#define MN_vfmsub213sd 0x17dc
-#define MN_vfnmsub213sd 0x17e8
-#define MN_vfmadd213sd 0x17f5
-#define MN_vfnmadd213sd 0x1801
-#define MN_vrcp14sd 0x180e
-#define MN_vrsqrt14sd 0x1817
-#define MN_vrcp28sd 0x1822
-#define MN_vrsqrt28sd 0x182b
+#define MN_vcvtss2sd 0x184a
+#define MN_vfmsub213sd 0x1854
+#define MN_vfnmsub213sd 0x1860
+#define MN_vfmadd213sd 0x186d
+#define MN_vfnmadd213sd 0x1879
+#define MN_vrcp14sd 0x1886
+#define MN_vrsqrt14sd 0x188f
+#define MN_vrcp28sd 0x189a
+#define MN_vrsqrt28sd 0x18a3
 #define MN_pabsd (MN_vpabsd + 1)
-#define MN_vpabsd 0x1836
+#define MN_vpabsd 0x18ae
 #define MN_subsd (MN_vfmsubsd + 3)
-#define MN_vfmsubsd 0x183d
-#define MN_vfnmsubsd 0x1846
-#define MN_vsubsd 0x1850
+#define MN_vfmsubsd 0x18b5
+#define MN_vfnmsubsd 0x18be
+#define MN_vsubsd 0x18c8
 #define MN_addsd (MN_vfmaddsd + 3)
-#define MN_vfmaddsd 0x1857
-#define MN_vfnmaddsd 0x1860
-#define MN_vaddsd 0x186a
+#define MN_vfmaddsd 0x18cf
+#define MN_vfnmaddsd 0x18d8
+#define MN_vaddsd 0x18e2
 #define MN_roundsd (MN_vroundsd + 1)
-#define MN_vroundsd 0x1871
+#define MN_vroundsd 0x18e9
 #define MN_cmpunordsd (MN_vcmpunordsd + 1)
-#define MN_vcmpunordsd 0x187a
+#define MN_vcmpunordsd 0x18f2
 #define MN_cmpordsd (MN_vcmpordsd + 1)
-#define MN_vcmpordsd 0x1886
-#define MN_vreducesd 0x1890
-#define MN_vrangesd 0x189a
-#define MN_vcmpngesd 0x18a3
-#define MN_vcmpgesd 0x18ad
-#define MN_vrndscalesd 0x18b6
+#define MN_vcmpordsd 0x18fe
+#define MN_vreducesd 0x1908
+#define MN_vrangesd 0x1912
+#define MN_vcmpngesd 0x191b
+#define MN_vcmpgesd 0x1925
+#define MN_vrndscalesd 0x192e
 #define MN_cmpnlesd (MN_vcmpnlesd + 1)
-#define MN_vcmpnlesd 0x18c2
+#define MN_vcmpnlesd 0x193a
 #define MN_cmplesd (MN_vcmplesd + 1)
-#define MN_vcmplesd 0x18cc
-#define MN_vcmpfalsesd 0x18d5
-#define MN_vcmptruesd 0x18e1
-#define MN_vscalefsd 0x18ec
+#define MN_vcmplesd 0x1944
+#define MN_vcmpfalsesd 0x194d
+#define MN_vcmptruesd 0x1959
+#define MN_vscalefsd 0x1964
 #define MN_comisd (MN_ucomisd + 1)
 #define MN_ucomisd (MN_vucomisd + 1)
-#define MN_vucomisd 0x18f6
-#define MN_vcomisd 0x18ff
+#define MN_vucomisd 0x196e
+#define MN_vcomisd 0x1977
 #define MN_mulsd (MN_vmulsd + 1)
-#define MN_vmulsd 0x1907
-#define MN_vfixupimmsd 0x190e
+#define MN_vmulsd 0x197f
+#define MN_vfixupimmsd 0x1986
 #define MN_minsd (MN_pminsd + 1)
 #define MN_pminsd (MN_vpminsd + 1)
-#define MN_vpminsd 0x191a
-#define MN_vminsd 0x1922
+#define MN_vpminsd 0x1992
+#define MN_vminsd 0x199a
 #define MN_cmpsd (MN_vcmpsd + 1)
-#define MN_vcmpsd 0x1929
-#define MN_vgetexpsd 0x1930
-#define MN_vcmpunord_qsd 0x193a
-#define MN_vcmpord_qsd 0x1948
+#define MN_vcmpsd 0x19a1
+#define MN_vgetexpsd 0x19a8
+#define MN_vcmpunord_qsd 0x19b2
+#define MN_vcmpord_qsd 0x19c0
 #define MN_cmpneqsd (MN_vcmpneqsd + 1)
-#define MN_vcmpneqsd 0x1954
+#define MN_vcmpneqsd 0x19cc
 #define MN_cmpeqsd (MN_vcmpeqsd + 1)
-#define MN_vcmpeqsd 0x195e
-#define MN_vcmpge_oqsd 0x1967
-#define MN_vcmple_oqsd 0x1973
-#define MN_vcmpfalse_oqsd 0x197f
-#define MN_vcmpneq_oqsd 0x198e
-#define MN_vcmpeq_oqsd 0x199b
-#define MN_vcmpgt_oqsd 0x19a7
-#define MN_vcmplt_oqsd 0x19b3
-#define MN_vcmpnge_uqsd 0x19bf
-#define MN_vcmpnle_uqsd 0x19cc
-#define MN_vcmptrue_uqsd 0x19d9
-#define MN_vcmpneq_uqsd 0x19e7
-#define MN_vcmpeq_uqsd 0x19f4
-#define MN_vcmpngt_uqsd 0x1a00
-#define MN_vcmpnlt_uqsd 0x1a0d
-#define MN_vmovrsd 0x1a1a
-#define MN_vcmpunord_ssd 0x1a22
-#define MN_vcmpord_ssd 0x1a30
-#define MN_vpdpbssd 0x1a3c
-#define MN_tdpbssd 0x1a45
-#define MN_vpcompressd 0x1a4d
-#define MN_vcmpge_ossd 0x1a59
-#define MN_vcmple_ossd 0x1a65
-#define MN_vcmpfalse_ossd 0x1a71
-#define MN_vcmpneq_ossd 0x1a80
-#define MN_vcmpeq_ossd 0x1a8d
-#define MN_vcmpgt_ossd 0x1a99
-#define MN_vcmplt_ossd 0x1aa5
-#define MN_wrssd 0x1ab1
-#define MN_vfpclasssd 0x1ab7
-#define MN_vcmpnge_ussd 0x1ac2
-#define MN_vcmpnle_ussd 0x1acf
-#define MN_vcmptrue_ussd 0x1adc
-#define MN_vcmpneq_ussd 0x1aea
-#define MN_vcmpeq_ussd 0x1af7
-#define MN_vcmpngt_ussd 0x1b03
-#define MN_vcmpnlt_ussd 0x1b10
-#define MN_wrussd 0x1b1d
-#define MN_vp4dpwssd 0x1b24
-#define MN_vpdpwssd 0x1b2e
-#define MN_vcmpngtsd 0x1b37
-#define MN_vcmpgtsd 0x1b41
+#define MN_vcmpeqsd 0x19d6
+#define MN_vcmpge_oqsd 0x19df
+#define MN_vcmple_oqsd 0x19eb
+#define MN_vcmpfalse_oqsd 0x19f7
+#define MN_vcmpneq_oqsd 0x1a06
+#define MN_vcmpeq_oqsd 0x1a13
+#define MN_vcmpgt_oqsd 0x1a1f
+#define MN_vcmplt_oqsd 0x1a2b
+#define MN_vcmpnge_uqsd 0x1a37
+#define MN_vcmpnle_uqsd 0x1a44
+#define MN_vcmptrue_uqsd 0x1a51
+#define MN_vcmpneq_uqsd 0x1a5f
+#define MN_vcmpeq_uqsd 0x1a6c
+#define MN_vcmpngt_uqsd 0x1a78
+#define MN_vcmpnlt_uqsd 0x1a85
+#define MN_vmovrsd 0x1a92
+#define MN_vcmpunord_ssd 0x1a9a
+#define MN_vcmpord_ssd 0x1aa8
+#define MN_vpdpbssd 0x1ab4
+#define MN_tdpbssd 0x1abd
+#define MN_vpcompressd 0x1ac5
+#define MN_vcmpge_ossd 0x1ad1
+#define MN_vcmple_ossd 0x1add
+#define MN_vcmpfalse_ossd 0x1ae9
+#define MN_vcmpneq_ossd 0x1af8
+#define MN_vcmpeq_ossd 0x1b05
+#define MN_vcmpgt_ossd 0x1b11
+#define MN_vcmplt_ossd 0x1b1d
+#define MN_wrssd 0x1b29
+#define MN_vfpclasssd 0x1b2f
+#define MN_vcmpnge_ussd 0x1b3a
+#define MN_vcmpnle_ussd 0x1b47
+#define MN_vcmptrue_ussd 0x1b54
+#define MN_vcmpneq_ussd 0x1b62
+#define MN_vcmpeq_ussd 0x1b6f
+#define MN_vcmpngt_ussd 0x1b7b
+#define MN_vcmpnlt_ussd 0x1b88
+#define MN_wrussd 0x1b95
+#define MN_vp4dpwssd 0x1b9c
+#define MN_vpdpwssd 0x1ba6
+#define MN_vcmpngtsd 0x1baf
+#define MN_vcmpgtsd 0x1bb9
 #define MN_cmpnltsd (MN_vcmpnltsd + 1)
-#define MN_vcmpnltsd 0x1b4a
+#define MN_vcmpnltsd 0x1bc2
 #define MN_cmpltsd (MN_vcmpltsd + 1)
-#define MN_vcmpltsd 0x1b54
-#define MN_vgetmantsd 0x1b5d
-#define MN_movntsd 0x1b68
+#define MN_vcmpltsd 0x1bcc
+#define MN_vgetmantsd 0x1bd5
+#define MN_movntsd 0x1be0
 #define MN_sqrtsd (MN_vsqrtsd + 1)
-#define MN_vsqrtsd 0x1b70
-#define MN_vbroadcastsd 0x1b78
-#define MN_vpdpbusd 0x1b85
-#define MN_tdpbusd 0x1b8e
-#define MN_vpdpwusd 0x1b96
+#define MN_vsqrtsd 0x1be8
+#define MN_vbroadcastsd 0x1bf0
+#define MN_vpdpbusd 0x1bfd
+#define MN_tdpbusd 0x1c06
+#define MN_vpdpwusd 0x1c0e
 #define MN_divsd (MN_vdivsd + 1)
-#define MN_vdivsd 0x1b9f
+#define MN_vdivsd 0x1c17
 #define MN_movsd (MN_vmovsd + 1)
-#define MN_vmovsd 0x1ba6
+#define MN_vmovsd 0x1c1e
 #define MN_maxsd (MN_vminmaxsd + 4)
-#define MN_vminmaxsd 0x1bad
+#define MN_vminmaxsd 0x1c25
 #define MN_pmaxsd (MN_vpmaxsd + 1)
-#define MN_vpmaxsd 0x1bb7
-#define MN_vmaxsd 0x1bbf
-#define MN_vucomxsd 0x1bc6
-#define MN_vcomxsd 0x1bcf
-#define MN_vfrczsd 0x1bd7
-#define MN_vp2intersectd 0x1bdf
-#define MN_vpconflictd 0x1bed
-#define MN_vpcomgtd 0x1bf9
+#define MN_vpmaxsd 0x1c2f
+#define MN_vmaxsd 0x1c37
+#define MN_vucomxsd 0x1c3e
+#define MN_vcomxsd 0x1c47
+#define MN_vfrczsd 0x1c4f
+#define MN_vp2intersectd 0x1c57
+#define MN_vpconflictd 0x1c65
+#define MN_vpcomgtd 0x1c71
 #define MN_pcmpgtd (MN_vpcmpgtd + 1)
-#define MN_vpcmpgtd 0x1c02
-#define MN_cltd 0x1c0b
-#define MN_vpcomltd 0x1c10
-#define MN_vpcmpnltd 0x1c19
-#define MN_vpcmpltd 0x1c23
-#define MN_vpopcntd 0x1c2c
-#define MN_vplzcntd 0x1c35
-#define MN_knotd 0x1c3e
-#define MN_vprotd 0x1c44
+#define MN_vpcmpgtd 0x1c7a
+#define MN_cltd 0x1c83
+#define MN_vpcomltd 0x1c88
+#define MN_vpcmpnltd 0x1c91
+#define MN_vpcmpltd 0x1c9b
+#define MN_vpopcntd 0x1ca4
+#define MN_vplzcntd 0x1cad
+#define MN_knotd 0x1cb6
+#define MN_vprotd 0x1cbc
 #define MN_std (MN_vpbroadcastd + 9)
-#define MN_vpbroadcastd 0x1c4b
-#define MN_ktestd 0x1c58
-#define MN_kortestd 0x1c5f
-#define MN_cwtd 0x1c68
-#define MN_vpcomgeud 0x1c6d
-#define MN_vpcomleud 0x1c77
-#define MN_vpcmpnleud 0x1c81
-#define MN_vpcmpleud 0x1c8c
-#define MN_vpcomfalseud 0x1c96
-#define MN_vpcomtrueud 0x1ca3
-#define MN_vpcomud 0x1caf
+#define MN_vpbroadcastd 0x1cc3
+#define MN_ktestd 0x1cd0
+#define MN_kortestd 0x1cd7
+#define MN_cwtd 0x1ce0
+#define MN_vpcomgeud 0x1ce5
+#define MN_vpcomleud 0x1cef
+#define MN_vpcmpnleud 0x1cf9
+#define MN_vpcmpleud 0x1d04
+#define MN_vpcomfalseud 0x1d0e
+#define MN_vpcomtrueud 0x1d1b
+#define MN_vpcomud 0x1d27
 #define MN_pminud (MN_vpminud + 1)
-#define MN_vpminud 0x1cb7
-#define MN_vpcmpud 0x1cbf
-#define MN_vpcomequd 0x1cc7
-#define MN_vpcomnequd 0x1cd1
-#define MN_vpcmpnequd 0x1cdc
-#define MN_vpcmpequd 0x1ce7
-#define MN_vpdpbsud 0x1cf1
-#define MN_tdpbsud 0x1cfa
-#define MN_vpdpwsud 0x1d02
-#define MN_vpcomgtud 0x1d0b
-#define MN_vpcomltud 0x1d15
-#define MN_vpcmpnltud 0x1d1f
-#define MN_vpcmpltud 0x1d2a
-#define MN_vpdpbuud 0x1d34
-#define MN_tdpbuud 0x1d3d
-#define MN_vpdpwuud 0x1d45
+#define MN_vpminud 0x1d2f
+#define MN_vpcmpud 0x1d37
+#define MN_vpcomequd 0x1d3f
+#define MN_vpcomnequd 0x1d49
+#define MN_vpcmpnequd 0x1d54
+#define MN_vpcmpequd 0x1d5f
+#define MN_vpdpbsud 0x1d69
+#define MN_tdpbsud 0x1d72
+#define MN_vpdpwsud 0x1d7a
+#define MN_vpcomgtud 0x1d83
+#define MN_vpcomltud 0x1d8d
+#define MN_vpcmpnltud 0x1d97
+#define MN_vpcmpltud 0x1da2
+#define MN_vpdpbuud 0x1dac
+#define MN_tdpbuud 0x1db5
+#define MN_vpdpwuud 0x1dbd
 #define MN_pmaxud (MN_vpmaxud + 1)
-#define MN_vpmaxud 0x1d4e
-#define MN_vpsravd 0x1d56
-#define MN_vpshldvd 0x1d5e
-#define MN_vpshrdvd 0x1d67
-#define MN_vpsllvd 0x1d70
-#define MN_vprolvd 0x1d78
-#define MN_vpsrlvd 0x1d80
+#define MN_vpmaxud 0x1dc6
+#define MN_vpsravd 0x1dce
+#define MN_vpshldvd 0x1dd6
+#define MN_vpshrdvd 0x1ddf
+#define MN_vpsllvd 0x1de8
+#define MN_vprolvd 0x1df0
+#define MN_vpsrlvd 0x1df8
 #define MN_invd (MN_wbinvd + 2)
-#define MN_wbinvd 0x1d88
-#define MN_wbnoinvd 0x1d8f
+#define MN_wbinvd 0x1e00
+#define MN_wbnoinvd 0x1e07
 #define MN_movd (MN_kmovd + 1)
 #define MN_kmovd (MN_vpmaskmovd + 5)
-#define MN_vpmaskmovd 0x1d98
-#define MN_vmovd 0x1da3
-#define MN_vprorvd 0x1da9
-#define MN_vphsubwd 0x1db1
-#define MN_cwd 0x1dba
-#define MN_vphaddwd 0x1dbe
+#define MN_vpmaskmovd 0x1e10
+#define MN_vmovd 0x1e1b
+#define MN_vprorvd 0x1e21
+#define MN_vphsubwd 0x1e29
+#define MN_cwd 0x1e32
+#define MN_vphaddwd 0x1e36
 #define MN_pmaddwd (MN_vpmaddwd + 1)
-#define MN_vpmaddwd 0x1dc7
+#define MN_vpmaddwd 0x1e3f
 #define MN_punpckhwd (MN_vpunpckhwd + 1)
-#define MN_vpunpckhwd 0x1dd0
-#define MN_kunpckwd 0x1ddb
+#define MN_vpunpckhwd 0x1e48
+#define MN_kunpckwd 0x1e53
 #define MN_punpcklwd (MN_vpunpcklwd + 1)
-#define MN_vpunpcklwd 0x1de4
-#define MN_vpmacswd 0x1def
-#define MN_vpmadcswd 0x1df8
-#define MN_vpmacsswd 0x1e02
-#define MN_vpmadcsswd 0x1e0c
-#define MN_vphadduwd 0x1e17
+#define MN_vpunpcklwd 0x1e5c
+#define MN_vpmacswd 0x1e67
+#define MN_vpmadcswd 0x1e70
+#define MN_vpmacsswd 0x1e7a
+#define MN_vpmadcsswd 0x1e84
+#define MN_vphadduwd 0x1e8f
 #define MN_pmovsxwd (MN_vpmovsxwd + 1)
-#define MN_vpmovsxwd 0x1e21
+#define MN_vpmovsxwd 0x1e99
 #define MN_pmovzxwd (MN_vpmovzxwd + 1)
-#define MN_vpmovzxwd 0x1e2b
-#define MN_movsxd 0x1e35
-#define MN_fldl2e 0x1e3c
-#define MN_jae 0x1e43
-#define MN_jnae 0x1e47
-#define MN_ccmpnae 0x1e4c
-#define MN_setnae 0x1e54
-#define MN_ctestnae 0x1e5b
-#define MN_setzunae 0x1e64
+#define MN_vpmovzxwd 0x1ea3
+#define MN_movsxd 0x1ead
+#define MN_fldl2e 0x1eb4
+#define MN_jae 0x1ebb
+#define MN_jnae 0x1ebf
+#define MN_ccmpnae 0x1ec4
+#define MN_setnae 0x1ecc
+#define MN_ctestnae 0x1ed3
+#define MN_setzunae 0x1edc
 #define MN_cmovnae (MN_fcmovnae + 1)
 #define MN_fcmovnae (MN_cfcmovnae + 1)
-#define MN_cfcmovnae 0x1e6d
-#define MN_ccmpae 0x1e77
-#define MN_setae 0x1e7e
-#define MN_ctestae 0x1e84
-#define MN_setzuae 0x1e8c
+#define MN_cfcmovnae 0x1ee5
+#define MN_ccmpae 0x1eef
+#define MN_setae 0x1ef6
+#define MN_ctestae 0x1efc
+#define MN_setzuae 0x1f04
 #define MN_cmovae (MN_fcmovae + 1)
 #define MN_fcmovae (MN_cfcmovae + 1)
-#define MN_cfcmovae 0x1e94
-#define MN_jbe 0x1e9d
-#define MN_jnbe 0x1ea1
-#define MN_ccmpnbe 0x1ea6
-#define MN_setnbe 0x1eae
-#define MN_ctestnbe 0x1eb5
-#define MN_setzunbe 0x1ebe
+#define MN_cfcmovae 0x1f0c
+#define MN_jbe 0x1f15
+#define MN_jnbe 0x1f19
+#define MN_ccmpnbe 0x1f1e
+#define MN_setnbe 0x1f26
+#define MN_ctestnbe 0x1f2d
+#define MN_setzunbe 0x1f36
 #define MN_cmovnbe (MN_fcmovnbe + 1)
 #define MN_fcmovnbe (MN_cfcmovnbe + 1)
-#define MN_cfcmovnbe 0x1ec7
-#define MN_ccmpbe 0x1ed1
-#define MN_setbe 0x1ed8
-#define MN_ctestbe 0x1ede
-#define MN_setzube 0x1ee6
+#define MN_cfcmovnbe 0x1f3f
+#define MN_ccmpbe 0x1f49
+#define MN_setbe 0x1f50
+#define MN_ctestbe 0x1f56
+#define MN_setzube 0x1f5e
 #define MN_movbe (MN_cmovbe + 1)
 #define MN_cmovbe (MN_fcmovbe + 1)
 #define MN_fcmovbe (MN_cfcmovbe + 1)
-#define MN_cfcmovbe 0x1eee
-#define MN_lfence 0x1ef7
-#define MN_mfence 0x1efe
-#define MN_sfence 0x1f05
-#define MN_cwde 0x1f0c
-#define MN_ffree 0x1f11
-#define MN_jge 0x1f17
-#define MN_jnge 0x1f1b
-#define MN_ccmpnge 0x1f20
-#define MN_setnge 0x1f28
-#define MN_ctestnge 0x1f2f
-#define MN_setzunge 0x1f38
+#define MN_cfcmovbe 0x1f66
+#define MN_lfence 0x1f6f
+#define MN_mfence 0x1f76
+#define MN_sfence 0x1f7d
+#define MN_cwde 0x1f84
+#define MN_ffree 0x1f89
+#define MN_jge 0x1f8f
+#define MN_jnge 0x1f93
+#define MN_ccmpnge 0x1f98
+#define MN_setnge 0x1fa0
+#define MN_ctestnge 0x1fa7
+#define MN_setzunge 0x1fb0
 #define MN_cmovnge (MN_cfcmovnge + 2)
-#define MN_cfcmovnge 0x1f41
-#define MN_ccmpge 0x1f4b
-#define MN_pfcmpge 0x1f52
-#define MN_setge 0x1f5a
-#define MN_ctestge 0x1f60
-#define MN_setzuge 0x1f68
+#define MN_cfcmovnge 0x1fb9
+#define MN_ccmpge 0x1fc3
+#define MN_pfcmpge 0x1fca
+#define MN_setge 0x1fd2
+#define MN_ctestge 0x1fd8
+#define MN_setzuge 0x1fe0
 #define MN_cmovge (MN_cfcmovge + 2)
-#define MN_cfcmovge 0x1f70
-#define MN_je 0x1f79
-#define MN_fscale 0x1f7c
-#define MN_jle 0x1f83
-#define MN_jnle 0x1f87
-#define MN_ccmpnle 0x1f8c
-#define MN_setnle 0x1f94
-#define MN_ctestnle 0x1f9b
-#define MN_setzunle 0x1fa4
+#define MN_cfcmovge 0x1fe8
+#define MN_je 0x1ff1
+#define MN_fscale 0x1ff4
+#define MN_jle 0x1ffb
+#define MN_jnle 0x1fff
+#define MN_ccmpnle 0x2004
+#define MN_setnle 0x200c
+#define MN_ctestnle 0x2013
+#define MN_setzunle 0x201c
 #define MN_cmovnle (MN_cfcmovnle + 2)
-#define MN_cfcmovnle 0x1fad
-#define MN_ccmple 0x1fb7
-#define MN_setle 0x1fbe
-#define MN_ctestle 0x1fc4
-#define MN_setzule 0x1fcc
+#define MN_cfcmovnle 0x2025
+#define MN_ccmple 0x202f
+#define MN_setle 0x2036
+#define MN_ctestle 0x203c
+#define MN_setzule 0x2044
 #define MN_cmovle (MN_cfcmovle + 2)
-#define MN_cfcmovle 0x1fd4
-#define MN_vmresume 0x1fdd
-#define MN_jne 0x1fe6
-#define MN_repne 0x1fea
-#define MN_ccmpne 0x1ff0
-#define MN_loopne 0x1ff7
-#define MN_setne 0x1ffe
-#define MN_ctestne 0x2004
-#define MN_setzune 0x200c
+#define MN_cfcmovle 0x204c
+#define MN_vmresume 0x2055
+#define MN_jne 0x205e
+#define MN_repne 0x2062
+#define MN_ccmpne 0x2068
+#define MN_loopne 0x206f
+#define MN_setne 0x2076
+#define MN_ctestne 0x207c
+#define MN_setzune 0x2084
 #define MN_cmovne (MN_fcmovne + 1)
 #define MN_fcmovne (MN_cfcmovne + 1)
-#define MN_cfcmovne 0x2014
-#define MN_repe 0x201d
-#define MN_jpe 0x2022
-#define MN_ccmpe 0x2026
-#define MN_loope 0x202c
-#define MN_setpe 0x2032
-#define MN_setzupe 0x2038
+#define MN_cfcmovne 0x208c
+#define MN_repe 0x2095
+#define MN_jpe 0x209a
+#define MN_ccmpe 0x209e
+#define MN_loope 0x20a4
+#define MN_setpe 0x20aa
+#define MN_setzupe 0x20b0
 #define MN_cmovpe (MN_cfcmovpe + 2)
-#define MN_cfcmovpe 0x2040
-#define MN_cdqe 0x2049
-#define MN_xacquire 0x204e
-#define MN_xstore 0x2057
-#define MN_rdfsbase 0x205e
-#define MN_wrfsbase 0x2067
-#define MN_rdgsbase 0x2070
-#define MN_wrgsbase 0x2079
-#define MN_tilerelease 0x2082
-#define MN_xrelease 0x208e
+#define MN_cfcmovpe 0x20b8
+#define MN_cdqe 0x20c1
+#define MN_xacquire 0x20c6
+#define MN_xstore 0x20cf
+#define MN_rdfsbase 0x20d6
+#define MN_wrfsbase 0x20df
+#define MN_rdgsbase 0x20e8
+#define MN_wrgsbase 0x20f1
+#define MN_tilerelease 0x20fa
+#define MN_xrelease 0x2106
 #define MN_pause (MN_tpause + 1)
-#define MN_tpause 0x2097
-#define MN_pvalidate 0x209e
-#define MN_rmpupdate 0x20a8
-#define MN_sete 0x20b2
-#define MN_vmwrite 0x20b7
-#define MN_ptwrite 0x20bf
-#define MN_cldemote 0x20c7
-#define MN_cteste 0x20d0
-#define MN_sha1nexte 0x20d7
-#define MN_setzue 0x20e1
-#define MN_leave 0x20e8
-#define MN_fsave 0x20ee
-#define MN_vmsave 0x20f4
-#define MN_fnsave 0x20fb
+#define MN_tpause 0x210f
+#define MN_pvalidate 0x2116
+#define MN_rmpupdate 0x2120
+#define MN_sete 0x212a
+#define MN_vmwrite 0x212f
+#define MN_ptwrite 0x2137
+#define MN_cldemote 0x213f
+#define MN_cteste 0x2148
+#define MN_sha1nexte 0x214f
+#define MN_setzue 0x2159
+#define MN_leave 0x2160
+#define MN_fsave 0x2166
+#define MN_vmsave 0x216c
+#define MN_fnsave 0x2173
 #define MN_xsave (MN_fxsave + 1)
-#define MN_fxsave 0x2102
+#define MN_fxsave 0x217a
 #define MN_cmove (MN_fcmove + 1)
 #define MN_fcmove (MN_cfcmove + 1)
-#define MN_cfcmove 0x2109
-#define MN_serialize 0x2111
-#define MN_vmxoff 0x211b
-#define MN_lahf 0x2122
-#define MN_sahf 0x2127
-#define MN_pushf 0x212c
-#define MN_ccmpf 0x2132
-#define MN_popf 0x2138
-#define MN_bsf 0x213d
-#define MN_retf 0x2141
-#define MN_ctestf 0x2146
-#define MN_neg 0x214d
-#define MN_ldtilecfg 0x2151
-#define MN_sttilecfg 0x215b
+#define MN_cfcmove 0x2181
+#define MN_serialize 0x2189
+#define MN_vmxoff 0x2193
+#define MN_lahf 0x219a
+#define MN_sahf 0x219f
+#define MN_pushf 0x21a4
+#define MN_ccmpf 0x21aa
+#define MN_popf 0x21b0
+#define MN_bsf 0x21b5
+#define MN_retf 0x21b9
+#define MN_ctestf 0x21be
+#define MN_neg 0x21c5
+#define MN_ldtilecfg 0x21c9
+#define MN_sttilecfg 0x21d3
 #define MN_xchg (MN_cmpxchg + 3)
-#define MN_cmpxchg 0x2165
-#define MN_pconfig 0x216d
-#define MN_jg 0x2175
-#define MN_jng 0x2178
-#define MN_ccmpng 0x217c
-#define MN_xstore_rng 0x2183
-#define MN_xstorerng 0x218e
-#define MN_setng 0x2198
-#define MN_ctestng 0x219e
-#define MN_setzung 0x21a6
+#define MN_cmpxchg 0x21dd
+#define MN_pconfig 0x21e5
+#define MN_jg 0x21ed
+#define MN_jng 0x21f0
+#define MN_ccmpng 0x21f4
+#define MN_xstore_rng 0x21fb
+#define MN_xstorerng 0x2206
+#define MN_setng 0x2210
+#define MN_ctestng 0x2216
+#define MN_setzung 0x221e
 #define MN_cmovng (MN_cfcmovng + 2)
-#define MN_cfcmovng 0x21ae
-#define MN_invlpg 0x21b7
-#define MN_ccmpg 0x21be
-#define MN_setg 0x21c4
-#define MN_ctestg 0x21c9
-#define MN_setzug 0x21d0
+#define MN_cfcmovng 0x2226
+#define MN_invlpg 0x222f
+#define MN_ccmpg 0x2236
+#define MN_setg 0x223c
+#define MN_ctestg 0x2241
+#define MN_setzug 0x2248
 #define MN_cmovg (MN_cfcmovg + 2)
-#define MN_cfcmovg 0x21d7
-#define MN_tcvtrowps2bf16h 0x21df
-#define MN_vmlaunch 0x21ef
-#define MN_prefetch 0x21f8
-#define MN_fxch 0x2201
-#define MN_tcvtrowps2phh 0x2206
-#define MN_vfmaddsub231ph 0x2214
-#define MN_vfmsub231ph 0x2223
-#define MN_vfnmsub231ph 0x222f
-#define MN_vfmsubadd231ph 0x223c
-#define MN_vfmadd231ph 0x224b
-#define MN_vfnmadd231ph 0x2257
-#define MN_vfmaddsub132ph 0x2264
-#define MN_vfmsub132ph 0x2273
-#define MN_vfnmsub132ph 0x227f
-#define MN_vfmsubadd132ph 0x228c
-#define MN_vfmadd132ph 0x229b
-#define MN_vfnmadd132ph 0x22a7
-#define MN_vcvthf82ph 0x22b4
-#define MN_vcvtpd2ph 0x22bf
-#define MN_vcvtdq2ph 0x22c9
-#define MN_vcvtudq2ph 0x22d3
-#define MN_vcvtqq2ph 0x22de
-#define MN_vcvtuqq2ph 0x22e8
-#define MN_vcvtps2ph 0x22f3
-#define MN_vcvtw2ph 0x22fd
-#define MN_vcvtuw2ph 0x2306
-#define MN_vfmaddsub213ph 0x2310
-#define MN_vfmsub213ph 0x231f
-#define MN_vfnmsub213ph 0x232b
-#define MN_vfmsubadd213ph 0x2338
-#define MN_vfmadd213ph 0x2347
-#define MN_vfnmadd213ph 0x2353
-#define MN_vsubph 0x2360
-#define MN_vfcmaddcph 0x2367
-#define MN_vfmaddcph 0x2372
-#define MN_vfcmulcph 0x237c
-#define MN_vfmulcph 0x2386
-#define MN_vaddph 0x238f
-#define MN_vcmpunordph 0x2396
-#define MN_vcmpordph 0x23a2
-#define MN_vreduceph 0x23ac
-#define MN_vcmpngeph 0x23b6
-#define MN_vcmpgeph 0x23c0
-#define MN_vrndscaleph 0x23c9
-#define MN_vcmpnleph 0x23d5
-#define MN_vcmpleph 0x23df
-#define MN_vcmpfalseph 0x23e8
-#define MN_vcmptrueph 0x23f4
-#define MN_vscalefph 0x23ff
-#define MN_vmulph 0x2409
-#define MN_vminph 0x2410
-#define MN_vrcpph 0x2417
-#define MN_vcmpph 0x241e
-#define MN_vgetexpph 0x2425
-#define MN_vcmpunord_qph 0x242f
-#define MN_vcmpord_qph 0x243d
-#define MN_vcmpneqph 0x2449
-#define MN_vcmpeqph 0x2453
-#define MN_vcmpge_oqph 0x245c
-#define MN_vcmple_oqph 0x2468
-#define MN_vcmpfalse_oqph 0x2474
-#define MN_vcmpneq_oqph 0x2483
-#define MN_vcmpeq_oqph 0x2490
-#define MN_vcmpgt_oqph 0x249c
-#define MN_vcmplt_oqph 0x24a8
-#define MN_vcmpnge_uqph 0x24b4
-#define MN_vcmpnle_uqph 0x24c1
-#define MN_vcmptrue_uqph 0x24ce
-#define MN_vcmpneq_uqph 0x24dc
-#define MN_vcmpeq_uqph 0x24e9
-#define MN_vcmpngt_uqph 0x24f5
-#define MN_vcmpnlt_uqph 0x2502
-#define MN_vcmpunord_sph 0x250f
-#define MN_vcmpord_sph 0x251d
-#define MN_vcmpge_osph 0x2529
-#define MN_vcmple_osph 0x2535
-#define MN_vcmpfalse_osph 0x2541
-#define MN_vcmpneq_osph 0x2550
-#define MN_vcmpeq_osph 0x255d
-#define MN_vcmpgt_osph 0x2569
-#define MN_vcmplt_osph 0x2575
-#define MN_vfpclassph 0x2581
-#define MN_vcmpnge_usph 0x258c
-#define MN_vcmpnle_usph 0x2599
-#define MN_vcmptrue_usph 0x25a6
-#define MN_vcmpneq_usph 0x25b4
-#define MN_vcmpeq_usph 0x25c1
-#define MN_vcmpngt_usph 0x25cd
-#define MN_vcmpnlt_usph 0x25da
-#define MN_vcmpngtph 0x25e7
-#define MN_vcmpgtph 0x25f1
-#define MN_vcmpnltph 0x25fa
-#define MN_vcmpltph 0x2604
-#define MN_vgetmantph 0x260d
-#define MN_vrsqrtph 0x2618
-#define MN_vsqrtph 0x2621
-#define MN_vdivph 0x2629
-#define MN_vminmaxph 0x2630
-#define MN_vmaxph 0x263a
-#define MN_vpmacsdqh 0x2641
-#define MN_vpmacssdqh 0x264b
-#define MN_vfmsub231sh 0x2656
-#define MN_vfnmsub231sh 0x2662
-#define MN_vfmadd231sh 0x266f
-#define MN_vfnmadd231sh 0x267b
-#define MN_vfmsub132sh 0x2688
-#define MN_vfnmsub132sh 0x2694
-#define MN_vfmadd132sh 0x26a1
-#define MN_vfnmadd132sh 0x26ad
-#define MN_vcvtsd2sh 0x26ba
-#define MN_vcvtsi2sh 0x26c4
-#define MN_vcvtusi2sh 0x26ce
-#define MN_vcvtss2sh 0x26d9
-#define MN_vfmsub213sh 0x26e3
-#define MN_vfnmsub213sh 0x26ef
-#define MN_vfmadd213sh 0x26fc
-#define MN_vfnmadd213sh 0x2708
-#define MN_psmash 0x2715
-#define MN_vsubsh 0x271c
-#define MN_vfcmaddcsh 0x2723
-#define MN_vfmaddcsh 0x272e
-#define MN_vfcmulcsh 0x2738
-#define MN_vfmulcsh 0x2742
-#define MN_vaddsh 0x274b
-#define MN_vcmpunordsh 0x2752
-#define MN_vcmpordsh 0x275e
-#define MN_vreducesh 0x2768
-#define MN_vcmpngesh 0x2772
-#define MN_vcmpgesh 0x277c
-#define MN_vrndscalesh 0x2785
-#define MN_vcmpnlesh 0x2791
-#define MN_vcmplesh 0x279b
-#define MN_vcmpfalsesh 0x27a4
-#define MN_vcmptruesh 0x27b0
-#define MN_vscalefsh 0x27bb
-#define MN_vucomish 0x27c5
-#define MN_vcomish 0x27ce
-#define MN_vmulsh 0x27d6
-#define MN_vminsh 0x27dd
-#define MN_vrcpsh 0x27e4
-#define MN_vcmpsh 0x27eb
-#define MN_vgetexpsh 0x27f2
-#define MN_vcmpunord_qsh 0x27fc
-#define MN_vcmpord_qsh 0x280a
-#define MN_vcmpneqsh 0x2816
-#define MN_vcmpeqsh 0x2820
-#define MN_vcmpge_oqsh 0x2829
-#define MN_vcmple_oqsh 0x2835
-#define MN_vcmpfalse_oqsh 0x2841
-#define MN_vcmpneq_oqsh 0x2850
-#define MN_vcmpeq_oqsh 0x285d
-#define MN_vcmpgt_oqsh 0x2869
-#define MN_vcmplt_oqsh 0x2875
-#define MN_vcmpnge_uqsh 0x2881
-#define MN_vcmpnle_uqsh 0x288e
-#define MN_vcmptrue_uqsh 0x289b
-#define MN_vcmpneq_uqsh 0x28a9
-#define MN_vcmpeq_uqsh 0x28b6
-#define MN_vcmpngt_uqsh 0x28c2
-#define MN_vcmpnlt_uqsh 0x28cf
-#define MN_vcmpunord_ssh 0x28dc
-#define MN_vcmpord_ssh 0x28ea
-#define MN_vcmpge_ossh 0x28f6
-#define MN_vcmple_ossh 0x2902
-#define MN_vcmpfalse_ossh 0x290e
-#define MN_vcmpneq_ossh 0x291d
-#define MN_vcmpeq_ossh 0x292a
-#define MN_vcmpgt_ossh 0x2936
-#define MN_vcmplt_ossh 0x2942
-#define MN_vfpclasssh 0x294e
-#define MN_vcmpnge_ussh 0x2959
-#define MN_vcmpnle_ussh 0x2966
-#define MN_vcmptrue_ussh 0x2973
-#define MN_vcmpneq_ussh 0x2981
-#define MN_vcmpeq_ussh 0x298e
-#define MN_vcmpngt_ussh 0x299a
-#define MN_vcmpnlt_ussh 0x29a7
-#define MN_vcmpngtsh 0x29b4
-#define MN_vcmpgtsh 0x29be
-#define MN_vcmpnltsh 0x29c7
-#define MN_vcmpltsh 0x29d1
-#define MN_vgetmantsh 0x29da
-#define MN_vrsqrtsh 0x29e5
-#define MN_vsqrtsh 0x29ee
-#define MN_clflush 0x29f6
-#define MN_push 0x29fe
-#define MN_vdivsh 0x2a03
-#define MN_vmovsh 0x2a0a
-#define MN_vminmaxsh 0x2a11
-#define MN_vmaxsh 0x2a1b
-#define MN_vucomxsh 0x2a22
-#define MN_vcomxsh 0x2a2b
-#define MN_blci 0x2a33
-#define MN_clgi 0x2a38
-#define MN_stgi 0x2a3d
-#define MN_bzhi 0x2a42
-#define MN_cli 0x2a47
-#define MN_fcomi 0x2a4b
-#define MN_fucomi 0x2a51
-#define MN_feni 0x2a58
-#define MN_fneni 0x2a5d
-#define MN_cvttpd2pi 0x2a63
-#define MN_cvtpd2pi 0x2a6d
-#define MN_cvttps2pi 0x2a76
-#define MN_cvtps2pi 0x2a80
-#define MN_fldpi 0x2a89
-#define MN_senduipi 0x2a8f
-#define MN_fcompi 0x2a98
-#define MN_fucompi 0x2a9f
-#define MN_movdiri 0x2aa7
+#define MN_cfcmovg 0x224f
+#define MN_tcvtrowps2bf16h 0x2257
+#define MN_vmlaunch 0x2267
+#define MN_prefetch 0x2270
+#define MN_fxch 0x2279
+#define MN_tcvtrowps2phh 0x227e
+#define MN_vfmaddsub231ph 0x228c
+#define MN_vfmsub231ph 0x229b
+#define MN_vfnmsub231ph 0x22a7
+#define MN_vfmsubadd231ph 0x22b4
+#define MN_vfmadd231ph 0x22c3
+#define MN_vfnmadd231ph 0x22cf
+#define MN_vfmaddsub132ph 0x22dc
+#define MN_vfmsub132ph 0x22eb
+#define MN_vfnmsub132ph 0x22f7
+#define MN_vfmsubadd132ph 0x2304
+#define MN_vfmadd132ph 0x2313
+#define MN_vfnmadd132ph 0x231f
+#define MN_vcvthf82ph 0x232c
+#define MN_vcvtpd2ph 0x2337
+#define MN_vcvtdq2ph 0x2341
+#define MN_vcvtudq2ph 0x234b
+#define MN_vcvtqq2ph 0x2356
+#define MN_vcvtuqq2ph 0x2360
+#define MN_vcvtps2ph 0x236b
+#define MN_vcvtw2ph 0x2375
+#define MN_vcvtuw2ph 0x237e
+#define MN_vfmaddsub213ph 0x2388
+#define MN_vfmsub213ph 0x2397
+#define MN_vfnmsub213ph 0x23a3
+#define MN_vfmsubadd213ph 0x23b0
+#define MN_vfmadd213ph 0x23bf
+#define MN_vfnmadd213ph 0x23cb
+#define MN_vsubph 0x23d8
+#define MN_vfcmaddcph 0x23df
+#define MN_vfmaddcph 0x23ea
+#define MN_vfcmulcph 0x23f4
+#define MN_vfmulcph 0x23fe
+#define MN_vaddph 0x2407
+#define MN_vcmpunordph 0x240e
+#define MN_vcmpordph 0x241a
+#define MN_vreduceph 0x2424
+#define MN_vcmpngeph 0x242e
+#define MN_vcmpgeph 0x2438
+#define MN_vrndscaleph 0x2441
+#define MN_vcmpnleph 0x244d
+#define MN_vcmpleph 0x2457
+#define MN_vcmpfalseph 0x2460
+#define MN_vcmptrueph 0x246c
+#define MN_vscalefph 0x2477
+#define MN_vmulph 0x2481
+#define MN_vminph 0x2488
+#define MN_vrcpph 0x248f
+#define MN_vcmpph 0x2496
+#define MN_vgetexpph 0x249d
+#define MN_vcmpunord_qph 0x24a7
+#define MN_vcmpord_qph 0x24b5
+#define MN_vcmpneqph 0x24c1
+#define MN_vcmpeqph 0x24cb
+#define MN_vcmpge_oqph 0x24d4
+#define MN_vcmple_oqph 0x24e0
+#define MN_vcmpfalse_oqph 0x24ec
+#define MN_vcmpneq_oqph 0x24fb
+#define MN_vcmpeq_oqph 0x2508
+#define MN_vcmpgt_oqph 0x2514
+#define MN_vcmplt_oqph 0x2520
+#define MN_vcmpnge_uqph 0x252c
+#define MN_vcmpnle_uqph 0x2539
+#define MN_vcmptrue_uqph 0x2546
+#define MN_vcmpneq_uqph 0x2554
+#define MN_vcmpeq_uqph 0x2561
+#define MN_vcmpngt_uqph 0x256d
+#define MN_vcmpnlt_uqph 0x257a
+#define MN_vcmpunord_sph 0x2587
+#define MN_vcmpord_sph 0x2595
+#define MN_vcmpge_osph 0x25a1
+#define MN_vcmple_osph 0x25ad
+#define MN_vcmpfalse_osph 0x25b9
+#define MN_vcmpneq_osph 0x25c8
+#define MN_vcmpeq_osph 0x25d5
+#define MN_vcmpgt_osph 0x25e1
+#define MN_vcmplt_osph 0x25ed
+#define MN_vfpclassph 0x25f9
+#define MN_vcmpnge_usph 0x2604
+#define MN_vcmpnle_usph 0x2611
+#define MN_vcmptrue_usph 0x261e
+#define MN_vcmpneq_usph 0x262c
+#define MN_vcmpeq_usph 0x2639
+#define MN_vcmpngt_usph 0x2645
+#define MN_vcmpnlt_usph 0x2652
+#define MN_vcmpngtph 0x265f
+#define MN_vcmpgtph 0x2669
+#define MN_vcmpnltph 0x2672
+#define MN_vcmpltph 0x267c
+#define MN_vgetmantph 0x2685
+#define MN_vrsqrtph 0x2690
+#define MN_vsqrtph 0x2699
+#define MN_vdivph 0x26a1
+#define MN_vminmaxph 0x26a8
+#define MN_vmaxph 0x26b2
+#define MN_vpmacsdqh 0x26b9
+#define MN_vpmacssdqh 0x26c3
+#define MN_vfmsub231sh 0x26ce
+#define MN_vfnmsub231sh 0x26da
+#define MN_vfmadd231sh 0x26e7
+#define MN_vfnmadd231sh 0x26f3
+#define MN_vfmsub132sh 0x2700
+#define MN_vfnmsub132sh 0x270c
+#define MN_vfmadd132sh 0x2719
+#define MN_vfnmadd132sh 0x2725
+#define MN_vcvtsd2sh 0x2732
+#define MN_vcvtsi2sh 0x273c
+#define MN_vcvtusi2sh 0x2746
+#define MN_vcvtss2sh 0x2751
+#define MN_vfmsub213sh 0x275b
+#define MN_vfnmsub213sh 0x2767
+#define MN_vfmadd213sh 0x2774
+#define MN_vfnmadd213sh 0x2780
+#define MN_psmash 0x278d
+#define MN_vsubsh 0x2794
+#define MN_vfcmaddcsh 0x279b
+#define MN_vfmaddcsh 0x27a6
+#define MN_vfcmulcsh 0x27b0
+#define MN_vfmulcsh 0x27ba
+#define MN_vaddsh 0x27c3
+#define MN_vcmpunordsh 0x27ca
+#define MN_vcmpordsh 0x27d6
+#define MN_vreducesh 0x27e0
+#define MN_vcmpngesh 0x27ea
+#define MN_vcmpgesh 0x27f4
+#define MN_vrndscalesh 0x27fd
+#define MN_vcmpnlesh 0x2809
+#define MN_vcmplesh 0x2813
+#define MN_vcmpfalsesh 0x281c
+#define MN_vcmptruesh 0x2828
+#define MN_vscalefsh 0x2833
+#define MN_vucomish 0x283d
+#define MN_vcomish 0x2846
+#define MN_vmulsh 0x284e
+#define MN_vminsh 0x2855
+#define MN_vrcpsh 0x285c
+#define MN_vcmpsh 0x2863
+#define MN_vgetexpsh 0x286a
+#define MN_vcmpunord_qsh 0x2874
+#define MN_vcmpord_qsh 0x2882
+#define MN_vcmpneqsh 0x288e
+#define MN_vcmpeqsh 0x2898
+#define MN_vcmpge_oqsh 0x28a1
+#define MN_vcmple_oqsh 0x28ad
+#define MN_vcmpfalse_oqsh 0x28b9
+#define MN_vcmpneq_oqsh 0x28c8
+#define MN_vcmpeq_oqsh 0x28d5
+#define MN_vcmpgt_oqsh 0x28e1
+#define MN_vcmplt_oqsh 0x28ed
+#define MN_vcmpnge_uqsh 0x28f9
+#define MN_vcmpnle_uqsh 0x2906
+#define MN_vcmptrue_uqsh 0x2913
+#define MN_vcmpneq_uqsh 0x2921
+#define MN_vcmpeq_uqsh 0x292e
+#define MN_vcmpngt_uqsh 0x293a
+#define MN_vcmpnlt_uqsh 0x2947
+#define MN_vcmpunord_ssh 0x2954
+#define MN_vcmpord_ssh 0x2962
+#define MN_vcmpge_ossh 0x296e
+#define MN_vcmple_ossh 0x297a
+#define MN_vcmpfalse_ossh 0x2986
+#define MN_vcmpneq_ossh 0x2995
+#define MN_vcmpeq_ossh 0x29a2
+#define MN_vcmpgt_ossh 0x29ae
+#define MN_vcmplt_ossh 0x29ba
+#define MN_vfpclasssh 0x29c6
+#define MN_vcmpnge_ussh 0x29d1
+#define MN_vcmpnle_ussh 0x29de
+#define MN_vcmptrue_ussh 0x29eb
+#define MN_vcmpneq_ussh 0x29f9
+#define MN_vcmpeq_ussh 0x2a06
+#define MN_vcmpngt_ussh 0x2a12
+#define MN_vcmpnlt_ussh 0x2a1f
+#define MN_vcmpngtsh 0x2a2c
+#define MN_vcmpgtsh 0x2a36
+#define MN_vcmpnltsh 0x2a3f
+#define MN_vcmpltsh 0x2a49
+#define MN_vgetmantsh 0x2a52
+#define MN_vrsqrtsh 0x2a5d
+#define MN_vsqrtsh 0x2a66
+#define MN_clflush 0x2a6e
+#define MN_push 0x2a76
+#define MN_vdivsh 0x2a7b
+#define MN_vmovsh 0x2a82
+#define MN_vminmaxsh 0x2a89
+#define MN_vmaxsh 0x2a93
+#define MN_vucomxsh 0x2a9a
+#define MN_vcomxsh 0x2aa3
+#define MN_blci 0x2aab
+#define MN_clgi 0x2ab0
+#define MN_stgi 0x2ab5
+#define MN_bzhi 0x2aba
+#define MN_cli 0x2abf
+#define MN_fcomi 0x2ac3
+#define MN_fucomi 0x2ac9
+#define MN_feni 0x2ad0
+#define MN_fneni 0x2ad5
+#define MN_cvttpd2pi 0x2adb
+#define MN_cvtpd2pi 0x2ae5
+#define MN_cvttps2pi 0x2aee
+#define MN_cvtps2pi 0x2af8
+#define MN_fldpi 0x2b01
+#define MN_senduipi 0x2b07
+#define MN_fcompi 0x2b10
+#define MN_fucompi 0x2b17
+#define MN_movdiri 0x2b1f
 #define MN_pcmpestri (MN_vpcmpestri + 1)
-#define MN_vpcmpestri 0x2aaf
+#define MN_vpcmpestri 0x2b27
 #define MN_pcmpistri (MN_vpcmpistri + 1)
-#define MN_vpcmpistri 0x2aba
+#define MN_vpcmpistri 0x2b32
 #define MN_cvttsd2si (MN_vcvttsd2si + 1)
-#define MN_vcvttsd2si 0x2ac5
+#define MN_vcvttsd2si 0x2b3d
 #define MN_cvtsd2si (MN_vcvtsd2si + 1)
-#define MN_vcvtsd2si 0x2ad0
-#define MN_vcvttsh2si 0x2ada
-#define MN_vcvtsh2si 0x2ae5
+#define MN_vcvtsd2si 0x2b48
+#define MN_vcvttsh2si 0x2b52
+#define MN_vcvtsh2si 0x2b5d
 #define MN_cvttss2si (MN_vcvttss2si + 1)
-#define MN_vcvttss2si 0x2aef
+#define MN_vcvttss2si 0x2b67
 #define MN_cvtss2si (MN_vcvtss2si + 1)
-#define MN_vcvtss2si 0x2afa
-#define MN_fdisi 0x2b04
-#define MN_fndisi 0x2b0a
-#define MN_blsi 0x2b11
-#define MN_vcvttsd2usi 0x2b16
-#define MN_vcvtsd2usi 0x2b22
-#define MN_vcvttsh2usi 0x2b2d
-#define MN_vcvtsh2usi 0x2b39
-#define MN_vcvttss2usi 0x2b44
-#define MN_vcvtss2usi 0x2b50
-#define MN_movnti 0x2b5b
-#define MN_sti 0x2b62
-#define MN_clui 0x2b66
+#define MN_vcvtss2si 0x2b72
+#define MN_fdisi 0x2b7c
+#define MN_fndisi 0x2b82
+#define MN_blsi 0x2b89
+#define MN_vcvttsd2usi 0x2b8e
+#define MN_vcvtsd2usi 0x2b9a
+#define MN_vcvttsh2usi 0x2ba5
+#define MN_vcvtsh2usi 0x2bb1
+#define MN_vcvttss2usi 0x2bbc
+#define MN_vcvtss2usi 0x2bc8
+#define MN_movnti 0x2bd3
+#define MN_sti 0x2bda
+#define MN_clui 0x2bde
 #define MN_stui (MN_testui + 2)
-#define MN_testui 0x2b6b
-#define MN_notrack 0x2b72
-#define MN_lock 0x2b7a
-#define MN_bndmk 0x2b7f
-#define MN_xresldtrk 0x2b85
-#define MN_xsusldtrk 0x2b8f
-#define MN_blcmsk 0x2b99
-#define MN_blsmsk 0x2ba0
-#define MN_tzmsk 0x2ba7
-#define MN_tcvtrowps2bf16l 0x2bad
-#define MN_sal 0x2bbd
-#define MN_lwpval 0x2bc1
-#define MN_bndcl 0x2bc8
-#define MN_rcl 0x2bce
-#define MN_tcvtrowps2phl 0x2bd2
-#define MN_shl 0x2be0
-#define MN_jl 0x2be4
-#define MN_aesdec256kl 0x2be7
-#define MN_aesenc256kl 0x2bf3
-#define MN_aesdecwide256kl 0x2bff
-#define MN_aesencwide256kl 0x2c0f
-#define MN_aesdec128kl 0x2c1f
-#define MN_aesenc128kl 0x2c2b
-#define MN_aesdecwide128kl 0x2c37
-#define MN_aesencwide128kl 0x2c47
+#define MN_testui 0x2be3
+#define MN_notrack 0x2bea
+#define MN_lock 0x2bf2
+#define MN_bndmk 0x2bf7
+#define MN_xresldtrk 0x2bfd
+#define MN_xsusldtrk 0x2c07
+#define MN_blcmsk 0x2c11
+#define MN_blsmsk 0x2c18
+#define MN_tzmsk 0x2c1f
+#define MN_tcvtrowps2bf16l 0x2c25
+#define MN_sal 0x2c35
+#define MN_lwpval 0x2c39
+#define MN_bndcl 0x2c40
+#define MN_rcl 0x2c46
+#define MN_tcvtrowps2phl 0x2c4a
+#define MN_shl 0x2c58
+#define MN_jl 0x2c5c
+#define MN_aesdec256kl 0x2c5f
+#define MN_aesenc256kl 0x2c6b
+#define MN_aesdecwide256kl 0x2c77
+#define MN_aesencwide256kl 0x2c87
+#define MN_aesdec128kl 0x2c97
+#define MN_aesenc128kl 0x2ca3
+#define MN_aesdecwide128kl 0x2caf
+#define MN_aesencwide128kl 0x2cbf
 #define MN_call (MN_tdcall + 2)
-#define MN_tdcall 0x2c57
-#define MN_lcall 0x2c5e
-#define MN_seamcall 0x2c64
-#define MN_vmmcall 0x2c6d
-#define MN_vmcall 0x2c75
-#define MN_syscall 0x2c7c
-#define MN_vzeroall 0x2c84
-#define MN_fildll 0x2c8d
-#define MN_blcfill 0x2c94
-#define MN_blsfill 0x2c9c
-#define MN_fistpll 0x2ca4
-#define MN_fisttpll 0x2cac
-#define MN_jnl 0x2cb5
-#define MN_ccmpnl 0x2cb9
-#define MN_setnl 0x2cc0
-#define MN_ctestnl 0x2cc6
-#define MN_setzunl 0x2cce
+#define MN_tdcall 0x2ccf
+#define MN_lcall 0x2cd6
+#define MN_seamcall 0x2cdc
+#define MN_vmmcall 0x2ce5
+#define MN_vmcall 0x2ced
+#define MN_syscall 0x2cf4
+#define MN_vzeroall 0x2cfc
+#define MN_fildll 0x2d05
+#define MN_blcfill 0x2d0c
+#define MN_blsfill 0x2d14
+#define MN_fistpll 0x2d1c
+#define MN_fisttpll 0x2d24
+#define MN_jnl 0x2d2d
+#define MN_ccmpnl 0x2d31
+#define MN_setnl 0x2d38
+#define MN_ctestnl 0x2d3e
+#define MN_setzunl 0x2d46
 #define MN_cmovnl (MN_cfcmovnl + 2)
-#define MN_cfcmovnl 0x2cd6
-#define MN_rol 0x2cdf
-#define MN_ccmpl 0x2ce3
-#define MN_arpl 0x2ce9
-#define MN_vpmacsdql 0x2cee
-#define MN_vpmacssdql 0x2cf8
-#define MN_lsl 0x2d03
-#define MN_movsl 0x2d07
-#define MN_setl 0x2d0d
-#define MN_ctestl 0x2d12
-#define MN_cwtl 0x2d19
+#define MN_cfcmovnl 0x2d4e
+#define MN_rol 0x2d57
+#define MN_ccmpl 0x2d5b
+#define MN_arpl 0x2d61
+#define MN_vpmacsdql 0x2d66
+#define MN_vpmacssdql 0x2d70
+#define MN_lsl 0x2d7b
+#define MN_movsl 0x2d7f
+#define MN_setl 0x2d85
+#define MN_ctestl 0x2d8a
+#define MN_cwtl 0x2d91
 #define MN_mul (MN_fmul + 1)
 #define MN_fmul (MN_pfmul + 1)
-#define MN_pfmul 0x2d1e
+#define MN_pfmul 0x2d96
 #define MN_imul (MN_fimul + 1)
-#define MN_fimul 0x2d24
-#define MN_montmul 0x2d2a
-#define MN_setzul 0x2d32
+#define MN_fimul 0x2d9c
+#define MN_montmul 0x2da2
+#define MN_setzul 0x2daa
 #define MN_cmovl (MN_cfcmovl + 2)
-#define MN_cfcmovl 0x2d39
-#define MN_vpmovb2m 0x2d41
-#define MN_vpmovd2m 0x2d4a
-#define MN_vpmovq2m 0x2d53
-#define MN_vpmovw2m 0x2d5c
-#define MN_aam 0x2d65
-#define MN_fxam 0x2d69
-#define MN_fprem 0x2d6e
-#define MN_fcom 0x2d74
-#define MN_ficom 0x2d79
-#define MN_fucom 0x2d7f
-#define MN_fsetpm 0x2d85
-#define MN_fnsetpm 0x2d8c
-#define MN_frstpm 0x2d94
-#define MN_vpperm 0x2d9b
+#define MN_cfcmovl 0x2db1
+#define MN_vpmovb2m 0x2db9
+#define MN_vpmovd2m 0x2dc2
+#define MN_vpmovq2m 0x2dcb
+#define MN_vpmovw2m 0x2dd4
+#define MN_aam 0x2ddd
+#define MN_fxam 0x2de1
+#define MN_fprem 0x2de6
+#define MN_fcom 0x2dec
+#define MN_ficom 0x2df1
+#define MN_fucom 0x2df7
+#define MN_fsetpm 0x2dfd
+#define MN_fnsetpm 0x2e04
+#define MN_frstpm 0x2e0c
+#define MN_vpperm 0x2e13
 #define MN_pcmpestrm (MN_vpcmpestrm + 1)
-#define MN_vpcmpestrm 0x2da2
+#define MN_vpcmpestrm 0x2e1a
 #define MN_pcmpistrm (MN_vpcmpistrm + 1)
-#define MN_vpcmpistrm 0x2dad
-#define MN_rsm 0x2db8
-#define MN_fpatan 0x2dbc
-#define MN_fptan 0x2dc3
-#define MN_bndcn 0x2dc9
+#define MN_vpcmpistrm 0x2e25
+#define MN_rsm 0x2e30
+#define MN_fpatan 0x2e34
+#define MN_fptan 0x2e3b
+#define MN_bndcn 0x2e41
 #define MN_andn (MN_pandn + 1)
 #define MN_pandn (MN_vpandn + 1)
-#define MN_vpandn 0x2dcf
+#define MN_vpandn 0x2e47
 #define MN_in (MN_xbegin + 4)
-#define MN_xbegin 0x2dd6
-#define MN_pfmin 0x2ddd
-#define MN_fsin 0x2de3
-#define MN_vmxon 0x2de8
-#define MN_vmrun 0x2dee
-#define MN_jo 0x2df4
-#define MN_jno 0x2df7
-#define MN_ccmpno 0x2dfb
-#define MN_setno 0x2e02
-#define MN_ctestno 0x2e08
-#define MN_setzuno 0x2e10
+#define MN_xbegin 0x2e4e
+#define MN_pfmin 0x2e55
+#define MN_fsin 0x2e5b
+#define MN_vmxon 0x2e60
+#define MN_vmrun 0x2e66
+#define MN_jo 0x2e6c
+#define MN_jno 0x2e6f
+#define MN_ccmpno 0x2e73
+#define MN_setno 0x2e7a
+#define MN_ctestno 0x2e80
+#define MN_setzuno 0x2e88
 #define MN_cmovno (MN_cfcmovno + 2)
-#define MN_cfcmovno 0x2e18
-#define MN_jpo 0x2e21
-#define MN_ccmpo 0x2e25
-#define MN_setpo 0x2e2b
-#define MN_setzupo 0x2e31
+#define MN_cfcmovno 0x2e90
+#define MN_jpo 0x2e99
+#define MN_ccmpo 0x2e9d
+#define MN_setpo 0x2ea3
+#define MN_setzupo 0x2ea9
 #define MN_cmovpo (MN_cfcmovpo + 2)
-#define MN_cfcmovpo 0x2e39
-#define MN_cqo 0x2e42
-#define MN_tilezero 0x2e46
-#define MN_clzero 0x2e4f
-#define MN_seto 0x2e56
-#define MN_into 0x2e5b
-#define MN_cqto 0x2e60
-#define MN_ctesto 0x2e65
-#define MN_ssto 0x2e6c
-#define MN_setzuo 0x2e71
+#define MN_cfcmovpo 0x2eb1
+#define MN_cqo 0x2eba
+#define MN_tilezero 0x2ebe
+#define MN_clzero 0x2ec7
+#define MN_seto 0x2ece
+#define MN_into 0x2ed3
+#define MN_cqto 0x2ed8
+#define MN_ctesto 0x2edd
+#define MN_ssto 0x2ee4
+#define MN_setzuo 0x2ee9
 #define MN_cmovo (MN_cfcmovo + 2)
-#define MN_cfcmovo 0x2e78
-#define MN_push2p 0x2e80
-#define MN_pop2p 0x2e87
-#define MN_bswap 0x2e8d
-#define MN_fsubp 0x2e93
-#define MN_pfrcp 0x2e99
-#define MN_rdtscp 0x2e9f
-#define MN_faddp 0x2ea6
-#define MN_pdep 0x2eac
-#define MN_ffreep 0x2eb1
-#define MN_rep 0x2eb8
-#define MN_pushp 0x2ebc
-#define MN_fcomip 0x2ec2
-#define MN_fucomip 0x2ec9
-#define MN_jp 0x2ed1
-#define MN_fmulp 0x2ed4
+#define MN_cfcmovo 0x2ef0
+#define MN_push2p 0x2ef8
+#define MN_pop2p 0x2eff
+#define MN_bswap 0x2f05
+#define MN_fsubp 0x2f0b
+#define MN_pfrcp 0x2f11
+#define MN_rdtscp 0x2f17
+#define MN_faddp 0x2f1e
+#define MN_pdep 0x2f24
+#define MN_ffreep 0x2f29
+#define MN_rep 0x2f30
+#define MN_pushp 0x2f34
+#define MN_fcomip 0x2f3a
+#define MN_fucomip 0x2f41
+#define MN_jp 0x2f49
+#define MN_fmulp 0x2f4c
 #define MN_cmp (MN_scmp + 1)
-#define MN_scmp 0x2eda
+#define MN_scmp 0x2f52
 #define MN_jmp (MN_ljmp + 1)
-#define MN_ljmp 0x2edf
-#define MN_fcomp 0x2ee4
-#define MN_ficomp 0x2eea
-#define MN_fucomp 0x2ef1
-#define MN_jnp 0x2ef8
-#define MN_setnp 0x2efc
-#define MN_setzunp 0x2f02
+#define MN_ljmp 0x2f57
+#define MN_fcomp 0x2f5c
+#define MN_ficomp 0x2f62
+#define MN_fucomp 0x2f69
+#define MN_jnp 0x2f70
+#define MN_setnp 0x2f74
+#define MN_setzunp 0x2f7a
 #define MN_cmovnp (MN_cfcmovnp + 2)
-#define MN_cfcmovnp 0x2f0a
+#define MN_cfcmovnp 0x2f82
 #define MN_nop (MN_fnop + 1)
-#define MN_fnop 0x2f13
-#define MN_loop 0x2f18
-#define MN_pop 0x2f1d
-#define MN_fcompp 0x2f21
-#define MN_fucompp 0x2f28
-#define MN_popp 0x2f30
-#define MN_fsubrp 0x2f35
-#define MN_fdivrp 0x2f3c
-#define MN_rstorssp 0x2f43
-#define MN_saveprevssp 0x2f4c
-#define MN_setp 0x2f58
-#define MN_fbstp 0x2f5d
-#define MN_fdecstp 0x2f63
-#define MN_fincstp 0x2f6b
-#define MN_fstp 0x2f73
-#define MN_fistp 0x2f78
-#define MN_fisttp 0x2f7e
+#define MN_fnop 0x2f8b
+#define MN_loop 0x2f90
+#define MN_pop 0x2f95
+#define MN_fcompp 0x2f99
+#define MN_fucompp 0x2fa0
+#define MN_popp 0x2fa8
+#define MN_fsubrp 0x2fad
+#define MN_fdivrp 0x2fb4
+#define MN_rstorssp 0x2fbb
+#define MN_saveprevssp 0x2fc4
+#define MN_setp 0x2fd0
+#define MN_fbstp 0x2fd5
+#define MN_fdecstp 0x2fdb
+#define MN_fincstp 0x2fe3
+#define MN_fstp 0x2feb
+#define MN_fistp 0x2ff0
+#define MN_fisttp 0x2ff6
 #define MN_movddup (MN_vmovddup + 1)
-#define MN_vmovddup 0x2f85
+#define MN_vmovddup 0x2ffd
 #define MN_movshdup (MN_vmovshdup + 1)
-#define MN_vmovshdup 0x2f8e
+#define MN_vmovshdup 0x3006
 #define MN_movsldup (MN_vmovsldup + 1)
-#define MN_vmovsldup 0x2f98
-#define MN_setzup 0x2fa2
-#define MN_fdivp 0x2fa9
+#define MN_vmovsldup 0x3010
+#define MN_setzup 0x301a
+#define MN_fdivp 0x3021
 #define MN_cmovp (MN_cfcmovp + 2)
-#define MN_cfcmovp 0x2faf
-#define MN_xmodexp 0x2fb7
-#define MN_vpbroadcastmb2q 0x2fbf
-#define MN_vpermi2q 0x2fcf
-#define MN_vpmovm2q 0x2fd8
-#define MN_movdq2q 0x2fe1
-#define MN_vpermt2q 0x2fe9
-#define MN_vpshaq 0x2ff2
-#define MN_vpsraq 0x2ff9
-#define MN_vphaddbq 0x3000
-#define MN_vphaddubq 0x3009
+#define MN_cfcmovp 0x3027
+#define MN_xmodexp 0x302f
+#define MN_vpbroadcastmb2q 0x3037
+#define MN_vpermi2q 0x3047
+#define MN_vpmovm2q 0x3050
+#define MN_movdq2q 0x3059
+#define MN_vpermt2q 0x3061
+#define MN_vpshaq 0x306a
+#define MN_vpsraq 0x3071
+#define MN_vphaddbq 0x3078
+#define MN_vphaddubq 0x3081
 #define MN_psubq (MN_vpsubq + 1)
-#define MN_vpsubq 0x3013
+#define MN_vpsubq 0x308b
 #define MN_pmovsxbq (MN_vpmovsxbq + 1)
-#define MN_vpmovsxbq 0x301a
+#define MN_vpmovsxbq 0x3092
 #define MN_pmovzxbq (MN_vpmovzxbq + 1)
-#define MN_vpmovzxbq 0x3024
+#define MN_vpmovzxbq 0x309c
 #define MN_cvttpd2dq (MN_vcvttpd2dq + 1)
-#define MN_vcvttpd2dq 0x302e
+#define MN_vcvttpd2dq 0x30a6
 #define MN_cvtpd2dq (MN_vcvtpd2dq + 1)
-#define MN_vcvtpd2dq 0x3039
-#define MN_vcvttph2dq 0x3043
-#define MN_vcvtph2dq 0x304e
-#define MN_movq2dq 0x3058
+#define MN_vcvtpd2dq 0x30b1
+#define MN_vcvttph2dq 0x30bb
+#define MN_vcvtph2dq 0x30c6
+#define MN_movq2dq 0x30d0
 #define MN_cvttps2dq (MN_vcvttps2dq + 1)
-#define MN_vcvttps2dq 0x3060
+#define MN_vcvttps2dq 0x30d8
 #define MN_cvtps2dq (MN_vcvtps2dq + 1)
-#define MN_vcvtps2dq 0x306b
-#define MN_vphsubdq 0x3075
-#define MN_cdq 0x307e
-#define MN_kaddq 0x3082
+#define MN_vcvtps2dq 0x30e3
+#define MN_vphsubdq 0x30ed
+#define MN_cdq 0x30f6
+#define MN_kaddq 0x30fa
 #define MN_paddq (MN_vpaddq + 1)
-#define MN_vpaddq 0x3088
-#define MN_vphadddq 0x308f
+#define MN_vpaddq 0x3100
+#define MN_vphadddq 0x3107
 #define MN_punpckhdq (MN_vpunpckhdq + 1)
-#define MN_vpunpckhdq 0x3098
-#define MN_kunpckdq 0x30a3
-#define MN_vpshldq 0x30ac
+#define MN_vpunpckhdq 0x3110
+#define MN_kunpckdq 0x311b
+#define MN_vpshldq 0x3124
 #define MN_punpckldq (MN_vpunpckldq + 1)
-#define MN_vpunpckldq 0x30b4
+#define MN_vpunpckldq 0x312c
 #define MN_pslldq (MN_vpslldq + 1)
-#define MN_vpslldq 0x30bf
+#define MN_vpslldq 0x3137
 #define MN_psrldq (MN_vpsrldq + 1)
-#define MN_vpsrldq 0x30c7
+#define MN_vpsrldq 0x313f
 #define MN_pmuldq (MN_vpmuldq + 1)
-#define MN_vpmuldq 0x30cf
-#define MN_kandq 0x30d7
-#define MN_vpandq 0x30dd
-#define MN_vpexpandq 0x30e4
+#define MN_vpmuldq 0x3147
+#define MN_kandq 0x314f
+#define MN_vpandq 0x3155
+#define MN_vpexpandq 0x315c
 #define MN_punpckhqdq (MN_vpunpckhqdq + 1)
-#define MN_vpunpckhqdq 0x30ee
+#define MN_vpunpckhqdq 0x3166
 #define MN_pclmulhqhqdq (MN_vpclmulhqhqdq + 1)
-#define MN_vpclmulhqhqdq 0x30fa
+#define MN_vpclmulhqhqdq 0x3172
 #define MN_pclmullqhqdq (MN_vpclmullqhqdq + 1)
-#define MN_vpclmullqhqdq 0x3108
+#define MN_vpclmullqhqdq 0x3180
 #define MN_punpcklqdq (MN_vpunpcklqdq + 1)
-#define MN_vpunpcklqdq 0x3116
+#define MN_vpunpcklqdq 0x318e
 #define MN_pclmulhqlqdq (MN_vpclmulhqlqdq + 1)
-#define MN_vpclmulhqlqdq 0x3122
+#define MN_vpclmulhqlqdq 0x319a
 #define MN_pclmullqlqdq (MN_vpclmullqlqdq + 1)
-#define MN_vpclmullqlqdq 0x3130
+#define MN_vpclmullqlqdq 0x31a8
 #define MN_pclmulqdq (MN_vpclmulqdq + 1)
-#define MN_vpclmulqdq 0x313e
-#define MN_vpgatherdq 0x3149
-#define MN_vpscatterdq 0x3154
-#define MN_vpshrdq 0x3160
+#define MN_vpclmulqdq 0x31b6
+#define MN_vpgatherdq 0x31c1
+#define MN_vpscatterdq 0x31cc
+#define MN_vpshrdq 0x31d8
 #define MN_movntdq (MN_vmovntdq + 1)
-#define MN_vmovntdq 0x3168
-#define MN_vcvttpd2udq 0x3171
-#define MN_vcvtpd2udq 0x317d
-#define MN_vcvttph2udq 0x3188
-#define MN_vcvtph2udq 0x3194
-#define MN_vcvttps2udq 0x319f
-#define MN_vcvtps2udq 0x31ab
-#define MN_vphaddudq 0x31b6
+#define MN_vmovntdq 0x31e0
+#define MN_vcvttpd2udq 0x31e9
+#define MN_vcvtpd2udq 0x31f5
+#define MN_vcvttph2udq 0x3200
+#define MN_vcvtph2udq 0x320c
+#define MN_vcvttps2udq 0x3217
+#define MN_vcvtps2udq 0x3223
+#define MN_vphaddudq 0x322e
 #define MN_pmuludq (MN_vpmuludq + 1)
-#define MN_vpmuludq 0x31c0
+#define MN_vpmuludq 0x3238
 #define MN_pmovsxdq (MN_vpmovsxdq + 1)
-#define MN_vpmovsxdq 0x31c9
+#define MN_vpmovsxdq 0x3241
 #define MN_pmovzxdq (MN_vpmovzxdq + 1)
-#define MN_vpmovzxdq 0x31d3
-#define MN_vpcomgeq 0x31dd
-#define MN_vpcomleq 0x31e6
-#define MN_vpcmpnleq 0x31ef
-#define MN_vpcmpleq 0x31f9
-#define MN_pfcmpeq 0x3202
-#define MN_vpcomfalseq 0x320a
-#define MN_vpcomtrueq 0x3216
-#define MN_vpternlogq 0x3221
-#define MN_vpshlq 0x322c
+#define MN_vpmovzxdq 0x324b
+#define MN_vpcomgeq 0x3255
+#define MN_vpcomleq 0x325e
+#define MN_vpcmpnleq 0x3267
+#define MN_vpcmpleq 0x3271
+#define MN_pfcmpeq 0x327a
+#define MN_vpcomfalseq 0x3282
+#define MN_vpcomtrueq 0x328e
+#define MN_vpternlogq 0x3299
+#define MN_vpshlq 0x32a4
 #define MN_psllq (MN_vpsllq + 1)
-#define MN_vpsllq 0x3233
-#define MN_vpmullq 0x323a
-#define MN_vprolq 0x3242
+#define MN_vpsllq 0x32ab
+#define MN_vpmullq 0x32b2
+#define MN_vprolq 0x32ba
 #define MN_psrlq (MN_vpsrlq + 1)
-#define MN_vpsrlq 0x3249
-#define MN_kshiftlq 0x3250
-#define MN_vpblendmq 0x3259
-#define MN_vptestnmq 0x3263
-#define MN_vpcomq 0x326d
-#define MN_vpermq 0x3274
-#define MN_vptestmq 0x327b
-#define MN_kandnq 0x3284
-#define MN_vpandnq 0x328b
-#define MN_valignq 0x3293
-#define MN_vpcmpq 0x329b
-#define MN_incsspq 0x32a2
-#define MN_rdsspq 0x32aa
-#define MN_vcvttpd2qq 0x32b1
-#define MN_vcvtpd2qq 0x32bc
-#define MN_vcvttph2qq 0x32c6
-#define MN_vcvtph2qq 0x32d1
-#define MN_vcvttps2qq 0x32db
-#define MN_vcvtps2qq 0x32e6
-#define MN_vpcomeqq 0x32f0
-#define MN_vpcomneqq 0x32f9
-#define MN_vpcmpneqq 0x3303
+#define MN_vpsrlq 0x32c1
+#define MN_kshiftlq 0x32c8
+#define MN_vpblendmq 0x32d1
+#define MN_vptestnmq 0x32db
+#define MN_vpcomq 0x32e5
+#define MN_vpermq 0x32ec
+#define MN_vptestmq 0x32f3
+#define MN_kandnq 0x32fc
+#define MN_vpandnq 0x3303
+#define MN_valignq 0x330b
+#define MN_vpcmpq 0x3313
+#define MN_incsspq 0x331a
+#define MN_rdsspq 0x3322
+#define MN_vcvttpd2qq 0x3329
+#define MN_vcvtpd2qq 0x3334
+#define MN_vcvttph2qq 0x333e
+#define MN_vcvtph2qq 0x3349
+#define MN_vcvttps2qq 0x3353
+#define MN_vcvtps2qq 0x335e
+#define MN_vpcomeqq 0x3368
+#define MN_vpcomneqq 0x3371
+#define MN_vpcmpneqq 0x337b
 #define MN_pcmpeqq (MN_vpcmpeqq + 1)
-#define MN_vpcmpeqq 0x330d
-#define MN_vpgatherqq 0x3316
-#define MN_vpscatterqq 0x3321
-#define MN_vcvttpd2uqq 0x332d
-#define MN_vcvtpd2uqq 0x3339
-#define MN_vcvttph2uqq 0x3344
-#define MN_vcvtph2uqq 0x3350
-#define MN_vcvttps2uqq 0x335b
-#define MN_vcvtps2uqq 0x3367
-#define MN_korq 0x3372
-#define MN_kxnorq 0x3377
-#define MN_vporq 0x337e
-#define MN_vprorq 0x3384
-#define MN_kxorq 0x338b
-#define MN_vpxorq 0x3391
+#define MN_vpcmpeqq 0x3385
+#define MN_vpgatherqq 0x338e
+#define MN_vpscatterqq 0x3399
+#define MN_vcvttpd2uqq 0x33a5
+#define MN_vcvtpd2uqq 0x33b1
+#define MN_vcvttph2uqq 0x33bc
+#define MN_vcvtph2uqq 0x33c8
+#define MN_vcvttps2uqq 0x33d3
+#define MN_vcvtps2uqq 0x33df
+#define MN_korq 0x33ea
+#define MN_kxnorq 0x33ef
+#define MN_vporq 0x33f6
+#define MN_vprorq 0x33fc
+#define MN_kxorq 0x3403
+#define MN_vpxorq 0x3409
 #define MN_pinsrq (MN_vpinsrq + 1)
-#define MN_vpinsrq 0x3398
-#define MN_kshiftrq 0x33a0
+#define MN_vpinsrq 0x3410
+#define MN_kshiftrq 0x3418
 #define MN_extrq (MN_pextrq + 1)
 #define MN_pextrq (MN_vpextrq + 1)
-#define MN_vpextrq 0x33a9
-#define MN_vpabsq 0x33b1
-#define MN_vpminsq 0x33b8
-#define MN_vmovrsq 0x33c0
-#define MN_vpcompressq 0x33c8
-#define MN_wrssq 0x33d4
-#define MN_wrussq 0x33da
-#define MN_vpmaxsq 0x33e1
-#define MN_vp2intersectq 0x33e9
-#define MN_vpconflictq 0x33f7
-#define MN_vpcomgtq 0x3403
+#define MN_vpextrq 0x3421
+#define MN_vpabsq 0x3429
+#define MN_vpminsq 0x3430
+#define MN_vmovrsq 0x3438
+#define MN_vpcompressq 0x3440
+#define MN_wrssq 0x344c
+#define MN_wrussq 0x3452
+#define MN_vpmaxsq 0x3459
+#define MN_vp2intersectq 0x3461
+#define MN_vpconflictq 0x346f
+#define MN_vpcomgtq 0x347b
 #define MN_pcmpgtq (MN_vpcmpgtq + 1)
-#define MN_vpcmpgtq 0x340c
-#define MN_cltq 0x3415
-#define MN_vpcomltq 0x341a
-#define MN_vpcmpnltq 0x3423
-#define MN_vpcmpltq 0x342d
-#define MN_vpopcntq 0x3436
-#define MN_vplzcntq 0x343f
-#define MN_movntq 0x3448
-#define MN_knotq 0x344f
-#define MN_vprotq 0x3455
-#define MN_insertq 0x345c
-#define MN_vpbroadcastq 0x3464
-#define MN_ktestq 0x3471
-#define MN_kortestq 0x3478
-#define MN_vpcomgeuq 0x3481
-#define MN_vpcomleuq 0x348b
-#define MN_vpcmpnleuq 0x3495
-#define MN_vpcmpleuq 0x34a0
-#define MN_vpcomfalseuq 0x34aa
-#define MN_vpcomtrueuq 0x34b7
-#define MN_vpmadd52huq 0x34c3
-#define MN_vpmadd52luq 0x34cf
-#define MN_vpcomuq 0x34db
-#define MN_vpminuq 0x34e3
-#define MN_vpcmpuq 0x34eb
-#define MN_vpcomequq 0x34f3
-#define MN_vpcomnequq 0x34fd
-#define MN_vpcmpnequq 0x3508
-#define MN_vpcmpequq 0x3513
-#define MN_vpcomgtuq 0x351d
-#define MN_vpcomltuq 0x3527
-#define MN_vpcmpnltuq 0x3531
-#define MN_vpcmpltuq 0x353c
-#define MN_vpmaxuq 0x3546
-#define MN_vpsravq 0x354e
-#define MN_vpshldvq 0x3556
-#define MN_vpshrdvq 0x355f
-#define MN_vpsllvq 0x3568
-#define MN_vprolvq 0x3570
-#define MN_vpsrlvq 0x3578
+#define MN_vpcmpgtq 0x3484
+#define MN_cltq 0x348d
+#define MN_vpcomltq 0x3492
+#define MN_vpcmpnltq 0x349b
+#define MN_vpcmpltq 0x34a5
+#define MN_vpopcntq 0x34ae
+#define MN_vplzcntq 0x34b7
+#define MN_movntq 0x34c0
+#define MN_knotq 0x34c7
+#define MN_vprotq 0x34cd
+#define MN_insertq 0x34d4
+#define MN_vpbroadcastq 0x34dc
+#define MN_ktestq 0x34e9
+#define MN_kortestq 0x34f0
+#define MN_vpcomgeuq 0x34f9
+#define MN_vpcomleuq 0x3503
+#define MN_vpcmpnleuq 0x350d
+#define MN_vpcmpleuq 0x3518
+#define MN_vpcomfalseuq 0x3522
+#define MN_vpcomtrueuq 0x352f
+#define MN_vpmadd52huq 0x353b
+#define MN_vpmadd52luq 0x3547
+#define MN_vpcomuq 0x3553
+#define MN_vpminuq 0x355b
+#define MN_vpcmpuq 0x3563
+#define MN_vpcomequq 0x356b
+#define MN_vpcomnequq 0x3575
+#define MN_vpcmpnequq 0x3580
+#define MN_vpcmpequq 0x358b
+#define MN_vpcomgtuq 0x3595
+#define MN_vpcomltuq 0x359f
+#define MN_vpcmpnltuq 0x35a9
+#define MN_vpcmpltuq 0x35b4
+#define MN_vpmaxuq 0x35be
+#define MN_vpsravq 0x35c6
+#define MN_vpshldvq 0x35ce
+#define MN_vpshrdvq 0x35d7
+#define MN_vpsllvq 0x35e0
+#define MN_vprolvq 0x35e8
+#define MN_vpsrlvq 0x35f0
 #define MN_movq (MN_kmovq + 1)
 #define MN_kmovq (MN_maskmovq + 3)
 #define MN_maskmovq (MN_vpmaskmovq + 2)
-#define MN_vpmaskmovq 0x3580
-#define MN_vmovq 0x358b
-#define MN_vprorvq 0x3591
-#define MN_vphaddwq 0x3599
-#define MN_vphadduwq 0x35a2
+#define MN_vpmaskmovq 0x35f8
+#define MN_vmovq 0x3603
+#define MN_vprorvq 0x3609
+#define MN_vphaddwq 0x3611
+#define MN_vphadduwq 0x361a
 #define MN_pmovsxwq (MN_vpmovsxwq + 1)
-#define MN_vpmovsxwq 0x35ac
+#define MN_vpmovsxwq 0x3624
 #define MN_pmovzxwq (MN_vpmovzxwq + 1)
-#define MN_vpmovzxwq 0x35b6
-#define MN_rex_r 0x35c0
-#define MN_vmclear 0x35c6
-#define MN_lar 0x35ce
-#define MN_sar 0x35d2
+#define MN_vpmovzxwq 0x362e
+#define MN_rex_r 0x3638
+#define MN_vmclear 0x363e
+#define MN_lar 0x3646
+#define MN_sar 0x364a
 #define MN_fsubr (MN_pfsubr + 1)
-#define MN_pfsubr 0x35d6
-#define MN_fisubr 0x35dd
-#define MN_rcr 0x35e4
-#define MN_vzeroupper 0x35e8
+#define MN_pfsubr 0x364e
+#define MN_fisubr 0x3655
+#define MN_rcr 0x365c
+#define MN_vzeroupper 0x3660
 #define MN_enter (MN_sysenter + 3)
-#define MN_sysenter 0x35f3
-#define MN_shr 0x35fc
-#define MN_clr 0x3600
+#define MN_sysenter 0x366b
+#define MN_shr 0x3674
+#define MN_clr 0x3678
 #define MN_palignr (MN_vpalignr + 1)
-#define MN_vpalignr 0x3604
+#define MN_vpalignr 0x367c
 #define MN_or (MN_aor + 1)
-#define MN_aor 0x360d
+#define MN_aor 0x3685
 #define MN_por (MN_vpor + 1)
-#define MN_vpor 0x3611
-#define MN_ror 0x3616
+#define MN_vpor 0x3689
+#define MN_ror 0x368e
 #define MN_monitor (MN_umonitor + 1)
-#define MN_umonitor 0x361a
-#define MN_frstor 0x3623
+#define MN_umonitor 0x3692
+#define MN_frstor 0x369b
 #define MN_xrstor (MN_fxrstor + 1)
-#define MN_fxrstor 0x362a
+#define MN_fxrstor 0x36a2
 #define MN_xor (MN_axor + 1)
-#define MN_axor 0x3632
+#define MN_axor 0x36aa
 #define MN_pxor (MN_vpxor + 1)
-#define MN_vpxor 0x3637
-#define MN_verr 0x363d
-#define MN_bsr 0x3642
+#define MN_vpxor 0x36af
+#define MN_verr 0x36b5
+#define MN_bsr 0x36ba
 #define MN_ldmxcsr (MN_vldmxcsr + 1)
-#define MN_vldmxcsr 0x3646
+#define MN_vldmxcsr 0x36be
 #define MN_stmxcsr (MN_vstmxcsr + 1)
-#define MN_vstmxcsr 0x364f
-#define MN_blsr 0x3658
+#define MN_vstmxcsr 0x36c7
+#define MN_blsr 0x36d0
 #define MN_rdmsr (MN_urdmsr + 1)
-#define MN_urdmsr 0x365d
+#define MN_urdmsr 0x36d5
 #define MN_wrmsr (MN_uwrmsr + 1)
-#define MN_uwrmsr 0x3664
-#define MN_btr 0x366b
-#define MN_xcrypt_ctr 0x366f
-#define MN_xcryptctr 0x367a
-#define MN_ltr 0x3684
-#define MN_str 0x3688
-#define MN_bextr 0x368c
-#define MN_fdivr 0x3692
-#define MN_fidivr 0x3698
-#define MN_rex_wr 0x369f
-#define MN_vcvt2ph2bf8s 0x36a6
-#define MN_vcvtbiasph2bf8s 0x36b3
-#define MN_vcvtph2bf8s 0x36c3
-#define MN_vcvt2ph2hf8s 0x36cf
-#define MN_vcvtbiasph2hf8s 0x36dc
-#define MN_vcvtph2hf8s 0x36ec
-#define MN_aas 0x36f8
-#define MN_scas 0x36fc
-#define MN_das 0x3701
-#define MN_fabs 0x3705
-#define MN_jmpabs 0x370a
-#define MN_movabs 0x3711
-#define MN_vcvttbf162ibs 0x3718
-#define MN_vcvtbf162ibs 0x3726
-#define MN_vcvttph2ibs 0x3733
-#define MN_vcvtph2ibs 0x373f
-#define MN_vcvttps2ibs 0x374a
-#define MN_vcvtps2ibs 0x3756
-#define MN_vcvttbf162iubs 0x3761
-#define MN_vcvtbf162iubs 0x3770
-#define MN_vcvttph2iubs 0x377e
-#define MN_vcvtph2iubs 0x378b
-#define MN_vcvttps2iubs 0x3797
-#define MN_vcvtps2iubs 0x37a4
+#define MN_uwrmsr 0x36dc
+#define MN_btr 0x36e3
+#define MN_xcrypt_ctr 0x36e7
+#define MN_xcryptctr 0x36f2
+#define MN_ltr 0x36fc
+#define MN_str 0x3700
+#define MN_bextr 0x3704
+#define MN_fdivr 0x370a
+#define MN_fidivr 0x3710
+#define MN_rex_wr 0x3717
+#define MN_vcvtbf82bf4s 0x371e
+#define MN_vcvthf82bf4s 0x372b
+#define MN_vcvtbf82bf6s 0x3738
+#define MN_vcvthf82hf6s 0x3745
+#define MN_vcvt2ph2bf8s 0x3752
+#define MN_vcvtbiasph2bf8s 0x375f
+#define MN_vcvtph2bf8s 0x376f
+#define MN_vcvtbiasps2bf8s 0x377b
+#define MN_vcvtps2bf8s 0x378b
+#define MN_vcvt2ph2hf8s 0x3797
+#define MN_vcvtbiasph2hf8s 0x37a4
+#define MN_vcvtph2hf8s 0x37b4
+#define MN_vcvtrops2hf8s 0x37c0
+#define MN_vcvtbiasps2hf8s 0x37ce
+#define MN_vcvtps2hf8s 0x37de
+#define MN_aas 0x37ea
+#define MN_scas 0x37ee
+#define MN_das 0x37f3
+#define MN_fabs 0x37f7
+#define MN_jmpabs 0x37fc
+#define MN_movabs 0x3803
+#define MN_vcvttbf162ibs 0x380a
+#define MN_vcvtbf162ibs 0x3818
+#define MN_vcvttph2ibs 0x3825
+#define MN_vcvtph2ibs 0x3831
+#define MN_vcvttps2ibs 0x383c
+#define MN_vcvtps2ibs 0x3848
+#define MN_vcvttbf162iubs 0x3853
+#define MN_vcvtbf162iubs 0x3862
+#define MN_vcvttph2iubs 0x3870
+#define MN_vcvtph2iubs 0x387d
+#define MN_vcvttps2iubs 0x3889
+#define MN_vcvtps2iubs 0x3896
 #define MN_cs (MN_blcs + 2)
-#define MN_blcs 0x37b0
+#define MN_blcs 0x38a2
 #define MN_ds (MN_lds + 1)
-#define MN_lds 0x37b5
-#define MN_enqcmds 0x37b9
-#define MN_lods 0x37c1
-#define MN_vpdpbssds 0x37c6
-#define MN_vp4dpwssds 0x37d0
-#define MN_vpdpwssds 0x37db
-#define MN_vpdpbusds 0x37e5
-#define MN_vpdpwusds 0x37ef
-#define MN_vpdpbsuds 0x37f9
-#define MN_vpdpwsuds 0x3803
-#define MN_vpdpbuuds 0x380d
-#define MN_vpdpwuuds 0x3817
+#define MN_lds 0x38a7
+#define MN_enqcmds 0x38ab
+#define MN_lods 0x38b3
+#define MN_vpdpbssds 0x38b8
+#define MN_vp4dpwssds 0x38c2
+#define MN_vpdpwssds 0x38cd
+#define MN_vpdpbusds 0x38d7
+#define MN_vpdpwusds 0x38e1
+#define MN_vpdpbsuds 0x38eb
+#define MN_vpdpwsuds 0x38f5
+#define MN_vpdpbuuds 0x38ff
+#define MN_vpdpwuuds 0x3909
 #define MN_es (MN_les + 1)
-#define MN_les 0x3821
-#define MN_xsaves 0x3825
+#define MN_les 0x3913
+#define MN_xsaves 0x3917
 #define MN_fs (MN_lfs + 1)
-#define MN_lfs 0x382c
+#define MN_lfs 0x391e
 #define MN_gs (MN_lkgs + 2)
-#define MN_lkgs 0x3830
-#define MN_lgs 0x3835
-#define MN_swapgs 0x3839
-#define MN_fchs 0x3840
-#define MN_vcvttsd2sis 0x3845
-#define MN_vcvttss2sis 0x3851
-#define MN_vcvttsd2usis 0x385d
-#define MN_vcvttss2usis 0x386a
-#define MN_js 0x3877
-#define MN_encls 0x387a
+#define MN_lkgs 0x3922
+#define MN_lgs 0x3927
+#define MN_swapgs 0x392b
+#define MN_fchs 0x3932
+#define MN_vcvttsd2sis 0x3937
+#define MN_vcvttss2sis 0x3943
+#define MN_vcvttsd2usis 0x394f
+#define MN_vcvttss2usis 0x395c
+#define MN_js 0x3969
+#define MN_encls 0x396c
 #define MN_emms (MN_femms + 1)
-#define MN_femms 0x3880
+#define MN_femms 0x3972
 #define MN_ins (MN_lwpins + 3)
-#define MN_lwpins 0x3886
-#define MN_jns 0x388d
-#define MN_ccmpns 0x3891
-#define MN_wrmsrns 0x3898
-#define MN_setns 0x38a0
-#define MN_ctestns 0x38a6
-#define MN_setzuns 0x38ae
+#define MN_lwpins 0x3978
+#define MN_jns 0x397f
+#define MN_ccmpns 0x3983
+#define MN_wrmsrns 0x398a
+#define MN_setns 0x3992
+#define MN_ctestns 0x3998
+#define MN_setzuns 0x39a0
 #define MN_cmovns (MN_cfcmovns + 2)
-#define MN_cfcmovns 0x38b6
-#define MN_fcos 0x38bf
-#define MN_fsincos 0x38c4
-#define MN_stos 0x38cc
-#define MN_vfmaddsub231ps 0x38d1
-#define MN_vfmsub231ps 0x38e0
-#define MN_vfnmsub231ps 0x38ec
-#define MN_vfmsubadd231ps 0x38f9
-#define MN_vfmadd231ps 0x3908
-#define MN_vfnmadd231ps 0x3914
-#define MN_vfmaddsub132ps 0x3921
-#define MN_vfmsub132ps 0x3930
-#define MN_vfnmsub132ps 0x393c
-#define MN_vfmsubadd132ps 0x3949
-#define MN_vfmadd132ps 0x3958
-#define MN_vfnmadd132ps 0x3964
+#define MN_cfcmovns 0x39a8
+#define MN_fcos 0x39b1
+#define MN_fsincos 0x39b6
+#define MN_stos 0x39be
+#define MN_vfmaddsub231ps 0x39c3
+#define MN_vfmsub231ps 0x39d2
+#define MN_vfnmsub231ps 0x39de
+#define MN_vfmsubadd231ps 0x39eb
+#define MN_vfmadd231ps 0x39fa
+#define MN_vfnmadd231ps 0x3a06
+#define MN_vfmaddsub132ps 0x3a13
+#define MN_vfmsub132ps 0x3a22
+#define MN_vfnmsub132ps 0x3a2e
+#define MN_vfmsubadd132ps 0x3a3b
+#define MN_vfmadd132ps 0x3a4a
+#define MN_vfnmadd132ps 0x3a56
 #define MN_tmmultf32ps (MN_ttmmultf32ps + 1)
-#define MN_ttmmultf32ps 0x3971
-#define MN_vcvtneebf162ps 0x397e
-#define MN_vbcstnebf162ps 0x398d
-#define MN_vcvtneobf162ps 0x399c
+#define MN_ttmmultf32ps 0x3a63
+#define MN_vcvtneebf162ps 0x3a70
+#define MN_vbcstnebf162ps 0x3a7f
+#define MN_vcvtneobf162ps 0x3a8e
+#define MN_vcvtbf82ps 0x3a9d
+#define MN_vcvthf82ps 0x3aa8
 #define MN_cvtpd2ps (MN_vcvtpd2ps + 1)
-#define MN_vcvtpd2ps 0x39ab
-#define MN_tcvtrowd2ps 0x39b5
-#define MN_vcvtneeph2ps 0x39c1
-#define MN_vcvtneoph2ps 0x39ce
-#define MN_vcvtph2ps 0x39db
-#define MN_vbcstnesh2ps 0x39e5
-#define MN_vpermi2ps 0x39f2
-#define MN_cvtpi2ps 0x39fc
-#define MN_vpermil2ps 0x3a05
-#define MN_vexp2ps 0x3a10
+#define MN_vcvtpd2ps 0x3ab3
+#define MN_tcvtrowd2ps 0x3abd
+#define MN_vcvtneeph2ps 0x3ac9
+#define MN_vcvtneoph2ps 0x3ad6
+#define MN_vcvtph2ps 0x3ae3
+#define MN_vbcstnesh2ps 0x3aed
+#define MN_vpermi2ps 0x3afa
+#define MN_cvtpi2ps 0x3b04
+#define MN_vpermil2ps 0x3b0d
+#define MN_vexp2ps 0x3b18
 #define MN_cvtdq2ps (MN_vcvtdq2ps + 1)
-#define MN_vcvtdq2ps 0x3a18
-#define MN_vcvtudq2ps 0x3a22
-#define MN_vcvtqq2ps 0x3a2d
-#define MN_vcvtuqq2ps 0x3a37
-#define MN_vpermt2ps 0x3a42
-#define MN_vfmaddsub213ps 0x3a4c
-#define MN_vfmsub213ps 0x3a5b
-#define MN_vfnmsub213ps 0x3a67
-#define MN_vfmsubadd213ps 0x3a74
-#define MN_vfmadd213ps 0x3a83
-#define MN_vfnmadd213ps 0x3a8f
-#define MN_vrcp14ps 0x3a9c
-#define MN_vrsqrt14ps 0x3aa5
+#define MN_vcvtdq2ps 0x3b20
+#define MN_vcvtudq2ps 0x3b2a
+#define MN_vcvtqq2ps 0x3b35
+#define MN_vcvtuqq2ps 0x3b3f
+#define MN_vpermt2ps 0x3b4a
+#define MN_vfmaddsub213ps 0x3b54
+#define MN_vfmsub213ps 0x3b63
+#define MN_vfnmsub213ps 0x3b6f
+#define MN_vfmsubadd213ps 0x3b7c
+#define MN_vfmadd213ps 0x3b8b
+#define MN_vfnmadd213ps 0x3b97
+#define MN_vrcp14ps 0x3ba4
+#define MN_vrsqrt14ps 0x3bad
 #define MN_tdpbf16ps (MN_ttdpbf16ps + 1)
-#define MN_ttdpbf16ps 0x3ab0
-#define MN_vdpbf16ps 0x3abb
+#define MN_ttdpbf16ps 0x3bb8
+#define MN_vdpbf16ps 0x3bc3
 #define MN_tcmmrlfp16ps (MN_ttcmmrlfp16ps + 1)
-#define MN_ttcmmrlfp16ps 0x3ac5
+#define MN_ttcmmrlfp16ps 0x3bcd
 #define MN_tcmmimfp16ps (MN_tconjtcmmimfp16ps + 5)
-#define MN_tconjtcmmimfp16ps 0x3ad3
-#define MN_ttcmmimfp16ps 0x3ae5
+#define MN_tconjtcmmimfp16ps 0x3bdb
+#define MN_ttcmmimfp16ps 0x3bed
 #define MN_tdpfp16ps (MN_ttdpfp16ps + 1)
-#define MN_ttdpfp16ps 0x3af3
-#define MN_vrcp28ps 0x3afe
-#define MN_vrsqrt28ps 0x3b07
-#define MN_tdphbf8ps 0x3b12
-#define MN_tdpbf8ps 0x3b1c
-#define MN_tdpbhf8ps 0x3b25
-#define MN_tdphf8ps 0x3b2f
+#define MN_ttdpfp16ps 0x3bfb
+#define MN_vrcp28ps 0x3c06
+#define MN_vrsqrt28ps 0x3c0f
+#define MN_tdphbf8ps 0x3c1a
+#define MN_tdpbf8ps 0x3c24
+#define MN_tdpbhf8ps 0x3c2d
+#define MN_tdphf8ps 0x3c37
 #define MN_movaps (MN_vmovaps + 1)
-#define MN_vmovaps 0x3b38
+#define MN_vmovaps 0x3c40
 #define MN_subps (MN_addsubps + 3)
 #define MN_addsubps (MN_vfmaddsubps + 3)
-#define MN_vfmaddsubps 0x3b40
-#define MN_vaddsubps 0x3b4c
+#define MN_vfmaddsubps 0x3c48
+#define MN_vaddsubps 0x3c54
 #define MN_hsubps (MN_vhsubps + 1)
-#define MN_vhsubps 0x3b56
-#define MN_vfmsubps 0x3b5e
-#define MN_vfnmsubps 0x3b67
-#define MN_vsubps 0x3b71
-#define MN_vgatherpf0dps 0x3b78
-#define MN_vscatterpf0dps 0x3b86
-#define MN_vgatherpf1dps 0x3b95
-#define MN_vscatterpf1dps 0x3ba3
+#define MN_vhsubps 0x3c5e
+#define MN_vfmsubps 0x3c66
+#define MN_vfnmsubps 0x3c6f
+#define MN_vsubps 0x3c79
+#define MN_vgatherpf0dps 0x3c80
+#define MN_vscatterpf0dps 0x3c8e
+#define MN_vgatherpf1dps 0x3c9d
+#define MN_vscatterpf1dps 0x3cab
 #define MN_addps (MN_vfmsubaddps + 6)
-#define MN_vfmsubaddps 0x3bb2
+#define MN_vfmsubaddps 0x3cba
 #define MN_haddps (MN_vhaddps + 1)
-#define MN_vhaddps 0x3bbe
-#define MN_v4fmaddps 0x3bc6
-#define MN_vfmaddps 0x3bd0
-#define MN_v4fnmaddps 0x3bd9
-#define MN_vfnmaddps 0x3be4
-#define MN_vaddps 0x3bee
+#define MN_vhaddps 0x3cc6
+#define MN_v4fmaddps 0x3cce
+#define MN_vfmaddps 0x3cd8
+#define MN_v4fnmaddps 0x3ce1
+#define MN_vfnmaddps 0x3cec
+#define MN_vaddps 0x3cf6
 #define MN_andps (MN_vexpandps + 4)
-#define MN_vexpandps 0x3bf5
-#define MN_vandps 0x3bff
+#define MN_vexpandps 0x3cfd
+#define MN_vandps 0x3d07
 #define MN_blendps (MN_vblendps + 1)
-#define MN_vblendps 0x3c06
+#define MN_vblendps 0x3d0e
 #define MN_roundps (MN_vroundps + 1)
-#define MN_vroundps 0x3c0f
-#define MN_vgatherdps 0x3c18
-#define MN_vscatterdps 0x3c23
+#define MN_vroundps 0x3d17
+#define MN_vgatherdps 0x3d20
+#define MN_vscatterdps 0x3d2b
 #define MN_cmpunordps (MN_vcmpunordps + 1)
-#define MN_vcmpunordps 0x3c2f
+#define MN_vcmpunordps 0x3d37
 #define MN_cmpordps (MN_vcmpordps + 1)
-#define MN_vcmpordps 0x3c3b
-#define MN_vreduceps 0x3c45
-#define MN_vrangeps 0x3c4f
-#define MN_vcmpngeps 0x3c58
-#define MN_vcmpgeps 0x3c62
-#define MN_vrndscaleps 0x3c6b
+#define MN_vcmpordps 0x3d43
+#define MN_vreduceps 0x3d4d
+#define MN_vrangeps 0x3d57
+#define MN_vcmpngeps 0x3d60
+#define MN_vcmpgeps 0x3d6a
+#define MN_vrndscaleps 0x3d73
 #define MN_cmpnleps (MN_vcmpnleps + 1)
-#define MN_vcmpnleps 0x3c77
+#define MN_vcmpnleps 0x3d7f
 #define MN_cmpleps (MN_vcmpleps + 1)
-#define MN_vcmpleps 0x3c81
-#define MN_vcmpfalseps 0x3c8a
-#define MN_vcmptrueps 0x3c96
-#define MN_vscalefps 0x3ca1
+#define MN_vcmpleps 0x3d89
+#define MN_vcmpfalseps 0x3d92
+#define MN_vcmptrueps 0x3d9e
+#define MN_vscalefps 0x3da9
 #define MN_shufps (MN_vshufps + 1)
-#define MN_vshufps 0x3cab
+#define MN_vshufps 0x3db3
 #define MN_unpckhps (MN_vunpckhps + 1)
-#define MN_vunpckhps 0x3cb3
+#define MN_vunpckhps 0x3dbb
 #define MN_movlhps (MN_vmovlhps + 1)
-#define MN_vmovlhps 0x3cbd
-#define MN_vdpphps 0x3cc6
+#define MN_vmovlhps 0x3dc5
+#define MN_vdpphps 0x3dce
 #define MN_movhps (MN_vmovhps + 1)
-#define MN_vmovhps 0x3cce
+#define MN_vmovhps 0x3dd6
 #define MN_movmskps (MN_vmovmskps + 1)
-#define MN_vmovmskps 0x3cd6
+#define MN_vmovmskps 0x3dde
 #define MN_movhlps (MN_vmovhlps + 1)
-#define MN_vmovhlps 0x3ce0
-#define MN_vpermilps 0x3ce9
+#define MN_vmovhlps 0x3de8
+#define MN_vpermilps 0x3df1
 #define MN_unpcklps (MN_vunpcklps + 1)
-#define MN_vunpcklps 0x3cf3
+#define MN_vunpcklps 0x3dfb
 #define MN_mulps (MN_vmulps + 1)
-#define MN_vmulps 0x3cfd
+#define MN_vmulps 0x3e05
 #define MN_movlps (MN_vmovlps + 1)
-#define MN_vmovlps 0x3d04
+#define MN_vmovlps 0x3e0c
 #define MN_cmps (MN_ccmps + 1)
-#define MN_ccmps 0x3d0c
-#define MN_vblendmps 0x3d12
-#define MN_vfixupimmps 0x3d1c
-#define MN_vpermps 0x3d28
+#define MN_ccmps 0x3e14
+#define MN_vblendmps 0x3e1a
+#define MN_vfixupimmps 0x3e24
+#define MN_vpermps 0x3e30
 #define MN_andnps (MN_vandnps + 1)
-#define MN_vandnps 0x3d30
+#define MN_vandnps 0x3e38
 #define MN_minps (MN_vminps + 1)
-#define MN_vminps 0x3d38
-#define MN_seamops 0x3d3f
+#define MN_vminps 0x3e40
+#define MN_seamops 0x3e47
 #define MN_rcpps (MN_vrcpps + 1)
-#define MN_vrcpps 0x3d47
+#define MN_vrcpps 0x3e4f
 #define MN_dpps (MN_vdpps + 1)
-#define MN_vdpps 0x3d4e
+#define MN_vdpps 0x3e56
 #define MN_cmpps (MN_vcmpps + 1)
-#define MN_vcmpps 0x3d54
-#define MN_vgetexpps 0x3d5b
-#define MN_vgatherpf0qps 0x3d65
-#define MN_vscatterpf0qps 0x3d73
-#define MN_vgatherpf1qps 0x3d82
-#define MN_vscatterpf1qps 0x3d90
-#define MN_vcmpunord_qps 0x3d9f
-#define MN_vcmpord_qps 0x3dad
+#define MN_vcmpps 0x3e5c
+#define MN_vgetexpps 0x3e63
+#define MN_vgatherpf0qps 0x3e6d
+#define MN_vscatterpf0qps 0x3e7b
+#define MN_vgatherpf1qps 0x3e8a
+#define MN_vscatterpf1qps 0x3e98
+#define MN_vcmpunord_qps 0x3ea7
+#define MN_vcmpord_qps 0x3eb5
 #define MN_cmpneqps (MN_vcmpneqps + 1)
-#define MN_vcmpneqps 0x3db9
+#define MN_vcmpneqps 0x3ec1
 #define MN_cmpeqps (MN_vcmpeqps + 1)
-#define MN_vcmpeqps 0x3dc3
-#define MN_vcmpge_oqps 0x3dcc
-#define MN_vcmple_oqps 0x3dd8
-#define MN_vcmpfalse_oqps 0x3de4
-#define MN_vcmpneq_oqps 0x3df3
-#define MN_vcmpeq_oqps 0x3e00
-#define MN_vcmpgt_oqps 0x3e0c
-#define MN_vcmplt_oqps 0x3e18
-#define MN_vgatherqps 0x3e24
-#define MN_vscatterqps 0x3e2f
-#define MN_vcmpnge_uqps 0x3e3b
-#define MN_vcmpnle_uqps 0x3e48
-#define MN_vcmptrue_uqps 0x3e55
-#define MN_vcmpneq_uqps 0x3e63
-#define MN_vcmpeq_uqps 0x3e70
-#define MN_vcmpngt_uqps 0x3e7c
-#define MN_vcmpnlt_uqps 0x3e89
+#define MN_vcmpeqps 0x3ecb
+#define MN_vcmpge_oqps 0x3ed4
+#define MN_vcmple_oqps 0x3ee0
+#define MN_vcmpfalse_oqps 0x3eec
+#define MN_vcmpneq_oqps 0x3efb
+#define MN_vcmpeq_oqps 0x3f08
+#define MN_vcmpgt_oqps 0x3f14
+#define MN_vcmplt_oqps 0x3f20
+#define MN_vgatherqps 0x3f2c
+#define MN_vscatterqps 0x3f37
+#define MN_vcmpnge_uqps 0x3f43
+#define MN_vcmpnle_uqps 0x3f50
+#define MN_vcmptrue_uqps 0x3f5d
+#define MN_vcmpneq_uqps 0x3f6b
+#define MN_vcmpeq_uqps 0x3f78
+#define MN_vcmpngt_uqps 0x3f84
+#define MN_vcmpnlt_uqps 0x3f91
 #define MN_orps (MN_vorps + 1)
-#define MN_vorps 0x3e96
+#define MN_vorps 0x3f9e
 #define MN_xorps (MN_vxorps + 1)
-#define MN_vxorps 0x3e9c
-#define MN_vcmpunord_sps 0x3ea3
-#define MN_vcmpord_sps 0x3eb1
-#define MN_vcmpge_osps 0x3ebd
-#define MN_vcmple_osps 0x3ec9
-#define MN_vcmpfalse_osps 0x3ed5
-#define MN_vcmpneq_osps 0x3ee4
-#define MN_vcmpeq_osps 0x3ef1
-#define MN_vcmpgt_osps 0x3efd
-#define MN_vcmplt_osps 0x3f09
-#define MN_vfpclassps 0x3f15
-#define MN_vcompressps 0x3f20
-#define MN_vcmpnge_usps 0x3f2c
-#define MN_vcmpnle_usps 0x3f39
-#define MN_vcmptrue_usps 0x3f46
-#define MN_vcmpneq_usps 0x3f54
-#define MN_vcmpeq_usps 0x3f61
-#define MN_vcmpngt_usps 0x3f6d
-#define MN_vcmpnlt_usps 0x3f7a
+#define MN_vxorps 0x3fa4
+#define MN_vcmpunord_sps 0x3fab
+#define MN_vcmpord_sps 0x3fb9
+#define MN_vcmpge_osps 0x3fc5
+#define MN_vcmple_osps 0x3fd1
+#define MN_vcmpfalse_osps 0x3fdd
+#define MN_vcmpneq_osps 0x3fec
+#define MN_vcmpeq_osps 0x3ff9
+#define MN_vcmpgt_osps 0x4005
+#define MN_vcmplt_osps 0x4011
+#define MN_vfpclassps 0x401d
+#define MN_vcompressps 0x4028
+#define MN_vcmpnge_usps 0x4034
+#define MN_vcmpnle_usps 0x4041
+#define MN_vcmptrue_usps 0x404e
+#define MN_vcmpneq_usps 0x405c
+#define MN_vcmpeq_usps 0x4069
+#define MN_vcmpngt_usps 0x4075
+#define MN_vcmpnlt_usps 0x4082
 #define MN_extractps (MN_vextractps + 1)
-#define MN_vextractps 0x3f87
-#define MN_vcmpngtps 0x3f92
-#define MN_vcmpgtps 0x3f9c
+#define MN_vextractps 0x408f
+#define MN_vcmpngtps 0x409a
+#define MN_vcmpgtps 0x40a4
 #define MN_cmpnltps (MN_vcmpnltps + 1)
-#define MN_vcmpnltps 0x3fa5
+#define MN_vcmpnltps 0x40ad
 #define MN_cmpltps (MN_vcmpltps + 1)
-#define MN_vcmpltps 0x3faf
-#define MN_vgetmantps 0x3fb8
+#define MN_vcmpltps 0x40b7
+#define MN_vgetmantps 0x40c0
 #define MN_movntps (MN_vmovntps + 1)
-#define MN_vmovntps 0x3fc3
+#define MN_vmovntps 0x40cb
 #define MN_insertps (MN_vinsertps + 1)
-#define MN_vinsertps 0x3fcc
+#define MN_vinsertps 0x40d4
 #define MN_sqrtps (MN_rsqrtps + 1)
 #define MN_rsqrtps (MN_vrsqrtps + 1)
-#define MN_vrsqrtps 0x3fd6
-#define MN_vsqrtps 0x3fdf
-#define MN_vtestps 0x3fe7
+#define MN_vrsqrtps 0x40de
+#define MN_vsqrtps 0x40e7
+#define MN_vtestps 0x40ef
 #define MN_movups (MN_vmovups + 1)
-#define MN_vmovups 0x3fef
+#define MN_vmovups 0x40f7
 #define MN_blendvps (MN_vblendvps + 1)
-#define MN_vblendvps 0x3ff7
+#define MN_vblendvps 0x40ff
 #define MN_divps (MN_vdivps + 1)
-#define MN_vdivps 0x4001
-#define MN_vmaskmovps 0x4008
+#define MN_vdivps 0x4109
+#define MN_vmaskmovps 0x4110
 #define MN_maxps (MN_vminmaxps + 4)
-#define MN_vminmaxps 0x4013
-#define MN_vmaxps 0x401d
-#define MN_vfrczps 0x4024
-#define MN_vcvttpd2dqs 0x402c
-#define MN_vcvttps2dqs 0x4038
-#define MN_vcvttpd2udqs 0x4044
-#define MN_vcvttps2udqs 0x4051
-#define MN_vcvttpd2qqs 0x405e
-#define MN_vcvttps2qqs 0x406a
-#define MN_vcvttpd2uqqs 0x4076
-#define MN_vcvttps2uqqs 0x4083
-#define MN_t2rpntlvwz0rs 0x4090
-#define MN_t2rpntlvwz1rs 0x409e
-#define MN_tileloaddrs 0x40ac
-#define MN_xrstors 0x40b8
-#define MN_movrs 0x40c0
+#define MN_vminmaxps 0x411b
+#define MN_vmaxps 0x4125
+#define MN_vfrczps 0x412c
+#define MN_vcvttpd2dqs 0x4134
+#define MN_vcvttps2dqs 0x4140
+#define MN_vcvttpd2udqs 0x414c
+#define MN_vcvttps2udqs 0x4159
+#define MN_vcvttpd2qqs 0x4166
+#define MN_vcvttps2qqs 0x4172
+#define MN_vcvttpd2uqqs 0x417e
+#define MN_vcvttps2uqqs 0x418b
+#define MN_t2rpntlvwz0rs 0x4198
+#define MN_t2rpntlvwz1rs 0x41a6
+#define MN_tileloaddrs 0x41b4
+#define MN_xrstors 0x41c0
+#define MN_movrs 0x41c8
 #define MN_ss (MN_vfmsub231ss + 9)
-#define MN_vfmsub231ss 0x40c6
-#define MN_vfnmsub231ss 0x40d2
-#define MN_vfmadd231ss 0x40df
-#define MN_vfnmadd231ss 0x40eb
-#define MN_vfmsub132ss 0x40f8
-#define MN_vfnmsub132ss 0x4104
-#define MN_vfmadd132ss 0x4111
-#define MN_vfnmadd132ss 0x411d
+#define MN_vfmsub231ss 0x41ce
+#define MN_vfnmsub231ss 0x41da
+#define MN_vfmadd231ss 0x41e7
+#define MN_vfnmadd231ss 0x41f3
+#define MN_vfmsub132ss 0x4200
+#define MN_vfnmsub132ss 0x420c
+#define MN_vfmadd132ss 0x4219
+#define MN_vfnmadd132ss 0x4225
 #define MN_cvtsd2ss (MN_vcvtsd2ss + 1)
-#define MN_vcvtsd2ss 0x412a
-#define MN_vcvtsh2ss 0x4134
+#define MN_vcvtsd2ss 0x4232
+#define MN_vcvtsh2ss 0x423c
 #define MN_cvtsi2ss (MN_vcvtsi2ss + 1)
-#define MN_vcvtsi2ss 0x413e
-#define MN_vcvtusi2ss 0x4148
-#define MN_vfmsub213ss 0x4153
-#define MN_vfnmsub213ss 0x415f
-#define MN_vfmadd213ss 0x416c
-#define MN_vfnmadd213ss 0x4178
-#define MN_vrcp14ss 0x4185
-#define MN_vrsqrt14ss 0x418e
-#define MN_vrcp28ss 0x4199
-#define MN_vrsqrt28ss 0x41a2
+#define MN_vcvtsi2ss 0x4246
+#define MN_vcvtusi2ss 0x4250
+#define MN_vfmsub213ss 0x425b
+#define MN_vfnmsub213ss 0x4267
+#define MN_vfmadd213ss 0x4274
+#define MN_vfnmadd213ss 0x4280
+#define MN_vrcp14ss 0x428d
+#define MN_vrsqrt14ss 0x4296
+#define MN_vrcp28ss 0x42a1
+#define MN_vrsqrt28ss 0x42aa
 #define MN_subss (MN_vfmsubss + 3)
-#define MN_vfmsubss 0x41ad
-#define MN_vfnmsubss 0x41b6
-#define MN_vsubss 0x41c0
+#define MN_vfmsubss 0x42b5
+#define MN_vfnmsubss 0x42be
+#define MN_vsubss 0x42c8
 #define MN_addss (MN_v4fmaddss + 4)
-#define MN_v4fmaddss 0x41c7
-#define MN_vfmaddss 0x41d1
-#define MN_v4fnmaddss 0x41da
-#define MN_vfnmaddss 0x41e5
-#define MN_vaddss 0x41ef
+#define MN_v4fmaddss 0x42cf
+#define MN_vfmaddss 0x42d9
+#define MN_v4fnmaddss 0x42e2
+#define MN_vfnmaddss 0x42ed
+#define MN_vaddss 0x42f7
 #define MN_roundss (MN_vroundss + 1)
-#define MN_vroundss 0x41f6
+#define MN_vroundss 0x42fe
 #define MN_cmpunordss (MN_vcmpunordss + 1)
-#define MN_vcmpunordss 0x41ff
+#define MN_vcmpunordss 0x4307
 #define MN_cmpordss (MN_vcmpordss + 1)
-#define MN_vcmpordss 0x420b
-#define MN_vreducess 0x4215
-#define MN_vrangess 0x421f
-#define MN_vcmpngess 0x4228
-#define MN_vcmpgess 0x4232
-#define MN_vrndscaless 0x423b
+#define MN_vcmpordss 0x4313
+#define MN_vreducess 0x431d
+#define MN_vrangess 0x4327
+#define MN_vcmpngess 0x4330
+#define MN_vcmpgess 0x433a
+#define MN_vrndscaless 0x4343
 #define MN_cmpnless (MN_vcmpnless + 1)
-#define MN_vcmpnless 0x4247
+#define MN_vcmpnless 0x434f
 #define MN_cmpless (MN_vcmpless + 1)
-#define MN_vcmpless 0x4251
-#define MN_vcmpfalsess 0x425a
-#define MN_vcmptruess 0x4266
-#define MN_vscalefss 0x4271
+#define MN_vcmpless 0x4359
+#define MN_vcmpfalsess 0x4362
+#define MN_vcmptruess 0x436e
+#define MN_vscalefss 0x4379
 #define MN_comiss (MN_ucomiss + 1)
 #define MN_ucomiss (MN_vucomiss + 1)
-#define MN_vucomiss 0x427b
-#define MN_vcomiss 0x4284
+#define MN_vucomiss 0x4383
+#define MN_vcomiss 0x438c
 #define MN_lss (MN_mulss + 2)
 #define MN_mulss (MN_vmulss + 1)
-#define MN_vmulss 0x428c
-#define MN_vfixupimmss 0x4293
+#define MN_vmulss 0x4394
+#define MN_vfixupimmss 0x439b
 #define MN_minss (MN_vminss + 1)
-#define MN_vminss 0x429f
+#define MN_vminss 0x43a7
 #define MN_rcpss (MN_vrcpss + 1)
-#define MN_vrcpss 0x42a6
+#define MN_vrcpss 0x43ae
 #define MN_cmpss (MN_vcmpss + 1)
-#define MN_vcmpss 0x42ad
-#define MN_vgetexpss 0x42b4
-#define MN_vcmpunord_qss 0x42be
-#define MN_vcmpord_qss 0x42cc
+#define MN_vcmpss 0x43b5
+#define MN_vgetexpss 0x43bc
+#define MN_vcmpunord_qss 0x43c6
+#define MN_vcmpord_qss 0x43d4
 #define MN_cmpneqss (MN_vcmpneqss + 1)
-#define MN_vcmpneqss 0x42d8
+#define MN_vcmpneqss 0x43e0
 #define MN_cmpeqss (MN_vcmpeqss + 1)
-#define MN_vcmpeqss 0x42e2
-#define MN_vcmpge_oqss 0x42eb
-#define MN_vcmple_oqss 0x42f7
-#define MN_vcmpfalse_oqss 0x4303
-#define MN_vcmpneq_oqss 0x4312
-#define MN_vcmpeq_oqss 0x431f
-#define MN_vcmpgt_oqss 0x432b
-#define MN_vcmplt_oqss 0x4337
-#define MN_vcmpnge_uqss 0x4343
-#define MN_vcmpnle_uqss 0x4350
-#define MN_vcmptrue_uqss 0x435d
-#define MN_vcmpneq_uqss 0x436b
-#define MN_vcmpeq_uqss 0x4378
-#define MN_vcmpngt_uqss 0x4384
-#define MN_vcmpnlt_uqss 0x4391
-#define MN_vcmpunord_sss 0x439e
-#define MN_vcmpord_sss 0x43ac
-#define MN_vcmpge_osss 0x43b8
-#define MN_vcmple_osss 0x43c4
-#define MN_vcmpfalse_osss 0x43d0
-#define MN_vcmpneq_osss 0x43df
-#define MN_vcmpeq_osss 0x43ec
-#define MN_vcmpgt_osss 0x43f8
-#define MN_vcmplt_osss 0x4404
-#define MN_vfpclassss 0x4410
-#define MN_vcmpnge_usss 0x441b
-#define MN_vcmpnle_usss 0x4428
-#define MN_vcmptrue_usss 0x4435
-#define MN_vcmpneq_usss 0x4443
-#define MN_vcmpeq_usss 0x4450
-#define MN_vcmpngt_usss 0x445c
-#define MN_vcmpnlt_usss 0x4469
-#define MN_vcmpngtss 0x4476
-#define MN_vcmpgtss 0x4480
+#define MN_vcmpeqss 0x43ea
+#define MN_vcmpge_oqss 0x43f3
+#define MN_vcmple_oqss 0x43ff
+#define MN_vcmpfalse_oqss 0x440b
+#define MN_vcmpneq_oqss 0x441a
+#define MN_vcmpeq_oqss 0x4427
+#define MN_vcmpgt_oqss 0x4433
+#define MN_vcmplt_oqss 0x443f
+#define MN_vcmpnge_uqss 0x444b
+#define MN_vcmpnle_uqss 0x4458
+#define MN_vcmptrue_uqss 0x4465
+#define MN_vcmpneq_uqss 0x4473
+#define MN_vcmpeq_uqss 0x4480
+#define MN_vcmpngt_uqss 0x448c
+#define MN_vcmpnlt_uqss 0x4499
+#define MN_vcmpunord_sss 0x44a6
+#define MN_vcmpord_sss 0x44b4
+#define MN_vcmpge_osss 0x44c0
+#define MN_vcmple_osss 0x44cc
+#define MN_vcmpfalse_osss 0x44d8
+#define MN_vcmpneq_osss 0x44e7
+#define MN_vcmpeq_osss 0x44f4
+#define MN_vcmpgt_osss 0x4500
+#define MN_vcmplt_osss 0x450c
+#define MN_vfpclassss 0x4518
+#define MN_vcmpnge_usss 0x4523
+#define MN_vcmpnle_usss 0x4530
+#define MN_vcmptrue_usss 0x453d
+#define MN_vcmpneq_usss 0x454b
+#define MN_vcmpeq_usss 0x4558
+#define MN_vcmpngt_usss 0x4564
+#define MN_vcmpnlt_usss 0x4571
+#define MN_vcmpngtss 0x457e
+#define MN_vcmpgtss 0x4588
 #define MN_cmpnltss (MN_vcmpnltss + 1)
-#define MN_vcmpnltss 0x4489
+#define MN_vcmpnltss 0x4591
 #define MN_cmpltss (MN_vcmpltss + 1)
-#define MN_vcmpltss 0x4493
-#define MN_vgetmantss 0x449c
-#define MN_movntss 0x44a7
+#define MN_vcmpltss 0x459b
+#define MN_vgetmantss 0x45a4
+#define MN_movntss 0x45af
 #define MN_sqrtss (MN_rsqrtss + 1)
 #define MN_rsqrtss (MN_vrsqrtss + 1)
-#define MN_vrsqrtss 0x44af
-#define MN_vsqrtss 0x44b8
-#define MN_vbroadcastss 0x44c0
+#define MN_vrsqrtss 0x45b7
+#define MN_vsqrtss 0x45c0
+#define MN_vbroadcastss 0x45c8
 #define MN_divss (MN_vdivss + 1)
-#define MN_vdivss 0x44cd
+#define MN_vdivss 0x45d5
 #define MN_movss (MN_vmovss + 1)
-#define MN_vmovss 0x44d4
+#define MN_vmovss 0x45dc
 #define MN_maxss (MN_vminmaxss + 4)
-#define MN_vminmaxss 0x44db
-#define MN_vmaxss 0x44e5
-#define MN_vucomxss 0x44ec
-#define MN_vcomxss 0x44f5
-#define MN_vfrczss 0x44fd
-#define MN_bts 0x4505
-#define MN_erets 0x4509
-#define MN_sets 0x450f
-#define MN_clts 0x4514
-#define MN_ctests 0x4519
-#define MN_outs 0x4520
-#define MN_setzus 0x4525
+#define MN_vminmaxss 0x45e3
+#define MN_vmaxss 0x45ed
+#define MN_vucomxss 0x45f4
+#define MN_vcomxss 0x45fd
+#define MN_vfrczss 0x4605
+#define MN_bts 0x460d
+#define MN_erets 0x4611
+#define MN_sets 0x4617
+#define MN_clts 0x461c
+#define MN_ctests 0x4621
+#define MN_outs 0x4628
+#define MN_setzus 0x462d
 #define MN_movs (MN_cmovs + 1)
 #define MN_cmovs (MN_cfcmovs + 2)
-#define MN_cfcmovs 0x452c
-#define MN_fldl2t 0x4534
-#define MN_xlat 0x453b
-#define MN_bt 0x4540
-#define MN_fxtract 0x4543
-#define MN_lgdt 0x454b
-#define MN_sgdt 0x4550
-#define MN_lidt 0x4555
-#define MN_sidt 0x455a
-#define MN_fldt 0x455f
-#define MN_lldt 0x4564
-#define MN_sldt 0x4569
+#define MN_cfcmovs 0x4634
+#define MN_fldl2t 0x463c
+#define MN_xlat 0x4643
+#define MN_bt 0x4648
+#define MN_fxtract 0x464b
+#define MN_lgdt 0x4653
+#define MN_sgdt 0x4658
+#define MN_lidt 0x465d
+#define MN_sidt 0x4662
+#define MN_fldt 0x4667
+#define MN_lldt 0x466c
+#define MN_sldt 0x4671
 #define MN_ret (MN_iret + 1)
 #define MN_iret (MN_uiret + 1)
-#define MN_uiret 0x456e
-#define MN_lret 0x4574
-#define MN_seamret 0x4579
-#define MN_sysret 0x4581
-#define MN_hreset 0x4588
-#define MN_pfcmpgt 0x458f
-#define MN_ht 0x4597
+#define MN_uiret 0x4676
+#define MN_lret 0x467c
+#define MN_seamret 0x4681
+#define MN_sysret 0x4689
+#define MN_hreset 0x4690
+#define MN_pfcmpgt 0x4697
+#define MN_ht 0x469f
 #define MN_wait (MN_fwait + 1)
-#define MN_fwait 0x459a
+#define MN_fwait 0x46a2
 #define MN_mwait (MN_umwait + 1)
-#define MN_umwait 0x45a0
-#define MN_mcommit 0x45a7
-#define MN_finit 0x45af
-#define MN_skinit 0x45b5
-#define MN_fninit 0x45bc
-#define MN_vmgexit 0x45c3
-#define MN_sysexit 0x45cb
-#define MN_hlt 0x45d3
-#define MN_popcnt 0x45d7
-#define MN_lzcnt 0x45de
-#define MN_tzcnt 0x45e4
-#define MN_hnt 0x45ea
+#define MN_umwait 0x46a8
+#define MN_mcommit 0x46af
+#define MN_finit 0x46b7
+#define MN_skinit 0x46bd
+#define MN_fninit 0x46c4
+#define MN_vmgexit 0x46cb
+#define MN_sysexit 0x46d3
+#define MN_hlt 0x46db
+#define MN_popcnt 0x46df
+#define MN_lzcnt 0x46e6
+#define MN_tzcnt 0x46ec
+#define MN_hnt 0x46f2
 #define MN_int (MN_frndint + 4)
-#define MN_frndint 0x45ee
-#define MN_not 0x45f6
-#define MN_invept 0x45fa
-#define MN_ccmpt 0x4601
-#define MN_xsaveopt 0x4607
-#define MN_clflushopt 0x4610
-#define MN_fstpt 0x461b
-#define MN_xabort 0x4621
-#define MN_fsqrt 0x4628
-#define MN_pfrsqrt 0x462e
+#define MN_frndint 0x46f6
+#define MN_not 0x46fe
+#define MN_invept 0x4702
+#define MN_ccmpt 0x4709
+#define MN_xsaveopt 0x470f
+#define MN_clflushopt 0x4718
+#define MN_fstpt 0x4723
+#define MN_xabort 0x4729
+#define MN_fsqrt 0x4730
+#define MN_pfrsqrt 0x4736
 #define MN_aesdeclast (MN_vaesdeclast + 1)
-#define MN_vaesdeclast 0x4636
+#define MN_vaesdeclast 0x473e
 #define MN_aesenclast (MN_vaesenclast + 1)
-#define MN_vaesenclast 0x4642
+#define MN_vaesenclast 0x474a
 #define MN_test (MN_ptest + 1)
 #define MN_ptest (MN_vptest + 1)
-#define MN_vptest 0x464e
-#define MN_xtest 0x4655
-#define MN_fst 0x465b
-#define MN_fist 0x465f
-#define MN_rdmsrlist 0x4664
-#define MN_wrmsrlist 0x466e
+#define MN_vptest 0x4756
+#define MN_xtest 0x475d
+#define MN_fst 0x4763
+#define MN_fist 0x4767
+#define MN_rdmsrlist 0x476c
+#define MN_wrmsrlist 0x4776
 #define MN_aeskeygenassist (MN_vaeskeygenassist + 1)
-#define MN_vaeskeygenassist 0x4678
-#define MN_vmptrst 0x4689
-#define MN_ftst 0x4691
-#define MN_rmpadjust 0x4696
-#define MN_ctestt 0x46a0
-#define MN_out 0x46a7
-#define MN_pext 0x46ab
-#define MN_bndcu 0x46b0
-#define MN_enclu 0x46b6
-#define MN_fcmovnu 0x46bc
+#define MN_vaeskeygenassist 0x4780
+#define MN_vmptrst 0x4791
+#define MN_ftst 0x4799
+#define MN_rmpadjust 0x479e
+#define MN_ctestt 0x47a8
+#define MN_out 0x47af
+#define MN_pext 0x47b3
+#define MN_bndcu 0x47b8
+#define MN_enclu 0x47be
+#define MN_fcmovnu 0x47c4
 #define MN_lddqu (MN_vlddqu + 1)
-#define MN_vlddqu 0x46c4
+#define MN_vlddqu 0x47cc
 #define MN_movdqu (MN_maskmovdqu + 4)
 #define MN_maskmovdqu (MN_vmaskmovdqu + 1)
-#define MN_vmaskmovdqu 0x46cb
-#define MN_vmovdqu 0x46d7
-#define MN_rdpkru 0x46df
-#define MN_wrpkru 0x46e6
-#define MN_rdpru 0x46ed
-#define MN_eretu 0x46f3
-#define MN_fcmovu 0x46f9
-#define MN_imulzu 0x4700
-#define MN_xgetbv 0x4707
-#define MN_xsetbv 0x470e
+#define MN_vmaskmovdqu 0x47d3
+#define MN_vmovdqu 0x47df
+#define MN_rdpkru 0x47e7
+#define MN_wrpkru 0x47ee
+#define MN_rdpru 0x47f5
+#define MN_eretu 0x47fb
+#define MN_fcmovu 0x4801
+#define MN_imulzu 0x4808
+#define MN_xgetbv 0x480f
+#define MN_xsetbv 0x4816
 #define MN_div (MN_fdiv + 1)
-#define MN_fdiv 0x4715
+#define MN_fdiv 0x481d
 #define MN_idiv (MN_fidiv + 1)
-#define MN_fidiv 0x471a
-#define MN_enclv 0x4720
-#define MN_fldenv 0x4726
-#define MN_fstenv 0x472d
-#define MN_fnstenv 0x4734
+#define MN_fidiv 0x4822
+#define MN_enclv 0x4828
+#define MN_fldenv 0x482e
+#define MN_fstenv 0x4835
+#define MN_fnstenv 0x483c
 #define MN_mov (MN_vpcmov + 3)
-#define MN_vpcmov 0x473c
-#define MN_bndmov 0x4743
-#define MN_smov 0x474a
-#define MN_rex_w 0x474f
-#define MN_vcvttph2w 0x4755
-#define MN_vcvtph2w 0x475f
-#define MN_vpermi2w 0x4768
-#define MN_vpmovm2w 0x4771
-#define MN_vpermt2w 0x477a
-#define MN_vpshaw 0x4783
+#define MN_vpcmov 0x4844
+#define MN_bndmov 0x484b
+#define MN_smov 0x4852
+#define MN_rex_w 0x4857
+#define MN_vcvttph2w 0x485d
+#define MN_vcvtph2w 0x4867
+#define MN_vpermi2w 0x4870
+#define MN_vpmovm2w 0x4879
+#define MN_vpermt2w 0x4882
+#define MN_vpshaw 0x488b
 #define MN_psraw (MN_vpsraw + 1)
-#define MN_vpsraw 0x478a
-#define MN_vphsubbw 0x4791
-#define MN_cbw 0x479a
+#define MN_vpsraw 0x4892
+#define MN_vphsubbw 0x4899
+#define MN_cbw 0x48a2
 #define MN_psadbw (MN_vdbpsadbw + 3)
-#define MN_vdbpsadbw 0x479e
+#define MN_vdbpsadbw 0x48a6
 #define MN_mpsadbw (MN_vmpsadbw + 1)
-#define MN_vmpsadbw 0x47a8
-#define MN_vpsadbw 0x47b1
-#define MN_vphaddbw 0x47b9
+#define MN_vmpsadbw 0x48b0
+#define MN_vpsadbw 0x48b9
+#define MN_vphaddbw 0x48c1
 #define MN_punpckhbw (MN_vpunpckhbw + 1)
-#define MN_vpunpckhbw 0x47c2
-#define MN_kunpckbw 0x47cd
+#define MN_vpunpckhbw 0x48ca
+#define MN_kunpckbw 0x48d5
 #define MN_punpcklbw (MN_vpunpcklbw + 1)
-#define MN_vpunpcklbw 0x47d6
-#define MN_vphaddubw 0x47e1
+#define MN_vpunpcklbw 0x48de
+#define MN_vphaddubw 0x48e9
 #define MN_phsubw (MN_vphsubw + 1)
-#define MN_vphsubw 0x47eb
+#define MN_vphsubw 0x48f3
 #define MN_psubw (MN_vpsubw + 1)
-#define MN_vpsubw 0x47f3
+#define MN_vpsubw 0x48fb
 #define MN_pmovsxbw (MN_vpmovsxbw + 1)
-#define MN_vpmovsxbw 0x47fa
+#define MN_vpmovsxbw 0x4902
 #define MN_pmovzxbw (MN_vpmovzxbw + 1)
-#define MN_vpmovzxbw 0x4804
-#define MN_fldcw 0x480e
-#define MN_fstcw 0x4814
-#define MN_fnstcw 0x481a
+#define MN_vpmovzxbw 0x490c
+#define MN_fldcw 0x4916
+#define MN_fstcw 0x491c
+#define MN_fnstcw 0x4922
 #define MN_phaddw (MN_vphaddw + 1)
-#define MN_vphaddw 0x4821
-#define MN_kaddw 0x4829
+#define MN_vphaddw 0x4929
+#define MN_kaddw 0x4931
 #define MN_paddw (MN_vpaddw + 1)
-#define MN_vpaddw 0x482f
-#define MN_vpshldw 0x4836
-#define MN_kandw 0x483e
-#define MN_vpexpandw 0x4844
+#define MN_vpaddw 0x4937
+#define MN_vpshldw 0x493e
+#define MN_kandw 0x4946
+#define MN_vpexpandw 0x494c
 #define MN_pblendw (MN_vpblendw + 1)
-#define MN_vpblendw 0x484e
-#define MN_vpshrdw 0x4857
+#define MN_vpblendw 0x4956
+#define MN_vpshrdw 0x495f
 #define MN_packssdw (MN_vpackssdw + 1)
-#define MN_vpackssdw 0x485f
+#define MN_vpackssdw 0x4967
 #define MN_packusdw (MN_vpackusdw + 1)
-#define MN_vpackusdw 0x4869
-#define MN_vpmovusdw 0x4873
-#define MN_vpmovsdw 0x487d
-#define MN_vpmovdw 0x4886
-#define MN_vpcomgew 0x488e
-#define MN_vpcomlew 0x4897
-#define MN_vpcmpnlew 0x48a0
-#define MN_vpcmplew 0x48aa
-#define MN_vpcomfalsew 0x48b3
-#define MN_vpcomtruew 0x48bf
-#define MN_pi2fw 0x48ca
-#define MN_pshufw 0x48d0
+#define MN_vpackusdw 0x4971
+#define MN_vpmovusdw 0x497b
+#define MN_vpmovsdw 0x4985
+#define MN_vpmovdw 0x498e
+#define MN_vpcomgew 0x4996
+#define MN_vpcomlew 0x499f
+#define MN_vpcmpnlew 0x49a8
+#define MN_vpcmplew 0x49b2
+#define MN_vpcomfalsew 0x49bb
+#define MN_vpcomtruew 0x49c7
+#define MN_pi2fw 0x49d2
+#define MN_pshufw 0x49d8
 #define MN_pavgw (MN_vpavgw + 1)
-#define MN_vpavgw 0x48d7
-#define MN_prefetchw 0x48de
+#define MN_vpavgw 0x49df
+#define MN_prefetchw 0x49e6
 #define MN_pshufhw (MN_vpshufhw + 1)
-#define MN_vpshufhw 0x48e8
+#define MN_vpshufhw 0x49f0
 #define MN_pmulhw (MN_vpmulhw + 1)
-#define MN_vpmulhw 0x48f1
-#define MN_pf2iw 0x48f9
+#define MN_vpmulhw 0x49f9
+#define MN_pf2iw 0x4a01
 #define MN_pshuflw (MN_vpshuflw + 1)
-#define MN_vpshuflw 0x48ff
-#define MN_vpshlw 0x4908
+#define MN_vpshuflw 0x4a07
+#define MN_vpshlw 0x4a10
 #define MN_psllw (MN_vpsllw + 1)
-#define MN_vpsllw 0x490f
+#define MN_vpsllw 0x4a17
 #define MN_pmullw (MN_vpmullw + 1)
-#define MN_vpmullw 0x4916
+#define MN_vpmullw 0x4a1e
 #define MN_psrlw (MN_vpsrlw + 1)
-#define MN_vpsrlw 0x491e
-#define MN_kshiftlw 0x4925
-#define MN_vpblendmw 0x492e
-#define MN_vptestnmw 0x4938
-#define MN_vpcomw 0x4942
-#define MN_vpermw 0x4949
-#define MN_vptestmw 0x4950
-#define MN_kandnw 0x4959
+#define MN_vpsrlw 0x4a26
+#define MN_kshiftlw 0x4a2d
+#define MN_vpblendmw 0x4a36
+#define MN_vptestnmw 0x4a40
+#define MN_vpcomw 0x4a4a
+#define MN_vpermw 0x4a51
+#define MN_vptestmw 0x4a58
+#define MN_kandnw 0x4a61
 #define MN_psignw (MN_vpsignw + 1)
-#define MN_vpsignw 0x4960
-#define MN_tilemovrow 0x4968
-#define MN_vpcmpw 0x4973
-#define MN_vpcomeqw 0x497a
-#define MN_vpcomneqw 0x4983
-#define MN_vpcmpneqw 0x498d
+#define MN_vpsignw 0x4a68
+#define MN_tilemovrow 0x4a70
+#define MN_vpcmpw 0x4a7b
+#define MN_vpcomeqw 0x4a82
+#define MN_vpcomneqw 0x4a8b
+#define MN_vpcmpneqw 0x4a95
 #define MN_pcmpeqw (MN_vpcmpeqw + 1)
-#define MN_vpcmpeqw 0x4997
-#define MN_vpmovusqw 0x49a0
-#define MN_vpmovsqw 0x49aa
-#define MN_vpmovqw 0x49b3
-#define MN_verw 0x49bb
-#define MN_pmulhrw 0x49c0
-#define MN_korw 0x49c8
-#define MN_kxnorw 0x49cd
-#define MN_kxorw 0x49d4
+#define MN_vpcmpeqw 0x4a9f
+#define MN_vpmovusqw 0x4aa8
+#define MN_vpmovsqw 0x4ab2
+#define MN_vpmovqw 0x4abb
+#define MN_verw 0x4ac3
+#define MN_pmulhrw 0x4ac8
+#define MN_korw 0x4ad0
+#define MN_kxnorw 0x4ad5
+#define MN_kxorw 0x4adc
 #define MN_pinsrw (MN_vpinsrw + 1)
-#define MN_vpinsrw 0x49da
-#define MN_kshiftrw 0x49e2
+#define MN_vpinsrw 0x4ae2
+#define MN_kshiftrw 0x4aea
 #define MN_pextrw (MN_vpextrw + 1)
-#define MN_vpextrw 0x49eb
+#define MN_vpextrw 0x4af3
 #define MN_pabsw (MN_vpabsw + 1)
-#define MN_vpabsw 0x49f3
+#define MN_vpabsw 0x4afb
 #define MN_pmaddubsw (MN_vpmaddubsw + 1)
-#define MN_vpmaddubsw 0x49fa
+#define MN_vpmaddubsw 0x4b02
 #define MN_phsubsw (MN_vphsubsw + 1)
-#define MN_vphsubsw 0x4a05
+#define MN_vphsubsw 0x4b0d
 #define MN_psubsw (MN_vpsubsw + 1)
-#define MN_vpsubsw 0x4a0e
+#define MN_vpsubsw 0x4b16
 #define MN_phaddsw (MN_vphaddsw + 1)
-#define MN_vphaddsw 0x4a16
+#define MN_vphaddsw 0x4b1e
 #define MN_paddsw (MN_vpaddsw + 1)
-#define MN_vpaddsw 0x4a1f
-#define MN_lmsw 0x4a27
-#define MN_smsw 0x4a2c
+#define MN_vpaddsw 0x4b27
+#define MN_lmsw 0x4b2f
+#define MN_smsw 0x4b34
 #define MN_pminsw (MN_vpminsw + 1)
-#define MN_vpminsw 0x4a31
+#define MN_vpminsw 0x4b39
 #define MN_pmulhrsw (MN_vpmulhrsw + 1)
-#define MN_vpmulhrsw 0x4a39
-#define MN_vmovrsw 0x4a43
-#define MN_vpcompressw 0x4a4b
-#define MN_fstsw 0x4a57
-#define MN_fnstsw 0x4a5d
+#define MN_vpmulhrsw 0x4b41
+#define MN_vmovrsw 0x4b4b
+#define MN_vpcompressw 0x4b53
+#define MN_fstsw 0x4b5f
+#define MN_fnstsw 0x4b65
 #define MN_psubusw (MN_vpsubusw + 1)
-#define MN_vpsubusw 0x4a64
+#define MN_vpsubusw 0x4b6c
 #define MN_paddusw (MN_vpaddusw + 1)
-#define MN_vpaddusw 0x4a6d
-#define MN_movsw 0x4a76
+#define MN_vpaddusw 0x4b75
+#define MN_movsw 0x4b7e
 #define MN_pmaxsw (MN_vpmaxsw + 1)
-#define MN_vpmaxsw 0x4a7c
-#define MN_cbtw 0x4a84
-#define MN_vpcomgtw 0x4a89
+#define MN_vpmaxsw 0x4b84
+#define MN_cbtw 0x4b8c
+#define MN_vpcomgtw 0x4b91
 #define MN_pcmpgtw (MN_vpcmpgtw + 1)
-#define MN_vpcmpgtw 0x4a92
-#define MN_vpcomltw 0x4a9b
-#define MN_vpcmpnltw 0x4aa4
-#define MN_vpcmpltw 0x4aae
-#define MN_vpopcntw 0x4ab7
-#define MN_knotw 0x4ac0
-#define MN_vprotw 0x4ac6
-#define MN_vpbroadcastw 0x4acd
-#define MN_ktestw 0x4ada
-#define MN_kortestw 0x4ae1
-#define MN_vcvttph2uw 0x4aea
-#define MN_vcvtph2uw 0x4af5
-#define MN_vpcomgeuw 0x4aff
-#define MN_vpcomleuw 0x4b09
-#define MN_vpcmpnleuw 0x4b13
-#define MN_vpcmpleuw 0x4b1e
-#define MN_vpcomfalseuw 0x4b28
-#define MN_vpcomtrueuw 0x4b35
+#define MN_vpcmpgtw 0x4b9a
+#define MN_vpcomltw 0x4ba3
+#define MN_vpcmpnltw 0x4bac
+#define MN_vpcmpltw 0x4bb6
+#define MN_vpopcntw 0x4bbf
+#define MN_knotw 0x4bc8
+#define MN_vprotw 0x4bce
+#define MN_vpbroadcastw 0x4bd5
+#define MN_ktestw 0x4be2
+#define MN_kortestw 0x4be9
+#define MN_vcvttph2uw 0x4bf2
+#define MN_vcvtph2uw 0x4bfd
+#define MN_vpcomgeuw 0x4c07
+#define MN_vpcomleuw 0x4c11
+#define MN_vpcmpnleuw 0x4c1b
+#define MN_vpcmpleuw 0x4c26
+#define MN_vpcomfalseuw 0x4c30
+#define MN_vpcomtrueuw 0x4c3d
 #define MN_pmulhuw (MN_vpmulhuw + 1)
-#define MN_vpmulhuw 0x4b41
-#define MN_vpcomuw 0x4b4a
+#define MN_vpmulhuw 0x4c49
+#define MN_vpcomuw 0x4c52
 #define MN_pminuw (MN_vpminuw + 1)
-#define MN_vpminuw 0x4b52
-#define MN_vpcmpuw 0x4b5a
-#define MN_vpcomequw 0x4b62
-#define MN_vpcomnequw 0x4b6c
-#define MN_vpcmpnequw 0x4b77
-#define MN_vpcmpequw 0x4b82
+#define MN_vpminuw 0x4c5a
+#define MN_vpcmpuw 0x4c62
+#define MN_vpcomequw 0x4c6a
+#define MN_vpcomnequw 0x4c74
+#define MN_vpcmpnequw 0x4c7f
+#define MN_vpcmpequw 0x4c8a
 #define MN_phminposuw (MN_vphminposuw + 1)
-#define MN_vphminposuw 0x4b8c
-#define MN_vpcomgtuw 0x4b98
-#define MN_vpcomltuw 0x4ba2
-#define MN_vpcmpnltuw 0x4bac
-#define MN_vpcmpltuw 0x4bb7
+#define MN_vphminposuw 0x4c94
+#define MN_vpcomgtuw 0x4ca0
+#define MN_vpcomltuw 0x4caa
+#define MN_vpcmpnltuw 0x4cb4
+#define MN_vpcmpltuw 0x4cbf
 #define MN_pmaxuw (MN_vpmaxuw + 1)
-#define MN_vpmaxuw 0x4bc1
-#define MN_vpsravw 0x4bc9
-#define MN_vpshldvw 0x4bd1
-#define MN_vpshrdvw 0x4bda
-#define MN_vpsllvw 0x4be3
-#define MN_vpsrlvw 0x4beb
-#define MN_kmovw 0x4bf3
-#define MN_vmovw 0x4bf9
-#define MN_vpmacsww 0x4bff
-#define MN_vpmacssww 0x4c08
-#define MN_movzw 0x4c12
-#define MN_rex_x 0x4c18
-#define MN_fyl2x 0x4c1e
-#define MN_rex64x 0x4c24
-#define MN_vcvtneps2bf16x 0x4c2b
-#define MN_vfpclassbf16x 0x4c3a
-#define MN_vcvtph2bf8x 0x4c48
-#define MN_vcvtph2hf8x 0x4c54
-#define MN_pfmax 0x4c60
-#define MN_adcx 0x4c66
-#define MN_bndldx 0x4c6b
-#define MN_vfpclasspdx 0x4c72
-#define MN_fclex 0x4c7e
-#define MN_fnclex 0x4c84
-#define MN_rex 0x4c8b
-#define MN_vcvtpd2phx 0x4c8f
-#define MN_vcvtdq2phx 0x4c9a
-#define MN_vcvtudq2phx 0x4ca5
-#define MN_vcvtqq2phx 0x4cb1
-#define MN_vcvtuqq2phx 0x4cbc
-#define MN_vcvt2ps2phx 0x4cc8
-#define MN_vcvtps2phx 0x4cd4
-#define MN_vfpclassphx 0x4cdf
-#define MN_shlx 0x4ceb
-#define MN_mulx 0x4cf0
-#define MN_adox 0x4cf5
-#define MN_vcvttpd2dqx 0x4cfa
-#define MN_vcvtpd2dqx 0x4d06
-#define MN_vcvttpd2udqx 0x4d11
-#define MN_vcvtpd2udqx 0x4d1e
-#define MN_rex_rx 0x4d2a
-#define MN_sarx 0x4d31
-#define MN_shrx 0x4d36
-#define MN_rorx 0x4d3b
-#define MN_monitorx 0x4d40
-#define MN_rex_wrx 0x4d49
-#define MN_vcvtph2bf8sx 0x4d51
-#define MN_vcvtph2hf8sx 0x4d5e
-#define MN_vcvtpd2psx 0x4d6b
-#define MN_vcvtph2psx 0x4d76
-#define MN_vcvtqq2psx 0x4d81
-#define MN_vcvtuqq2psx 0x4d8c
-#define MN_vfpclasspsx 0x4d98
-#define MN_vcvttpd2dqsx 0x4da4
-#define MN_vcvttpd2udqsx 0x4db1
-#define MN_movsx 0x4dbf
-#define MN_mwaitx 0x4dc5
-#define MN_bndstx 0x4dcc
-#define MN_rex_wx 0x4dd3
-#define MN_rexx 0x4dda
-#define MN_vcvtps2phxx 0x4ddf
-#define MN_movzx 0x4deb
-#define MN_rex64y 0x4df1
-#define MN_vcvtneps2bf16y 0x4df8
-#define MN_vfpclassbf16y 0x4e07
-#define MN_vcvtph2bf8y 0x4e15
-#define MN_vcvtph2hf8y 0x4e21
-#define MN_vfpclasspdy 0x4e2d
-#define MN_loadiwkey 0x4e39
-#define MN_vcvtpd2phy 0x4e43
-#define MN_vcvtdq2phy 0x4e4e
-#define MN_vcvtudq2phy 0x4e59
-#define MN_vcvtqq2phy 0x4e65
-#define MN_vcvtuqq2phy 0x4e70
-#define MN_vfpclassphy 0x4e7c
-#define MN_vcvttpd2dqy 0x4e88
-#define MN_vcvtpd2dqy 0x4e94
-#define MN_vcvttpd2udqy 0x4e9f
-#define MN_vcvtpd2udqy 0x4eac
-#define MN_rmpquery 0x4eb8
-#define MN_vcvtph2bf8sy 0x4ec1
-#define MN_vcvtph2hf8sy 0x4ece
-#define MN_clrssbsy 0x4edb
-#define MN_setssbsy 0x4ee4
-#define MN_vcvtpd2psy 0x4eed
-#define MN_vcvtqq2psy 0x4ef8
-#define MN_vcvtuqq2psy 0x4f03
-#define MN_vfpclasspsy 0x4f0f
-#define MN_vcvttpd2dqsy 0x4f1b
-#define MN_vcvttpd2udqsy 0x4f28
-#define MN_rex64xy 0x4f36
-#define MN_rexy 0x4f3e
-#define MN_vcvtps2phxy 0x4f43
-#define MN_rexxy 0x4f4f
-#define MN_rex64z 0x4f55
-#define MN_vfpclassbf16z 0x4f5c
-#define MN_fldz 0x4f6a
-#define MN_vfpclasspdz 0x4f6f
-#define MN_vcvtpd2phz 0x4f7b
-#define MN_vcvtqq2phz 0x4f86
-#define MN_vcvtuqq2phz 0x4f91
-#define MN_vfpclassphz 0x4f9d
-#define MN_jz 0x4fa9
-#define MN_jnz 0x4fac
-#define MN_repnz 0x4fb0
-#define MN_ccmpnz 0x4fb6
-#define MN_loopnz 0x4fbd
-#define MN_setnz 0x4fc4
-#define MN_ctestnz 0x4fca
-#define MN_setzunz 0x4fd2
+#define MN_vpmaxuw 0x4cc9
+#define MN_vpsravw 0x4cd1
+#define MN_vpshldvw 0x4cd9
+#define MN_vpshrdvw 0x4ce2
+#define MN_vpsllvw 0x4ceb
+#define MN_vpsrlvw 0x4cf3
+#define MN_kmovw 0x4cfb
+#define MN_vmovw 0x4d01
+#define MN_vpmacsww 0x4d07
+#define MN_vpmacssww 0x4d10
+#define MN_movzw 0x4d1a
+#define MN_rex_x 0x4d20
+#define MN_fyl2x 0x4d26
+#define MN_rex64x 0x4d2c
+#define MN_vcvtneps2bf16x 0x4d33
+#define MN_vfpclassbf16x 0x4d42
+#define MN_vcvtph2bf8x 0x4d50
+#define MN_vcvtph2hf8x 0x4d5c
+#define MN_pfmax 0x4d68
+#define MN_adcx 0x4d6e
+#define MN_bndldx 0x4d73
+#define MN_vfpclasspdx 0x4d7a
+#define MN_fclex 0x4d86
+#define MN_fnclex 0x4d8c
+#define MN_rex 0x4d93
+#define MN_vcvtpd2phx 0x4d97
+#define MN_vcvtdq2phx 0x4da2
+#define MN_vcvtudq2phx 0x4dad
+#define MN_vcvtqq2phx 0x4db9
+#define MN_vcvtuqq2phx 0x4dc4
+#define MN_vcvt2ps2phx 0x4dd0
+#define MN_vcvtps2phx 0x4ddc
+#define MN_vfpclassphx 0x4de7
+#define MN_shlx 0x4df3
+#define MN_mulx 0x4df8
+#define MN_adox 0x4dfd
+#define MN_vcvttpd2dqx 0x4e02
+#define MN_vcvtpd2dqx 0x4e0e
+#define MN_vcvttpd2udqx 0x4e19
+#define MN_vcvtpd2udqx 0x4e26
+#define MN_rex_rx 0x4e32
+#define MN_sarx 0x4e39
+#define MN_shrx 0x4e3e
+#define MN_rorx 0x4e43
+#define MN_monitorx 0x4e48
+#define MN_rex_wrx 0x4e51
+#define MN_vcvtph2bf8sx 0x4e59
+#define MN_vcvtph2hf8sx 0x4e66
+#define MN_vcvtpd2psx 0x4e73
+#define MN_vcvtph2psx 0x4e7e
+#define MN_vcvtqq2psx 0x4e89
+#define MN_vcvtuqq2psx 0x4e94
+#define MN_vfpclasspsx 0x4ea0
+#define MN_vcvttpd2dqsx 0x4eac
+#define MN_vcvttpd2udqsx 0x4eb9
+#define MN_movsx 0x4ec7
+#define MN_mwaitx 0x4ecd
+#define MN_bndstx 0x4ed4
+#define MN_rex_wx 0x4edb
+#define MN_rexx 0x4ee2
+#define MN_vcvtps2phxx 0x4ee7
+#define MN_movzx 0x4ef3
+#define MN_rex64y 0x4ef9
+#define MN_vcvtneps2bf16y 0x4f00
+#define MN_vfpclassbf16y 0x4f0f
+#define MN_vcvtph2bf8y 0x4f1d
+#define MN_vcvtph2hf8y 0x4f29
+#define MN_vfpclasspdy 0x4f35
+#define MN_loadiwkey 0x4f41
+#define MN_vcvtpd2phy 0x4f4b
+#define MN_vcvtdq2phy 0x4f56
+#define MN_vcvtudq2phy 0x4f61
+#define MN_vcvtqq2phy 0x4f6d
+#define MN_vcvtuqq2phy 0x4f78
+#define MN_vfpclassphy 0x4f84
+#define MN_vcvttpd2dqy 0x4f90
+#define MN_vcvtpd2dqy 0x4f9c
+#define MN_vcvttpd2udqy 0x4fa7
+#define MN_vcvtpd2udqy 0x4fb4
+#define MN_rmpquery 0x4fc0
+#define MN_vcvtph2bf8sy 0x4fc9
+#define MN_vcvtph2hf8sy 0x4fd6
+#define MN_clrssbsy 0x4fe3
+#define MN_setssbsy 0x4fec
+#define MN_vcvtpd2psy 0x4ff5
+#define MN_vcvtqq2psy 0x5000
+#define MN_vcvtuqq2psy 0x500b
+#define MN_vfpclasspsy 0x5017
+#define MN_vcvttpd2dqsy 0x5023
+#define MN_vcvttpd2udqsy 0x5030
+#define MN_rex64xy 0x503e
+#define MN_rexy 0x5046
+#define MN_vcvtps2phxy 0x504b
+#define MN_rexxy 0x5057
+#define MN_rex64z 0x505d
+#define MN_vfpclassbf16z 0x5064
+#define MN_fldz 0x5072
+#define MN_vfpclasspdz 0x5077
+#define MN_vcvtpd2phz 0x5083
+#define MN_vcvtqq2phz 0x508e
+#define MN_vcvtuqq2phz 0x5099
+#define MN_vfpclassphz 0x50a5
+#define MN_jz 0x50b1
+#define MN_jnz 0x50b4
+#define MN_repnz 0x50b8
+#define MN_ccmpnz 0x50be
+#define MN_loopnz 0x50c5
+#define MN_setnz 0x50cc
+#define MN_ctestnz 0x50d2
+#define MN_setzunz 0x50da
 #define MN_cmovnz (MN_cfcmovnz + 2)
-#define MN_cfcmovnz 0x4fda
-#define MN_repz 0x4fe3
-#define MN_ccmpz 0x4fe8
-#define MN_loopz 0x4fee
-#define MN_vfpclasspsz 0x4ff4
-#define MN_setz 0x5000
-#define MN_ctestz 0x5005
-#define MN_setzuz 0x500c
+#define MN_cfcmovnz 0x50e2
+#define MN_repz 0x50eb
+#define MN_ccmpz 0x50f0
+#define MN_loopz 0x50f6
+#define MN_vfpclasspsz 0x50fc
+#define MN_setz 0x5108
+#define MN_ctestz 0x510d
+#define MN_setzuz 0x5114
 #define MN_cmovz (MN_cfcmovz + 2)
-#define MN_cfcmovz 0x5013
-#define MN_rex64xz 0x501b
-#define MN_jecxz 0x5023
-#define MN_jcxz 0x5029
-#define MN_jrcxz 0x502e
-#define MN_rexz 0x5034
-#define MN_rexxz 0x5039
-#define MN_rex64yz 0x503f
-#define MN_rex64xyz 0x5047
-#define MN_rexyz 0x5050
-#define MN_rexxyz 0x5056
-#define MN__disp32_ 0x505d
-#define MN__rex2_ 0x5066
-#define MN__vex2_ 0x506d
-#define MN__vex3_ 0x5074
-#define MN__disp16_ 0x507b
-#define MN__disp8_ 0x5084
-#define MN__load_ 0x508c
-#define MN__store_ 0x5093
-#define MN__nooptimize_ 0x509b
-#define MN__nf_ 0x50a8
-#define MN__noimm8s_ 0x50ad
-#define MN__rex_ 0x50b7
-#define MN__evex_ 0x50bd
-#define MN__vex_ 0x50c4
-#define MN__insn 0x50ca
+#define MN_cfcmovz 0x511b
+#define MN_rex64xz 0x5123
+#define MN_jecxz 0x512b
+#define MN_jcxz 0x5131
+#define MN_jrcxz 0x5136
+#define MN_rexz 0x513c
+#define MN_rexxz 0x5141
+#define MN_rex64yz 0x5147
+#define MN_rex64xyz 0x514f
+#define MN_rexyz 0x5158
+#define MN_rexxyz 0x515e
+#define MN__disp32_ 0x5165
+#define MN__rex2_ 0x516e
+#define MN__vex2_ 0x5175
+#define MN__vex3_ 0x517c
+#define MN__disp16_ 0x5183
+#define MN__disp8_ 0x518c
+#define MN__load_ 0x5194
+#define MN__store_ 0x519b
+#define MN__nooptimize_ 0x51a3
+#define MN__nf_ 0x51b0
+#define MN__noimm8s_ 0x51b5
+#define MN__rex_ 0x51bf
+#define MN__evex_ 0x51c5
+#define MN__vex_ 0x51cc
+#define MN__insn 0x51d2
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index 54038f90761..0c5f7747ed2 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -328,6 +328,8 @@  enum i386_cpu
   CpuAPX_NDD,
   /* Intel APX No-Flags-update support required.  */
   CpuAPX_NF,
+  /* AVX10.2 Auxiliary Instructions support required.  */
+  CpuAVX10_V2_AUX,
 
   /* NOTE: These items, which can be combined with other ISA flags above, need
      to remain second to last and in sync with CPU_FLAGS_COMMON. */
@@ -567,6 +569,7 @@  typedef union i386_cpu_flags
       unsigned int cpuapx_nci:1;
       unsigned int cpuapx_ndd:1;
       unsigned int cpuapx_nf:1;
+      unsigned int cpuavx10_v2_aux:1;
       CPU_FLAGS_COMMON;
 #ifdef CpuUnused
       unsigned int unused:(CpuNumOfBits - CpuUnused);
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index 7042ca4512e..3d3e37b09aa 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -3620,6 +3620,95 @@  vucomxs<sdh>, 0x<sdh:spfx>2e, AVX10_2, Modrm|EVexLIG|<sdh:spc1>|<sdh:vexw>|Disp8
 
 // AVX10.2 instructions end.
 
+// AVX10_V2_AUX instructions.
+
+// VCVTPS2BF8, VCVTPS2BF8S, VCVTPS2HF8, VCVTPS2HF8S - narrowing 2-op (F3.MAP5)
+// VCVTROPS2HF8, VCVTROPS2HF8S - narrowing 2-op (66.MAP5)
+
+<cvtps8:opc:pfx, +
+    bf8:39:f3, +
+    bf8s:3b:f3, +
+    hf8:38:f3, +
+    hf8s:3a:f3>
+
+vcvtps2<cvtps8>, 0x<cvtps8:pfx><cvtps8:opc>, AVX10_V2_AUX, Modrm|Map5|EVex128|VexW0|Masking|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM }
+vcvtps2<cvtps8>, 0x<cvtps8:pfx><cvtps8:opc>, AVX10_V2_AUX, Modrm|Map5|EVex256|VexW0|Masking|Broadcast|Disp8MemShift=5|NoSuf, { RegYMM|Dword|Unspecified|BaseIndex, RegXMM }
+vcvtps2<cvtps8>, 0x<cvtps8:pfx><cvtps8:opc>, AVX10_V2_AUX, Modrm|Map5|EVex512|VexW0|Masking|Broadcast|Disp8MemShift=6|NoSuf, { RegZMM|Dword|Unspecified|BaseIndex, RegXMM }
+
+<cvtps8>
+
+<cvtrops8:opc, +
+    hf8:38, +
+    hf8s:3a>
+
+vcvtrops2<cvtrops8>, 0x66<cvtrops8:opc>, AVX10_V2_AUX, Modrm|Map5|EVex128|VexW0|Masking|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM }
+vcvtrops2<cvtrops8>, 0x66<cvtrops8:opc>, AVX10_V2_AUX, Modrm|Map5|EVex256|VexW0|Masking|Broadcast|Disp8MemShift=5|NoSuf, { RegYMM|Dword|Unspecified|BaseIndex, RegXMM }
+vcvtrops2<cvtrops8>, 0x66<cvtrops8:opc>, AVX10_V2_AUX, Modrm|Map5|EVex512|VexW0|Masking|Broadcast|Disp8MemShift=6|NoSuf, { RegZMM|Dword|Unspecified|BaseIndex, RegXMM }
+
+<cvtrops8>
+
+// VCVTBIASPS2BF8, VCVTBIASPS2BF8S, VCVTBIASPS2HF8, VCVTBIASPS2HF8S - 3-op narrowing (NP.MAP5)
+
+<cvtbiasps:opc, +
+    bf8:39, +
+    bf8s:3b, +
+    hf8:38, +
+    hf8s:3a>
+
+vcvtbiasps2<cvtbiasps>, 0x<cvtbiasps:opc>, AVX10_V2_AUX, Modrm|Map5|EVex128|Src1VVVV|VexW0|Masking|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM, RegXMM }
+vcvtbiasps2<cvtbiasps>, 0x<cvtbiasps:opc>, AVX10_V2_AUX, Modrm|Map5|EVex256|Src1VVVV|VexW0|Masking|Broadcast|Disp8MemShift=5|NoSuf, { RegYMM|Dword|Unspecified|BaseIndex, RegYMM, RegXMM }
+vcvtbiasps2<cvtbiasps>, 0x<cvtbiasps:opc>, AVX10_V2_AUX, Modrm|Map5|EVex512|Src1VVVV|VexW0|Masking|Broadcast|Disp8MemShift=6|NoSuf, { RegZMM|Dword|Unspecified|BaseIndex, RegZMM, RegXMM }
+
+<cvtbiasps>
+
+// VCVTBF82PS (NP.MAP5.W1) and VCVTHF82PS (NP.MAP5.W0) - widening xmm/m to xmm/ymm/zmm
+vcvtbf82ps, 0x36, AVX10_V2_AUX, Modrm|Map5|EVex128|VexW1|Masking|Disp8MemShift=2|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM }
+vcvtbf82ps, 0x36, AVX10_V2_AUX, Modrm|Map5|EVex256|VexW1|Masking|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegYMM }
+vcvtbf82ps, 0x36, AVX10_V2_AUX, Modrm|Map5|EVex512|VexW1|Masking|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegZMM }
+
+vcvthf82ps, 0x36, AVX10_V2_AUX, Modrm|Map5|EVex128|VexW0|Masking|Disp8MemShift=2|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM }
+vcvthf82ps, 0x36, AVX10_V2_AUX, Modrm|Map5|EVex256|VexW0|Masking|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegYMM }
+vcvthf82ps, 0x36, AVX10_V2_AUX, Modrm|Map5|EVex512|VexW0|Masking|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegZMM }
+
+// VCVTBF82BF4S (F3.MAP5.W1) and VCVTHF82BF4S (F3.MAP5.W0) - narrowing, no mask
+vcvtbf82bf4s, 0xf33d, AVX10_V2_AUX, Modrm|Map5|EVex128|VexW1|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
+vcvtbf82bf4s, 0xf33d, AVX10_V2_AUX, Modrm|Map5|EVex256|VexW1|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex }
+vcvtbf82bf4s, 0xf33d, AVX10_V2_AUX, Modrm|Map5|EVex512|VexW1|Disp8MemShift=5|NoSuf, { RegZMM, RegYMM|Unspecified|BaseIndex }
+
+vcvthf82bf4s, 0xf33d, AVX10_V2_AUX, Modrm|Map5|EVex128|VexW0|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
+vcvthf82bf4s, 0xf33d, AVX10_V2_AUX, Modrm|Map5|EVex256|VexW0|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex }
+vcvthf82bf4s, 0xf33d, AVX10_V2_AUX, Modrm|Map5|EVex512|VexW0|Disp8MemShift=5|NoSuf, { RegZMM, RegYMM|Unspecified|BaseIndex }
+
+// VCVTBF82BF6S (F3.MAP5.W1) - reg-reg only, no mask
+vcvtbf82bf6s, 0xf33e, AVX10_V2_AUX, Modrm|Map5|EVex128|VexW1|NoSuf, { RegXMM, RegXMM }
+vcvtbf82bf6s, 0xf33e, AVX10_V2_AUX, Modrm|Map5|EVex256|VexW1|NoSuf, { RegYMM, RegYMM }
+vcvtbf82bf6s, 0xf33e, AVX10_V2_AUX, Modrm|Map5|EVex512|VexW1|NoSuf, { RegZMM, RegZMM }
+
+// VCVTHF82HF6S (F3.MAP5.W0) - reg-reg only, no mask
+vcvthf82hf6s, 0xf33c, AVX10_V2_AUX, Modrm|Map5|EVex128|VexW0|NoSuf, { RegXMM, RegXMM }
+vcvthf82hf6s, 0xf33c, AVX10_V2_AUX, Modrm|Map5|EVex256|VexW0|NoSuf, { RegYMM, RegYMM }
+vcvthf82hf6s, 0xf33c, AVX10_V2_AUX, Modrm|Map5|EVex512|VexW0|NoSuf, { RegZMM, RegZMM }
+
+// VCVTBF42HF8 (NP.MAP5.W0) - widening-like xmm/m to xmm/ymm/zmm, with mask
+vcvtbf42hf8, 0x37, AVX10_V2_AUX, Modrm|Map5|EVex128|VexW0|Masking|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM }
+vcvtbf42hf8, 0x37, AVX10_V2_AUX, Modrm|Map5|EVex256|VexW0|Masking|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegYMM }
+vcvtbf42hf8, 0x37, AVX10_V2_AUX, Modrm|Map5|EVex512|VexW0|Masking|Disp8MemShift=5|NoSuf, { RegYMM|Unspecified|BaseIndex, RegZMM }
+
+// VCVTBF62HF8 (66.MAP5.W1) and VCVTHF62HF8 (66.MAP5.W0) - reg-reg, with mask
+vcvtbf62hf8, 0x6637, AVX10_V2_AUX, Modrm|Map5|VexW1|Masking|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
+
+vcvthf62hf8, 0x6637, AVX10_V2_AUX, Modrm|Map5|VexW0|Masking|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
+
+// VPMOVSSDB (F3.0F38.W0) - narrowing store with mask
+vpmovssdb, 0xf341, AVX10_V2_AUX, Modrm|EVex128|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegXMM, RegXMM|Dword|Unspecified|BaseIndex }
+vpmovssdb, 0xf341, AVX10_V2_AUX, Modrm|EVex256|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegYMM, RegXMM|Qword|Unspecified|BaseIndex }
+vpmovssdb, 0xf341, AVX10_V2_AUX, Modrm|EVex512|Masking|Space0F38|VexW0|Disp8MemShift=4|NoSuf, { RegZMM, RegXMM|Unspecified|BaseIndex }
+
+// VUNPACKB (NP.0F3A.W0) - with imm8
+vunpackb, 0x3d, AVX10_V2_AUX, Modrm|Masking|Space0F3A|VexW0|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8, RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
+
+// AVX10_V2_AUX instructions end.
+
 // MOVRS instructions.
 
 prefetchrst2, 0xf18/4, MOVRS, Modrm|Anysize|IgnoreSize|NoSuf, { BaseIndex }
diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h
index 5215f774202..5154d1dfd57 100644
--- a/opcodes/i386-tbl.h
+++ b/opcodes/i386-tbl.h
@@ -48116,6 +48116,602 @@  static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } },
       { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtps2bf8, 0x39, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 2, 0, 0, 2, 1, 3, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtps2bf8, 0x39, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 2, 0, 0, 3, 1, 3, 0, 0, 5, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  0, 1, 0, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtps2bf8, 0x39, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 2, 0, 0, 1, 1, 3, 0, 0, 6, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  0, 0, 1, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtps2bf8s, 0x3b, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 2, 0, 0, 2, 1, 3, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtps2bf8s, 0x3b, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 2, 0, 0, 3, 1, 3, 0, 0, 5, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  0, 1, 0, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtps2bf8s, 0x3b, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 2, 0, 0, 1, 1, 3, 0, 0, 6, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  0, 0, 1, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtps2hf8, 0x38, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 2, 0, 0, 2, 1, 3, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtps2hf8, 0x38, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 2, 0, 0, 3, 1, 3, 0, 0, 5, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  0, 1, 0, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtps2hf8, 0x38, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 2, 0, 0, 1, 1, 3, 0, 0, 6, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  0, 0, 1, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtps2hf8s, 0x3a, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 2, 0, 0, 2, 1, 3, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtps2hf8s, 0x3a, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 2, 0, 0, 3, 1, 3, 0, 0, 5, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  0, 1, 0, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtps2hf8s, 0x3a, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 2, 0, 0, 1, 1, 3, 0, 0, 6, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  0, 0, 1, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtrops2hf8, 0x38, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 1, 0, 0, 2, 1, 3, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtrops2hf8, 0x38, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 1, 3, 0, 0, 5, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  0, 1, 0, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtrops2hf8, 0x38, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 3, 0, 0, 6, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  0, 0, 1, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtrops2hf8s, 0x3a, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 1, 0, 0, 2, 1, 3, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtrops2hf8s, 0x3a, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 1, 3, 0, 0, 5, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  0, 1, 0, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtrops2hf8s, 0x3a, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 3, 0, 0, 6, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  0, 0, 1, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtbiasps2bf8, 0x39, 3, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 2, 1, 3, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtbiasps2bf8, 0x39, 3, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 3, 1, 3, 0, 0, 5, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  0, 1, 0, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 1, 0, 0, 0, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtbiasps2bf8, 0x39, 3, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 1, 1, 3, 0, 0, 6, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  0, 0, 1, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 0, 1, 0, 0, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtbiasps2bf8s, 0x3b, 3, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 2, 1, 3, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtbiasps2bf8s, 0x3b, 3, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 3, 1, 3, 0, 0, 5, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  0, 1, 0, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 1, 0, 0, 0, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtbiasps2bf8s, 0x3b, 3, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 1, 1, 3, 0, 0, 6, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  0, 0, 1, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 0, 1, 0, 0, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtbiasps2hf8, 0x38, 3, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 2, 1, 3, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtbiasps2hf8, 0x38, 3, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 3, 1, 3, 0, 0, 5, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  0, 1, 0, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 1, 0, 0, 0, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtbiasps2hf8, 0x38, 3, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 1, 1, 3, 0, 0, 6, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  0, 0, 1, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 0, 1, 0, 0, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtbiasps2hf8s, 0x3a, 3, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 2, 1, 3, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtbiasps2hf8s, 0x3a, 3, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 3, 1, 3, 0, 0, 5, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  0, 1, 0, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 1, 0, 0, 0, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtbiasps2hf8s, 0x3a, 3, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 1, 1, 3, 0, 0, 6, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  0, 0, 1, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 0, 1, 0, 0, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtbf82ps, 0x36, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 0, 0, 0, 2, 1, 0, 0, 0, 2, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtbf82ps, 0x36, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 0, 0, 0, 3, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 1, 0, 0, 0, 0 } } } },
+  { MN_vcvtbf82ps, 0x36, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 0, 0, 0, 1, 1, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 0, 1, 0, 0, 0 } } } },
+  { MN_vcvthf82ps, 0x36, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, 0, 0, 0, 2, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvthf82ps, 0x36, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 1, 0, 0, 0, 0 } } } },
+  { MN_vcvthf82ps, 0x36, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 0, 1, 0, 0, 0 } } } },
+  { MN_vcvtbf82bf4s, 0x3d, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 2, 0, 0, 2, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } } } },
+  { MN_vcvtbf82bf4s, 0x3d, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 2, 0, 0, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 1, 0, 0, 0, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } } } },
+  { MN_vcvtbf82bf4s, 0x3d, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 2, 0, 0, 1, 0, 0, 0, 0, 5, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 0, 1, 0, 0, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  0, 1, 0, 0, 1, 0 } } } },
+  { MN_vcvthf82bf4s, 0x3d, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 2, 0, 0, 2, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } } } },
+  { MN_vcvthf82bf4s, 0x3d, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 2, 0, 0, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 1, 0, 0, 0, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } } } },
+  { MN_vcvthf82bf4s, 0x3d, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 2, 0, 0, 1, 0, 0, 0, 0, 5, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 0, 1, 0, 0, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  0, 1, 0, 0, 1, 0 } } } },
+  { MN_vcvtbf82bf6s, 0x3e, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 2, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtbf82bf6s, 0x3e, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 2, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 1, 0, 0, 0, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 1, 0, 0, 0, 0 } } } },
+  { MN_vcvtbf82bf6s, 0x3e, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 2, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 0, 1, 0, 0, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 0, 1, 0, 0, 0 } } } },
+  { MN_vcvthf82hf6s, 0x3c, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 2, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvthf82hf6s, 0x3c, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 2, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 1, 0, 0, 0, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 1, 0, 0, 0, 0 } } } },
+  { MN_vcvthf82hf6s, 0x3c, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 2, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 0, 1, 0, 0, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 0, 1, 0, 0, 0 } } } },
+  { MN_vcvtbf42hf8, 0x37, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vcvtbf42hf8, 0x37, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 1, 0, 0, 0, 0 } } } },
+  { MN_vcvtbf42hf8, 0x37, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0, 0, 5, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  0, 1, 0, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 0, 1, 0, 0, 0 } } } },
+  { MN_vcvtbf62hf8, 0x37, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 1, 0, 0, 5, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vcvthf62hf8, 0x37, 2, SPACE_MAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 1, 0, 0, 5, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vpmovssdb, 0x41, 2, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 2, 0, 0, 2, 1, 0, 0, 0, 2, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } } } },
+  { MN_vpmovssdb, 0x41, 2, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 2, 0, 0, 3, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 1, 0, 0, 0, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } } } },
+  { MN_vpmovssdb, 0x41, 2, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 2, 0, 0, 1, 1, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 0, 1, 0, 0, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } } } },
+  { MN_vunpackb, 0x3d, 3, SPACE_0F3A, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 0, 0, 0, 5, 1, 0, 0, 0, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 151, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 0, 0, 0, 0, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
   { MN_prefetchrst2, 0x18, 1, SPACE_0F, 4,
     { 0, 0, 0, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -48517,7 +49113,10 @@  static const i386_op_off_t i386_op_sets[] =
   4546, 4547, 4548, 4549, 4550, 4553, 4556, 4557,
   4558, 4559, 4560, 4561, 4562, 4563, 4564, 4565,
   4566, 4567, 4568, 4569, 4570, 4571, 4572, 4573,
-  4574, 4576, 4577, 4578, 4579, 4580
+  4576, 4579, 4582, 4585, 4588, 4591, 4594, 4597,
+  4600, 4603, 4606, 4609, 4612, 4615, 4618, 4621,
+  4624, 4625, 4626, 4629, 4630, 4631, 4633, 4634,
+  4635, 4636, 4637
 };
 
 /* i386 mnemonics table.  */
@@ -48668,9 +49267,17 @@  static const char i386_mnemonics[] =
   "\0""vcvt2ph2bf8"
   "\0""vcvtbiasph2bf8"
   "\0""vcvtph2bf8"
+  "\0""vcvtbiasps2bf8"
+  "\0""vcvtps2bf8"
+  "\0""vcvtbf42hf8"
+  "\0""vcvtbf62hf8"
+  "\0""vcvthf62hf8"
   "\0""vcvt2ph2hf8"
   "\0""vcvtbiasph2hf8"
   "\0""vcvtph2hf8"
+  "\0""vcvtrops2hf8"
+  "\0""vcvtbiasps2hf8"
+  "\0""vcvtps2hf8"
   "\0""vmovdqu8"
   "\0""vextractf32x8"
   "\0""vinsertf32x8"
@@ -48720,6 +49327,7 @@  static const char i386_mnemonics[] =
   "\0""vpaddb"
   "\0""kandb"
   "\0""vpexpandb"
+  "\0""vpmovssdb"
   "\0""vpmovusdb"
   "\0""vpmovsdb"
   "\0""udb"
@@ -48738,6 +49346,7 @@  static const char i386_mnemonics[] =
   "\0""invlpgb"
   "\0""vpavgb"
   "\0""jb"
+  "\0""vunpackb"
   "\0""pbndkb"
   "\0""vpmovmskb"
   "\0""vpshlb"
@@ -50038,12 +50647,21 @@  static const char i386_mnemonics[] =
   "\0""fdivr"
   "\0""fidivr"
   "\0""rex.wr"
+  "\0""vcvtbf82bf4s"
+  "\0""vcvthf82bf4s"
+  "\0""vcvtbf82bf6s"
+  "\0""vcvthf82hf6s"
   "\0""vcvt2ph2bf8s"
   "\0""vcvtbiasph2bf8s"
   "\0""vcvtph2bf8s"
+  "\0""vcvtbiasps2bf8s"
+  "\0""vcvtps2bf8s"
   "\0""vcvt2ph2hf8s"
   "\0""vcvtbiasph2hf8s"
   "\0""vcvtph2hf8s"
+  "\0""vcvtrops2hf8s"
+  "\0""vcvtbiasps2hf8s"
+  "\0""vcvtps2hf8s"
   "\0""aas"
   "\0""scas"
   "\0""das"
@@ -50116,6 +50734,8 @@  static const char i386_mnemonics[] =
   "\0""vcvtneebf162ps"
   "\0""vbcstnebf162ps"
   "\0""vcvtneobf162ps"
+  "\0""vcvtbf82ps"
+  "\0""vcvthf82ps"
   "\0""vcvtpd2ps"
   "\0""tcvtrowd2ps"
   "\0""vcvtneeph2ps"