[v2] LoongArch: Enforce 4-byte align for machine instructions.
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| linaro-tcwg-bot/tcwg_binutils_build--master-arm |
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| linaro-tcwg-bot/tcwg_binutils_build--master-aarch64 |
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| linaro-tcwg-bot/tcwg_binutils_check--master-aarch64 |
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| linaro-tcwg-bot/tcwg_binutils_check--master-arm |
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Commit Message
If no alignment is specified in the assembly file, LoongArch will not
perform forced alignment. When this object file (.o) is linked into an
executable, instructions may not be 4-byte aligned, which will
eventually cause instruction fetch errors.
For example, the above issue can occur when generating a shared object
file (.so) with the -nostdlib option.
---
gas/config/tc-loongarch.c | 5 +++++
gas/testsuite/gas/loongarch/insn_align_4.d | 7 +++++++
gas/testsuite/gas/loongarch/insn_align_4.s | 4 ++++
3 files changed, 16 insertions(+)
create mode 100644 gas/testsuite/gas/loongarch/insn_align_4.d
create mode 100644 gas/testsuite/gas/loongarch/insn_align_4.s
@@ -1432,6 +1432,11 @@ loongarch_assemble_INSNs (char *str, unsigned int expand_from_macro)
if (*str == '\0')
break;
+ /* LoongArch instructions require 4-byte alignment. When emitting
+ instructions into any section, record the appropriate section
+ alignment. */
+ record_alignment (now_seg, 2);
+
struct loongarch_cl_insn the_one;
memset (&the_one, 0, sizeof (the_one));
the_one.name = str;
new file mode 100644
@@ -0,0 +1,7 @@
+#as:
+#readelf: -S
+
+#...
+ \[ [0-9]+\] \.text PROGBITS [0-9a-f]{16} [0-9a-f]{8}
+ [0-9a-f]{16} [0-9a-f]{16} AX 0 0 4
+#...
new file mode 100644
@@ -0,0 +1,4 @@
+.type test, @function
+test:
+ jirl $ra, $ra, 0
+.size test, .-test