diff mbox series

[v2,07/12] LoongArch: LA32 macros support

Message ID	20251202111745.1558349-8-mengqinggang@loongson.cn
State	New
Headers	DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org A2D6A4AA51DA From: mengqinggang <mengqinggang@loongson.cn> To: binutils@sourceware.org Cc: xuchenghua@loongson.cn, chenglulu@loongson.cn, cailulu@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name, maskray@google.com, luweining@loongson.cn, hejinyang@loongson.cn, c@jia.je, mengqinggang@loongson.cn Subject: [PATCH v2 07/12] LoongArch: LA32 macros support Date: Tue, 2 Dec 2025 19:17:40 +0800 Message-Id: <20251202111745.1558349-8-mengqinggang@loongson.cn> In-Reply-To: <20251202111745.1558349-1-mengqinggang@loongson.cn> References: <20251202111745.1558349-1-mengqinggang@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: list Errors-To: binutils-bounces~patchwork=sourceware.org@sourceware.org
Series	Add support for LoongArch32 \| [v2,00/12] Add support for LoongArch32 [v2,01/12] LoongArch: Enable loongarch_elf64_vec loongarch64_pei_vec on LA32 target [v2,02/12] LoongArch: Change DWARF2_CIE_DATA_ALIGNMENT to -4 for loongarch32 [v2,03/12] LoongArch: Add R_LARCH_TLS_LE_ADD_R relocation support for add.w [v2,04/12] LoongArch: Enable all instructions defaultly on LA32/LA64 [v2,05/12] LoongArch: Add LA32 and LA32R relocations [v2,06/12] LoongArch: Add processing for LA32/LA32R relocations [v2,07/12] LoongArch: LA32 macros support [v2,08/12] LoongArch: LA32R macros expand [v2,09/12] LoongArch: Add linker relaxation support for R_LARCH_CALL30 [v2,10/12] LoongArch: Add support for tls type transition on LA32 [v2,11/12] LoongArch: Add linker relaxation for got_pcadd_hi20 and got_pcadd_lo12 [v2,12/12] LoongArch32: Fixed several regression test failures in gas and ld

Commit Message

mengqinggang Dec. 2, 2025, 11:17 a.m. UTC

  Change pcalau12i to pcaddu12i for LA32 macros.
Add call30 and tail30 macros.
---
 opcodes/loongarch-opc.c | 41 +++++++++++++++++++++++++++++------------
 1 file changed, 29 insertions(+), 12 deletions(-)

diff mbox series

Patch

diff --git a/opcodes/loongarch-opc.c b/opcodes/loongarch-opc.c
index 23aa167e0d4..073a1524f22 100644
--- a/opcodes/loongarch-opc.c
+++ b/opcodes/loongarch-opc.c
@@ -174,10 +174,11 @@  const char *const loongarch_f_cfi_name_alias[32] =
   &LARCH_opts.ase_lp64, 0
 
 #define INSN_LA_PCREL32		    \
-  "pcalau12i %1,%%pc_hi20(%2);"	    \
-  "addi.w %1,%1,%%pc_lo12(%2);",    \
+  "pcaddu12i %1,%%pcadd_hi20(%2);"  \
+  "addi.w %1,%1,%%pcadd_lo12(%2);", \
   &LARCH_opts.ase_ilp32,	    \
   &LARCH_opts.ase_lp64
+
 #define INSN_LA_PCREL64		    \
   "pcalau12i %1,%%pc_hi20(%2);"	    \
   "addi.d %1,%1,%%pc_lo12(%2);",    \
@@ -191,10 +192,11 @@  const char *const loongarch_f_cfi_name_alias[32] =
   &LARCH_opts.ase_lp64, 0
 
 #define INSN_LA_GOT32		    \
-  "pcalau12i %1,%%got_pc_hi20(%2);" \
-  "ld.w %1,%1,%%got_pc_lo12(%2);",  \
+  "pcaddu12i %1,%%got_pcadd_hi20(%2);" \
+  "ld.w %1,%1,%%got_pcadd_lo12(%2);", \
   &LARCH_opts.ase_ilp32,	    \
   &LARCH_opts.ase_lp64
+
 /* got32 abs.  */
 #define INSN_LA_GOT32_ABS	    \
   "lu12i.w %1,%%got_hi20(%2);"	    \
@@ -240,10 +242,11 @@  const char *const loongarch_f_cfi_name_alias[32] =
   &LARCH_opts.ase_lp64, 0
 
 #define INSN_LA_TLS_IE32	    \
-  "pcalau12i %1,%%ie_pc_hi20(%2);"  \
-  "ld.w %1,%1,%%ie_pc_lo12(%2);",   \
+  "pcaddu12i %1,%%ie_pcadd_hi20(%2);" \
+  "ld.w %1,%1,%%ie_pcadd_lo12(%2);", \
   &LARCH_opts.ase_ilp32,	    \
   &LARCH_opts.ase_lp64
+
 /* For ie32 abs.  */
 #define INSN_LA_TLS_IE32_ABS	    \
   "lu12i.w %1,%%ie_hi20(%2);"	    \
@@ -276,10 +279,11 @@  const char *const loongarch_f_cfi_name_alias[32] =
 
 /* For LoongArch32/64 cmode=normal.  */
 #define INSN_LA_TLS_LD32	      \
-  "pcalau12i %1,%%ld_pc_hi20(%2);"    \
-  "addi.w %1,%1,%%got_pc_lo12(%2);",  \
+  "pcaddu12i %1,%%ld_pcadd_hi20(%2);" \
+  "addi.w %1,%1,%%ld_pcadd_lo12(%2);", \
   &LARCH_opts.ase_ilp32,	      \
   &LARCH_opts.ase_lp64
+
 #define INSN_LA_TLS_LD32_ABS	      \
   "lu12i.w %1,%%ld_hi20(%2);"	      \
   "ori %1,%1,%%got_lo12(%2);",	      \
@@ -306,10 +310,11 @@  const char *const loongarch_f_cfi_name_alias[32] =
   &LARCH_opts.ase_gpcr
 
 #define INSN_LA_TLS_GD32	      \
-  "pcalau12i %1,%%gd_pc_hi20(%2);"    \
-  "addi.w %1,%1,%%got_pc_lo12(%2);",  \
+  "pcaddu12i %1,%%gd_pcadd_hi20(%2);" \
+  "addi.w %1,%1,%%gd_pcadd_lo12(%2);", \
   &LARCH_opts.ase_ilp32,	      \
   &LARCH_opts.ase_lp64
+
 #define INSN_LA_TLS_GD32_ABS	      \
   "lu12i.w %1,%%gd_hi20(%2);"	      \
   "ori %1,%1,%%got_lo12(%2);",	      \
@@ -345,10 +350,20 @@  const char *const loongarch_f_cfi_name_alias[32] =
   "jirl $zero,%1,0;",   \
   0, 0
 
+#define INSN_LA_CALL30 \
+  "pcaddu12i $ra,%%call30(%1);" \
+  "jirl $ra,$ra,0;", \
+  0, 0
+
+#define INSN_LA_TAIL30 \
+  "pcaddu12i %1,%%call30(%2);" \
+  "jirl $zero,%1,0;", \
+  0, 0
+
 /* For TLS_DESC32 pcrel.  */
 #define INSN_LA_TLS_DESC32		\
-  "pcalau12i $r4,%%desc_pc_hi20(%2);"	\
-  "addi.w $r4,$r4,%%desc_pc_lo12(%2);"	\
+  "pcaddu12i $r4,%%desc_pcadd_hi20(%2);" \
+  "addi.w $r4,$r4,%%desc_pcadd_lo12(%2);" \
   "ld.w $r1,$r4,%%desc_ld(%2);"		\
   "jirl $r1,$r1,%%desc_call(%2);",	\
   &LARCH_opts.ase_ilp32,		\
@@ -442,6 +457,8 @@  static struct loongarch_opcode loongarch_macro_opcodes[] =
   { 0, 0, "la.tls.gd",	"r,r,l",  INSN_LA_TLS_GD64_LARGE_PCREL,	0 },
   { 0, 0, "call36",	"la",	  INSN_LA_CALL,			0 },
   { 0, 0, "tail36",	"r,la",	  INSN_LA_TAIL,			0 },
+  { 0, 0, "call30",	"la",	  INSN_LA_CALL30,		0 },
+  { 0, 0, "tail30",	"r,la",	  INSN_LA_TAIL30,		0 },
   { 0, 0, "pcaddi",	"r,la",	  "pcaddi %1, %%pcrel_20(%2)",	&LARCH_opts.ase_ilp32, 0, 0 },
   { 0, 0, "la.tls.desc", "r,l",	  INSN_LA_TLS_DESC32_ABS,	0 },
   { 0, 0, "la.tls.desc", "r,l",	  INSN_LA_TLS_DESC32,		0 },