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(unknown [10.2.6.7]) by front1 (Coremail) with SMTP id qMiowJAxQMKbyy5panxEAQ--.44059S2; Tue, 02 Dec 2025 19:20:59 +0800 (CST) From: mengqinggang To: binutils@sourceware.org Cc: xuchenghua@loongson.cn, chenglulu@loongson.cn, cailulu@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name, maskray@google.com, luweining@loongson.cn, hejinyang@loongson.cn, c@jia.je, mengqinggang@loongson.cn Subject: [PATCH v2 02/12] LoongArch: Change DWARF2_CIE_DATA_ALIGNMENT to -4 for loongarch32 Date: Tue, 2 Dec 2025 19:17:35 +0800 Message-Id: <20251202111745.1558349-3-mengqinggang@loongson.cn> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251202111745.1558349-1-mengqinggang@loongson.cn> References: <20251202111745.1558349-1-mengqinggang@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowJAxQMKbyy5panxEAQ--.44059S2 X-CM-SenderInfo: 5phqw15lqjwttqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== X-Spam-Status: No, score=-12.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_DNSWL_BLOCKED, RCVD_IN_VALIDITY_RPBL_BLOCKED, RCVD_IN_VALIDITY_SAFE_BLOCKED, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces~patchwork=sourceware.org@sourceware.org From: Jiajie Chen --- gas/config/tc-loongarch.c | 5 +++++ gas/config/tc-loongarch.h | 3 ++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/gas/config/tc-loongarch.c b/gas/config/tc-loongarch.c index b006c6e6451..dc03956d792 100644 --- a/gas/config/tc-loongarch.c +++ b/gas/config/tc-loongarch.c @@ -118,6 +118,9 @@ static const char default_arch[] = DEFAULT_ARCH; static bool call36 = 0; +/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */ +int loongarch_cie_data_alignment; + /* The lowest 4-bit is the bytes of instructions. */ #define RELAX_BRANCH_16 0xc0000014 #define RELAX_BRANCH_21 0xc0000024 @@ -515,6 +518,8 @@ md_begin () /* FIXME: expressionS use 'offsetT' as constant, * we want this is 64-bit type. */ assert (8 <= sizeof (offsetT)); + + loongarch_cie_data_alignment = LARCH_opts.ase_lp64 ? (-8) : (-4); } /* Called just before the assembler exits. */ diff --git a/gas/config/tc-loongarch.h b/gas/config/tc-loongarch.h index 38ecd036d34..a2444aae0d1 100644 --- a/gas/config/tc-loongarch.h +++ b/gas/config/tc-loongarch.h @@ -108,7 +108,8 @@ extern bool loongarch_force_relocation_sub_same(struct fix *, asection *); FDE Code Alignment Factor (DWARF2_LINE_MIN_INSN_LENGTH) should be 1 because DW_CFA_advance_loc need to be relocated in bytes when linker relaxation. */ -#define DWARF2_CIE_DATA_ALIGNMENT (-8) +extern int loongarch_cie_data_alignment; +#define DWARF2_CIE_DATA_ALIGNMENT loongarch_cie_data_alignment #define DWARF2_DEFAULT_RETURN_COLUMN 1 /* FDE Return Address Register. */ #define tc_cfi_frame_initial_instructions \