diff mbox series

[committed] RISC-V: Also, fixed more ld testcases for --with-arch and --with-abi

Message ID 20250912043227.18172-1-nelson@rivosinc.com
State New
Headers
Series [committed] RISC-V: Also, fixed more ld testcases for --with-arch and --with-abi |

Commit Message

Nelson Chu Sept. 12, 2025, 4:32 a.m. UTC 
  Well these testcases cannot be fixed by .option norvc simply, that is because
current linker needs to check mapping symbols before doing any rvc relaxations,
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/393

Once we support the above features, we can revert this patch.
---
 ld/testsuite/ld-riscv-elf/pcgp-relax-01-norelaxgp.d | 3 ++-
 ld/testsuite/ld-riscv-elf/pcgp-relax-01.d           | 3 ++-
 ld/testsuite/ld-riscv-elf/relax-max-align-gp.d      | 3 ++-
 ld/testsuite/ld-riscv-elf/relro-relax-lui.d         | 3 ++-
 ld/testsuite/ld-riscv-elf/variant_cc-now.d          | 3 ++-
 ld/testsuite/ld-riscv-elf/variant_cc-shared.d       | 3 ++-
 6 files changed, 12 insertions(+), 6 deletions(-)
diff mbox series

Patch

diff --git a/ld/testsuite/ld-riscv-elf/pcgp-relax-01-norelaxgp.d b/ld/testsuite/ld-riscv-elf/pcgp-relax-01-norelaxgp.d
index d1344576ff3..c60e48ab7fe 100644
--- a/ld/testsuite/ld-riscv-elf/pcgp-relax-01-norelaxgp.d
+++ b/ld/testsuite/ld-riscv-elf/pcgp-relax-01-norelaxgp.d
@@ -1,5 +1,6 @@ 
 #source: pcgp-relax-01.s
-#ld: --no-relax-gp --relax
+#as: -march=rv64i
+#ld: --no-relax-gp --relax -m[riscv_choose_lp64_emul]
 #objdump: -d -Mno-aliases
 
 .*:[ 	]+file format .*
diff --git a/ld/testsuite/ld-riscv-elf/pcgp-relax-01.d b/ld/testsuite/ld-riscv-elf/pcgp-relax-01.d
index f9425678559..24f9c49044f 100644
--- a/ld/testsuite/ld-riscv-elf/pcgp-relax-01.d
+++ b/ld/testsuite/ld-riscv-elf/pcgp-relax-01.d
@@ -1,5 +1,6 @@ 
 #source: pcgp-relax-01.s
-#ld: --relax
+#as: -march=rv64i
+#ld: --relax -m[riscv_choose_lp64_emul]
 #objdump: -d -Mno-aliases
 
 .*:[ 	]+file format .*
diff --git a/ld/testsuite/ld-riscv-elf/relax-max-align-gp.d b/ld/testsuite/ld-riscv-elf/relax-max-align-gp.d
index 58328350ebc..a4a94dbe9c5 100644
--- a/ld/testsuite/ld-riscv-elf/relax-max-align-gp.d
+++ b/ld/testsuite/ld-riscv-elf/relax-max-align-gp.d
@@ -1,5 +1,6 @@ 
 #source: relax-max-align-gp.s
-#ld:
+#as: -march=rv64i
+#ld: -m[riscv_choose_lp64_emul]
 #objdump: -d
 
 .*:[ 	]+file format .*
diff --git a/ld/testsuite/ld-riscv-elf/relro-relax-lui.d b/ld/testsuite/ld-riscv-elf/relro-relax-lui.d
index d29aa9d5f7a..2b0670e002a 100644
--- a/ld/testsuite/ld-riscv-elf/relro-relax-lui.d
+++ b/ld/testsuite/ld-riscv-elf/relro-relax-lui.d
@@ -1,5 +1,6 @@ 
 #source: relro-relax-lui.s
-#ld: -zrelro --relax
+#as: -march=rv64i
+#ld: -zrelro --relax -m[riscv_choose_lp64_emul]
 #objdump: -d -Mno-aliases
 
 .*:[ 	]+file format .*
diff --git a/ld/testsuite/ld-riscv-elf/variant_cc-now.d b/ld/testsuite/ld-riscv-elf/variant_cc-now.d
index 9453554a159..b46b03c3ecd 100644
--- a/ld/testsuite/ld-riscv-elf/variant_cc-now.d
+++ b/ld/testsuite/ld-riscv-elf/variant_cc-now.d
@@ -1,6 +1,7 @@ 
 #source: variant_cc-1.s
 #source: variant_cc-2.s
-#ld: -shared --hash-style=sysv -Ttext 0x8000 -z now
+#as: -march=rv64i -mabi=lp64
+#ld: -shared --hash-style=sysv -Ttext 0x8000 -z now -m[riscv_choose_lp64_emul]
 #readelf: -rsW
 
 Relocation section '.rela.plt' at .*
diff --git a/ld/testsuite/ld-riscv-elf/variant_cc-shared.d b/ld/testsuite/ld-riscv-elf/variant_cc-shared.d
index ffb69a392f2..df7a13455b3 100644
--- a/ld/testsuite/ld-riscv-elf/variant_cc-shared.d
+++ b/ld/testsuite/ld-riscv-elf/variant_cc-shared.d
@@ -1,6 +1,7 @@ 
 #source: variant_cc-1.s
 #source: variant_cc-2.s
-#ld: -shared --hash-style=sysv -Ttext 0x8000
+#as: -march=rv64i -mabi=lp64
+#ld: -shared --hash-style=sysv -Ttext 0x8000 -m[riscv_choose_lp64_emul]
 #readelf: -rsW
 
 Relocation section '.rela.plt' at .*