RISC-V: Support ssqosid extensions with version 1.0.
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Commit Message
It only add one new CSR: `srmcfg`.
Ref: https://github.com/riscv/riscv-ssqosid/releases/tag/v1.0
---
bfd/elfxx-riscv.c | 1 +
gas/config/tc-riscv.c | 4 ++++
gas/testsuite/gas/riscv/csr-version-1p10.d | 2 ++
gas/testsuite/gas/riscv/csr-version-1p10.l | 4 ++++
gas/testsuite/gas/riscv/csr-version-1p11.d | 2 ++
gas/testsuite/gas/riscv/csr-version-1p11.l | 4 ++++
gas/testsuite/gas/riscv/csr-version-1p12.d | 2 ++
gas/testsuite/gas/riscv/csr-version-1p12.l | 4 ++++
gas/testsuite/gas/riscv/csr.s | 3 +++
gas/testsuite/gas/riscv/march-help.l | 1 +
include/opcode/riscv-opc.h | 4 ++++
11 files changed, 31 insertions(+)
Comments
ping
On Tue, Jan 21, 2025 at 10:08 PM Kito Cheng <kito.cheng@sifive.com> wrote:
>
> It only add one new CSR: `srmcfg`.
>
> Ref: https://github.com/riscv/riscv-ssqosid/releases/tag/v1.0
> ---
> bfd/elfxx-riscv.c | 1 +
> gas/config/tc-riscv.c | 4 ++++
> gas/testsuite/gas/riscv/csr-version-1p10.d | 2 ++
> gas/testsuite/gas/riscv/csr-version-1p10.l | 4 ++++
> gas/testsuite/gas/riscv/csr-version-1p11.d | 2 ++
> gas/testsuite/gas/riscv/csr-version-1p11.l | 4 ++++
> gas/testsuite/gas/riscv/csr-version-1p12.d | 2 ++
> gas/testsuite/gas/riscv/csr-version-1p12.l | 4 ++++
> gas/testsuite/gas/riscv/csr.s | 3 +++
> gas/testsuite/gas/riscv/march-help.l | 1 +
> include/opcode/riscv-opc.h | 4 ++++
> 11 files changed, 31 insertions(+)
>
> diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
> index 323413fb335..c51cc2d6748 100644
> --- a/bfd/elfxx-riscv.c
> +++ b/bfd/elfxx-riscv.c
> @@ -1490,6 +1490,7 @@ static struct riscv_supported_ext riscv_supported_std_s_ext[] =
> {"svinval", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
> {"svnapot", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
> {"svpbmt", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
> + {"ssqosid", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
> {NULL, 0, 0, 0, 0}
> };
>
> diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
> index 344339d87c1..cfaadea6c49 100644
> --- a/gas/config/tc-riscv.c
> +++ b/gas/config/tc-riscv.c
> @@ -107,6 +107,7 @@ enum riscv_csr_class
> CSR_CLASS_SSTC_32, /* Sstc RV32 only */
> CSR_CLASS_SSTC_AND_H_32, /* Sstc RV32 only (with H) */
> CSR_CLASS_SSCTR, /* Ssctr */
> + CSR_CLASS_SSQOSID, /* Ssqosid */
> CSR_CLASS_XTHEADVECTOR, /* xtheadvector only */
> };
>
> @@ -1166,6 +1167,9 @@ riscv_csr_address (const char *csr_name,
> case CSR_CLASS_XTHEADVECTOR:
> extension = "xtheadvector";
> break;
> + case CSR_CLASS_SSQOSID:
> + extension = "ssqosid";
> + break;
> default:
> as_bad (_("internal: bad RISC-V CSR class (0x%x)"), csr_class);
> }
> diff --git a/gas/testsuite/gas/riscv/csr-version-1p10.d b/gas/testsuite/gas/riscv/csr-version-1p10.d
> index 07297954c51..6896e7b1ccd 100644
> --- a/gas/testsuite/gas/riscv/csr-version-1p10.d
> +++ b/gas/testsuite/gas/riscv/csr-version-1p10.d
> @@ -933,3 +933,5 @@ Disassembly of section .text:
> [ ]+[0-9a-f]+:[ ]+c2259073[ ]+csrw[ ]+vlenb,a1
> [ ]+[0-9a-f]+:[ ]+01702573[ ]+csrr[ ]+a0,jvt
> [ ]+[0-9a-f]+:[ ]+01759073[ ]+csrw[ ]+jvt,a1
> +[ ]+[0-9a-f]+:[ ]+18102573[ ]+csrr[ ]+a0,srmcfg
> +[ ]+[0-9a-f]+:[ ]+18159073[ ]+csrw[ ]+srmcfg,a1
> diff --git a/gas/testsuite/gas/riscv/csr-version-1p10.l b/gas/testsuite/gas/riscv/csr-version-1p10.l
> index 2427ba98ecc..46d1e4e5849 100644
> --- a/gas/testsuite/gas/riscv/csr-version-1p10.l
> +++ b/gas/testsuite/gas/riscv/csr-version-1p10.l
> @@ -1717,3 +1717,7 @@
> .*Info: macro .*
> .*Warning: invalid CSR `jvt', needs `zcmt' extension
> .*Info: macro .*
> +.*Warning: invalid CSR `srmcfg', needs `ssqosid' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `srmcfg', needs `ssqosid' extension
> +.*Info: macro .*
> diff --git a/gas/testsuite/gas/riscv/csr-version-1p11.d b/gas/testsuite/gas/riscv/csr-version-1p11.d
> index 70cafb8812e..308140aa064 100644
> --- a/gas/testsuite/gas/riscv/csr-version-1p11.d
> +++ b/gas/testsuite/gas/riscv/csr-version-1p11.d
> @@ -933,3 +933,5 @@ Disassembly of section .text:
> [ ]+[0-9a-f]+:[ ]+c2259073[ ]+csrw[ ]+vlenb,a1
> [ ]+[0-9a-f]+:[ ]+01702573[ ]+csrr[ ]+a0,jvt
> [ ]+[0-9a-f]+:[ ]+01759073[ ]+csrw[ ]+jvt,a1
> +[ ]+[0-9a-f]+:[ ]+18102573[ ]+csrr[ ]+a0,srmcfg
> +[ ]+[0-9a-f]+:[ ]+18159073[ ]+csrw[ ]+srmcfg,a1
> diff --git a/gas/testsuite/gas/riscv/csr-version-1p11.l b/gas/testsuite/gas/riscv/csr-version-1p11.l
> index aeec089288d..9e813e206cd 100644
> --- a/gas/testsuite/gas/riscv/csr-version-1p11.l
> +++ b/gas/testsuite/gas/riscv/csr-version-1p11.l
> @@ -1713,3 +1713,7 @@
> .*Info: macro .*
> .*Warning: invalid CSR `jvt', needs `zcmt' extension
> .*Info: macro .*
> +.*Warning: invalid CSR `srmcfg', needs `ssqosid' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `srmcfg', needs `ssqosid' extension
> +.*Info: macro .*
> diff --git a/gas/testsuite/gas/riscv/csr-version-1p12.d b/gas/testsuite/gas/riscv/csr-version-1p12.d
> index daf79f486ff..5fe33162c9c 100644
> --- a/gas/testsuite/gas/riscv/csr-version-1p12.d
> +++ b/gas/testsuite/gas/riscv/csr-version-1p12.d
> @@ -933,3 +933,5 @@ Disassembly of section .text:
> [ ]+[0-9a-f]+:[ ]+c2259073[ ]+csrw[ ]+vlenb,a1
> [ ]+[0-9a-f]+:[ ]+01702573[ ]+csrr[ ]+a0,jvt
> [ ]+[0-9a-f]+:[ ]+01759073[ ]+csrw[ ]+jvt,a1
> +[ ]+[0-9a-f]+:[ ]+18102573[ ]+csrr[ ]+a0,srmcfg
> +[ ]+[0-9a-f]+:[ ]+18159073[ ]+csrw[ ]+srmcfg,a1
> diff --git a/gas/testsuite/gas/riscv/csr-version-1p12.l b/gas/testsuite/gas/riscv/csr-version-1p12.l
> index 3710da9f080..ff60ec00767 100644
> --- a/gas/testsuite/gas/riscv/csr-version-1p12.l
> +++ b/gas/testsuite/gas/riscv/csr-version-1p12.l
> @@ -1477,3 +1477,7 @@
> .*Info: macro .*
> .*Warning: invalid CSR `jvt', needs `zcmt' extension
> .*Info: macro .*
> +.*Warning: invalid CSR `srmcfg', needs `ssqosid' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `srmcfg', needs `ssqosid' extension
> +.*Info: macro .*
> diff --git a/gas/testsuite/gas/riscv/csr.s b/gas/testsuite/gas/riscv/csr.s
> index 44fc1e72809..6244bd73481 100644
> --- a/gas/testsuite/gas/riscv/csr.s
> +++ b/gas/testsuite/gas/riscv/csr.s
> @@ -541,3 +541,6 @@
>
> # Zcmt
> csr jvt
> +
> + # Ssqosid
> + csr srmcfg
> diff --git a/gas/testsuite/gas/riscv/march-help.l b/gas/testsuite/gas/riscv/march-help.l
> index f92c98fc4c5..b7975ff9ade 100644
> --- a/gas/testsuite/gas/riscv/march-help.l
> +++ b/gas/testsuite/gas/riscv/march-help.l
> @@ -139,6 +139,7 @@ All available -march extensions for RISC-V:
> svinval 1.0
> svnapot 1.0
> svpbmt 1.0
> + ssqosid 1.0
> xcvalu 1.0
> xcvbi 1.0
> xcvbitmanip 1.0
> diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
> index 71ad7fff84d..24af3ac531b 100644
> --- a/include/opcode/riscv-opc.h
> +++ b/include/opcode/riscv-opc.h
> @@ -4254,6 +4254,8 @@
> #define CSR_VL 0xc20
> #define CSR_VTYPE 0xc21
> #define CSR_VLENB 0xc22
> +/* Ssqosid CSR addresses. */
> +#define CSR_SRMCFG 0x181
> #endif /* RISCV_ENCODING_H */
> #ifdef DECLARE_INSN
> DECLARE_INSN(slli_rv32, MATCH_SLLI_RV32, MASK_SLLI_RV32)
> @@ -5393,6 +5395,8 @@ DECLARE_CSR(vcsr, CSR_VCSR, CSR_CLASS_V, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_N
> DECLARE_CSR(vl, CSR_VL, CSR_CLASS_V, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
> DECLARE_CSR(vtype, CSR_VTYPE, CSR_CLASS_V, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
> DECLARE_CSR(vlenb, CSR_VLENB, CSR_CLASS_V, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
> +/* Ssqosid CSR. */
> +DECLARE_CSR(srmcfg, CSR_SRMCFG, CSR_CLASS_SSQOSID, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
> #endif /* DECLARE_CSR */
> #ifdef DECLARE_CSR_ALIAS
> DECLARE_CSR_ALIAS(dscratch, CSR_DSCRATCH0, CSR_CLASS_DEBUG, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
> --
> 2.34.1
>
Committed, thanks.
Nelson
On Tue, Jan 21, 2025 at 10:07 PM Kito Cheng <kito.cheng@sifive.com> wrote:
> It only add one new CSR: `srmcfg`.
>
> Ref: https://github.com/riscv/riscv-ssqosid/releases/tag/v1.0
> ---
> bfd/elfxx-riscv.c | 1 +
> gas/config/tc-riscv.c | 4 ++++
> gas/testsuite/gas/riscv/csr-version-1p10.d | 2 ++
> gas/testsuite/gas/riscv/csr-version-1p10.l | 4 ++++
> gas/testsuite/gas/riscv/csr-version-1p11.d | 2 ++
> gas/testsuite/gas/riscv/csr-version-1p11.l | 4 ++++
> gas/testsuite/gas/riscv/csr-version-1p12.d | 2 ++
> gas/testsuite/gas/riscv/csr-version-1p12.l | 4 ++++
> gas/testsuite/gas/riscv/csr.s | 3 +++
> gas/testsuite/gas/riscv/march-help.l | 1 +
> include/opcode/riscv-opc.h | 4 ++++
> 11 files changed, 31 insertions(+)
>
> diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
> index 323413fb335..c51cc2d6748 100644
> --- a/bfd/elfxx-riscv.c
> +++ b/bfd/elfxx-riscv.c
> @@ -1490,6 +1490,7 @@ static struct riscv_supported_ext
> riscv_supported_std_s_ext[] =
> {"svinval", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
> {"svnapot", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
> {"svpbmt", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
> + {"ssqosid", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
> {NULL, 0, 0, 0, 0}
> };
>
> diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
> index 344339d87c1..cfaadea6c49 100644
> --- a/gas/config/tc-riscv.c
> +++ b/gas/config/tc-riscv.c
> @@ -107,6 +107,7 @@ enum riscv_csr_class
> CSR_CLASS_SSTC_32, /* Sstc RV32 only */
> CSR_CLASS_SSTC_AND_H_32, /* Sstc RV32 only (with H) */
> CSR_CLASS_SSCTR, /* Ssctr */
> + CSR_CLASS_SSQOSID, /* Ssqosid */
> CSR_CLASS_XTHEADVECTOR, /* xtheadvector only */
> };
>
> @@ -1166,6 +1167,9 @@ riscv_csr_address (const char *csr_name,
> case CSR_CLASS_XTHEADVECTOR:
> extension = "xtheadvector";
> break;
> + case CSR_CLASS_SSQOSID:
> + extension = "ssqosid";
> + break;
> default:
> as_bad (_("internal: bad RISC-V CSR class (0x%x)"), csr_class);
> }
> diff --git a/gas/testsuite/gas/riscv/csr-version-1p10.d
> b/gas/testsuite/gas/riscv/csr-version-1p10.d
> index 07297954c51..6896e7b1ccd 100644
> --- a/gas/testsuite/gas/riscv/csr-version-1p10.d
> +++ b/gas/testsuite/gas/riscv/csr-version-1p10.d
> @@ -933,3 +933,5 @@ Disassembly of section .text:
> [ ]+[0-9a-f]+:[ ]+c2259073[ ]+csrw[ ]+vlenb,a1
> [ ]+[0-9a-f]+:[ ]+01702573[ ]+csrr[ ]+a0,jvt
> [ ]+[0-9a-f]+:[ ]+01759073[ ]+csrw[ ]+jvt,a1
> +[ ]+[0-9a-f]+:[ ]+18102573[ ]+csrr[ ]+a0,srmcfg
> +[ ]+[0-9a-f]+:[ ]+18159073[ ]+csrw[ ]+srmcfg,a1
> diff --git a/gas/testsuite/gas/riscv/csr-version-1p10.l
> b/gas/testsuite/gas/riscv/csr-version-1p10.l
> index 2427ba98ecc..46d1e4e5849 100644
> --- a/gas/testsuite/gas/riscv/csr-version-1p10.l
> +++ b/gas/testsuite/gas/riscv/csr-version-1p10.l
> @@ -1717,3 +1717,7 @@
> .*Info: macro .*
> .*Warning: invalid CSR `jvt', needs `zcmt' extension
> .*Info: macro .*
> +.*Warning: invalid CSR `srmcfg', needs `ssqosid' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `srmcfg', needs `ssqosid' extension
> +.*Info: macro .*
> diff --git a/gas/testsuite/gas/riscv/csr-version-1p11.d
> b/gas/testsuite/gas/riscv/csr-version-1p11.d
> index 70cafb8812e..308140aa064 100644
> --- a/gas/testsuite/gas/riscv/csr-version-1p11.d
> +++ b/gas/testsuite/gas/riscv/csr-version-1p11.d
> @@ -933,3 +933,5 @@ Disassembly of section .text:
> [ ]+[0-9a-f]+:[ ]+c2259073[ ]+csrw[ ]+vlenb,a1
> [ ]+[0-9a-f]+:[ ]+01702573[ ]+csrr[ ]+a0,jvt
> [ ]+[0-9a-f]+:[ ]+01759073[ ]+csrw[ ]+jvt,a1
> +[ ]+[0-9a-f]+:[ ]+18102573[ ]+csrr[ ]+a0,srmcfg
> +[ ]+[0-9a-f]+:[ ]+18159073[ ]+csrw[ ]+srmcfg,a1
> diff --git a/gas/testsuite/gas/riscv/csr-version-1p11.l
> b/gas/testsuite/gas/riscv/csr-version-1p11.l
> index aeec089288d..9e813e206cd 100644
> --- a/gas/testsuite/gas/riscv/csr-version-1p11.l
> +++ b/gas/testsuite/gas/riscv/csr-version-1p11.l
> @@ -1713,3 +1713,7 @@
> .*Info: macro .*
> .*Warning: invalid CSR `jvt', needs `zcmt' extension
> .*Info: macro .*
> +.*Warning: invalid CSR `srmcfg', needs `ssqosid' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `srmcfg', needs `ssqosid' extension
> +.*Info: macro .*
> diff --git a/gas/testsuite/gas/riscv/csr-version-1p12.d
> b/gas/testsuite/gas/riscv/csr-version-1p12.d
> index daf79f486ff..5fe33162c9c 100644
> --- a/gas/testsuite/gas/riscv/csr-version-1p12.d
> +++ b/gas/testsuite/gas/riscv/csr-version-1p12.d
> @@ -933,3 +933,5 @@ Disassembly of section .text:
> [ ]+[0-9a-f]+:[ ]+c2259073[ ]+csrw[ ]+vlenb,a1
> [ ]+[0-9a-f]+:[ ]+01702573[ ]+csrr[ ]+a0,jvt
> [ ]+[0-9a-f]+:[ ]+01759073[ ]+csrw[ ]+jvt,a1
> +[ ]+[0-9a-f]+:[ ]+18102573[ ]+csrr[ ]+a0,srmcfg
> +[ ]+[0-9a-f]+:[ ]+18159073[ ]+csrw[ ]+srmcfg,a1
> diff --git a/gas/testsuite/gas/riscv/csr-version-1p12.l
> b/gas/testsuite/gas/riscv/csr-version-1p12.l
> index 3710da9f080..ff60ec00767 100644
> --- a/gas/testsuite/gas/riscv/csr-version-1p12.l
> +++ b/gas/testsuite/gas/riscv/csr-version-1p12.l
> @@ -1477,3 +1477,7 @@
> .*Info: macro .*
> .*Warning: invalid CSR `jvt', needs `zcmt' extension
> .*Info: macro .*
> +.*Warning: invalid CSR `srmcfg', needs `ssqosid' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `srmcfg', needs `ssqosid' extension
> +.*Info: macro .*
> diff --git a/gas/testsuite/gas/riscv/csr.s b/gas/testsuite/gas/riscv/csr.s
> index 44fc1e72809..6244bd73481 100644
> --- a/gas/testsuite/gas/riscv/csr.s
> +++ b/gas/testsuite/gas/riscv/csr.s
> @@ -541,3 +541,6 @@
>
> # Zcmt
> csr jvt
> +
> + # Ssqosid
> + csr srmcfg
> diff --git a/gas/testsuite/gas/riscv/march-help.l
> b/gas/testsuite/gas/riscv/march-help.l
> index f92c98fc4c5..b7975ff9ade 100644
> --- a/gas/testsuite/gas/riscv/march-help.l
> +++ b/gas/testsuite/gas/riscv/march-help.l
> @@ -139,6 +139,7 @@ All available -march extensions for RISC-V:
> svinval 1.0
> svnapot 1.0
> svpbmt 1.0
> + ssqosid 1.0
> xcvalu 1.0
> xcvbi 1.0
> xcvbitmanip 1.0
> diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
> index 71ad7fff84d..24af3ac531b 100644
> --- a/include/opcode/riscv-opc.h
> +++ b/include/opcode/riscv-opc.h
> @@ -4254,6 +4254,8 @@
> #define CSR_VL 0xc20
> #define CSR_VTYPE 0xc21
> #define CSR_VLENB 0xc22
> +/* Ssqosid CSR addresses. */
> +#define CSR_SRMCFG 0x181
> #endif /* RISCV_ENCODING_H */
> #ifdef DECLARE_INSN
> DECLARE_INSN(slli_rv32, MATCH_SLLI_RV32, MASK_SLLI_RV32)
> @@ -5393,6 +5395,8 @@ DECLARE_CSR(vcsr, CSR_VCSR, CSR_CLASS_V,
> PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_N
> DECLARE_CSR(vl, CSR_VL, CSR_CLASS_V, PRIV_SPEC_CLASS_NONE,
> PRIV_SPEC_CLASS_NONE)
> DECLARE_CSR(vtype, CSR_VTYPE, CSR_CLASS_V, PRIV_SPEC_CLASS_NONE,
> PRIV_SPEC_CLASS_NONE)
> DECLARE_CSR(vlenb, CSR_VLENB, CSR_CLASS_V, PRIV_SPEC_CLASS_NONE,
> PRIV_SPEC_CLASS_NONE)
> +/* Ssqosid CSR. */
> +DECLARE_CSR(srmcfg, CSR_SRMCFG, CSR_CLASS_SSQOSID, PRIV_SPEC_CLASS_NONE,
> PRIV_SPEC_CLASS_NONE)
> #endif /* DECLARE_CSR */
> #ifdef DECLARE_CSR_ALIAS
> DECLARE_CSR_ALIAS(dscratch, CSR_DSCRATCH0, CSR_CLASS_DEBUG,
> PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
> --
> 2.34.1
>
>
@@ -1490,6 +1490,7 @@ static struct riscv_supported_ext riscv_supported_std_s_ext[] =
{"svinval", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"svnapot", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"svpbmt", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
+ {"ssqosid", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{NULL, 0, 0, 0, 0}
};
@@ -107,6 +107,7 @@ enum riscv_csr_class
CSR_CLASS_SSTC_32, /* Sstc RV32 only */
CSR_CLASS_SSTC_AND_H_32, /* Sstc RV32 only (with H) */
CSR_CLASS_SSCTR, /* Ssctr */
+ CSR_CLASS_SSQOSID, /* Ssqosid */
CSR_CLASS_XTHEADVECTOR, /* xtheadvector only */
};
@@ -1166,6 +1167,9 @@ riscv_csr_address (const char *csr_name,
case CSR_CLASS_XTHEADVECTOR:
extension = "xtheadvector";
break;
+ case CSR_CLASS_SSQOSID:
+ extension = "ssqosid";
+ break;
default:
as_bad (_("internal: bad RISC-V CSR class (0x%x)"), csr_class);
}
@@ -933,3 +933,5 @@ Disassembly of section .text:
[ ]+[0-9a-f]+:[ ]+c2259073[ ]+csrw[ ]+vlenb,a1
[ ]+[0-9a-f]+:[ ]+01702573[ ]+csrr[ ]+a0,jvt
[ ]+[0-9a-f]+:[ ]+01759073[ ]+csrw[ ]+jvt,a1
+[ ]+[0-9a-f]+:[ ]+18102573[ ]+csrr[ ]+a0,srmcfg
+[ ]+[0-9a-f]+:[ ]+18159073[ ]+csrw[ ]+srmcfg,a1
@@ -1717,3 +1717,7 @@
.*Info: macro .*
.*Warning: invalid CSR `jvt', needs `zcmt' extension
.*Info: macro .*
+.*Warning: invalid CSR `srmcfg', needs `ssqosid' extension
+.*Info: macro .*
+.*Warning: invalid CSR `srmcfg', needs `ssqosid' extension
+.*Info: macro .*
@@ -933,3 +933,5 @@ Disassembly of section .text:
[ ]+[0-9a-f]+:[ ]+c2259073[ ]+csrw[ ]+vlenb,a1
[ ]+[0-9a-f]+:[ ]+01702573[ ]+csrr[ ]+a0,jvt
[ ]+[0-9a-f]+:[ ]+01759073[ ]+csrw[ ]+jvt,a1
+[ ]+[0-9a-f]+:[ ]+18102573[ ]+csrr[ ]+a0,srmcfg
+[ ]+[0-9a-f]+:[ ]+18159073[ ]+csrw[ ]+srmcfg,a1
@@ -1713,3 +1713,7 @@
.*Info: macro .*
.*Warning: invalid CSR `jvt', needs `zcmt' extension
.*Info: macro .*
+.*Warning: invalid CSR `srmcfg', needs `ssqosid' extension
+.*Info: macro .*
+.*Warning: invalid CSR `srmcfg', needs `ssqosid' extension
+.*Info: macro .*
@@ -933,3 +933,5 @@ Disassembly of section .text:
[ ]+[0-9a-f]+:[ ]+c2259073[ ]+csrw[ ]+vlenb,a1
[ ]+[0-9a-f]+:[ ]+01702573[ ]+csrr[ ]+a0,jvt
[ ]+[0-9a-f]+:[ ]+01759073[ ]+csrw[ ]+jvt,a1
+[ ]+[0-9a-f]+:[ ]+18102573[ ]+csrr[ ]+a0,srmcfg
+[ ]+[0-9a-f]+:[ ]+18159073[ ]+csrw[ ]+srmcfg,a1
@@ -1477,3 +1477,7 @@
.*Info: macro .*
.*Warning: invalid CSR `jvt', needs `zcmt' extension
.*Info: macro .*
+.*Warning: invalid CSR `srmcfg', needs `ssqosid' extension
+.*Info: macro .*
+.*Warning: invalid CSR `srmcfg', needs `ssqosid' extension
+.*Info: macro .*
@@ -541,3 +541,6 @@
# Zcmt
csr jvt
+
+ # Ssqosid
+ csr srmcfg
@@ -139,6 +139,7 @@ All available -march extensions for RISC-V:
svinval 1.0
svnapot 1.0
svpbmt 1.0
+ ssqosid 1.0
xcvalu 1.0
xcvbi 1.0
xcvbitmanip 1.0
@@ -4254,6 +4254,8 @@
#define CSR_VL 0xc20
#define CSR_VTYPE 0xc21
#define CSR_VLENB 0xc22
+/* Ssqosid CSR addresses. */
+#define CSR_SRMCFG 0x181
#endif /* RISCV_ENCODING_H */
#ifdef DECLARE_INSN
DECLARE_INSN(slli_rv32, MATCH_SLLI_RV32, MASK_SLLI_RV32)
@@ -5393,6 +5395,8 @@ DECLARE_CSR(vcsr, CSR_VCSR, CSR_CLASS_V, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_N
DECLARE_CSR(vl, CSR_VL, CSR_CLASS_V, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(vtype, CSR_VTYPE, CSR_CLASS_V, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(vlenb, CSR_VLENB, CSR_CLASS_V, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+/* Ssqosid CSR. */
+DECLARE_CSR(srmcfg, CSR_SRMCFG, CSR_CLASS_SSQOSID, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
#endif /* DECLARE_CSR */
#ifdef DECLARE_CSR_ALIAS
DECLARE_CSR_ALIAS(dscratch, CSR_DSCRATCH0, CSR_CLASS_DEBUG, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)