From patchwork Tue Jan 14 08:35:30 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Jiang, Haochen" X-Patchwork-Id: 104738 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 81E763857735 for ; Tue, 14 Jan 2025 08:36:23 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 81E763857735 Authentication-Results: sourceware.org; dkim=fail reason="signature verification failed" (2048-bit key, unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=aGCen5Ig X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) by sourceware.org (Postfix) with ESMTPS id 72C2A385783B for ; Tue, 14 Jan 2025 08:35:34 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 72C2A385783B Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 72C2A385783B Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=192.198.163.19 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1736843734; cv=none; b=CTZzpXopv0HDah/N7AqI86VDZVl0QuYKc6m24zYUM4IopxXVudJY90iAo4vDF7FQeIuzmAB6B4fEfVL3eMUiWUCKAfgqCMeTf/BlOAZYWKo+arh7vkxA16KdaBZ3mfsd+f2Kw/n2B4ZDU87RMU0t5MAGjRV/aO6hM+UqSBtGJDY= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1736843734; c=relaxed/simple; bh=qesAEbCX4uAYQdIEmAEYpdMegA/lNyiknvGj4b4XVAg=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=teKXN7wz7ySlv1uLFKncwoSbh6qHjXaZC4G9Pyed5q2E9/6jAqvfmQmnW/faeBzDPHCHSvCQbH2Srg4voPh1YiJwVUaqS+yBIrT2RRPljsPG468UifynrH8xDK8DWTShVU7zwZ/uUycmfjN21aMAo+smI2ZGGb7XtAX6NvaVNGc= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 72C2A385783B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1736843734; x=1768379734; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=qesAEbCX4uAYQdIEmAEYpdMegA/lNyiknvGj4b4XVAg=; b=aGCen5Ig2ytrziP1YIFsatfgC00fTho0OvBc2DTqfcRRATZGoMwLKkom qtFkOyq7imeadpBz6/aslNIr8DT8rbe6XjsFMAMEJ+Llk9EQvHvlxcml+ u5qR08WMDz1U6YxPTHQZOf8A6WPfDiF4zcUYHcefbhCIFuCeYo+W/9sji t1CY9EGSFQbkx2RVZLi4srPljyEkPbLRuq+H8QWXrOpF/6zkZfMfEuac1 nleKvu+0a0C4JO2+rppgvp7eOdLaryjfRBrHUaMwUTnPyMjsFPMcXPdqn f3/MRZfwq709zfZg6rxru1HjHmNiwNtw1dFtTlyykKo5qHCt57K18K89D w==; X-CSE-ConnectionGUID: QBDUCgzDQM6jBBdOCsrSmA== X-CSE-MsgGUID: WfXO9oiFRYOaNux7SVES8w== X-IronPort-AV: E=McAfee;i="6700,10204,11314"; a="36341733" X-IronPort-AV: E=Sophos;i="6.12,313,1728975600"; d="scan'208";a="36341733" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Jan 2025 00:35:33 -0800 X-CSE-ConnectionGUID: vlkntwMPRC27NfCtcm+cFQ== X-CSE-MsgGUID: 7JIJsZO7SmGBe5lGDJLPsw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="105227197" Received: from shliclel4217.sh.intel.com ([10.239.240.127]) by orviesa007.jf.intel.com with ESMTP; 14 Jan 2025 00:35:32 -0800 From: Haochen Jiang To: binutils@sourceware.org Cc: hjl.tools@gmail.com, ludloff@gmail.com, jbeulich@suse.com Subject: [RFC PATCH] x86: Ignore rounding for vcvt[, u]si2sd under r32 and vcvt[, u]dq2pd instead of reporting bad Date: Tue, 14 Jan 2025 16:35:30 +0800 Message-Id: <20250114083530.4084220-1-haochen.jiang@intel.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 X-Spam-Status: No, score=-10.5 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces~patchwork=sourceware.org@sourceware.org Hi all, I just did a quick try on the rounding ignore in disassembler for vcvt[,u]si2sd under r32 and vcvt[,u]dq2pd. It is doable in a small patch following, with some change in OP_Rounding. So I called it an RFC patch to see if we should do so. For assembler part, it is much easier to accept that inline asm. I will do that in parallel with disassembler RFC patch review. Thx, Haochen --- According to SDM, vcvt[,u]si2sd under r32 and vcvt[,u]dq2pd treat Rounding as Ignored when trying to using them. Thus, disassembler should not reject them or report bad. gas/ChangeLog: * testsuite/gas/i386/evex.d: Add new testcase for vcvt[,u]dq2pd. Change the output for vcvt[,u]si2sd. * testsuite/gas/i386/evex.s: Ditto. * testsuite/gas/i386/x86-64-evex.d: Ditto. opcodes/ChangeLog: * i386-dis-evex-w.h: Add EXxEVexRIG for vcvt[,u]dq2pd. * i386-dis.c (EXxEVexRIG): New. (evex_rounding_ignore_mode): Ditto. (OP_Rounding): Mark EVEX_b as used to change the handle for ignored rounding. --- gas/testsuite/gas/i386/evex.d | 12 ++++++++---- gas/testsuite/gas/i386/evex.s | 4 ++++ gas/testsuite/gas/i386/x86-64-evex.d | 8 ++++++-- opcodes/i386-dis-evex-w.h | 4 ++-- opcodes/i386-dis.c | 8 ++++++-- 5 files changed, 26 insertions(+), 10 deletions(-) diff --git a/gas/testsuite/gas/i386/evex.d b/gas/testsuite/gas/i386/evex.d index 52670f82736..a352340cae6 100644 --- a/gas/testsuite/gas/i386/evex.d +++ b/gas/testsuite/gas/i386/evex.d @@ -8,14 +8,18 @@ Disassembly of section .text: 0+ <_start>: +[a-f0-9]+: 62 f1 d6 38 2a f0 vcvtsi2ssl %eax,\{rd-sae\},%xmm5,%xmm6 - +[a-f0-9]+: 62 f1 57 38 2a f0 vcvtsi2sdl %eax,\{rd-bad\},%xmm5,%xmm6 - +[a-f0-9]+: 62 f1 d7 38 2a f0 vcvtsi2sdl %eax,\{rd-bad\},%xmm5,%xmm6 + +[a-f0-9]+: 62 f1 57 38 2a f0 vcvtsi2sdl %eax,%xmm5,%xmm6 + +[a-f0-9]+: 62 f1 d7 38 2a f0 vcvtsi2sdl %eax,%xmm5,%xmm6 +[a-f0-9]+: 62 f1 d6 08 7b f0 vcvtusi2ssl %eax,%xmm5,%xmm6 +[a-f0-9]+: 62 f1 57 08 7b f0 vcvtusi2sdl %eax,%xmm5,%xmm6 +[a-f0-9]+: 62 f1 d7 08 7b f0 vcvtusi2sdl %eax,%xmm5,%xmm6 +[a-f0-9]+: 62 f1 d6 38 7b f0 vcvtusi2ssl %eax,\{rd-sae\},%xmm5,%xmm6 - +[a-f0-9]+: 62 f1 57 38 7b f0 vcvtusi2sdl %eax,\{rd-bad\},%xmm5,%xmm6 - +[a-f0-9]+: 62 f1 d7 38 7b f0 vcvtusi2sdl %eax,\{rd-bad\},%xmm5,%xmm6 + +[a-f0-9]+: 62 f1 57 38 7b f0 vcvtusi2sdl %eax,%xmm5,%xmm6 + +[a-f0-9]+: 62 f1 d7 38 7b f0 vcvtusi2sdl %eax,%xmm5,%xmm6 +[a-f0-9]+: 62 e1 7e 08 2d c0 \{evex\} vcvtss2si %xmm0,%eax +[a-f0-9]+: 62 e1 7c 08 c2 c0 00 vcmpeqps %xmm0,%xmm0,%k0 + +[a-f0-9]+: 62 f1 7e 38 e6 f5 vcvtdq2pd %ymm5,%zmm6 + +[a-f0-9]+: 62 f1 7a 38 e6 f5 vcvtdq2pd %xmm5,%ymm6 + +[a-f0-9]+: 62 f1 7e 38 7a f5 vcvtudq2pd %ymm5,%zmm6 + +[a-f0-9]+: 62 f1 7a 38 7a f5 vcvtudq2pd %xmm5,%ymm6 #pass diff --git a/gas/testsuite/gas/i386/evex.s b/gas/testsuite/gas/i386/evex.s index b72e1cd1e4f..23582fe6005 100644 --- a/gas/testsuite/gas/i386/evex.s +++ b/gas/testsuite/gas/i386/evex.s @@ -13,3 +13,7 @@ _start: .insn EVEX.LIG.F2.0F.W1 0x7b, %eax,{rd-sae},%xmm5,%xmm6 .byte 0x62, 0xe1, 0x7e, 0x08, 0x2d, 0xc0 .byte 0x62, 0xe1, 0x7c, 0x08, 0xc2, 0xc0, 0x00 + .insn EVEX.L2.F3.0F.W0 0xe6, {rd-sae},%zmm5,%ymm6 + .insn EVEX.L1.F3.0F.W0 0xe6, {rd-sae},%ymm5,%xmm6 + .insn EVEX.L2.F3.0F.W0 0x7a, {rd-sae},%zmm5,%ymm6 + .insn EVEX.L1.F3.0F.W0 0x7a, {rd-sae},%ymm5,%xmm6 diff --git a/gas/testsuite/gas/i386/x86-64-evex.d b/gas/testsuite/gas/i386/x86-64-evex.d index 5d974c312da..6fb4bf87863 100644 --- a/gas/testsuite/gas/i386/x86-64-evex.d +++ b/gas/testsuite/gas/i386/x86-64-evex.d @@ -9,14 +9,18 @@ Disassembly of section .text: 0+ <_start>: +[a-f0-9]+: 62 f1 d6 38 2a f0 vcvtsi2ss %rax,\{rd-sae\},%xmm5,%xmm6 - +[a-f0-9]+: 62 f1 57 38 2a f0 vcvtsi2sd %eax,\{rd-bad\},%xmm5,%xmm6 + +[a-f0-9]+: 62 f1 57 38 2a f0 vcvtsi2sd %eax,%xmm5,%xmm6 +[a-f0-9]+: 62 f1 d7 38 2a f0 vcvtsi2sd %rax,\{rd-sae\},%xmm5,%xmm6 +[a-f0-9]+: 62 f1 d6 08 7b f0 vcvtusi2ss %rax,%xmm5,%xmm6 +[a-f0-9]+: 62 f1 57 08 7b f0 vcvtusi2sd %eax,%xmm5,%xmm6 +[a-f0-9]+: 62 f1 d7 08 7b f0 vcvtusi2sd %rax,%xmm5,%xmm6 +[a-f0-9]+: 62 f1 d6 38 7b f0 vcvtusi2ss %rax,\{rd-sae\},%xmm5,%xmm6 - +[a-f0-9]+: 62 f1 57 38 7b f0 vcvtusi2sd %eax,\{rd-bad\},%xmm5,%xmm6 + +[a-f0-9]+: 62 f1 57 38 7b f0 vcvtusi2sd %eax,%xmm5,%xmm6 +[a-f0-9]+: 62 f1 d7 38 7b f0 vcvtusi2sd %rax,\{rd-sae\},%xmm5,%xmm6 +[a-f0-9]+: 62 e1 7e 08 2d c0 vcvtss2si %xmm0,%r16d +[a-f0-9]+: 62 e1 7c 08 c2 c0 00 vcmpeqps %xmm0,%xmm0,\(bad\) + +[a-f0-9]+: 62 f1 7e 38 e6 f5 vcvtdq2pd %ymm5,%zmm6 + +[a-f0-9]+: 62 f1 7a 38 e6 f5 vcvtdq2pd %xmm5,%ymm6 + +[a-f0-9]+: 62 f1 7e 38 7a f5 vcvtudq2pd %ymm5,%zmm6 + +[a-f0-9]+: 62 f1 7a 38 7a f5 vcvtudq2pd %xmm5,%ymm6 #pass diff --git a/opcodes/i386-dis-evex-w.h b/opcodes/i386-dis-evex-w.h index 1bb716c0ba7..bad84c56fb4 100644 --- a/opcodes/i386-dis-evex-w.h +++ b/opcodes/i386-dis-evex-w.h @@ -97,7 +97,7 @@ }, /* EVEX_W_0F7A_P_1 */ { - { "vcvtudq2pd", { XM, EXEvexHalfBcstXmmq }, 0 }, + { "vcvtudq2pd", { XM, EXEvexHalfBcstXmmq, EXxEVexRIG }, 0 }, { "vcvtuqq2pd", { XM, EXx, EXxEVexR }, 0 }, }, /* EVEX_W_0F7A_P_2 */ @@ -161,7 +161,7 @@ }, /* EVEX_W_0FE6_P_1 */ { - { "%XEvcvtdq2pd", { XM, EXEvexHalfBcstXmmq }, 0 }, + { "%XEvcvtdq2pd", { XM, EXEvexHalfBcstXmmq, EXxEVexRIG }, 0 }, { "vcvtqq2pd", { XM, EXx, EXxEVexR }, 0 }, }, /* EVEX_W_0FE7 */ diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index f9b6cf30fd0..5f94f1524cc 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -605,6 +605,7 @@ fetch_error (const instr_info *ins) #define EXxEVexR { OP_Rounding, evex_rounding_mode } #define EXxEVexR64 { OP_Rounding, evex_rounding_64_mode } #define EXxEVexS { OP_Rounding, evex_sae_mode } +#define EXxEVexRIG { OP_Rounding, evex_rounding_ignore_mode } #define MaskG { OP_G, mask_mode } #define MaskE { OP_E, mask_mode } @@ -765,6 +766,8 @@ enum evex_rounding_64_mode, /* Supress all exceptions. */ evex_sae_mode, + /* Rounding allowed, but ignored. */ + evex_rounding_ignore_mode, /* Mask register operand. */ mask_mode, @@ -14289,18 +14292,19 @@ OP_Rounding (instr_info *ins, int bytemode, int sizeflag ATTRIBUTE_UNUSED) if (ins->modrm.mod != 3 || !ins->vex.b) return true; + ins->evex_used |= EVEX_b_used; switch (bytemode) { + case evex_rounding_ignore_mode: + return true; case evex_rounding_64_mode: if (ins->address_mode != mode_64bit || !ins->vex.w) return true; /* Fall through. */ case evex_rounding_mode: - ins->evex_used |= EVEX_b_used; oappend (ins, names_rounding[ins->vex.ll]); break; case evex_sae_mode: - ins->evex_used |= EVEX_b_used; oappend (ins, "{"); break; default: