diff mbox series

RISC-V: Eliminate redundant instruction macro

Message ID 20250106011434.38358-1-zengxiao@eswincomputing.com
State New
Headers
Series RISC-V: Eliminate redundant instruction macro |

Checks

Context Check Description
linaro-tcwg-bot/tcwg_binutils_build--master-arm fail Patch failed to apply
linaro-tcwg-bot/tcwg_binutils_build--master-aarch64 fail Patch failed to apply

Commit Message

Xiao Zeng Jan. 6, 2025, 1:14 a.m. UTC 
  include/ChangeLog:

	* opcode/riscv.h: Eliminate redundant instruction macro M_j.

Signed-off-by: Xiao Zeng <zengxiao@eswincomputing.com>
---
 include/opcode/riscv.h | 1 -
 1 file changed, 1 deletion(-)

Comments

Nelson Chu Jan. 6, 2025, 3:28 a.m. UTC | #1 
Thanks, committed.

Nelson

On Mon, Jan 6, 2025 at 9:14 AM Xiao Zeng <zengxiao@eswincomputing.com>
wrote:

> include/ChangeLog:
>
>         * opcode/riscv.h: Eliminate redundant instruction macro M_j.
>
> Signed-off-by: Xiao Zeng <zengxiao@eswincomputing.com>
> ---
>  include/opcode/riscv.h | 1 -
>  1 file changed, 1 deletion(-)
>
> diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h
> index 384107fbc20..de4c13fb6db 100644
> --- a/include/opcode/riscv.h
> +++ b/include/opcode/riscv.h
> @@ -643,7 +643,6 @@ enum
>    M_FLx,
>    M_Sx_FSx,
>    M_CALL,
> -  M_J,
>    M_LI,
>    M_EXTH,
>    M_ZEXTW,
> --
> 2.17.1
>
>
diff mbox series

Patch

diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h
index 384107fbc20..de4c13fb6db 100644
--- a/include/opcode/riscv.h
+++ b/include/opcode/riscv.h
@@ -643,7 +643,6 @@  enum
   M_FLx,
   M_Sx_FSx,
   M_CALL,
-  M_J,
   M_LI,
   M_EXTH,
   M_ZEXTW,