From patchwork Fri Dec 13 15:59:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tankut Baris Aktemur X-Patchwork-Id: 103033 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 73A053858406 for ; Fri, 13 Dec 2024 16:15:27 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 73A053858406 Authentication-Results: sourceware.org; dkim=pass (2048-bit key, unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=VEpCnV+m X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) by sourceware.org (Postfix) with ESMTPS id 9AF083858290; Fri, 13 Dec 2024 16:01:01 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 9AF083858290 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 9AF083858290 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=192.198.163.15 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1734105662; cv=none; b=acZZxaG65EGwejdmlNMOP28cX8z2UrL3JvHmnzmxQV7zHWkGp3LwUhPBdes4ezGNDZYQ6fpL6mzy0G7Q76eGWYfxL1qDxFcGrgCqNt/MSDCcZqsDtk8lbITI4lL9X1xEJyrCJGKkGTswwtcdJhle+V398iladjYY/md3IGG4cX8= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1734105662; c=relaxed/simple; bh=JWpSV+GAjVzRYGsxuANyqnmdNA43Sm2GAxoK8WteUFU=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=oQJ2wALcGu+OcWO4D3/EusZkGfZCm4iAmGIp51iBgSN6acClUOf+ibIxAZWfbRjRkRu85CK+fSLXXEyKnRkArct0Al8pW8xfqVwqpBxKUuEYBWPsnCzLj4oBqh11o9NFOUZDmXnbM5Xc+n1jPWtfXBzooEbgiiwb2j0KmAaS94c= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 9AF083858290 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1734105662; x=1765641662; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=JWpSV+GAjVzRYGsxuANyqnmdNA43Sm2GAxoK8WteUFU=; b=VEpCnV+mCeH8Ekla4hcrYKn0YJI+d4TPIsMZcpK8OsYGf+kRQyTuzSzu 2dqZZiOMg5NbJu1EAp04eW0mCM53jN4pZvHfLaXs1Uqlr5mgiFx/5SrL5 cG8lCq3XSXLwEwXbUHnKfK4VDNATXFZsNCJpehEuetkN/CnAlE8kaou+o zT6SrKFxBhaOsipA7gN//WI4YrzHKDxNvJaZpPhD+lxoWW/W9+mS/G2dm SOZ907PksqvZlBo4CIZ3teiCtgCODSM4NCJYP+LUEAKCb7uDsJuUFTN4f 17nGe8Fruhtmmb/7X8QMHHj8TJJic/0NIwMz3U3rXZomr32yBgQ9LBC7z A==; X-CSE-ConnectionGUID: B/FSdtlIR3y9qBOAdtTUQA== X-CSE-MsgGUID: 9HFdp+6JS2OjfXl6qkH1uw== X-IronPort-AV: E=McAfee;i="6700,10204,11285"; a="34696337" X-IronPort-AV: E=Sophos;i="6.12,231,1728975600"; d="scan'208";a="34696337" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Dec 2024 08:01:01 -0800 X-CSE-ConnectionGUID: 1/Rx50LWQa+3iKhNUPNLkQ== X-CSE-MsgGUID: v/KEAU4bS8m8oT0tnwWllQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="96434327" Received: from gkldtt-dev-004.igk.intel.com (HELO localhost) ([10.123.221.202]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Dec 2024 08:00:59 -0800 From: Tankut Baris Aktemur To: gdb-patches@sourceware.org, Markus Metzger , binutils@sourceware.org Subject: [PATCH v2 02/47] bfd: add intelgt target to BFD Date: Fri, 13 Dec 2024 16:59:19 +0100 Message-Id: <20241213-upstream-intelgt-mvp-v2-2-5c4caeb7b33d@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241213-upstream-intelgt-mvp-v2-0-5c4caeb7b33d@intel.com> References: <20241213-upstream-intelgt-mvp-v2-0-5c4caeb7b33d@intel.com> MIME-Version: 1.0 X-Mailer: b4 0.14.2 X-Spam-Status: No, score=-10.8 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_LOTSOFHASH, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces~patchwork=sourceware.org@sourceware.org From: Natalia Saiapova Add description of IntelGT target to BFD. Describe its relocation types. To: --- bfd/Makefile.am | 2 + bfd/Makefile.in | 4 ++ bfd/archures.c | 4 ++ bfd/bfd-in2.h | 6 ++ bfd/config.bfd | 13 +++- bfd/configure | 1 + bfd/configure.ac | 1 + bfd/cpu-intelgt.c | 57 +++++++++++++++ bfd/elf64-intelgt.c | 195 ++++++++++++++++++++++++++++++++++++++++++++++++++ bfd/libbfd.h | 2 + bfd/reloc.c | 7 ++ bfd/targets.c | 2 + binutils/readelf.c | 9 +++ include/elf/intelgt.h | 39 ++++++++++ 14 files changed, 339 insertions(+), 3 deletions(-) diff --git a/bfd/Makefile.am b/bfd/Makefile.am index dadbd0f788266dd8a95e814ec9f79e0aed3d5d63..1280962af633af3585ffd5bd826e290ae9c42b1b 100644 --- a/bfd/Makefile.am +++ b/bfd/Makefile.am @@ -119,6 +119,7 @@ ALL_MACHINES = \ cpu-i386.lo \ cpu-ia64.lo \ cpu-iamcu.lo \ + cpu-intelgt.lo \ cpu-ip2k.lo \ cpu-iq2000.lo \ cpu-kvx.lo \ @@ -202,6 +203,7 @@ ALL_MACHINES_CFILES = \ cpu-i386.c \ cpu-ia64.c \ cpu-iamcu.c \ + cpu-intelgt.c \ cpu-ip2k.c \ cpu-iq2000.c \ cpu-kvx.c \ diff --git a/bfd/Makefile.in b/bfd/Makefile.in index a781e2b8959d9f36f8b0eb261bc0920e5f6f5832..9d7c57add1253a3e42b7bb044097bd46e2ff38dd 100644 --- a/bfd/Makefile.in +++ b/bfd/Makefile.in @@ -585,6 +585,7 @@ ALL_MACHINES = \ cpu-i386.lo \ cpu-ia64.lo \ cpu-iamcu.lo \ + cpu-intelgt.lo \ cpu-ip2k.lo \ cpu-iq2000.lo \ cpu-kvx.lo \ @@ -668,6 +669,7 @@ ALL_MACHINES_CFILES = \ cpu-i386.c \ cpu-ia64.c \ cpu-iamcu.c \ + cpu-intelgt.c \ cpu-ip2k.c \ cpu-iq2000.c \ cpu-kvx.c \ @@ -1024,6 +1026,7 @@ BFD64_BACKENDS = \ elf64-hppa.lo \ elf64-ia64-vms.lo \ elf64-ia64.lo \ + elf64-intelgt.lo \ elf64-kvx.lo \ elf64-loongarch.lo \ elf64-mips.lo \ @@ -1495,6 +1498,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-i386.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-ia64.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-iamcu.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-intelgt.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-ip2k.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-iq2000.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-kvx.Plo@am__quote@ diff --git a/bfd/archures.c b/bfd/archures.c index 5c104af6ef35ae7bf0209c5597f12b44fdf6bda4..8778a8c3a02d49200ef56b65fb466cb4d843fb5e 100644 --- a/bfd/archures.c +++ b/bfd/archures.c @@ -399,6 +399,8 @@ DESCRIPTION . bfd_arch_ia64, {* HP/Intel ia64. *} .#define bfd_mach_ia64_elf64 64 .#define bfd_mach_ia64_elf32 32 +. bfd_arch_intelgt, {* Intel(R) Graphics Technology. *} +.#define bfd_mach_intelgt 9 . bfd_arch_ip2k, {* Ubicom IP2K microcontrollers. *} .#define bfd_mach_ip2022 1 .#define bfd_mach_ip2022ext 2 @@ -650,6 +652,7 @@ extern const bfd_arch_info_type bfd_hppa_arch; extern const bfd_arch_info_type bfd_i386_arch; extern const bfd_arch_info_type bfd_iamcu_arch; extern const bfd_arch_info_type bfd_ia64_arch; +extern const bfd_arch_info_type bfd_intelgt_arch; extern const bfd_arch_info_type bfd_ip2k_arch; extern const bfd_arch_info_type bfd_iq2000_arch; extern const bfd_arch_info_type bfd_kvx_arch; @@ -738,6 +741,7 @@ static const bfd_arch_info_type * const bfd_archures_list[] = &bfd_i386_arch, &bfd_iamcu_arch, &bfd_ia64_arch, + &bfd_intelgt_arch, &bfd_ip2k_arch, &bfd_iq2000_arch, &bfd_kvx_arch, diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index 092a6587c1c443e0de29e0ea712436e052d4ee92..48bd8ae521c1bc9220f2211ac4153ffcc505dc4a 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -1665,6 +1665,8 @@ enum bfd_architecture bfd_arch_ia64, /* HP/Intel ia64. */ #define bfd_mach_ia64_elf64 64 #define bfd_mach_ia64_elf32 32 + bfd_arch_intelgt, /* Intel(R) Graphics Technology. */ +#define bfd_mach_intelgt 9 bfd_arch_ip2k, /* Ubicom IP2K microcontrollers. */ #define bfd_mach_ip2022 1 #define bfd_mach_ip2022ext 2 @@ -7461,6 +7463,10 @@ enum bfd_reloc_code_real BFD_RELOC_LARCH_TLS_LD_PCREL20_S2, BFD_RELOC_LARCH_TLS_GD_PCREL20_S2, BFD_RELOC_LARCH_TLS_DESC_PCREL20_S2, + + /* IntelGT relocations. */ + BFD_RELOC_ZE_SYM_ADDR32_HI, + BFD_RELOC_ZE_PER_THREAD_PAYLOAD_OFFSET_32, BFD_RELOC_UNUSED }; typedef enum bfd_reloc_code_real bfd_reloc_code_real_type; diff --git a/bfd/config.bfd b/bfd/config.bfd old mode 100644 new mode 100755 index f8482d717e192880c925ad252ae176bfb706bd95..6a2d6945f57d2fee6487684270e9886b2d40d23a --- a/bfd/config.bfd +++ b/bfd/config.bfd @@ -197,6 +197,7 @@ fido*) targ_archs=bfd_m68k_arch ;; hppa*) targ_archs=bfd_hppa_arch ;; i[3-7]86) targ_archs=bfd_i386_arch ;; ia16) targ_archs=bfd_i386_arch ;; +intelgt) targ_archs=bfd_intelgt_arch ;; kvx) targ_archs=bfd_kvx_arch ;; loongarch*) targ_archs=bfd_loongarch_arch ;; m6811*|m68hc11*) targ_archs="bfd_m68hc11_arch bfd_m68hc12_arch bfd_m9s12x_arch bfd_m9s12xg_arch" ;; @@ -712,12 +713,12 @@ case "${targ}" in ;; x86_64-*-linux-*) targ_defvec=x86_64_elf64_vec - targ_selvecs="i386_elf32_vec iamcu_elf32_vec x86_64_elf32_vec i386_pei_vec x86_64_pe_vec x86_64_pei_vec" + targ_selvecs="i386_elf32_vec iamcu_elf32_vec x86_64_elf32_vec i386_pei_vec x86_64_pe_vec x86_64_pei_vec intelgt_elf64_vec" want64=true ;; x86_64-*-mingw* | x86_64-*-pe | x86_64-*-pep | x86_64-*-cygwin) targ_defvec=x86_64_pe_vec - targ_selvecs="x86_64_pe_vec x86_64_pei_vec x86_64_pe_big_vec x86_64_elf64_vec i386_pe_vec i386_pei_vec i386_elf32_vec iamcu_elf32_vec pdb_vec" + targ_selvecs="x86_64_pe_vec x86_64_pei_vec x86_64_pe_big_vec x86_64_elf64_vec i386_pe_vec i386_pei_vec i386_elf32_vec iamcu_elf32_vec pdb_vec intelgt_elf64_vec intelgt_legacy_elf64_vec" want64=true targ_underscore=no ;; @@ -788,7 +789,13 @@ case "${targ}" in targ_defvec=i386_elf32_vec targ_selvecs="i386_msdos_vec i386_aout_vec" ;; - +#ifdef BFD64 + intelgt-*-elf) + targ_defvec=intelgt_elf64_vec + targ_selvecs="intelgt_elf64_vec" + want64=true + ;; +#endif ip2k-*-elf) targ_defvec=ip2k_elf32_vec targ_underscore=yes diff --git a/bfd/configure b/bfd/configure index 2db9f76b9eb39eb7e86619b11c9dafa224deda5e..146c24e3660558856b166d926e152a9c535ec506 100755 --- a/bfd/configure +++ b/bfd/configure @@ -15908,6 +15908,7 @@ do ia64_elf64_hpux_be_vec) tb="$tb elf64-ia64.lo elfxx-ia64.lo elf64.lo $elf"; target_size=64 ;; ia64_elf64_vms_vec) tb="$tb elf64-ia64-vms.lo elf64-ia64.lo elfxx-ia64.lo elf64.lo vms-lib.lo vms-misc.lo $elf"; target_size=64 ;; ia64_pei_vec) tb="$tb pei-ia64.lo pepigen.lo $coff"; target_size=64 ;; + intelgt_elf64_vec) tb="$tb elf64-intelgt.lo elf64.lo $elf"; target_size=64 ;; ip2k_elf32_vec) tb="$tb elf32-ip2k.lo elf32.lo $elf" ;; iq2000_elf32_vec) tb="$tb elf32-iq2000.lo elf32.lo $elf" ;; kvx_elf32_vec) tb="$tb elf32-kvx.lo elfxx-kvx.lo elf32.lo $elf $ipa" ;; diff --git a/bfd/configure.ac b/bfd/configure.ac index 465a7463d4818e045a3c33105d6e1c16e556b90b..816547a8f279ce37774c08daf317fe53cb909bad 100644 --- a/bfd/configure.ac +++ b/bfd/configure.ac @@ -494,6 +494,7 @@ do ia64_elf64_hpux_be_vec) tb="$tb elf64-ia64.lo elfxx-ia64.lo elf64.lo $elf"; target_size=64 ;; ia64_elf64_vms_vec) tb="$tb elf64-ia64-vms.lo elf64-ia64.lo elfxx-ia64.lo elf64.lo vms-lib.lo vms-misc.lo $elf"; target_size=64 ;; ia64_pei_vec) tb="$tb pei-ia64.lo pepigen.lo $coff"; target_size=64 ;; + intelgt_elf64_vec) tb="$tb elf64-intelgt.lo elf64.lo $elf"; target_size=64 ;; ip2k_elf32_vec) tb="$tb elf32-ip2k.lo elf32.lo $elf" ;; iq2000_elf32_vec) tb="$tb elf32-iq2000.lo elf32.lo $elf" ;; kvx_elf32_vec) tb="$tb elf32-kvx.lo elfxx-kvx.lo elf32.lo $elf $ipa" ;; diff --git a/bfd/cpu-intelgt.c b/bfd/cpu-intelgt.c new file mode 100644 index 0000000000000000000000000000000000000000..dd78e7260e7d8814a7fa4f5a0fb3f453006371a6 --- /dev/null +++ b/bfd/cpu-intelgt.c @@ -0,0 +1,57 @@ +/* BFD support for the Intel(R) Graphics Technology architecture. + Copyright (C) 2019-2024 Free Software Foundation, Inc. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#include "sysdep.h" +#include "bfd.h" +#include "libbfd.h" + +static void * +bfd_arch_intelgt_fill (bfd_size_type count, + bool is_bigendian ATTRIBUTE_UNUSED, + bool code) +{ + void *fill = bfd_malloc (count); + + if (fill != NULL) + { + /* nop on gen is 0x7e. */ + memset (fill, code ? 0x7e : 0, count); + } + + return fill; +} + +const bfd_arch_info_type bfd_intelgt_arch = + { + 64, /* 64 bits in a word. */ + 64, /* 64 bits in an address. */ + 8, /* 8 bits in a byte. */ + bfd_arch_intelgt, /* Architecture. */ + bfd_mach_intelgt, /* Machine number. */ + "intelgt", /* Architecture name. */ + "intelgt", /* Printable name. */ + 3, /* Section alignment power. */ + true, /* Default machine for this architecture. */ + bfd_default_compatible, /* Check for compatibility. */ + bfd_default_scan, /* Check for an arch and mach hit. */ + bfd_arch_intelgt_fill, /* Allocate and fill bfd. */ + NULL, /* Pointer to next. */ + 0 /* Maximum offset of a reloc from the start of an insn. */ + }; diff --git a/bfd/elf64-intelgt.c b/bfd/elf64-intelgt.c new file mode 100644 index 0000000000000000000000000000000000000000..50ccbac05067933c545d302632f8812364df056a --- /dev/null +++ b/bfd/elf64-intelgt.c @@ -0,0 +1,195 @@ +/* Intel(R) Graphics Technology-specific support for ELF + Copyright (C) 2022-2024 Free Software Foundation, Inc. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#include "sysdep.h" +#include "bfd.h" +#include "libbfd.h" +#include "elf-bfd.h" + +#include "elf/common.h" +#include "elf/intelgt.h" + +#define MINUS_ONE (~ (bfd_vma) 0) + +#define INTELGT_ARRAY_SIZE(a) (sizeof (a) / sizeof ((a)[0])) + +static bool +elf64_intelgt_elf_object_p (bfd *abfd) +{ + return bfd_default_set_arch_mach (abfd, bfd_arch_intelgt, bfd_mach_intelgt); +} + +/* Map BFD relocs to the IntelGT relocs. */ +struct elf_reloc_map +{ + bfd_reloc_code_real_type bfd_reloc_val; + unsigned char elf_reloc_val; +}; + +static const struct elf_reloc_map elf64_intelgt_reloc_map[] = +{ + { BFD_RELOC_64, R_ZE_SYM_ADDR }, + { BFD_RELOC_32, R_ZE_SYM_ADDR_32 }, + { BFD_RELOC_ZE_SYM_ADDR32_HI, R_ZE_SYM_ADDR32_HI }, + { BFD_RELOC_ZE_PER_THREAD_PAYLOAD_OFFSET_32, + R_PER_THREAD_PAYLOAD_OFFSET_32 }, +}; + +static reloc_howto_type elf64_intelgt_howto_table[] = +{ + HOWTO (R_ZE_NONE, /* type */ + 0, /* rightshift */ + 0, /* size (0 = byte, 1 = short, 2 = long) */ + 0, /* bitsize */ + false, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont,/* complain_on_overflow */ + NULL, /* special_function */ + "R_ZE_NONE", /* name */ + false, /* partial_inplace */ + 0, /* src_mask */ + 0, /* dst_mask */ + false), /* pcrel_offset */ + HOWTO (R_ZE_SYM_ADDR, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 64, /* bitsize */ + false, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_unsigned, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_ZE_SYM_ADDR", /* name */ + false, /* partial_inplace */ + MINUS_ONE, /* src_mask */ + MINUS_ONE, /* dst_mask */ + false), /* pcrel_offset */ + HOWTO (R_ZE_SYM_ADDR_32, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 32, /* bitsize */ + false, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_unsigned, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_ZE_SYM_ADDR_32", /* name */ + false, /* partial_inplace */ + MINUS_ONE, /* src_mask */ + MINUS_ONE, /* dst_mask */ + false), /* pcrel_offset */ + HOWTO (R_ZE_SYM_ADDR32_HI, /* type */ + 32, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 32, /* bitsize */ + false, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_unsigned, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_ZE_SYM_ADDR32_HI", /* name */ + false, /* partial_inplace */ + MINUS_ONE, /* src_mask */ + MINUS_ONE, /* dst_mask */ + false), /* pcrel_offset */ + HOWTO (R_PER_THREAD_PAYLOAD_OFFSET_32, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 32, /* bitsize */ + false, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_unsigned, /* complain_on_overflow */ + NULL, /* special_function */ + "R_PER_THREAD_PAYLOAD_OFFSET_32", /* name */ + false, /* partial_inplace */ + MINUS_ONE, /* src_mask */ + MINUS_ONE, /* dst_mask */ + false), /* pcrel_offset */ +}; + +/* Given a BFD reloc type, return a HOWTO structure. */ +static reloc_howto_type * +elf64_intelgt_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, + bfd_reloc_code_real_type code) +{ + unsigned int i; + + for (i = 0; i < INTELGT_ARRAY_SIZE (elf64_intelgt_reloc_map); i++) + { + struct elf_reloc_map reloc_map = elf64_intelgt_reloc_map[i]; + + if (reloc_map.bfd_reloc_val == code) + return &elf64_intelgt_howto_table[reloc_map.elf_reloc_val]; + } + + return NULL; +} + +/* Given relocation NAME, find its HOWTO structure. */ +static reloc_howto_type * +elf64_intelgt_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, + const char *r_name) +{ + unsigned int i; + + for (i = 0; i < INTELGT_ARRAY_SIZE (elf64_intelgt_howto_table); i++) + if (elf64_intelgt_howto_table[i].name != NULL + && strcasecmp (elf64_intelgt_howto_table[i].name, r_name) == 0) + return &elf64_intelgt_howto_table[i]; + + return NULL; +} + +/* Sets HOWTO of the BFD_RELOC to the entry of howto table based + on the type of ELF_RELOC. */ +static bool +elf64_info_to_howto (bfd *abfd, arelent *bfd_reloc, + Elf_Internal_Rela *elf_reloc) +{ + unsigned int r_type = ELF32_R_TYPE (elf_reloc->r_info); + bfd_reloc->howto = &elf64_intelgt_howto_table[r_type]; + + if (bfd_reloc->howto == NULL) + { + /* xgettext:c-format */ + _bfd_error_handler (_("%pB: unsupported relocation type %#x"), + abfd, r_type); + return false; + } + return true; +} + +#define ELF_MAXPAGESIZE 0x40000000 + +#define TARGET_LITTLE_SYM intelgt_elf64_vec +#define TARGET_LITTLE_NAME "elf64-intelgt" +#define ELF_ARCH bfd_arch_intelgt +#define ELF_MACHINE_CODE EM_INTELGT + +#define ELF_OSABI 0 + +#define elf64_bed elf64_intelgt_bed + +#define elf_backend_object_p elf64_intelgt_elf_object_p + +#define elf_backend_want_plt_sym 0 + +#define bfd_elf64_bfd_reloc_type_lookup elf64_intelgt_reloc_type_lookup +#define bfd_elf64_bfd_reloc_name_lookup elf64_intelgt_reloc_name_lookup +#define elf_info_to_howto elf64_info_to_howto + +#include "elf64-target.h" diff --git a/bfd/libbfd.h b/bfd/libbfd.h index 7d7ae1eaec9c7e9d38a56142495669d630db712b..02c7b23ca2e3886d0633090d793d3cc5b12f2c28 100644 --- a/bfd/libbfd.h +++ b/bfd/libbfd.h @@ -3626,6 +3626,8 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", "BFD_RELOC_LARCH_TLS_LD_PCREL20_S2", "BFD_RELOC_LARCH_TLS_GD_PCREL20_S2", "BFD_RELOC_LARCH_TLS_DESC_PCREL20_S2", + "BFD_RELOC_ZE_SYM_ADDR32_HI", + "BFD_RELOC_ZE_PER_THREAD_PAYLOAD_OFFSET_32", "@@overflow: BFD_RELOC_UNUSED@@", }; #endif diff --git a/bfd/reloc.c b/bfd/reloc.c index f60776299c863f2ed88a9262bf990aa979ee3cb5..7593f59ddc8ba03f0b21a3e53b0d6ded0c71fc9c 100644 --- a/bfd/reloc.c +++ b/bfd/reloc.c @@ -8260,6 +8260,13 @@ ENUMX ENUMDOC LARCH relocations. +ENUM + BFD_RELOC_ZE_SYM_ADDR32_HI +ENUMX + BFD_RELOC_ZE_PER_THREAD_PAYLOAD_OFFSET_32 +ENUMDOC + IntelGT relocations. + ENDSENUM BFD_RELOC_UNUSED diff --git a/bfd/targets.c b/bfd/targets.c index 178e9d30a2b72dd184cf2d716e78f90944e188eb..3994a87601489bb932431000f51054550fa23f27 100644 --- a/bfd/targets.c +++ b/bfd/targets.c @@ -764,6 +764,7 @@ extern const bfd_target ia64_elf64_le_vec; extern const bfd_target ia64_elf64_hpux_be_vec; extern const bfd_target ia64_elf64_vms_vec; extern const bfd_target ia64_pei_vec; +extern const bfd_target intelgt_elf64_vec; extern const bfd_target ip2k_elf32_vec; extern const bfd_target iq2000_elf32_vec; extern const bfd_target kvx_elf32_vec; @@ -1121,6 +1122,7 @@ static const bfd_target * const _bfd_target_vector[] = &ia64_elf64_hpux_be_vec, &ia64_elf64_vms_vec, &ia64_pei_vec, + &intelgt_elf64_vec, #endif &ip2k_elf32_vec, diff --git a/binutils/readelf.c b/binutils/readelf.c index 64e461daf860515f293b821d50917aa0207544e1..755138ff180ca776620a0ad567ed14b6f55381e2 100644 --- a/binutils/readelf.c +++ b/binutils/readelf.c @@ -124,6 +124,7 @@ #include "elf/kvx.h" #include "elf/lm32.h" #include "elf/iq2000.h" +#include "elf/intelgt.h" #include "elf/m32c.h" #include "elf/m32r.h" #include "elf/m68k.h" @@ -2373,6 +2374,10 @@ dump_relocations (Filedata * filedata, case EM_AMDGPU: rtype = elf_amdgpu_reloc_type (type); break; + + case EM_INTELGT: + rtype = elf_intelgt_reloc_type (type); + break; } if (rtype == NULL) @@ -15547,6 +15552,8 @@ is_32bit_abs_reloc (Filedata * filedata, unsigned int reloc_type) return reloc_type == 1; /* R_XTENSA_32. */ case EM_Z80: return reloc_type == 6; /* R_Z80_32. */ + case EM_INTELGT: + return reloc_type == 2; /* R_ZE_SYM_ADDR_32 */ default: { static unsigned int prev_warn = 0; @@ -15686,6 +15693,8 @@ is_64bit_abs_reloc (Filedata * filedata, unsigned int reloc_type) return reloc_type == 18; /* R_MIPS_64. */ case EM_KVX: return reloc_type == 3; /* R_KVX_64 */ + case EM_INTELGT: + return reloc_type == 1; /* R_ZE_SYM_ADDR. */ default: return false; } diff --git a/include/elf/intelgt.h b/include/elf/intelgt.h new file mode 100644 index 0000000000000000000000000000000000000000..16fbf9ce4f77e51f1152d1d20fa276e2fc9a3446 --- /dev/null +++ b/include/elf/intelgt.h @@ -0,0 +1,39 @@ +/* Copyright (C) 2022-2024 Free Software Foundation, Inc. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +/* This file holds definitions specific to the IntelGT ABI. */ + +#ifndef __INTELGT_H_ +#define __INTELGT_H_ + +#include "elf/reloc-macros.h" + +START_RELOC_NUMBERS (elf_intelgt_reloc_type) + RELOC_NUMBER (R_ZE_NONE, 0) + /* 64-bit address. */ + RELOC_NUMBER (R_ZE_SYM_ADDR, 1) + /* 32-bit address or lower 32-bit of a 64-bit address. */ + RELOC_NUMBER (R_ZE_SYM_ADDR_32, 2) + /* Higher 32bits of a 64-bit address. */ + RELOC_NUMBER (R_ZE_SYM_ADDR32_HI, 3) + /* 32-bit field of payload offset of per-thread data. */ + RELOC_NUMBER (R_PER_THREAD_PAYLOAD_OFFSET_32, 4) +END_RELOC_NUMBERS (R_ZE_max) + +#endif /* __INTELGT_H_ */