diff --git a/gas/testsuite/gas/i386/evex-only.d b/gas/testsuite/gas/i386/evex-only.d
new file mode 100644
index 00000000000..b434053e552
--- /dev/null
+++ b/gas/testsuite/gas/i386/evex-only.d
@@ -0,0 +1,21 @@
+#objdump: -dw
+#name: AVX512 instructions do not need {evex} prefix with memory
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*62 f1 7d 08 71 14 88 1f\s+vpsrlw\s+\$0x1f,\(%eax,%ecx,4\),%xmm0
+\s*[a-f0-9]+:\s*62 f1 7d 08 71 24 88 1f\s+vpsraw\s+\$0x1f,\(%eax,%ecx,4\),%xmm0
+\s*[a-f0-9]+:\s*62 f1 7d 08 71 34 88 1f\s+vpsllw\s+\$0x1f,\(%eax,%ecx,4\),%xmm0
+\s*[a-f0-9]+:\s*62 f1 7d 08 72 24 88 1f\s+vpsrad\s+\$0x1f,\(%eax,%ecx,4\),%xmm0
+\s*[a-f0-9]+:\s*62 f1 fd 08 72 24 88 1f\s+vpsraq\s+\$0x1f,\(%eax,%ecx,4\),%xmm0
+\s*[a-f0-9]+:\s*62 f1 7d 08 73 1c 88 1f\s+vpsrldq\s+\$0x1f,\(%eax,%ecx,4\),%xmm0
+\s*[a-f0-9]+:\s*62 f1 7d 08 73 3c 88 1f\s+vpslldq\s+\$0x1f,\(%eax,%ecx,4\),%xmm0
+\s*[a-f0-9]+:\s*62 f1 7d 08 72 14 88 1f\s+vpsrld\s+\$0x1f,\(%eax,%ecx,4\),%xmm0
+\s*[a-f0-9]+:\s*62 f1 7d 08 72 34 88 1f\s+vpslld\s+\$0x1f,\(%eax,%ecx,4\),%xmm0
+\s*[a-f0-9]+:\s*62 f1 fd 08 73 14 88 1f\s+vpsrlq\s+\$0x1f,\(%eax,%ecx,4\),%xmm0
+\s*[a-f0-9]+:\s*62 f1 fd 08 73 34 88 1f\s+vpsllq\s+\$0x1f,\(%eax,%ecx,4\),%xmm0
+#pass
diff --git a/gas/testsuite/gas/i386/evex-only.s b/gas/testsuite/gas/i386/evex-only.s
new file mode 100644
index 00000000000..50c1eb9a02c
--- /dev/null
+++ b/gas/testsuite/gas/i386/evex-only.s
@@ -0,0 +1,15 @@
+# Check instructions do not need {evex} prefix under memory operand
+
+	.text
+_start:
+	vpsrlw	$0x1f,(%eax,%ecx,4),%xmm0
+	vpsraw	$0x1f,(%eax,%ecx,4),%xmm0
+	vpsllw	$0x1f,(%eax,%ecx,4),%xmm0
+	vpsrad	$0x1f,(%eax,%ecx,4),%xmm0
+	vpsraq	$0x1f,(%eax,%ecx,4),%xmm0
+	vpsrldq	$0x1f,(%eax,%ecx,4),%xmm0
+	vpslldq	$0x1f,(%eax,%ecx,4),%xmm0
+	vpsrld	$0x1f,(%eax,%ecx,4),%xmm0
+	vpslld	$0x1f,(%eax,%ecx,4),%xmm0
+	vpsrlq	$0x1f,(%eax,%ecx,4),%xmm0
+	vpsllq	$0x1f,(%eax,%ecx,4),%xmm0
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 34352026ccc..c74f1412dcc 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -294,6 +294,7 @@ if [gas_32_check] then {
     run_dump_test "evex-lig-2"
     run_dump_test "evex-wig1"
     run_dump_test "evex-wig1-intel"
+    run_dump_test "evex-only"
     run_dump_test "evex-no-scale-32"
     run_dump_test "sse2avx"
     run_dump_test "unaligned-vector-move"
diff --git a/gas/testsuite/gas/i386/x86-64-evex-only.d b/gas/testsuite/gas/i386/x86-64-evex-only.d
new file mode 100644
index 00000000000..5b4bfd23665
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-evex-only.d
@@ -0,0 +1,21 @@
+#objdump: -dw
+#name: x86-64 AVX512 instructions do not need {evex} prefix with memory
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*62 d1 7d 08 71 14 8f 1f\s+vpsrlw\s+\$0x1f,\(%r15,%rcx,4\),%xmm0
+\s*[a-f0-9]+:\s*62 d1 7d 08 71 24 8f 1f\s+vpsraw\s+\$0x1f,\(%r15,%rcx,4\),%xmm0
+\s*[a-f0-9]+:\s*62 d1 7d 08 71 34 8f 1f\s+vpsllw\s+\$0x1f,\(%r15,%rcx,4\),%xmm0
+\s*[a-f0-9]+:\s*62 d1 7d 08 72 24 8f 1f\s+vpsrad\s+\$0x1f,\(%r15,%rcx,4\),%xmm0
+\s*[a-f0-9]+:\s*62 d1 fd 08 72 24 8f 1f\s+vpsraq\s+\$0x1f,\(%r15,%rcx,4\),%xmm0
+\s*[a-f0-9]+:\s*62 d1 7d 08 73 1c 8f 1f\s+vpsrldq\s+\$0x1f,\(%r15,%rcx,4\),%xmm0
+\s*[a-f0-9]+:\s*62 d1 7d 08 73 3c 8f 1f\s+vpslldq\s+\$0x1f,\(%r15,%rcx,4\),%xmm0
+\s*[a-f0-9]+:\s*62 d1 7d 08 72 14 8f 1f\s+vpsrld\s+\$0x1f,\(%r15,%rcx,4\),%xmm0
+\s*[a-f0-9]+:\s*62 d1 7d 08 72 34 8f 1f\s+vpslld\s+\$0x1f,\(%r15,%rcx,4\),%xmm0
+\s*[a-f0-9]+:\s*62 d1 fd 08 73 14 8f 1f\s+vpsrlq\s+\$0x1f,\(%r15,%rcx,4\),%xmm0
+\s*[a-f0-9]+:\s*62 d1 fd 08 73 34 8f 1f\s+vpsllq\s+\$0x1f,\(%r15,%rcx,4\),%xmm0
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-evex-only.s b/gas/testsuite/gas/i386/x86-64-evex-only.s
new file mode 100644
index 00000000000..ad7d3f226d7
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-evex-only.s
@@ -0,0 +1,15 @@
+# Check instructions do not need {evex} prefix under memory operand
+
+	.text
+_start:
+	vpsrlw	$0x1f,(%r15,%rcx,4),%xmm0
+	vpsraw	$0x1f,(%r15,%rcx,4),%xmm0
+	vpsllw	$0x1f,(%r15,%rcx,4),%xmm0
+	vpsrad	$0x1f,(%r15,%rcx,4),%xmm0
+	vpsraq	$0x1f,(%r15,%rcx,4),%xmm0
+	vpsrldq	$0x1f,(%r15,%rcx,4),%xmm0
+	vpslldq	$0x1f,(%r15,%rcx,4),%xmm0
+	vpsrld	$0x1f,(%r15,%rcx,4),%xmm0
+	vpslld	$0x1f,(%r15,%rcx,4),%xmm0
+	vpsrlq	$0x1f,(%r15,%rcx,4),%xmm0
+	vpsllq	$0x1f,(%r15,%rcx,4),%xmm0
diff --git a/gas/testsuite/gas/i386/x86-64.exp b/gas/testsuite/gas/i386/x86-64.exp
index fee227d2a4d..d8b767c3d54 100644
--- a/gas/testsuite/gas/i386/x86-64.exp
+++ b/gas/testsuite/gas/i386/x86-64.exp
@@ -242,6 +242,7 @@ run_dump_test "x86-64-evex-lig-2"
 run_dump_test "x86-64-evex-wig1"
 run_dump_test "x86-64-evex-wig1-intel"
 run_dump_test "x86-64-evex-wig2"
+run_dump_test "x86-64-evex-only"
 run_dump_test "evex-no-scale-64"
 run_dump_test "x86-64-sse2avx"
 run_dump_test "x86-64-unaligned-vector-move"
diff --git a/opcodes/i386-dis-evex-reg.h b/opcodes/i386-dis-evex-reg.h
index eda0e824aef..7c4401ffaad 100644
--- a/opcodes/i386-dis-evex-reg.h
+++ b/opcodes/i386-dis-evex-reg.h
@@ -2,11 +2,11 @@
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "%XEvpsrlw",	{ Vex, EXx, Ib }, PREFIX_DATA },
+    { "%MEvpsrlw",	{ Vex, EXx, Ib }, PREFIX_DATA },
     { Bad_Opcode },
-    { "%XEvpsraw",	{ Vex, EXx, Ib }, PREFIX_DATA },
+    { "%MEvpsraw",	{ Vex, EXx, Ib }, PREFIX_DATA },
     { Bad_Opcode },
-    { "%XEvpsllw",	{ Vex, EXx, Ib }, PREFIX_DATA },
+    { "%MEvpsllw",	{ Vex, EXx, Ib }, PREFIX_DATA },
   },
   /* REG_EVEX_0F72 */
   {
@@ -14,7 +14,7 @@
     { "vprol%DQ",	{ Vex, EXx, Ib }, PREFIX_DATA },
     { VEX_W_TABLE (EVEX_W_0F72_R_2) },
     { Bad_Opcode },
-    { "%XEvpsra%DQ",	{ Vex, EXx, Ib }, PREFIX_DATA },
+    { "%MEvpsra%DQ",	{ Vex, EXx, Ib }, PREFIX_DATA },
     { Bad_Opcode },
     { VEX_W_TABLE (EVEX_W_0F72_R_6) },
   },
@@ -23,11 +23,11 @@
     { Bad_Opcode },
     { Bad_Opcode },
     { VEX_W_TABLE (EVEX_W_0F73_R_2) },
-    { "%XEvpsrldqY",	{ Vex, EXx, Ib }, PREFIX_DATA },
+    { "%MEvpsrldqY",	{ Vex, EXx, Ib }, PREFIX_DATA },
     { Bad_Opcode },
     { Bad_Opcode },
     { VEX_W_TABLE (EVEX_W_0F73_R_6) },
-    { "%XEvpslldqY",	{ Vex, EXx, Ib }, PREFIX_DATA },
+    { "%MEvpslldqY",	{ Vex, EXx, Ib }, PREFIX_DATA },
   },
   /* REG_EVEX_0F38C6_L_2 */
   {
diff --git a/opcodes/i386-dis-evex-w.h b/opcodes/i386-dis-evex-w.h
index 27053b49b9c..f6c5d8389e3 100644
--- a/opcodes/i386-dis-evex-w.h
+++ b/opcodes/i386-dis-evex-w.h
@@ -50,21 +50,21 @@
   },
   /* EVEX_W_0F72_R_2 */
   {
-    { "%XEvpsrld",	{ Vex, EXx, Ib }, PREFIX_DATA },
+    { "%MEvpsrld",	{ Vex, EXx, Ib }, PREFIX_DATA },
   },
   /* EVEX_W_0F72_R_6 */
   {
-    { "%XEvpslld",	{ Vex, EXx, Ib }, PREFIX_DATA },
+    { "%MEvpslld",	{ Vex, EXx, Ib }, PREFIX_DATA },
   },
   /* EVEX_W_0F73_R_2 */
   {
     { Bad_Opcode },
-    { "%XEvpsrlq",	{ Vex, EXx, Ib }, PREFIX_DATA },
+    { "%MEvpsrlq",	{ Vex, EXx, Ib }, PREFIX_DATA },
   },
   /* EVEX_W_0F73_R_6 */
   {
     { Bad_Opcode },
-    { "%XEvpsllq",	{ Vex, EXx, Ib }, PREFIX_DATA },
+    { "%MEvpsllq",	{ Vex, EXx, Ib }, PREFIX_DATA },
   },
   /* EVEX_W_0F76 */
   {
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index ea3a8e2f860..bc42c48630c 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -1819,6 +1819,8 @@ struct dis386 {
    "XV" => print "{vex} " pseudo prefix
    "XE" => print "{evex} " pseudo prefix if no EVEX-specific functionality is
 	   is used by an EVEX-encoded (AVX512VL) instruction.
+   "ME" => Similar to "XE", but only print "{evex} " when there is no
+	   memory operand.
    "NF" => print "{nf} " pseudo prefix when EVEX.NF = 1 and print "{evex} "
 	   pseudo prefix when instructions without NF, EGPR and VVVV,
    "NE" => don't print "{evex} " pseudo prefix for some special instructions
@@ -10594,6 +10596,10 @@ putop (instr_info *ins, const char *in_template, int sizeflag)
 	    {
 	      switch (last[0])
 		{
+		case 'M':
+		  if (ins->modrm.mod != 3)
+		    break;
+		/* Fall through.  */
 		case 'X':
 		  if (!ins->vex.evex || ins->vex.b || ins->vex.ll >= 2
 		      || (ins->rex2 & 7)