diff mbox series

[v1,5/8] aarch64: remove redundant register type R_N

Message ID 20241023104816.501176-6-matthieu.longo@arm.com
State Committed
Headers
Series small refactorings before posting PAuth_LR patch series |

Checks

Context Check Description
linaro-tcwg-bot/tcwg_binutils_build--master-arm success Build passed
linaro-tcwg-bot/tcwg_binutils_build--master-aarch64 success Build passed
linaro-tcwg-bot/tcwg_binutils_check--master-aarch64 success Test passed
linaro-tcwg-bot/tcwg_binutils_check--master-arm success Test passed

Commit Message

Matthieu Longo Oct. 23, 2024, 10:48 a.m. UTC 
  The register type R_N is redundant with R_ZR_SP. This patch removes it,
and replaces its usage by R_ZR_SP.
---
 gas/config/tc-aarch64.c | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

Comments

Richard Earnshaw (foss) Nov. 5, 2024, 6:08 p.m. UTC | #1 
On 23/10/2024 11:48, Matthieu Longo wrote:
> The register type R_N is redundant with R_ZR_SP. This patch removes it,
> and replaces its usage by R_ZR_SP.
> ---
>  gas/config/tc-aarch64.c | 6 +-----
>  1 file changed, 1 insertion(+), 5 deletions(-)
> 
> diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
> index f5beea5bfe9..54f5d80f356 100644
> --- a/gas/config/tc-aarch64.c
> +++ b/gas/config/tc-aarch64.c
> @@ -346,10 +346,6 @@ struct reloc_entry
>  		 | REG_TYPE(FP_B) | REG_TYPE(FP_H)			\
>  		 | REG_TYPE(FP_S) | REG_TYPE(FP_D) | REG_TYPE(FP_Q)	\
>  		 | REG_TYPE(Z) | REG_TYPE(P) | REG_TYPE(PN))		\
> -  /* Any integer register; used for error messages only.  */		\
> -  MULTI_REG_TYPE(R_N, REG_TYPE(R_32) | REG_TYPE(R_64)			\
> -		 | REG_TYPE(SP_32) | REG_TYPE(SP_64)			\
> -		 | REG_TYPE(ZR_32) | REG_TYPE(ZR_64))			\
>    /* Any vector register.  */						\
>    MULTI_REG_TYPE(VZ, REG_TYPE(V) | REG_TYPE(Z))				\
>    /* An SVE vector or predicate register.  */				\
> @@ -4640,7 +4636,7 @@ static bool
>  parse_sme_immediate (char **str, int64_t *imm)
>  {
>    int64_t val;
> -  if (! parse_constant_immediate (str, &val, REG_TYPE_R_N))
> +  if (! parse_constant_immediate (str, &val, REG_TYPE_R_ZR_SP))
>      return false;
>  
>    *imm = val;


OK.
R.
diff mbox series

Patch

diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index f5beea5bfe9..54f5d80f356 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -346,10 +346,6 @@  struct reloc_entry
 		 | REG_TYPE(FP_B) | REG_TYPE(FP_H)			\
 		 | REG_TYPE(FP_S) | REG_TYPE(FP_D) | REG_TYPE(FP_Q)	\
 		 | REG_TYPE(Z) | REG_TYPE(P) | REG_TYPE(PN))		\
-  /* Any integer register; used for error messages only.  */		\
-  MULTI_REG_TYPE(R_N, REG_TYPE(R_32) | REG_TYPE(R_64)			\
-		 | REG_TYPE(SP_32) | REG_TYPE(SP_64)			\
-		 | REG_TYPE(ZR_32) | REG_TYPE(ZR_64))			\
   /* Any vector register.  */						\
   MULTI_REG_TYPE(VZ, REG_TYPE(V) | REG_TYPE(Z))				\
   /* An SVE vector or predicate register.  */				\
@@ -4640,7 +4636,7 @@  static bool
 parse_sme_immediate (char **str, int64_t *imm)
 {
   int64_t val;
-  if (! parse_constant_immediate (str, &val, REG_TYPE_R_N))
+  if (! parse_constant_immediate (str, &val, REG_TYPE_R_ZR_SP))
     return false;
 
   *imm = val;