[v3] RISC-V: Add Smrnmi extension csrs.
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Commit Message
This patch support Smrnmi extension[1],
The csrs address can be find in[2].
[1] https://github.com/riscv/riscv-isa-manual/commit/35eb3948bf0b87c83fab5a7238bd68b6211faf62
[2] https://github.com/riscv/riscv-isa-manual/blob/smrnmi-1.0/src/priv-csrs.adoc
Version log:
v2: Update patch description info, Update 'mnstatus' address into '0x744'.
v3: Update priv-csrs information doc's url, change NEWS info.
bfd/ChangeLog:
* elfxx-riscv.c: New extension.
gas/ChangeLog:
* NEWS: Add Smrnmi extension support.
* config/tc-riscv.c (enum riscv_csr_class): New extension class.
(riscv_csr_address): Ditto.
* testsuite/gas/riscv/csr-version-1p10.d: New csrs.
* testsuite/gas/riscv/csr-version-1p10.l: Ditto.
* testsuite/gas/riscv/csr-version-1p11.d: Ditto.
* testsuite/gas/riscv/csr-version-1p11.l: Ditto.
* testsuite/gas/riscv/csr-version-1p12.d: Ditto.
* testsuite/gas/riscv/csr-version-1p12.l: Ditto.
* testsuite/gas/riscv/csr.s: Ditto.
* testsuite/gas/riscv/march-help.l: New extension.
include/ChangeLog:
* opcode/riscv-opc.h (CSR_MNSCRATCH): New csr.
(CSR_MNEPC): Ditto.
(CSR_MNCAUSE): Ditto.
(CSR_MNSTATUS): Ditto.
(DECLARE_CSR): New csr declarations.
---
bfd/elfxx-riscv.c | 1 +
gas/NEWS | 5 +++--
gas/config/tc-riscv.c | 4 ++++
gas/testsuite/gas/riscv/csr-version-1p10.d | 8 ++++++++
gas/testsuite/gas/riscv/csr-version-1p10.l | 16 ++++++++++++++++
gas/testsuite/gas/riscv/csr-version-1p11.d | 8 ++++++++
gas/testsuite/gas/riscv/csr-version-1p11.l | 16 ++++++++++++++++
gas/testsuite/gas/riscv/csr-version-1p12.d | 8 ++++++++
gas/testsuite/gas/riscv/csr-version-1p12.l | 16 ++++++++++++++++
gas/testsuite/gas/riscv/csr.s | 6 ++++++
gas/testsuite/gas/riscv/march-help.l | 1 +
include/opcode/riscv-opc.h | 10 ++++++++++
12 files changed, 97 insertions(+), 2 deletions(-)
Comments
Thanks, committed.
Nelson
On Tue, Sep 24, 2024 at 7:16 PM Jiawei <jiawei@iscas.ac.cn> wrote:
> This patch support Smrnmi extension[1],
> The csrs address can be find in[2].
>
> [1]
> https://github.com/riscv/riscv-isa-manual/commit/35eb3948bf0b87c83fab5a7238bd68b6211faf62
> [2]
> https://github.com/riscv/riscv-isa-manual/blob/smrnmi-1.0/src/priv-csrs.adoc
>
>
> Version log:
>
> v2: Update patch description info, Update 'mnstatus' address into '0x744'.
> v3: Update priv-csrs information doc's url, change NEWS info.
>
> bfd/ChangeLog:
>
> * elfxx-riscv.c: New extension.
>
> gas/ChangeLog:
>
> * NEWS: Add Smrnmi extension support.
> * config/tc-riscv.c (enum riscv_csr_class): New extension class.
> (riscv_csr_address): Ditto.
> * testsuite/gas/riscv/csr-version-1p10.d: New csrs.
> * testsuite/gas/riscv/csr-version-1p10.l: Ditto.
> * testsuite/gas/riscv/csr-version-1p11.d: Ditto.
> * testsuite/gas/riscv/csr-version-1p11.l: Ditto.
> * testsuite/gas/riscv/csr-version-1p12.d: Ditto.
> * testsuite/gas/riscv/csr-version-1p12.l: Ditto.
> * testsuite/gas/riscv/csr.s: Ditto.
> * testsuite/gas/riscv/march-help.l: New extension.
>
> include/ChangeLog:
>
> * opcode/riscv-opc.h (CSR_MNSCRATCH): New csr.
> (CSR_MNEPC): Ditto.
> (CSR_MNCAUSE): Ditto.
> (CSR_MNSTATUS): Ditto.
> (DECLARE_CSR): New csr declarations.
>
> ---
> bfd/elfxx-riscv.c | 1 +
> gas/NEWS | 5 +++--
> gas/config/tc-riscv.c | 4 ++++
> gas/testsuite/gas/riscv/csr-version-1p10.d | 8 ++++++++
> gas/testsuite/gas/riscv/csr-version-1p10.l | 16 ++++++++++++++++
> gas/testsuite/gas/riscv/csr-version-1p11.d | 8 ++++++++
> gas/testsuite/gas/riscv/csr-version-1p11.l | 16 ++++++++++++++++
> gas/testsuite/gas/riscv/csr-version-1p12.d | 8 ++++++++
> gas/testsuite/gas/riscv/csr-version-1p12.l | 16 ++++++++++++++++
> gas/testsuite/gas/riscv/csr.s | 6 ++++++
> gas/testsuite/gas/riscv/march-help.l | 1 +
> include/opcode/riscv-opc.h | 10 ++++++++++
> 12 files changed, 97 insertions(+), 2 deletions(-)
>
> diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
> index 64b7d71f2cb..26ec664d88a 100644
> --- a/bfd/elfxx-riscv.c
> +++ b/bfd/elfxx-riscv.c
> @@ -1439,6 +1439,7 @@ static struct riscv_supported_ext
> riscv_supported_std_s_ext[] =
> {"smcsrind", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
> {"smcntrpmf", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
> {"smepmp", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
> + {"smrnmi", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
> {"smstateen", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
> {"ssaia", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
> {"ssccptr", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
> diff --git a/gas/NEWS b/gas/NEWS
> index 24055d2f5e9..cca6e620ba7 100644
> --- a/gas/NEWS
> +++ b/gas/NEWS
> @@ -1,7 +1,8 @@
> -*- text -*-
>
> -* Add support for RISC-V Zcmp (cm.mva01s, cm.mvsa01) and CORE-V
> (xcvbitmanip,
> - xcvsimd) extensions with version 1.0.
> +* Add support for RISC-V Zcmp (cm.mva01s, cm.mvsa01), CORE-V (xcvbitmanip,
> + xcvsimd) extensions with version 1.0 and RISC-V Smrnmi extension with
> + version 1.0.
>
> Changes in 2.43:
>
> diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
> index bf2020d656b..301607b0aad 100644
> --- a/gas/config/tc-riscv.c
> +++ b/gas/config/tc-riscv.c
> @@ -81,6 +81,7 @@ enum riscv_csr_class
> CSR_CLASS_SMCSRIND, /* Smcsrind */
> CSR_CLASS_SMCNTRPMF, /* Smcntrpmf */
> CSR_CLASS_SMCNTRPMF_32, /* Smcntrpmf, rv32 only */
> + CSR_CLASS_SMRNMI, /* Smrnmi */
> CSR_CLASS_SMSTATEEN, /* Smstateen only */
> CSR_CLASS_SMSTATEEN_32, /* Smstateen RV32 only */
> CSR_CLASS_SSAIA, /* Ssaia */
> @@ -1082,6 +1083,9 @@ riscv_csr_address (const char *csr_name,
> need_check_version = true;
> extension = "smcntrpmf";
> break;
> + case CSR_CLASS_SMRNMI:
> + extension = "smrnmi";
> + break;
> case CSR_CLASS_SMSTATEEN_32:
> is_rv32_only = true;
> /* Fall through. */
> diff --git a/gas/testsuite/gas/riscv/csr-version-1p10.d
> b/gas/testsuite/gas/riscv/csr-version-1p10.d
> index 5165f4bea0d..ce28f59fa74 100644
> --- a/gas/testsuite/gas/riscv/csr-version-1p10.d
> +++ b/gas/testsuite/gas/riscv/csr-version-1p10.d
> @@ -645,6 +645,14 @@ Disassembly of section .text:
> [ ]+[0-9a-f]+:[ ]+72159073[ ]+csrw[ ]+mcyclecfgh,a1
> [ ]+[0-9a-f]+:[ ]+72202573[ ]+csrr[ ]+a0,minstretcfgh
> [ ]+[0-9a-f]+:[ ]+72259073[ ]+csrw[ ]+minstretcfgh,a1
> +[ ]+[0-9a-f]+:[ ]+74102573[ ]+csrr[ ]+a0,mnepc
> +[ ]+[0-9a-f]+:[ ]+74159073[ ]+csrw[ ]+mnepc,a1
> +[ ]+[0-9a-f]+:[ ]+74202573[ ]+csrr[ ]+a0,mncause
> +[ ]+[0-9a-f]+:[ ]+74259073[ ]+csrw[ ]+mncause,a1
> +[ ]+[0-9a-f]+:[ ]+74002573[ ]+csrr[ ]+a0,mnscratch
> +[ ]+[0-9a-f]+:[ ]+74059073[ ]+csrw[ ]+mnscratch,a1
> +[ ]+[0-9a-f]+:[ ]+74402573[ ]+csrr[ ]+a0,mnstatus
> +[ ]+[0-9a-f]+:[ ]+74459073[ ]+csrw[ ]+mnstatus,a1
> [ ]+[0-9a-f]+:[ ]+30c02573[ ]+csrr[ ]+a0,mstateen0
> [ ]+[0-9a-f]+:[ ]+30c59073[ ]+csrw[ ]+mstateen0,a1
> [ ]+[0-9a-f]+:[ ]+30d02573[ ]+csrr[ ]+a0,mstateen1
> diff --git a/gas/testsuite/gas/riscv/csr-version-1p10.l
> b/gas/testsuite/gas/riscv/csr-version-1p10.l
> index 17a8bb638e8..5f6a956af5f 100644
> --- a/gas/testsuite/gas/riscv/csr-version-1p10.l
> +++ b/gas/testsuite/gas/riscv/csr-version-1p10.l
> @@ -941,6 +941,22 @@
> .*Info: macro .*
> .*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
> .*Info: macro .*
> +.*Warning: invalid CSR `mnepc', needs `smrnmi' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mnepc', needs `smrnmi' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mncause', needs `smrnmi' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mncause', needs `smrnmi' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mnscratch', needs `smrnmi' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mnscratch', needs `smrnmi' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mnstatus', needs `smrnmi' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mnstatus', needs `smrnmi' extension
> +.*Info: macro .*
> .*Warning: invalid CSR `mstateen0', needs `smstateen' extension
> .*Info: macro .*
> .*Warning: invalid CSR `mstateen0', needs `smstateen' extension
> diff --git a/gas/testsuite/gas/riscv/csr-version-1p11.d
> b/gas/testsuite/gas/riscv/csr-version-1p11.d
> index 1cb5a917f1a..7bbcf33048e 100644
> --- a/gas/testsuite/gas/riscv/csr-version-1p11.d
> +++ b/gas/testsuite/gas/riscv/csr-version-1p11.d
> @@ -645,6 +645,14 @@ Disassembly of section .text:
> [ ]+[0-9a-f]+:[ ]+72159073[ ]+csrw[ ]+mcyclecfgh,a1
> [ ]+[0-9a-f]+:[ ]+72202573[ ]+csrr[ ]+a0,minstretcfgh
> [ ]+[0-9a-f]+:[ ]+72259073[ ]+csrw[ ]+minstretcfgh,a1
> +[ ]+[0-9a-f]+:[ ]+74102573[ ]+csrr[ ]+a0,mnepc
> +[ ]+[0-9a-f]+:[ ]+74159073[ ]+csrw[ ]+mnepc,a1
> +[ ]+[0-9a-f]+:[ ]+74202573[ ]+csrr[ ]+a0,mncause
> +[ ]+[0-9a-f]+:[ ]+74259073[ ]+csrw[ ]+mncause,a1
> +[ ]+[0-9a-f]+:[ ]+74002573[ ]+csrr[ ]+a0,mnscratch
> +[ ]+[0-9a-f]+:[ ]+74059073[ ]+csrw[ ]+mnscratch,a1
> +[ ]+[0-9a-f]+:[ ]+74402573[ ]+csrr[ ]+a0,mnstatus
> +[ ]+[0-9a-f]+:[ ]+74459073[ ]+csrw[ ]+mnstatus,a1
> [ ]+[0-9a-f]+:[ ]+30c02573[ ]+csrr[ ]+a0,mstateen0
> [ ]+[0-9a-f]+:[ ]+30c59073[ ]+csrw[ ]+mstateen0,a1
> [ ]+[0-9a-f]+:[ ]+30d02573[ ]+csrr[ ]+a0,mstateen1
> diff --git a/gas/testsuite/gas/riscv/csr-version-1p11.l
> b/gas/testsuite/gas/riscv/csr-version-1p11.l
> index 8b797e8893e..412271ccdfd 100644
> --- a/gas/testsuite/gas/riscv/csr-version-1p11.l
> +++ b/gas/testsuite/gas/riscv/csr-version-1p11.l
> @@ -937,6 +937,22 @@
> .*Info: macro .*
> .*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
> .*Info: macro .*
> +.*Warning: invalid CSR `mnepc', needs `smrnmi' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mnepc', needs `smrnmi' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mncause', needs `smrnmi' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mncause', needs `smrnmi' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mnscratch', needs `smrnmi' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mnscratch', needs `smrnmi' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mnstatus', needs `smrnmi' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mnstatus', needs `smrnmi' extension
> +.*Info: macro .*
> .*Warning: invalid CSR `mstateen0', needs `smstateen' extension
> .*Info: macro .*
> .*Warning: invalid CSR `mstateen0', needs `smstateen' extension
> diff --git a/gas/testsuite/gas/riscv/csr-version-1p12.d
> b/gas/testsuite/gas/riscv/csr-version-1p12.d
> index ac88d9370f8..25518dc8646 100644
> --- a/gas/testsuite/gas/riscv/csr-version-1p12.d
> +++ b/gas/testsuite/gas/riscv/csr-version-1p12.d
> @@ -645,6 +645,14 @@ Disassembly of section .text:
> [ ]+[0-9a-f]+:[ ]+72159073[ ]+csrw[ ]+mcyclecfgh,a1
> [ ]+[0-9a-f]+:[ ]+72202573[ ]+csrr[ ]+a0,minstretcfgh
> [ ]+[0-9a-f]+:[ ]+72259073[ ]+csrw[ ]+minstretcfgh,a1
> +[ ]+[0-9a-f]+:[ ]+74102573[ ]+csrr[ ]+a0,mnepc
> +[ ]+[0-9a-f]+:[ ]+74159073[ ]+csrw[ ]+mnepc,a1
> +[ ]+[0-9a-f]+:[ ]+74202573[ ]+csrr[ ]+a0,mncause
> +[ ]+[0-9a-f]+:[ ]+74259073[ ]+csrw[ ]+mncause,a1
> +[ ]+[0-9a-f]+:[ ]+74002573[ ]+csrr[ ]+a0,mnscratch
> +[ ]+[0-9a-f]+:[ ]+74059073[ ]+csrw[ ]+mnscratch,a1
> +[ ]+[0-9a-f]+:[ ]+74402573[ ]+csrr[ ]+a0,mnstatus
> +[ ]+[0-9a-f]+:[ ]+74459073[ ]+csrw[ ]+mnstatus,a1
> [ ]+[0-9a-f]+:[ ]+30c02573[ ]+csrr[ ]+a0,mstateen0
> [ ]+[0-9a-f]+:[ ]+30c59073[ ]+csrw[ ]+mstateen0,a1
> [ ]+[0-9a-f]+:[ ]+30d02573[ ]+csrr[ ]+a0,mstateen1
> diff --git a/gas/testsuite/gas/riscv/csr-version-1p12.l
> b/gas/testsuite/gas/riscv/csr-version-1p12.l
> index 81a7aba25c8..4848a68a8d9 100644
> --- a/gas/testsuite/gas/riscv/csr-version-1p12.l
> +++ b/gas/testsuite/gas/riscv/csr-version-1p12.l
> @@ -661,6 +661,22 @@
> .*Info: macro .*
> .*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
> .*Info: macro .*
> +.*Warning: invalid CSR `mnepc', needs `smrnmi' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mnepc', needs `smrnmi' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mncause', needs `smrnmi' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mncause', needs `smrnmi' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mnscratch', needs `smrnmi' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mnscratch', needs `smrnmi' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mnstatus', needs `smrnmi' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mnstatus', needs `smrnmi' extension
> +.*Info: macro .*
> .*Warning: invalid CSR `mstateen0', needs `smstateen' extension
> .*Info: macro .*
> .*Warning: invalid CSR `mstateen0', needs `smstateen' extension
> diff --git a/gas/testsuite/gas/riscv/csr.s b/gas/testsuite/gas/riscv/csr.s
> index 378caef35b0..8378e14d07d 100644
> --- a/gas/testsuite/gas/riscv/csr.s
> +++ b/gas/testsuite/gas/riscv/csr.s
> @@ -365,6 +365,12 @@
> csr mcyclecfgh
> csr minstretcfgh
>
> + # smrnmi
> + csr mnepc
> + csr mncause
> + csr mnscratch
> + csr mnstatus
> +
> # Smstateen/Ssstateen extensions
> csr mstateen0
> csr mstateen1
> diff --git a/gas/testsuite/gas/riscv/march-help.l
> b/gas/testsuite/gas/riscv/march-help.l
> index 0c33d1ee76d..003359242d0 100644
> --- a/gas/testsuite/gas/riscv/march-help.l
> +++ b/gas/testsuite/gas/riscv/march-help.l
> @@ -114,6 +114,7 @@ All available -march extensions for RISC-V:
> smcsrind 1.0
> smcntrpmf 1.0
> smepmp 1.0
> + smrnmi 1.0
> smstateen 1.0
> ssaia 1.0
> ssccptr 1.0
> diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
> index 73ee81158ae..2209e1a48c1 100644
> --- a/include/opcode/riscv-opc.h
> +++ b/include/opcode/riscv-opc.h
> @@ -4074,6 +4074,11 @@
> #define CSR_MINSTRETCFG 0x322
> #define CSR_MCYCLECFGH 0x721
> #define CSR_MINSTRETCFGH 0x722
> +/* Smrnmi extension. */
> +#define CSR_MNSCRATCH 0x740
> +#define CSR_MNEPC 0x741
> +#define CSR_MNCAUSE 0x742
> +#define CSR_MNSTATUS 0x744
> /* Smstateen extension */
> #define CSR_MSTATEEN0 0x30c
> #define CSR_MSTATEEN1 0x30d
> @@ -5172,6 +5177,11 @@ DECLARE_CSR(mcyclecfg, CSR_MCYCLECFG,
> CSR_CLASS_SMCNTRPMF, PRIV_SPEC_CLASS_1P10,
> DECLARE_CSR(minstretcfg, CSR_MINSTRETCFG, CSR_CLASS_SMCNTRPMF,
> PRIV_SPEC_CLASS_1P10, PRIV_SPEC_CLASS_DRAFT)
> DECLARE_CSR(mcyclecfgh, CSR_MCYCLECFGH, CSR_CLASS_SMCNTRPMF_32,
> PRIV_SPEC_CLASS_1P10, PRIV_SPEC_CLASS_DRAFT)
> DECLARE_CSR(minstretcfgh, CSR_MINSTRETCFGH, CSR_CLASS_SMCNTRPMF_32,
> PRIV_SPEC_CLASS_1P10, PRIV_SPEC_CLASS_DRAFT)
> +/* Smrnmi extensions. */
> +DECLARE_CSR(mnepc, CSR_MNEPC, CSR_CLASS_SMRNMI, PRIV_SPEC_CLASS_NONE,
> PRIV_SPEC_CLASS_NONE)
> +DECLARE_CSR(mncause, CSR_MNCAUSE, CSR_CLASS_SMRNMI, PRIV_SPEC_CLASS_NONE,
> PRIV_SPEC_CLASS_NONE)
> +DECLARE_CSR(mnscratch, CSR_MNSCRATCH, CSR_CLASS_SMRNMI,
> PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
> +DECLARE_CSR(mnstatus, CSR_MNSTATUS, CSR_CLASS_SMRNMI,
> PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
> /* Smstateen/Ssstateen extensions. */
> DECLARE_CSR(mstateen0, CSR_MSTATEEN0, CSR_CLASS_SMSTATEEN,
> PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
> DECLARE_CSR(mstateen1, CSR_MSTATEEN1, CSR_CLASS_SMSTATEEN,
> PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
> --
> 2.25.1
>
>
@@ -1439,6 +1439,7 @@ static struct riscv_supported_ext riscv_supported_std_s_ext[] =
{"smcsrind", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"smcntrpmf", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"smepmp", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
+ {"smrnmi", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"smstateen", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"ssaia", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"ssccptr", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
@@ -1,7 +1,8 @@
-*- text -*-
-* Add support for RISC-V Zcmp (cm.mva01s, cm.mvsa01) and CORE-V (xcvbitmanip,
- xcvsimd) extensions with version 1.0.
+* Add support for RISC-V Zcmp (cm.mva01s, cm.mvsa01), CORE-V (xcvbitmanip,
+ xcvsimd) extensions with version 1.0 and RISC-V Smrnmi extension with
+ version 1.0.
Changes in 2.43:
@@ -81,6 +81,7 @@ enum riscv_csr_class
CSR_CLASS_SMCSRIND, /* Smcsrind */
CSR_CLASS_SMCNTRPMF, /* Smcntrpmf */
CSR_CLASS_SMCNTRPMF_32, /* Smcntrpmf, rv32 only */
+ CSR_CLASS_SMRNMI, /* Smrnmi */
CSR_CLASS_SMSTATEEN, /* Smstateen only */
CSR_CLASS_SMSTATEEN_32, /* Smstateen RV32 only */
CSR_CLASS_SSAIA, /* Ssaia */
@@ -1082,6 +1083,9 @@ riscv_csr_address (const char *csr_name,
need_check_version = true;
extension = "smcntrpmf";
break;
+ case CSR_CLASS_SMRNMI:
+ extension = "smrnmi";
+ break;
case CSR_CLASS_SMSTATEEN_32:
is_rv32_only = true;
/* Fall through. */
@@ -645,6 +645,14 @@ Disassembly of section .text:
[ ]+[0-9a-f]+:[ ]+72159073[ ]+csrw[ ]+mcyclecfgh,a1
[ ]+[0-9a-f]+:[ ]+72202573[ ]+csrr[ ]+a0,minstretcfgh
[ ]+[0-9a-f]+:[ ]+72259073[ ]+csrw[ ]+minstretcfgh,a1
+[ ]+[0-9a-f]+:[ ]+74102573[ ]+csrr[ ]+a0,mnepc
+[ ]+[0-9a-f]+:[ ]+74159073[ ]+csrw[ ]+mnepc,a1
+[ ]+[0-9a-f]+:[ ]+74202573[ ]+csrr[ ]+a0,mncause
+[ ]+[0-9a-f]+:[ ]+74259073[ ]+csrw[ ]+mncause,a1
+[ ]+[0-9a-f]+:[ ]+74002573[ ]+csrr[ ]+a0,mnscratch
+[ ]+[0-9a-f]+:[ ]+74059073[ ]+csrw[ ]+mnscratch,a1
+[ ]+[0-9a-f]+:[ ]+74402573[ ]+csrr[ ]+a0,mnstatus
+[ ]+[0-9a-f]+:[ ]+74459073[ ]+csrw[ ]+mnstatus,a1
[ ]+[0-9a-f]+:[ ]+30c02573[ ]+csrr[ ]+a0,mstateen0
[ ]+[0-9a-f]+:[ ]+30c59073[ ]+csrw[ ]+mstateen0,a1
[ ]+[0-9a-f]+:[ ]+30d02573[ ]+csrr[ ]+a0,mstateen1
@@ -941,6 +941,22 @@
.*Info: macro .*
.*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
.*Info: macro .*
+.*Warning: invalid CSR `mnepc', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mnepc', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mncause', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mncause', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mnscratch', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mnscratch', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mnstatus', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mnstatus', needs `smrnmi' extension
+.*Info: macro .*
.*Warning: invalid CSR `mstateen0', needs `smstateen' extension
.*Info: macro .*
.*Warning: invalid CSR `mstateen0', needs `smstateen' extension
@@ -645,6 +645,14 @@ Disassembly of section .text:
[ ]+[0-9a-f]+:[ ]+72159073[ ]+csrw[ ]+mcyclecfgh,a1
[ ]+[0-9a-f]+:[ ]+72202573[ ]+csrr[ ]+a0,minstretcfgh
[ ]+[0-9a-f]+:[ ]+72259073[ ]+csrw[ ]+minstretcfgh,a1
+[ ]+[0-9a-f]+:[ ]+74102573[ ]+csrr[ ]+a0,mnepc
+[ ]+[0-9a-f]+:[ ]+74159073[ ]+csrw[ ]+mnepc,a1
+[ ]+[0-9a-f]+:[ ]+74202573[ ]+csrr[ ]+a0,mncause
+[ ]+[0-9a-f]+:[ ]+74259073[ ]+csrw[ ]+mncause,a1
+[ ]+[0-9a-f]+:[ ]+74002573[ ]+csrr[ ]+a0,mnscratch
+[ ]+[0-9a-f]+:[ ]+74059073[ ]+csrw[ ]+mnscratch,a1
+[ ]+[0-9a-f]+:[ ]+74402573[ ]+csrr[ ]+a0,mnstatus
+[ ]+[0-9a-f]+:[ ]+74459073[ ]+csrw[ ]+mnstatus,a1
[ ]+[0-9a-f]+:[ ]+30c02573[ ]+csrr[ ]+a0,mstateen0
[ ]+[0-9a-f]+:[ ]+30c59073[ ]+csrw[ ]+mstateen0,a1
[ ]+[0-9a-f]+:[ ]+30d02573[ ]+csrr[ ]+a0,mstateen1
@@ -937,6 +937,22 @@
.*Info: macro .*
.*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
.*Info: macro .*
+.*Warning: invalid CSR `mnepc', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mnepc', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mncause', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mncause', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mnscratch', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mnscratch', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mnstatus', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mnstatus', needs `smrnmi' extension
+.*Info: macro .*
.*Warning: invalid CSR `mstateen0', needs `smstateen' extension
.*Info: macro .*
.*Warning: invalid CSR `mstateen0', needs `smstateen' extension
@@ -645,6 +645,14 @@ Disassembly of section .text:
[ ]+[0-9a-f]+:[ ]+72159073[ ]+csrw[ ]+mcyclecfgh,a1
[ ]+[0-9a-f]+:[ ]+72202573[ ]+csrr[ ]+a0,minstretcfgh
[ ]+[0-9a-f]+:[ ]+72259073[ ]+csrw[ ]+minstretcfgh,a1
+[ ]+[0-9a-f]+:[ ]+74102573[ ]+csrr[ ]+a0,mnepc
+[ ]+[0-9a-f]+:[ ]+74159073[ ]+csrw[ ]+mnepc,a1
+[ ]+[0-9a-f]+:[ ]+74202573[ ]+csrr[ ]+a0,mncause
+[ ]+[0-9a-f]+:[ ]+74259073[ ]+csrw[ ]+mncause,a1
+[ ]+[0-9a-f]+:[ ]+74002573[ ]+csrr[ ]+a0,mnscratch
+[ ]+[0-9a-f]+:[ ]+74059073[ ]+csrw[ ]+mnscratch,a1
+[ ]+[0-9a-f]+:[ ]+74402573[ ]+csrr[ ]+a0,mnstatus
+[ ]+[0-9a-f]+:[ ]+74459073[ ]+csrw[ ]+mnstatus,a1
[ ]+[0-9a-f]+:[ ]+30c02573[ ]+csrr[ ]+a0,mstateen0
[ ]+[0-9a-f]+:[ ]+30c59073[ ]+csrw[ ]+mstateen0,a1
[ ]+[0-9a-f]+:[ ]+30d02573[ ]+csrr[ ]+a0,mstateen1
@@ -661,6 +661,22 @@
.*Info: macro .*
.*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
.*Info: macro .*
+.*Warning: invalid CSR `mnepc', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mnepc', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mncause', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mncause', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mnscratch', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mnscratch', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mnstatus', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mnstatus', needs `smrnmi' extension
+.*Info: macro .*
.*Warning: invalid CSR `mstateen0', needs `smstateen' extension
.*Info: macro .*
.*Warning: invalid CSR `mstateen0', needs `smstateen' extension
@@ -365,6 +365,12 @@
csr mcyclecfgh
csr minstretcfgh
+ # smrnmi
+ csr mnepc
+ csr mncause
+ csr mnscratch
+ csr mnstatus
+
# Smstateen/Ssstateen extensions
csr mstateen0
csr mstateen1
@@ -114,6 +114,7 @@ All available -march extensions for RISC-V:
smcsrind 1.0
smcntrpmf 1.0
smepmp 1.0
+ smrnmi 1.0
smstateen 1.0
ssaia 1.0
ssccptr 1.0
@@ -4074,6 +4074,11 @@
#define CSR_MINSTRETCFG 0x322
#define CSR_MCYCLECFGH 0x721
#define CSR_MINSTRETCFGH 0x722
+/* Smrnmi extension. */
+#define CSR_MNSCRATCH 0x740
+#define CSR_MNEPC 0x741
+#define CSR_MNCAUSE 0x742
+#define CSR_MNSTATUS 0x744
/* Smstateen extension */
#define CSR_MSTATEEN0 0x30c
#define CSR_MSTATEEN1 0x30d
@@ -5172,6 +5177,11 @@ DECLARE_CSR(mcyclecfg, CSR_MCYCLECFG, CSR_CLASS_SMCNTRPMF, PRIV_SPEC_CLASS_1P10,
DECLARE_CSR(minstretcfg, CSR_MINSTRETCFG, CSR_CLASS_SMCNTRPMF, PRIV_SPEC_CLASS_1P10, PRIV_SPEC_CLASS_DRAFT)
DECLARE_CSR(mcyclecfgh, CSR_MCYCLECFGH, CSR_CLASS_SMCNTRPMF_32, PRIV_SPEC_CLASS_1P10, PRIV_SPEC_CLASS_DRAFT)
DECLARE_CSR(minstretcfgh, CSR_MINSTRETCFGH, CSR_CLASS_SMCNTRPMF_32, PRIV_SPEC_CLASS_1P10, PRIV_SPEC_CLASS_DRAFT)
+/* Smrnmi extensions. */
+DECLARE_CSR(mnepc, CSR_MNEPC, CSR_CLASS_SMRNMI, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mncause, CSR_MNCAUSE, CSR_CLASS_SMRNMI, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mnscratch, CSR_MNSCRATCH, CSR_CLASS_SMRNMI, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mnstatus, CSR_MNSTATUS, CSR_CLASS_SMRNMI, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
/* Smstateen/Ssstateen extensions. */
DECLARE_CSR(mstateen0, CSR_MSTATEEN0, CSR_CLASS_SMSTATEEN, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(mstateen1, CSR_MSTATEEN1, CSR_CLASS_SMSTATEEN, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)