diff mbox series

[v2] Support Intel AVX10.2 media instructions

Message ID 20240909081811.3039376-1-haochen.jiang@intel.com
State New
Headers
Series [v2] Support Intel AVX10.2 media instructions |

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Commit Message

Jiang, Haochen Sept. 9, 2024, 8:18 a.m. UTC 
  Hi all,

This is the v2 patch for media instructions suuport for AVX10.2, with
changes in v2 and patch descrption embedded following.

Tested on x86-64-pc-linux-gnu. Ok for trunk?

Thx,
Haochen

Nit: I will rebase to the following Jan's patch after that patch's
AVX-VNNI-INT8/16 being implied by AVX10.2 part committed to trunk.

https://sourceware.org/pipermail/binutils/2024-September/136630.html

---

Changes in v2:

  - Refine testcases by using .irp s, "", s to eliminate redundancy.
    Also add blank lines between blocks.
  - Refactor vnni table part after rebasing to trunk with the
    simplification of table.
  - Do not use the wrong EXxEVexR for vdpphp%XS entry since rounding
    is not supported.

---
For vnni instructions, we extended previous VEX part using %XE
in disassembler to promote them to EVEX. We could not use this
method to vmpsadbw due to different prefix although it is a
promotion from AVX2. For assmbler part, we put the vnni table
entries with previous vnni instructions since most of them
(expect for vdpphps, which is new instruction but still vnni,
and vmpsadbw is a promotion from AVX2) are just promotion from
AVX-VNNI-INT{8,16}.

gas/Changelog:

	* testsuite/gas/i386/i386.exp: Add AVX10.2 tests.
	* testsuite/gas/i386/x86-64.exp: Ditto.
	* testsuite/gas/i386/avx10_2-256-1-intel.d: New.
	* testsuite/gas/i386/avx10_2-256-1.d: Ditto.
	* testsuite/gas/i386/avx10_2-256-1.s: Ditto.
	* testsuite/gas/i386/avx10_2-512-1-intel.d: Ditto.
	* testsuite/gas/i386/avx10_2-512-1.d: Ditto.
	* testsuite/gas/i386/avx10_2-512-1.s: Ditto.
	* testsuite/gas/i386/x86-64-avx10_2-256-1-intel.d: Ditto.
	* testsuite/gas/i386/x86-64-avx10_2-256-1.d: Ditto.
	* testsuite/gas/i386/x86-64-avx10_2-256-1.s: Ditto.
	* testsuite/gas/i386/x86-64-avx10_2-512-1-intel.d: Ditto.
	* testsuite/gas/i386/x86-64-avx10_2-512-1.d: Ditto.
	* testsuite/gas/i386/x86-64-avx10_2-512-1.s: Ditto.

opcodes/Changelog:

	* i386-dis-evex-prefix.h: Adjust PREFIX_EVEX_0F3852.
	Add PREFIX_EVEX_0F3A42_W_0.
	* i386-dis-evex-w.h: Adjust EVEX_W_0F3A42.
	* i386-dis-evex.h: Add table pass for AVX10.2
	instructions.
	* i386-dis.c: Adjust PREFIX_VEX_0F3850_W_0, PREFIX_VEX_0F3851_W_0,
	PREFIX_VEX_0F38D2_W_0 and PREFIX_VEX_0F38D3_W_0.
	* i386-opc.tbl: Add AVX10.2 instructions.
	* i386-mnem.h: Regenerated.
	* i386-tbl.h: Ditto.

Co-authored-by: Lili Cui <lili.cui@intel.com>
---
 gas/testsuite/gas/i386/avx10_2-256-1-intel.d  |  151 +++
 gas/testsuite/gas/i386/avx10_2-256-1.d        |  149 +++
 gas/testsuite/gas/i386/avx10_2-256-1.s        |  110 ++
 gas/testsuite/gas/i386/avx10_2-512-1-intel.d  |   81 ++
 gas/testsuite/gas/i386/avx10_2-512-1.d        |   79 ++
 gas/testsuite/gas/i386/avx10_2-512-1.s        |   70 ++
 gas/testsuite/gas/i386/i386.exp               |    4 +
 .../gas/i386/x86-64-avx10_2-256-1-intel.d     |  151 +++
 gas/testsuite/gas/i386/x86-64-avx10_2-256-1.d |  149 +++
 gas/testsuite/gas/i386/x86-64-avx10_2-256-1.s |  110 ++
 .../gas/i386/x86-64-avx10_2-512-1-intel.d     |   81 ++
 gas/testsuite/gas/i386/x86-64-avx10_2-512-1.d |   79 ++
 gas/testsuite/gas/i386/x86-64-avx10_2-512-1.s |   70 ++
 gas/testsuite/gas/i386/x86-64.exp             |    4 +
 opcodes/i386-dis-evex-prefix.h                |   10 +-
 opcodes/i386-dis-evex-w.h                     |    2 +-
 opcodes/i386-dis-evex.h                       |    4 +-
 opcodes/i386-dis.c                            |   25 +-
 opcodes/i386-mnem.h                           | 1043 +++++++++--------
 opcodes/i386-opc.tbl                          |   27 +-
 opcodes/i386-tbl.h                            |  497 +++++---
 21 files changed, 2189 insertions(+), 707 deletions(-)
 create mode 100644 gas/testsuite/gas/i386/avx10_2-256-1-intel.d
 create mode 100644 gas/testsuite/gas/i386/avx10_2-256-1.d
 create mode 100644 gas/testsuite/gas/i386/avx10_2-256-1.s
 create mode 100644 gas/testsuite/gas/i386/avx10_2-512-1-intel.d
 create mode 100644 gas/testsuite/gas/i386/avx10_2-512-1.d
 create mode 100644 gas/testsuite/gas/i386/avx10_2-512-1.s
 create mode 100644 gas/testsuite/gas/i386/x86-64-avx10_2-256-1-intel.d
 create mode 100644 gas/testsuite/gas/i386/x86-64-avx10_2-256-1.d
 create mode 100644 gas/testsuite/gas/i386/x86-64-avx10_2-256-1.s
 create mode 100644 gas/testsuite/gas/i386/x86-64-avx10_2-512-1-intel.d
 create mode 100644 gas/testsuite/gas/i386/x86-64-avx10_2-512-1.d
 create mode 100644 gas/testsuite/gas/i386/x86-64-avx10_2-512-1.s

Comments

Jan Beulich Sept. 11, 2024, 1:52 p.m. UTC | #1 
On 09.09.2024 10:18, Haochen Jiang wrote:
> Nit: I will rebase to the following Jan's patch after that patch's
> AVX-VNNI-INT8/16 being implied by AVX10.2 part committed to trunk.
> 
> https://sourceware.org/pipermail/binutils/2024-September/136630.html

I'm puzzled - didn't you ask that we not do this move?

> ---
> For vnni instructions, we extended previous VEX part using %XE
> in disassembler to promote them to EVEX.

Yet this doesn't look to be exercised anywhere in the testcases.

> We could not use this
> method to vmpsadbw due to different prefix although it is a
> promotion from AVX2.

I'm afraid I don't understand this. Why can't you use %XE in the new
table entry? (Of course you can't simply re-use the original one.)

> For assmbler part, we put the vnni table
> entries with previous vnni instructions since most of them

Right, that's why I made the templates for them to (also) use.

Related to this placement: Did you notice the resulting anomaly in
encodings used? Without resorting to knowledge of the internal
workings of gas, what would you predict this

	vpdpbssd	%xmm1, %xmm2, %xmm3
	vpdpbusd	%xmm1, %xmm2, %xmm3
	vpdpwssd	%xmm1, %xmm2, %xmm3
	vpdpwusd	%xmm1, %xmm2, %xmm3

assembles to (VEX vs EVEX) with your patch in place? And then the
same with e.g.

	.arch generic64
	.arch .avx10.2/256

in place ahead of the block. The patch of mine you reference above
is related to this, but it doesn't fully resolve the anomaly. I'm
still trying to think of a good solution. My expectation certainly
would be that the latest with the AVX10.2 forms added, the VEX
forms would be used by default everywhere, as that's the usual
EVEX-postdates-VEX situation. Yet part of that would be that
AVX-VNNI{,-INT8,-INT16} were formal prereqs of AVX10.2 (hence in
turn that earlier patch, as a first step in that direction).

> (expect for vdpphps, which is new instruction but still vnni,
> and vmpsadbw is a promotion from AVX2)

Sure

> are just promotion from AVX-VNNI-INT{8,16}.
>[...]
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/avx10_2-256-1-intel.d
> @@ -0,0 +1,151 @@
> +#objdump: -dw -Mintel
> +#name: i386 AVX10.2/256 media insns (Intel disassembly)
> +#source: avx10_2-256-1.s
> +
> +.*: +file format .*
> +
> +Disassembly of section \.text:
> +
> +0+ <_start>:
> +#...
> +\s*416:\s*62 f2 57 2f 50 f4\s+vpdpbssd ymm6\{k7\},ymm5,ymm4

I guess I can see why you don't use [a-f0-9]+ here, but no, that's
not nice. How about you add a label ahead of the Intel syntax block,
and then use that as "anchor"? (Similarly applicable to other tests
then.)

> --- a/opcodes/i386-opc.tbl
> +++ b/opcodes/i386-opc.tbl
> @@ -3073,26 +3073,41 @@ vpdpwssd<vnni><sat>, 0x6652|<sat:opc>, <vnni:avx>_VNNI, Modrm|Space0F38|Src1VVVV
>  
>  // {AVX512,AVX}_VNNI instructions end
>  
> -// AVX-VNNI-INT8 instructions.
> +// AVX-VNNI-INT8/AVX10.2 instructions.
> +
> +<vnni2:avx:attr:reg:mem, $y:_VNNI_INT8:Vex::, $z:10_2:Masking|Broadcast|Disp8ShiftVL:RegZMM:Dword>
>  
>  <dpb:pfx, uu:, ss:f2, su:f3>
>  
> -vpdpb<dpb>d<sat>, 0x<dpb:pfx>50|<sat:opc>, AVX_VNNI_INT8, Modrm|Vex|Space0F38|Src1VVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
> +vpdpb<dpb>d<vnni2><sat>, 0x<dpb:pfx>50|<sat:opc>, AVX<vnni2:avx>, Modrm|Space0F38|Src1VVVV|VexW0|<vnni2:attr>|CheckOperandSize|NoSuf, { RegXMM|RegYMM|<vnni2:reg>|<vnni2:mem>|Unspecified|BaseIndex, RegXMM|RegYMM|<vnni2:reg>, RegXMM|RegYMM|<vnni2:reg> }
> +
> +<vnni2>

Hmm, no, this wasn't the plan. The plan was that you'd add a single new
line re-using the existing templatization, without adding yet further one.
(It's also hard to see what the 2 and 3 in the template names are meant
to represent.)

> -// AVX-VNNI-INT8 instructions end.
> +// AVX-VNNI-INT8/AVX10.2 instructions end.

I don't think the comments should be changed this way. I'd suggest to leave
it alone. If you absolutely want to change them, wording needs to be
accurate: This is not the end of AVX10.2 insns, and on the whole this
section also isn't holding all of them.

> +// AVX10.2 media instructions.

In turn this may want to mention that some live elsewhere. I wonder anyway
if all new ones wouldn't better go together, at which point this may not be
the best place for inserting (and "media" would then also want dropping).

Also no full stop please at the end of these comments - good examples are
even visible in patch context.

> +vdpphps, 0x52, AVX10_2, Modrm|Space0F38|Src1VVVV|Masking|VexW0|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Dword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
> +vmpsadbw, 0xf342, AVX10_2, Modrm|Masking|Space0F3A|Src1VVVV|VexW0|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8, RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }

Please can you order attributes the same at the very least in templates
sitting directly next to each other? This makes it easier to spot
similarities / differences. E.g. like this (as applicable)

Modrm|Space...|VexW0|Src1VVVV|Broadcast|Masking|Disp8ShiftVL|CheckOperandSize|NoSuf

Jan
Jiang, Haochen Sept. 13, 2024, 3:21 a.m. UTC | #2 
Hi Jan,

I feel illness since Monday and did not recover till now.

I will first reply to some of your comments that I could handle
by my current low performance but at least working brain. I will reply
to the others the next week.

> From: Jan Beulich <jbeulich@suse.com>
> Sent: Wednesday, September 11, 2024 9:53 PM
> 
> On 09.09.2024 10:18, Haochen Jiang wrote:
> > Nit: I will rebase to the following Jan's patch after that patch's
> > AVX-VNNI-INT8/16 being implied by AVX10.2 part committed to trunk.
> >
> > https://sourceware.org/pipermail/binutils/2024-September/136630.html
> 
> I'm puzzled - didn't you ask that we not do this move?

Actually I am ok with the AVX10.2 imply AVX_VNNI_INT8/16 part although
the doc won't be changed. I only have objection with AVX_VNNI_INT8/16
imply AVX_VNNI. But if you think we should stick to the doc, then
none of them should be done.

> > We could not use this
> > method to vmpsadbw due to different prefix although it is a promotion
> > from AVX2.
> 
> I'm afraid I don't understand this. Why can't you use %XE in the new table entry?
> (Of course you can't simply re-use the original one.)

They are under different opcode I suppose. Maybe it could be used by
linking to the original table directly although they are different opcode.

> > --- a/opcodes/i386-opc.tbl
> > +++ b/opcodes/i386-opc.tbl
> > @@ -3073,26 +3073,41 @@ vpdpwssd<vnni><sat>, 0x6652|<sat:opc>,
> > <vnni:avx>_VNNI, Modrm|Space0F38|Src1VVVV
> >
> >  // {AVX512,AVX}_VNNI instructions end
> >
> > -// AVX-VNNI-INT8 instructions.
> > +// AVX-VNNI-INT8/AVX10.2 instructions.
> > +
> > +<vnni2:avx:attr:reg:mem, $y:_VNNI_INT8:Vex::,
> > +$z:10_2:Masking|Broadcast|Disp8ShiftVL:RegZMM:Dword>
> >
> >  <dpb:pfx, uu:, ss:f2, su:f3>
> >
> > -vpdpb<dpb>d<sat>, 0x<dpb:pfx>50|<sat:opc>, AVX_VNNI_INT8,
> > Modrm|Vex|Space0F38|Src1VVVV|VexW0|CheckOperandSize|NoSuf, {
> > RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM,
> RegXMM|RegYMM }
> > +vpdpb<dpb>d<vnni2><sat>, 0x<dpb:pfx>50|<sat:opc>, AVX<vnni2:avx>,
> >
> +Modrm|Space0F38|Src1VVVV|VexW0|<vnni2:attr>|CheckOperandSize|NoSuf, {
> > +RegXMM|RegYMM|<vnni2:reg>|<vnni2:mem>|Unspecified|BaseIndex,
> > +RegXMM|RegYMM|<vnni2:reg>, RegXMM|RegYMM|<vnni2:reg> }
> > +
> > +<vnni2>
> 
> Hmm, no, this wasn't the plan. The plan was that you'd add a single new line re-
> using the existing templatization, without adding yet further one.
> (It's also hard to see what the 2 and 3 in the template names are meant to
> represent.)

Ah... That part was done on Mondy afternoon when I start to feel dizzy. That definitely
should not be done this way.

I will reply to rest of them next week after my recovery. Sorry for the delay.

Thx,
Haochen
Jan Beulich Sept. 13, 2024, 12:48 p.m. UTC | #3 
On 13.09.2024 05:21, Jiang, Haochen wrote:
>> From: Jan Beulich <jbeulich@suse.com>
>> Sent: Wednesday, September 11, 2024 9:53 PM
>>
>> On 09.09.2024 10:18, Haochen Jiang wrote:
>>> We could not use this
>>> method to vmpsadbw due to different prefix although it is a promotion
>>> from AVX2.
>>
>> I'm afraid I don't understand this. Why can't you use %XE in the new table entry?
>> (Of course you can't simply re-use the original one.)
> 
> They are under different opcode I suppose. Maybe it could be used by
> linking to the original table directly although they are different opcode.

Hmm, as said - you can't very well re-use the existing entry, yet no
matter that you add a new one I don't see why that can't have %XE
there.

Jan
Jiang, Haochen Sept. 18, 2024, 5:48 a.m. UTC | #4 
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Wednesday, September 11, 2024 9:53 PM
> 

I am back with full health. Let me handle rest of them.

> On 09.09.2024 10:18, Haochen Jiang wrote:
> > Nit: I will rebase to the following Jan's patch after that patch's
> > AVX-VNNI-INT8/16 being implied by AVX10.2 part committed to trunk.
> >
> > https://sourceware.org/pipermail/binutils/2024-September/136630.html
> 
> I'm puzzled - didn't you ask that we not do this move?
> 
> > ---
> > For vnni instructions, we extended previous VEX part using %XE in
> > disassembler to promote them to EVEX.
> 
> Yet this doesn't look to be exercised anywhere in the testcases.
> 

Should I add some tests like {evex} vpdpbssd to make this clear?

> 
> I'm afraid I don't understand this. Why can't you use %XE in the new table
> entry? (Of course you can't simply re-use the original one.)
> 
> > For assmbler part, we put the vnni table entries with previous vnni
> > instructions since most of them
> 
> Right, that's why I made the templates for them to (also) use.
> 
> Related to this placement: Did you notice the resulting anomaly in encodings
> used? Without resorting to knowledge of the internal workings of gas, what
> would you predict this
> 
> 	vpdpbssd	%xmm1, %xmm2, %xmm3
> 	vpdpbusd	%xmm1, %xmm2, %xmm3
> 	vpdpwssd	%xmm1, %xmm2, %xmm3
> 	vpdpwusd	%xmm1, %xmm2, %xmm3
> 
> assembles to (VEX vs EVEX) with your patch in place? And then the same with
> e.g.
> 
> 	.arch generic64
> 	.arch .avx10.2/256
> 
> in place ahead of the block. The patch of mine you reference above is related
> to this, but it doesn't fully resolve the anomaly. I'm still trying to think of a
> good solution. My expectation certainly would be that the latest with the
> AVX10.2 forms added, the VEX forms would be used by default everywhere,
> as that's the usual EVEX-postdates-VEX situation. Yet part of that would be
> that AVX-VNNI{,-INT8,-INT16} were formal prereqs of AVX10.2 (hence in turn
> that earlier patch, as a first step in that direction).

That is why I am ok with part of the mentioned patch. I suppose AVX10.2 should
imply AVX-VNNI-INT8/16 here.

> 
> 
> > are just promotion from AVX-VNNI-INT{8,16}.
> >[...]
> > --- /dev/null
> > +++ b/gas/testsuite/gas/i386/avx10_2-256-1-intel.d
> > @@ -0,0 +1,151 @@
> > +#objdump: -dw -Mintel
> > +#name: i386 AVX10.2/256 media insns (Intel disassembly)
> > +#source: avx10_2-256-1.s
> > +
> > +.*: +file format .*
> > +
> > +Disassembly of section \.text:
> > +
> > +0+ <_start>:
> > +#...
> > +\s*416:\s*62 f2 57 2f 50 f4\s+vpdpbssd ymm6\{k7\},ymm5,ymm4
> 
> I guess I can see why you don't use [a-f0-9]+ here, but no, that's not nice.
> How about you add a label ahead of the Intel syntax block, and then use that
> as "anchor"? (Similarly applicable to other tests
> then.)
> 

I will add a label for that. Also for the previous ymm rounding test, with a separate
patch.

Also I will re-do the table part. Never do something when feeling not well or it will be
a total mess.

Thx,
Haochen

> 
> Jan
Jiang, Haochen Sept. 19, 2024, 5:38 a.m. UTC | #5 
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Friday, September 13, 2024 8:48 PM
> 
> On 13.09.2024 05:21, Jiang, Haochen wrote:
> >> From: Jan Beulich <jbeulich@suse.com>
> >> Sent: Wednesday, September 11, 2024 9:53 PM
> >>
> >> On 09.09.2024 10:18, Haochen Jiang wrote:
> >>> We could not use this
> >>> method to vmpsadbw due to different prefix although it is a
> >>> promotion from AVX2.
> >>
> >> I'm afraid I don't understand this. Why can't you use %XE in the new table
> entry?
> >> (Of course you can't simply re-use the original one.)
> >
> > They are under different opcode I suppose. Maybe it could be used by
> > linking to the original table directly although they are different opcode.
> 
> Hmm, as said - you can't very well re-use the existing entry, yet no matter that
> you add a new one I don't see why that can't have %XE there.

%XE should be there for {evex} prefix, but should we re-use the existing entry?

The previous entry directly used PREFIX_DATA and will not pass any table because WIG
and 66 prefix.

To re-use the entry, it seems to me that we need to add a table pass for the old one.
This won't save table pass.

Do you have some brilliant ideas?

Thx,
Haochen

> 
> Jan
Jan Beulich Sept. 23, 2024, 6:42 a.m. UTC | #6 
On 18.09.2024 07:48, Jiang, Haochen wrote:
>> From: Jan Beulich <jbeulich@suse.com>
>> Sent: Wednesday, September 11, 2024 9:53 PM
>>
>> On 09.09.2024 10:18, Haochen Jiang wrote:
>>> Nit: I will rebase to the following Jan's patch after that patch's
>>> AVX-VNNI-INT8/16 being implied by AVX10.2 part committed to trunk.
>>>
>>> https://sourceware.org/pipermail/binutils/2024-September/136630.html
>>
>> I'm puzzled - didn't you ask that we not do this move?
>>
>>> ---
>>> For vnni instructions, we extended previous VEX part using %XE in
>>> disassembler to promote them to EVEX.
>>
>> Yet this doesn't look to be exercised anywhere in the testcases.
> 
> Should I add some tests like {evex} vpdpbssd to make this clear?

Yes please.

>> I'm afraid I don't understand this. Why can't you use %XE in the new table
>> entry? (Of course you can't simply re-use the original one.)
>>
>>> For assmbler part, we put the vnni table entries with previous vnni
>>> instructions since most of them
>>
>> Right, that's why I made the templates for them to (also) use.
>>
>> Related to this placement: Did you notice the resulting anomaly in encodings
>> used? Without resorting to knowledge of the internal workings of gas, what
>> would you predict this
>>
>> 	vpdpbssd	%xmm1, %xmm2, %xmm3
>> 	vpdpbusd	%xmm1, %xmm2, %xmm3
>> 	vpdpwssd	%xmm1, %xmm2, %xmm3
>> 	vpdpwusd	%xmm1, %xmm2, %xmm3
>>
>> assembles to (VEX vs EVEX) with your patch in place? And then the same with
>> e.g.
>>
>> 	.arch generic64
>> 	.arch .avx10.2/256
>>
>> in place ahead of the block. The patch of mine you reference above is related
>> to this, but it doesn't fully resolve the anomaly. I'm still trying to think of a
>> good solution. My expectation certainly would be that the latest with the
>> AVX10.2 forms added, the VEX forms would be used by default everywhere,
>> as that's the usual EVEX-postdates-VEX situation. Yet part of that would be
>> that AVX-VNNI{,-INT8,-INT16} were formal prereqs of AVX10.2 (hence in turn
>> that earlier patch, as a first step in that direction).
> 
> That is why I am ok with part of the mentioned patch. I suppose AVX10.2 should
> imply AVX-VNNI-INT8/16 here.

And your doc folks would be willing to actually spell that out? (We're okay
without, but it would be better if it was written down.)

Jan
Jan Beulich Sept. 23, 2024, 6:43 a.m. UTC | #7 
On 19.09.2024 07:38, Jiang, Haochen wrote:
>> From: Jan Beulich <jbeulich@suse.com>
>> Sent: Friday, September 13, 2024 8:48 PM
>>
>> On 13.09.2024 05:21, Jiang, Haochen wrote:
>>>> From: Jan Beulich <jbeulich@suse.com>
>>>> Sent: Wednesday, September 11, 2024 9:53 PM
>>>>
>>>> On 09.09.2024 10:18, Haochen Jiang wrote:
>>>>> We could not use this
>>>>> method to vmpsadbw due to different prefix although it is a
>>>>> promotion from AVX2.
>>>>
>>>> I'm afraid I don't understand this. Why can't you use %XE in the new table
>> entry?
>>>> (Of course you can't simply re-use the original one.)
>>>
>>> They are under different opcode I suppose. Maybe it could be used by
>>> linking to the original table directly although they are different opcode.
>>
>> Hmm, as said - you can't very well re-use the existing entry, yet no matter that
>> you add a new one I don't see why that can't have %XE there.
> 
> %XE should be there for {evex} prefix, but should we re-use the existing entry?

No, and I'm having a hard time seeing how you would do so in a clean way.

Jan
Jiang, Haochen Sept. 23, 2024, 7:10 a.m. UTC | #8 
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Monday, September 23, 2024 2:43 PM
> 
> >
> > That is why I am ok with part of the mentioned patch. I suppose AVX10.2 should
> > imply AVX-VNNI-INT8/16 here.
> 
> And your doc folks would be willing to actually spell that out? (We're okay
> without, but it would be better if it was written down.)

They won't. They are quite conservative to make the promise that each HW with
AVX10.2 will have AVX-VNNI-INT{8,16}, although it is. But since we rarely deprecate
something and deprecating those two will be extremely weird, I suppose
the implication will be ok.

Also, for current GCC implementation, which is based on VEX encoding is always there
when there is EVEX encoding, it will lead to disaster when VEX encoding is not there。
So we will jump out internally and say no when they are trying to do so.

Thx,
Haochen

> 
> Jan
diff mbox series

Patch

diff --git a/gas/testsuite/gas/i386/avx10_2-256-1-intel.d b/gas/testsuite/gas/i386/avx10_2-256-1-intel.d
new file mode 100644
index 00000000000..acda71f0e68
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-256-1-intel.d
@@ -0,0 +1,151 @@ 
+#objdump: -dw -Mintel
+#name: i386 AVX10.2/256 media insns (Intel disassembly)
+#source: avx10_2-256-1.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+#...
+\s*416:\s*62 f2 57 2f 50 f4\s+vpdpbssd ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 57 0f 50 f4\s+vpdpbssd xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 57 2f 50 b4 f4 00 00 00 10\s+vpdpbssd ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 57 38 50 31\s+vpdpbssd ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 57 2f 50 71 7f\s+vpdpbssd ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 57 bf 50 72 80\s+vpdpbssd ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 57 0f 50 b4 f4 00 00 00 10\s+vpdpbssd xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 57 18 50 31\s+vpdpbssd xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 57 0f 50 71 7f\s+vpdpbssd xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 57 9f 50 72 80\s+vpdpbssd xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 57 2f 51 f4\s+vpdpbssds ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 57 0f 51 f4\s+vpdpbssds xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 57 2f 51 b4 f4 00 00 00 10\s+vpdpbssds ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 57 38 51 31\s+vpdpbssds ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 57 2f 51 71 7f\s+vpdpbssds ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 57 bf 51 72 80\s+vpdpbssds ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 57 0f 51 b4 f4 00 00 00 10\s+vpdpbssds xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 57 18 51 31\s+vpdpbssds xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 57 0f 51 71 7f\s+vpdpbssds xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 57 9f 51 72 80\s+vpdpbssds xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 2f 50 f4\s+vpdpbsud ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 56 0f 50 f4\s+vpdpbsud xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 56 2f 50 b4 f4 00 00 00 10\s+vpdpbsud ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 38 50 31\s+vpdpbsud ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 2f 50 71 7f\s+vpdpbsud ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 56 bf 50 72 80\s+vpdpbsud ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 0f 50 b4 f4 00 00 00 10\s+vpdpbsud xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 18 50 31\s+vpdpbsud xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 0f 50 71 7f\s+vpdpbsud xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 56 9f 50 72 80\s+vpdpbsud xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 2f 51 f4\s+vpdpbsuds ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 56 0f 51 f4\s+vpdpbsuds xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 56 2f 51 b4 f4 00 00 00 10\s+vpdpbsuds ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 38 51 31\s+vpdpbsuds ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 2f 51 71 7f\s+vpdpbsuds ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 56 bf 51 72 80\s+vpdpbsuds ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 0f 51 b4 f4 00 00 00 10\s+vpdpbsuds xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 18 51 31\s+vpdpbsuds xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 0f 51 71 7f\s+vpdpbsuds xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 56 9f 51 72 80\s+vpdpbsuds xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 2f 50 f4\s+vpdpbuud ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 54 0f 50 f4\s+vpdpbuud xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 54 2f 50 b4 f4 00 00 00 10\s+vpdpbuud ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 38 50 31\s+vpdpbuud ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 2f 50 71 7f\s+vpdpbuud ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 54 bf 50 72 80\s+vpdpbuud ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 0f 50 b4 f4 00 00 00 10\s+vpdpbuud xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 18 50 31\s+vpdpbuud xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 0f 50 71 7f\s+vpdpbuud xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 54 9f 50 72 80\s+vpdpbuud xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 2f 51 f4\s+vpdpbuuds ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 54 0f 51 f4\s+vpdpbuuds xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 54 2f 51 b4 f4 00 00 00 10\s+vpdpbuuds ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 38 51 31\s+vpdpbuuds ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 2f 51 71 7f\s+vpdpbuuds ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 54 bf 51 72 80\s+vpdpbuuds ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 0f 51 b4 f4 00 00 00 10\s+vpdpbuuds xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 18 51 31\s+vpdpbuuds xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 0f 51 71 7f\s+vpdpbuuds xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 54 9f 51 72 80\s+vpdpbuuds xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 2f d2 f4\s+vpdpwsud ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 56 0f d2 f4\s+vpdpwsud xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 56 2f d2 b4 f4 00 00 00 10\s+vpdpwsud ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 38 d2 31\s+vpdpwsud ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 2f d2 71 7f\s+vpdpwsud ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 56 bf d2 72 80\s+vpdpwsud ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 0f d2 b4 f4 00 00 00 10\s+vpdpwsud xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 18 d2 31\s+vpdpwsud xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 0f d2 71 7f\s+vpdpwsud xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 56 9f d2 72 80\s+vpdpwsud xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 2f d3 f4\s+vpdpwsuds ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 56 0f d3 f4\s+vpdpwsuds xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 56 2f d3 b4 f4 00 00 00 10\s+vpdpwsuds ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 38 d3 31\s+vpdpwsuds ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 2f d3 71 7f\s+vpdpwsuds ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 56 bf d3 72 80\s+vpdpwsuds ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 0f d3 b4 f4 00 00 00 10\s+vpdpwsuds xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 18 d3 31\s+vpdpwsuds xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 0f d3 71 7f\s+vpdpwsuds xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 56 9f d3 72 80\s+vpdpwsuds xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 55 2f d2 f4\s+vpdpwusd ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 55 0f d2 f4\s+vpdpwusd xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 55 2f d2 b4 f4 00 00 00 10\s+vpdpwusd ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 55 38 d2 31\s+vpdpwusd ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 55 2f d2 71 7f\s+vpdpwusd ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 55 bf d2 72 80\s+vpdpwusd ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 55 0f d2 b4 f4 00 00 00 10\s+vpdpwusd xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 55 18 d2 31\s+vpdpwusd xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 55 0f d2 71 7f\s+vpdpwusd xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 55 9f d2 72 80\s+vpdpwusd xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 55 2f d3 f4\s+vpdpwusds ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 55 0f d3 f4\s+vpdpwusds xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 55 2f d3 b4 f4 00 00 00 10\s+vpdpwusds ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 55 38 d3 31\s+vpdpwusds ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 55 2f d3 71 7f\s+vpdpwusds ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 55 bf d3 72 80\s+vpdpwusds ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 55 0f d3 b4 f4 00 00 00 10\s+vpdpwusds xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 55 18 d3 31\s+vpdpwusds xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 55 0f d3 71 7f\s+vpdpwusds xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 55 9f d3 72 80\s+vpdpwusds xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 2f d2 f4\s+vpdpwuud ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 54 0f d2 f4\s+vpdpwuud xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 54 2f d2 b4 f4 00 00 00 10\s+vpdpwuud ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 38 d2 31\s+vpdpwuud ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 2f d2 71 7f\s+vpdpwuud ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 54 bf d2 72 80\s+vpdpwuud ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 0f d2 b4 f4 00 00 00 10\s+vpdpwuud xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 18 d2 31\s+vpdpwuud xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 0f d2 71 7f\s+vpdpwuud xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 54 9f d2 72 80\s+vpdpwuud xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 2f d3 f4\s+vpdpwuuds ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 54 0f d3 f4\s+vpdpwuuds xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 54 2f d3 b4 f4 00 00 00 10\s+vpdpwuuds ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 38 d3 31\s+vpdpwuuds ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 2f d3 71 7f\s+vpdpwuuds ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 54 bf d3 72 80\s+vpdpwuuds ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 0f d3 b4 f4 00 00 00 10\s+vpdpwuuds xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 18 d3 31\s+vpdpwuuds xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 0f d3 71 7f\s+vpdpwuuds xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 54 9f d3 72 80\s+vpdpwuuds xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 2f 52 f4\s+vdpphps ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 54 0f 52 f4\s+vdpphps xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 54 2f 52 b4 f4 00 00 00 10\s+vdpphps ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 38 52 31\s+vdpphps ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 2f 52 71 7f\s+vdpphps ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 54 bf 52 72 80\s+vdpphps ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 0f 52 b4 f4 00 00 00 10\s+vdpphps xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 18 52 31\s+vdpphps xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 0f 52 71 7f\s+vdpphps xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 54 9f 52 72 80\s+vdpphps xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f3 56 0f 42 f4 7b\s+vmpsadbw xmm6\{k7\},xmm5,xmm4,0x7b
+\s*[a-f0-9]+:\s*62 f3 56 2f 42 f4 7b\s+vmpsadbw ymm6\{k7\},ymm5,ymm4,0x7b
+\s*[a-f0-9]+:\s*62 f3 56 2f 42 b4 f4 00 00 00 10 7b\s+vmpsadbw ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 f3 56 2f 42 31 7b\s+vmpsadbw ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\],0x7b
+\s*[a-f0-9]+:\s*62 f3 56 2f 42 71 7f 7b\s+vmpsadbw ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\],0x7b
+\s*[a-f0-9]+:\s*62 f3 56 af 42 72 80 7b\s+vmpsadbw ymm6\{k7\}\{z\},ymm5,YMMWORD PTR \[edx-0x1000\],0x7b
+\s*[a-f0-9]+:\s*62 f3 56 0f 42 b4 f4 00 00 00 10 7b\s+vmpsadbw xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 f3 56 0f 42 31 7b\s+vmpsadbw xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\],0x7b
+\s*[a-f0-9]+:\s*62 f3 56 0f 42 71 7f 7b\s+vmpsadbw xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\],0x7b
+\s*[a-f0-9]+:\s*62 f3 56 8f 42 72 80 7b\s+vmpsadbw xmm6\{k7\}\{z\},xmm5,XMMWORD PTR \[edx-0x800\],0x7b
+#pass
diff --git a/gas/testsuite/gas/i386/avx10_2-256-1.d b/gas/testsuite/gas/i386/avx10_2-256-1.d
new file mode 100644
index 00000000000..b3485e67409
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-256-1.d
@@ -0,0 +1,149 @@ 
+#objdump: -dw
+#name: i386 AVX10.2/256 media insns
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*62 f2 57 2f 50 f4\s+vpdpbssd %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 0f 50 f4\s+vpdpbssd %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 2f 50 b4 f4 00 00 00 10\s+vpdpbssd 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 38 50 31\s+vpdpbssd \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 57 2f 50 71 7f\s+vpdpbssd 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 bf 50 72 80\s+vpdpbssd -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 57 0f 50 b4 f4 00 00 00 10\s+vpdpbssd 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 18 50 31\s+vpdpbssd \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 57 0f 50 71 7f\s+vpdpbssd 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 9f 50 72 80\s+vpdpbssd -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 57 2f 51 f4\s+vpdpbssds %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 0f 51 f4\s+vpdpbssds %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 2f 51 b4 f4 00 00 00 10\s+vpdpbssds 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 38 51 31\s+vpdpbssds \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 57 2f 51 71 7f\s+vpdpbssds 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 bf 51 72 80\s+vpdpbssds -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 57 0f 51 b4 f4 00 00 00 10\s+vpdpbssds 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 18 51 31\s+vpdpbssds \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 57 0f 51 71 7f\s+vpdpbssds 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 9f 51 72 80\s+vpdpbssds -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 2f 50 f4\s+vpdpbsud %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 0f 50 f4\s+vpdpbsud %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 2f 50 b4 f4 00 00 00 10\s+vpdpbsud 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 38 50 31\s+vpdpbsud \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 2f 50 71 7f\s+vpdpbsud 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 bf 50 72 80\s+vpdpbsud -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 0f 50 b4 f4 00 00 00 10\s+vpdpbsud 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 18 50 31\s+vpdpbsud \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 0f 50 71 7f\s+vpdpbsud 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 9f 50 72 80\s+vpdpbsud -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 2f 51 f4\s+vpdpbsuds %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 0f 51 f4\s+vpdpbsuds %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 2f 51 b4 f4 00 00 00 10\s+vpdpbsuds 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 38 51 31\s+vpdpbsuds \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 2f 51 71 7f\s+vpdpbsuds 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 bf 51 72 80\s+vpdpbsuds -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 0f 51 b4 f4 00 00 00 10\s+vpdpbsuds 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 18 51 31\s+vpdpbsuds \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 0f 51 71 7f\s+vpdpbsuds 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 9f 51 72 80\s+vpdpbsuds -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 2f 50 f4\s+vpdpbuud %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 0f 50 f4\s+vpdpbuud %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 2f 50 b4 f4 00 00 00 10\s+vpdpbuud 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 38 50 31\s+vpdpbuud \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 2f 50 71 7f\s+vpdpbuud 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 bf 50 72 80\s+vpdpbuud -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 0f 50 b4 f4 00 00 00 10\s+vpdpbuud 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 18 50 31\s+vpdpbuud \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 0f 50 71 7f\s+vpdpbuud 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 9f 50 72 80\s+vpdpbuud -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 2f 51 f4\s+vpdpbuuds %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 0f 51 f4\s+vpdpbuuds %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 2f 51 b4 f4 00 00 00 10\s+vpdpbuuds 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 38 51 31\s+vpdpbuuds \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 2f 51 71 7f\s+vpdpbuuds 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 bf 51 72 80\s+vpdpbuuds -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 0f 51 b4 f4 00 00 00 10\s+vpdpbuuds 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 18 51 31\s+vpdpbuuds \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 0f 51 71 7f\s+vpdpbuuds 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 9f 51 72 80\s+vpdpbuuds -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 2f d2 f4\s+vpdpwsud %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 0f d2 f4\s+vpdpwsud %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 2f d2 b4 f4 00 00 00 10\s+vpdpwsud 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 38 d2 31\s+vpdpwsud \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 2f d2 71 7f\s+vpdpwsud 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 bf d2 72 80\s+vpdpwsud -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 0f d2 b4 f4 00 00 00 10\s+vpdpwsud 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 18 d2 31\s+vpdpwsud \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 0f d2 71 7f\s+vpdpwsud 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 9f d2 72 80\s+vpdpwsud -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 2f d3 f4\s+vpdpwsuds %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 0f d3 f4\s+vpdpwsuds %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 2f d3 b4 f4 00 00 00 10\s+vpdpwsuds 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 38 d3 31\s+vpdpwsuds \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 2f d3 71 7f\s+vpdpwsuds 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 bf d3 72 80\s+vpdpwsuds -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 0f d3 b4 f4 00 00 00 10\s+vpdpwsuds 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 18 d3 31\s+vpdpwsuds \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 0f d3 71 7f\s+vpdpwsuds 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 9f d3 72 80\s+vpdpwsuds -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 55 2f d2 f4\s+vpdpwusd %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 0f d2 f4\s+vpdpwusd %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 2f d2 b4 f4 00 00 00 10\s+vpdpwusd 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 38 d2 31\s+vpdpwusd \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 55 2f d2 71 7f\s+vpdpwusd 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 bf d2 72 80\s+vpdpwusd -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 55 0f d2 b4 f4 00 00 00 10\s+vpdpwusd 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 18 d2 31\s+vpdpwusd \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 55 0f d2 71 7f\s+vpdpwusd 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 9f d2 72 80\s+vpdpwusd -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 55 2f d3 f4\s+vpdpwusds %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 0f d3 f4\s+vpdpwusds %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 2f d3 b4 f4 00 00 00 10\s+vpdpwusds 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 38 d3 31\s+vpdpwusds \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 55 2f d3 71 7f\s+vpdpwusds 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 bf d3 72 80\s+vpdpwusds -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 55 0f d3 b4 f4 00 00 00 10\s+vpdpwusds 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 18 d3 31\s+vpdpwusds \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 55 0f d3 71 7f\s+vpdpwusds 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 9f d3 72 80\s+vpdpwusds -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 2f d2 f4\s+vpdpwuud %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 0f d2 f4\s+vpdpwuud %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 2f d2 b4 f4 00 00 00 10\s+vpdpwuud 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 38 d2 31\s+vpdpwuud \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 2f d2 71 7f\s+vpdpwuud 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 bf d2 72 80\s+vpdpwuud -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 0f d2 b4 f4 00 00 00 10\s+vpdpwuud 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 18 d2 31\s+vpdpwuud \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 0f d2 71 7f\s+vpdpwuud 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 9f d2 72 80\s+vpdpwuud -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 2f d3 f4\s+vpdpwuuds %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 0f d3 f4\s+vpdpwuuds %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 2f d3 b4 f4 00 00 00 10\s+vpdpwuuds 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 38 d3 31\s+vpdpwuuds \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 2f d3 71 7f\s+vpdpwuuds 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 bf d3 72 80\s+vpdpwuuds -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 0f d3 b4 f4 00 00 00 10\s+vpdpwuuds 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 18 d3 31\s+vpdpwuuds \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 0f d3 71 7f\s+vpdpwuuds 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 9f d3 72 80\s+vpdpwuuds -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 2f 52 f4\s+vdpphps %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 0f 52 f4\s+vdpphps %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 2f 52 b4 f4 00 00 00 10\s+vdpphps 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 38 52 31\s+vdpphps \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 2f 52 71 7f\s+vdpphps 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 bf 52 72 80\s+vdpphps -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 0f 52 b4 f4 00 00 00 10\s+vdpphps 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 18 52 31\s+vdpphps \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 0f 52 71 7f\s+vdpphps 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 9f 52 72 80\s+vdpphps -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 56 0f 42 f4 7b\s+vmpsadbw \$0x7b,%xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 56 2f 42 f4 7b\s+vmpsadbw \$0x7b,%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 56 2f 42 b4 f4 00 00 00 10 7b\s+vmpsadbw \$0x7b,0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 56 2f 42 31 7b\s+vmpsadbw \$0x7b,\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 56 2f 42 71 7f 7b\s+vmpsadbw \$0x7b,0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 56 af 42 72 80 7b\s+vmpsadbw \$0x7b,-0x1000\(%edx\),%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 56 0f 42 b4 f4 00 00 00 10 7b\s+vmpsadbw \$0x7b,0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 56 0f 42 31 7b\s+vmpsadbw \$0x7b,\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 56 0f 42 71 7f 7b\s+vmpsadbw \$0x7b,0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 56 8f 42 72 80 7b\s+vmpsadbw \$0x7b,-0x800\(%edx\),%xmm5,%xmm6\{%k7\}\{z\}
+#pass
diff --git a/gas/testsuite/gas/i386/avx10_2-256-1.s b/gas/testsuite/gas/i386/avx10_2-256-1.s
new file mode 100644
index 00000000000..cc22e5284de
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-256-1.s
@@ -0,0 +1,110 @@ 
+# Check 32bit AVX10.2/256 instructions
+
+	.arch generic32
+	.arch .avx10.2/256
+	.text
+_start:
+	.irp m, ss, su, uu
+	.irp s, "", s
+	vpdpb\m\()d\s	%ymm4, %ymm5, %ymm6{%k7}
+	vpdpb\m\()d\s	%xmm4, %xmm5, %xmm6{%k7}
+	vpdpb\m\()d\s	0x10000000(%esp, %esi, 8), %ymm5, %ymm6{%k7}
+	vpdpb\m\()d\s	(%ecx){1to8}, %ymm5, %ymm6
+	vpdpb\m\()d\s	4064(%ecx), %ymm5, %ymm6{%k7}
+	vpdpb\m\()d\s	-512(%edx){1to8}, %ymm5, %ymm6{%k7}{z}
+	vpdpb\m\()d\s	0x10000000(%esp, %esi, 8), %xmm5, %xmm6{%k7}
+	vpdpb\m\()d\s	(%ecx){1to4}, %xmm5, %xmm6
+	vpdpb\m\()d\s	2032(%ecx), %xmm5, %xmm6{%k7}
+	vpdpb\m\()d\s	-512(%edx){1to4}, %xmm5, %xmm6{%k7}{z}
+	.endr
+	.endr
+
+	.irp m, su, us, uu
+	.irp s, "", s
+	vpdpw\m\()d\s	%ymm4, %ymm5, %ymm6{%k7}
+	vpdpw\m\()d\s	%xmm4, %xmm5, %xmm6{%k7}
+	vpdpw\m\()d\s	0x10000000(%esp, %esi, 8), %ymm5, %ymm6{%k7}
+	vpdpw\m\()d\s	(%ecx){1to8}, %ymm5, %ymm6
+	vpdpw\m\()d\s	4064(%ecx), %ymm5, %ymm6{%k7}
+	vpdpw\m\()d\s	-512(%edx){1to8}, %ymm5, %ymm6{%k7}{z}
+	vpdpw\m\()d\s	0x10000000(%esp, %esi, 8), %xmm5, %xmm6{%k7}
+	vpdpw\m\()d\s	(%ecx){1to4}, %xmm5, %xmm6
+	vpdpw\m\()d\s	2032(%ecx), %xmm5, %xmm6{%k7}
+	vpdpw\m\()d\s	-512(%edx){1to4}, %xmm5, %xmm6{%k7}{z}
+	.endr
+	.endr
+
+	vdpphps	%ymm4, %ymm5, %ymm6{%k7}
+	vdpphps	%xmm4, %xmm5, %xmm6{%k7}
+	vdpphps	0x10000000(%esp, %esi, 8), %ymm5, %ymm6{%k7}
+	vdpphps	(%ecx){1to8}, %ymm5, %ymm6
+	vdpphps	4064(%ecx), %ymm5, %ymm6{%k7}
+	vdpphps	-512(%edx){1to8}, %ymm5, %ymm6{%k7}{z}
+	vdpphps	0x10000000(%esp, %esi, 8), %xmm5, %xmm6{%k7}
+	vdpphps	(%ecx){1to4}, %xmm5, %xmm6
+	vdpphps	2032(%ecx), %xmm5, %xmm6{%k7}
+	vdpphps	-512(%edx){1to4}, %xmm5, %xmm6{%k7}{z}
+
+	vmpsadbw	$123, %xmm4, %xmm5, %xmm6{%k7}
+	vmpsadbw	$123, %ymm4, %ymm5, %ymm6{%k7}
+	vmpsadbw	$123, 0x10000000(%esp, %esi, 8), %ymm5, %ymm6{%k7}
+	vmpsadbw	$123, (%ecx), %ymm5, %ymm6{%k7}
+	vmpsadbw	$123, 4064(%ecx), %ymm5, %ymm6{%k7}
+	vmpsadbw	$123, -4096(%edx), %ymm5, %ymm6{%k7}{z}
+	vmpsadbw	$123, 0x10000000(%esp, %esi, 8), %xmm5, %xmm6{%k7}
+	vmpsadbw	$123, (%ecx), %xmm5, %xmm6{%k7}
+	vmpsadbw	$123, 2032(%ecx), %xmm5, %xmm6{%k7}
+	vmpsadbw	$123, -2048(%edx), %xmm5, %xmm6{%k7}{z}
+
+	.intel_syntax noprefix
+	.irp m, ss, su, uu
+	.irp s, "", s
+	vpdpb\m\()d\s	ymm6{k7}, ymm5, ymm4
+	vpdpb\m\()d\s	xmm6{k7}, xmm5, xmm4
+	vpdpb\m\()d\s	ymm6{k7}, ymm5, YMMWORD PTR [esp+esi*8+0x10000000]
+	vpdpb\m\()d\s	ymm6, ymm5, DWORD PTR [ecx]{1to8}
+	vpdpb\m\()d\s	ymm6{k7}, ymm5, YMMWORD PTR [ecx+4064]
+	vpdpb\m\()d\s	ymm6{k7}{z}, ymm5, DWORD PTR [edx-512]{1to8}
+	vpdpb\m\()d\s	xmm6{k7}, xmm5, XMMWORD PTR [esp+esi*8+0x10000000]
+	vpdpb\m\()d\s	xmm6, xmm5, DWORD PTR [ecx]{1to4}
+	vpdpb\m\()d\s	xmm6{k7}, xmm5, XMMWORD PTR [ecx+2032]
+	vpdpb\m\()d\s	xmm6{k7}{z}, xmm5, DWORD PTR [edx-512]{1to4}
+	.endr
+	.endr
+
+	.irp m, su, us, uu
+	.irp s, "", s
+	vpdpw\m\()d\s	ymm6{k7}, ymm5, ymm4
+	vpdpw\m\()d\s	xmm6{k7}, xmm5, xmm4
+	vpdpw\m\()d\s	ymm6{k7}, ymm5, YMMWORD PTR [esp+esi*8+0x10000000]
+	vpdpw\m\()d\s	ymm6, ymm5, DWORD PTR [ecx]{1to8}
+	vpdpw\m\()d\s	ymm6{k7}, ymm5, YMMWORD PTR [ecx+4064]
+	vpdpw\m\()d\s	ymm6{k7}{z}, ymm5, DWORD PTR [edx-512]{1to8}
+	vpdpw\m\()d\s	xmm6{k7}, xmm5, XMMWORD PTR [esp+esi*8+0x10000000]
+	vpdpw\m\()d\s	xmm6, xmm5, DWORD PTR [ecx]{1to4}
+	vpdpw\m\()d\s	xmm6{k7}, xmm5, XMMWORD PTR [ecx+2032]
+	vpdpw\m\()d\s	xmm6{k7}{z}, xmm5, DWORD PTR [edx-512]{1to4}
+	.endr
+	.endr
+
+	vdpphps	ymm6{k7}, ymm5, ymm4
+	vdpphps	xmm6{k7}, xmm5, xmm4
+	vdpphps	ymm6{k7}, ymm5, YMMWORD PTR [esp+esi*8+0x10000000]
+	vdpphps	ymm6, ymm5, DWORD PTR [ecx]{1to8}
+	vdpphps	ymm6{k7}, ymm5, YMMWORD PTR [ecx+4064]
+	vdpphps	ymm6{k7}{z}, ymm5, DWORD PTR [edx-512]{1to8}
+	vdpphps	xmm6{k7}, xmm5, XMMWORD PTR [esp+esi*8+0x10000000]
+	vdpphps	xmm6, xmm5, DWORD PTR [ecx]{1to4}
+	vdpphps	xmm6{k7}, xmm5, XMMWORD PTR [ecx+2032]
+	vdpphps	xmm6{k7}{z}, xmm5, DWORD PTR [edx-512]{1to4}
+
+	vmpsadbw	xmm6{k7}, xmm5, xmm4, 123
+	vmpsadbw	ymm6{k7}, ymm5, ymm4, 123
+	vmpsadbw	ymm6{k7}, ymm5, YMMWORD PTR [esp+esi*8+0x10000000], 123
+	vmpsadbw	ymm6{k7}, ymm5, YMMWORD PTR [ecx], 123
+	vmpsadbw	ymm6{k7}, ymm5, YMMWORD PTR [ecx+4064], 123
+	vmpsadbw	ymm6{k7}{z}, ymm5, YMMWORD PTR [edx-4096], 123
+	vmpsadbw	xmm6{k7}, xmm5, XMMWORD PTR [esp+esi*8+0x10000000], 123
+	vmpsadbw	xmm6{k7}, xmm5, XMMWORD PTR [ecx], 123
+	vmpsadbw	xmm6{k7}, xmm5, XMMWORD PTR [ecx+2032], 123
+	vmpsadbw	xmm6{k7}{z}, xmm5, XMMWORD PTR [edx-2048], 123
diff --git a/gas/testsuite/gas/i386/avx10_2-512-1-intel.d b/gas/testsuite/gas/i386/avx10_2-512-1-intel.d
new file mode 100644
index 00000000000..dde02cbb4b4
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-512-1-intel.d
@@ -0,0 +1,81 @@ 
+#objdump: -dw -Mintel
+#name: i386 AVX10.2/512 media insns (Intel disassembly)
+#source: avx10_2-512-1.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+#...
+\s*20b:\s*62 f2 57 48 50 f4\s+vpdpbssd zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 57 4f 50 b4 f4 00 00 00 10\s+vpdpbssd zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 57 58 50 31\s+vpdpbssd zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 57 48 50 71 7f\s+vpdpbssd zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 57 df 50 72 80\s+vpdpbssd zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 57 48 51 f4\s+vpdpbssds zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 57 4f 51 b4 f4 00 00 00 10\s+vpdpbssds zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 57 58 51 31\s+vpdpbssds zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 57 48 51 71 7f\s+vpdpbssds zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 57 df 51 72 80\s+vpdpbssds zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 48 50 f4\s+vpdpbsud zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 56 4f 50 b4 f4 00 00 00 10\s+vpdpbsud zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 58 50 31\s+vpdpbsud zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 48 50 71 7f\s+vpdpbsud zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 56 df 50 72 80\s+vpdpbsud zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 48 51 f4\s+vpdpbsuds zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 56 4f 51 b4 f4 00 00 00 10\s+vpdpbsuds zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 58 51 31\s+vpdpbsuds zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 48 51 71 7f\s+vpdpbsuds zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 56 df 51 72 80\s+vpdpbsuds zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 48 50 f4\s+vpdpbuud zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 54 4f 50 b4 f4 00 00 00 10\s+vpdpbuud zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 58 50 31\s+vpdpbuud zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 48 50 71 7f\s+vpdpbuud zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 54 df 50 72 80\s+vpdpbuud zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 48 51 f4\s+vpdpbuuds zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 54 4f 51 b4 f4 00 00 00 10\s+vpdpbuuds zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 58 51 31\s+vpdpbuuds zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 48 51 71 7f\s+vpdpbuuds zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 54 df 51 72 80\s+vpdpbuuds zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 48 d2 f4\s+vpdpwsud zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 56 4f d2 b4 f4 00 00 00 10\s+vpdpwsud zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 58 d2 31\s+vpdpwsud zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 48 d2 71 7f\s+vpdpwsud zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 56 df d2 72 80\s+vpdpwsud zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 48 d3 f4\s+vpdpwsuds zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 56 4f d3 b4 f4 00 00 00 10\s+vpdpwsuds zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 58 d3 31\s+vpdpwsuds zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 48 d3 71 7f\s+vpdpwsuds zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 56 df d3 72 80\s+vpdpwsuds zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 55 48 d2 f4\s+vpdpwusd zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 55 4f d2 b4 f4 00 00 00 10\s+vpdpwusd zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 55 58 d2 31\s+vpdpwusd zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 55 48 d2 71 7f\s+vpdpwusd zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 55 df d2 72 80\s+vpdpwusd zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 55 48 d3 f4\s+vpdpwusds zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 55 4f d3 b4 f4 00 00 00 10\s+vpdpwusds zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 55 58 d3 31\s+vpdpwusds zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 55 48 d3 71 7f\s+vpdpwusds zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 55 df d3 72 80\s+vpdpwusds zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 48 d2 f4\s+vpdpwuud zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 54 4f d2 b4 f4 00 00 00 10\s+vpdpwuud zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 58 d2 31\s+vpdpwuud zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 48 d2 71 7f\s+vpdpwuud zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 54 df d2 72 80\s+vpdpwuud zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 48 d3 f4\s+vpdpwuuds zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 54 4f d3 b4 f4 00 00 00 10\s+vpdpwuuds zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 58 d3 31\s+vpdpwuuds zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 48 d3 71 7f\s+vpdpwuuds zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 54 df d3 72 80\s+vpdpwuuds zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 48 52 f4\s+vdpphps zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 54 4f 52 b4 f4 00 00 00 10\s+vdpphps zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 58 52 31\s+vdpphps zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 48 52 71 7f\s+vdpphps zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 54 df 52 72 80\s+vdpphps zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f3 56 48 42 f4 7b\s+vmpsadbw zmm6,zmm5,zmm4,0x7b
+\s*[a-f0-9]+:\s*62 f3 56 4f 42 b4 f4 00 00 00 10 7b\s+vmpsadbw zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 f3 56 48 42 31 7b\s+vmpsadbw zmm6,zmm5,ZMMWORD PTR \[ecx\],0x7b
+\s*[a-f0-9]+:\s*62 f3 56 48 42 71 7f 7b\s+vmpsadbw zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\],0x7b
+\s*[a-f0-9]+:\s*62 f3 56 cf 42 72 80 7b\s+vmpsadbw zmm6\{k7\}\{z\},zmm5,ZMMWORD PTR \[edx-0x2000\],0x7b
+#pass
diff --git a/gas/testsuite/gas/i386/avx10_2-512-1.d b/gas/testsuite/gas/i386/avx10_2-512-1.d
new file mode 100644
index 00000000000..746c77a9785
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-512-1.d
@@ -0,0 +1,79 @@ 
+#objdump: -dw
+#name: i386 AVX10.2/512 media insns
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*62 f2 57 48 50 f4\s+vpdpbssd %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 57 4f 50 b4 f4 00 00 00 10\s+vpdpbssd 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 58 50 31\s+vpdpbssd \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 57 48 50 71 7f\s+vpdpbssd 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 57 df 50 72 80\s+vpdpbssd -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 57 48 51 f4\s+vpdpbssds %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 57 4f 51 b4 f4 00 00 00 10\s+vpdpbssds 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 58 51 31\s+vpdpbssds \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 57 48 51 71 7f\s+vpdpbssds 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 57 df 51 72 80\s+vpdpbssds -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 48 50 f4\s+vpdpbsud %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 4f 50 b4 f4 00 00 00 10\s+vpdpbsud 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 58 50 31\s+vpdpbsud \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 48 50 71 7f\s+vpdpbsud 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 df 50 72 80\s+vpdpbsud -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 48 51 f4\s+vpdpbsuds %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 4f 51 b4 f4 00 00 00 10\s+vpdpbsuds 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 58 51 31\s+vpdpbsuds \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 48 51 71 7f\s+vpdpbsuds 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 df 51 72 80\s+vpdpbsuds -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 48 50 f4\s+vpdpbuud %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 4f 50 b4 f4 00 00 00 10\s+vpdpbuud 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 58 50 31\s+vpdpbuud \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 48 50 71 7f\s+vpdpbuud 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 df 50 72 80\s+vpdpbuud -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 48 51 f4\s+vpdpbuuds %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 4f 51 b4 f4 00 00 00 10\s+vpdpbuuds 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 58 51 31\s+vpdpbuuds \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 48 51 71 7f\s+vpdpbuuds 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 df 51 72 80\s+vpdpbuuds -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 48 d2 f4\s+vpdpwsud %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 4f d2 b4 f4 00 00 00 10\s+vpdpwsud 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 58 d2 31\s+vpdpwsud \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 48 d2 71 7f\s+vpdpwsud 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 df d2 72 80\s+vpdpwsud -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 48 d3 f4\s+vpdpwsuds %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 4f d3 b4 f4 00 00 00 10\s+vpdpwsuds 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 58 d3 31\s+vpdpwsuds \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 48 d3 71 7f\s+vpdpwsuds 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 df d3 72 80\s+vpdpwsuds -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 55 48 d2 f4\s+vpdpwusd %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 55 4f d2 b4 f4 00 00 00 10\s+vpdpwusd 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 58 d2 31\s+vpdpwusd \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 55 48 d2 71 7f\s+vpdpwusd 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 55 df d2 72 80\s+vpdpwusd -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 55 48 d3 f4\s+vpdpwusds %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 55 4f d3 b4 f4 00 00 00 10\s+vpdpwusds 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 58 d3 31\s+vpdpwusds \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 55 48 d3 71 7f\s+vpdpwusds 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 55 df d3 72 80\s+vpdpwusds -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 48 d2 f4\s+vpdpwuud %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 4f d2 b4 f4 00 00 00 10\s+vpdpwuud 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 58 d2 31\s+vpdpwuud \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 48 d2 71 7f\s+vpdpwuud 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 df d2 72 80\s+vpdpwuud -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 48 d3 f4\s+vpdpwuuds %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 4f d3 b4 f4 00 00 00 10\s+vpdpwuuds 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 58 d3 31\s+vpdpwuuds \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 48 d3 71 7f\s+vpdpwuuds 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 df d3 72 80\s+vpdpwuuds -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 48 52 f4\s+vdpphps %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 4f 52 b4 f4 00 00 00 10\s+vdpphps 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 58 52 31\s+vdpphps \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 48 52 71 7f\s+vdpphps 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 df 52 72 80\s+vdpphps -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 56 48 42 f4 7b\s+vmpsadbw \$0x7b,%zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f3 56 4f 42 b4 f4 00 00 00 10 7b\s+vmpsadbw \$0x7b,0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 56 48 42 31 7b\s+vmpsadbw \$0x7b,\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f3 56 48 42 71 7f 7b\s+vmpsadbw \$0x7b,0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f3 56 cf 42 72 80 7b\s+vmpsadbw \$0x7b,-0x2000\(%edx\),%zmm5,%zmm6\{%k7\}\{z\}
+#pass
diff --git a/gas/testsuite/gas/i386/avx10_2-512-1.s b/gas/testsuite/gas/i386/avx10_2-512-1.s
new file mode 100644
index 00000000000..4c3f7d5f21a
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-512-1.s
@@ -0,0 +1,70 @@ 
+# Check 32bit AVX10.2/512 instructions
+
+	.arch generic32
+	.arch .avx10.2/512
+	.text
+_start:
+	.irp m, ss, su, uu
+	.irp s, "", s
+	vpdpb\m\()d\s	%zmm4, %zmm5, %zmm6
+	vpdpb\m\()d\s	0x10000000(%esp, %esi, 8), %zmm5, %zmm6{%k7}
+	vpdpb\m\()d\s	(%ecx){1to16}, %zmm5, %zmm6
+	vpdpb\m\()d\s	8128(%ecx), %zmm5, %zmm6
+	vpdpb\m\()d\s	-512(%edx){1to16}, %zmm5, %zmm6{%k7}{z}
+	.endr
+	.endr
+
+	.irp m, su, us, uu
+	.irp s, "", s
+	vpdpw\m\()d\s	%zmm4, %zmm5, %zmm6
+	vpdpw\m\()d\s	0x10000000(%esp, %esi, 8), %zmm5, %zmm6{%k7}
+	vpdpw\m\()d\s	(%ecx){1to16}, %zmm5, %zmm6
+	vpdpw\m\()d\s	8128(%ecx), %zmm5, %zmm6
+	vpdpw\m\()d\s	-512(%edx){1to16}, %zmm5, %zmm6{%k7}{z}
+	.endr
+	.endr
+
+	vdpphps	%zmm4, %zmm5, %zmm6
+	vdpphps	0x10000000(%esp, %esi, 8), %zmm5, %zmm6{%k7}
+	vdpphps	(%ecx){1to16}, %zmm5, %zmm6
+	vdpphps	8128(%ecx), %zmm5, %zmm6
+	vdpphps	-512(%edx){1to16}, %zmm5, %zmm6{%k7}{z}
+
+	vmpsadbw	$123, %zmm4, %zmm5, %zmm6
+	vmpsadbw	$123, 0x10000000(%esp, %esi, 8), %zmm5, %zmm6{%k7}
+	vmpsadbw	$123, (%ecx), %zmm5, %zmm6
+	vmpsadbw	$123, 8128(%ecx), %zmm5, %zmm6
+	vmpsadbw	$123, -8192(%edx), %zmm5, %zmm6{%k7}{z}
+
+	.intel_syntax noprefix
+	.irp m, ss, su, uu
+	.irp s, "", s
+	vpdpb\m\()d\s	zmm6, zmm5, zmm4
+	vpdpb\m\()d\s	zmm6{k7}, zmm5, ZMMWORD PTR [esp+esi*8+0x10000000]
+	vpdpb\m\()d\s	zmm6, zmm5, DWORD PTR [ecx]{1to16}
+	vpdpb\m\()d\s	zmm6, zmm5, ZMMWORD PTR [ecx+8128]
+	vpdpb\m\()d\s	zmm6{k7}{z}, zmm5, DWORD PTR [edx-512]{1to16}
+	.endr
+	.endr
+
+	.irp m, su, us, uu
+	.irp s, "", s
+	vpdpw\m\()d\s	zmm6, zmm5, zmm4
+	vpdpw\m\()d\s	zmm6{k7}, zmm5, ZMMWORD PTR [esp+esi*8+0x10000000]
+	vpdpw\m\()d\s	zmm6, zmm5, DWORD PTR [ecx]{1to16}
+	vpdpw\m\()d\s	zmm6, zmm5, ZMMWORD PTR [ecx+8128]
+	vpdpw\m\()d\s	zmm6{k7}{z}, zmm5, DWORD PTR [edx-512]{1to16}
+	.endr
+	.endr
+
+	vdpphps	zmm6, zmm5, zmm4
+	vdpphps	zmm6{k7}, zmm5, ZMMWORD PTR [esp+esi*8+0x10000000]
+	vdpphps	zmm6, zmm5, DWORD PTR [ecx]{1to16}
+	vdpphps	zmm6, zmm5, ZMMWORD PTR [ecx+8128]
+	vdpphps	zmm6{k7}{z}, zmm5, DWORD PTR [edx-512]{1to16}
+
+	vmpsadbw	zmm6, zmm5, zmm4, 123
+	vmpsadbw	zmm6{k7}, zmm5, ZMMWORD PTR [esp+esi*8+0x10000000], 123
+	vmpsadbw	zmm6, zmm5, ZMMWORD PTR [ecx], 123
+	vmpsadbw	zmm6, zmm5, ZMMWORD PTR [ecx+8128], 123
+	vmpsadbw	zmm6{k7}{z}, zmm5, ZMMWORD PTR [edx-8192], 123
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 75ad061b32c..ca959f08300 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -522,6 +522,10 @@  if [gas_32_check] then {
     run_dump_test "avx10_2-rounding"
     run_dump_test "avx10_2-rounding-intel"
     run_list_test "avx10_2-rounding-inval"
+    run_dump_test "avx10_2-512-1"
+    run_dump_test "avx10_2-512-1-intel"
+    run_dump_test "avx10_2-256-1"
+    run_dump_test "avx10_2-256-1-intel"
     run_list_test "sg"
     run_dump_test "clzero"
     run_dump_test "invlpgb"
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-256-1-intel.d b/gas/testsuite/gas/i386/x86-64-avx10_2-256-1-intel.d
new file mode 100644
index 00000000000..1717b546120
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-256-1-intel.d
@@ -0,0 +1,151 @@ 
+#objdump: -dw -Mintel
+#name: x86_64 AVX10.2/256 media insns (Intel disassembly)
+#source: x86-64-avx10_2-256-1.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+#...
+\s*416:\s*62 02 17 20 50 f4\s+vpdpbssd ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 17 00 50 f4\s+vpdpbssd xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 17 27 50 b4 f5 00 00 00 10\s+vpdpbssd ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 17 30 50 31\s+vpdpbssd ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 17 20 50 71 7f\s+vpdpbssd ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 17 b7 50 72 80\s+vpdpbssd ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 17 07 50 b4 f5 00 00 00 10\s+vpdpbssd xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 17 10 50 31\s+vpdpbssd xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 17 00 50 71 7f\s+vpdpbssd xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 17 97 50 72 80\s+vpdpbssd xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 17 20 51 f4\s+vpdpbssds ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 17 00 51 f4\s+vpdpbssds xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 17 27 51 b4 f5 00 00 00 10\s+vpdpbssds ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 17 30 51 31\s+vpdpbssds ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 17 20 51 71 7f\s+vpdpbssds ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 17 b7 51 72 80\s+vpdpbssds ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 17 07 51 b4 f5 00 00 00 10\s+vpdpbssds xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 17 10 51 31\s+vpdpbssds xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 17 00 51 71 7f\s+vpdpbssds xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 17 97 51 72 80\s+vpdpbssds xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 16 20 50 f4\s+vpdpbsud ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 16 00 50 f4\s+vpdpbsud xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 16 27 50 b4 f5 00 00 00 10\s+vpdpbsud ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 30 50 31\s+vpdpbsud ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 20 50 71 7f\s+vpdpbsud ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 16 b7 50 72 80\s+vpdpbsud ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 16 07 50 b4 f5 00 00 00 10\s+vpdpbsud xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 10 50 31\s+vpdpbsud xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 00 50 71 7f\s+vpdpbsud xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 16 97 50 72 80\s+vpdpbsud xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 16 20 51 f4\s+vpdpbsuds ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 16 00 51 f4\s+vpdpbsuds xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 16 27 51 b4 f5 00 00 00 10\s+vpdpbsuds ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 30 51 31\s+vpdpbsuds ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 20 51 71 7f\s+vpdpbsuds ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 16 b7 51 72 80\s+vpdpbsuds ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 16 07 51 b4 f5 00 00 00 10\s+vpdpbsuds xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 10 51 31\s+vpdpbsuds xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 00 51 71 7f\s+vpdpbsuds xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 16 97 51 72 80\s+vpdpbsuds xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 14 20 50 f4\s+vpdpbuud ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 14 00 50 f4\s+vpdpbuud xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 14 27 50 b4 f5 00 00 00 10\s+vpdpbuud ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 30 50 31\s+vpdpbuud ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 20 50 71 7f\s+vpdpbuud ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 14 b7 50 72 80\s+vpdpbuud ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 14 07 50 b4 f5 00 00 00 10\s+vpdpbuud xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 10 50 31\s+vpdpbuud xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 00 50 71 7f\s+vpdpbuud xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 14 97 50 72 80\s+vpdpbuud xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 14 20 51 f4\s+vpdpbuuds ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 14 00 51 f4\s+vpdpbuuds xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 14 27 51 b4 f5 00 00 00 10\s+vpdpbuuds ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 30 51 31\s+vpdpbuuds ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 20 51 71 7f\s+vpdpbuuds ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 14 b7 51 72 80\s+vpdpbuuds ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 14 07 51 b4 f5 00 00 00 10\s+vpdpbuuds xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 10 51 31\s+vpdpbuuds xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 00 51 71 7f\s+vpdpbuuds xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 14 97 51 72 80\s+vpdpbuuds xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 16 20 d2 f4\s+vpdpwsud ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 16 00 d2 f4\s+vpdpwsud xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 16 27 d2 b4 f5 00 00 00 10\s+vpdpwsud ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 30 d2 31\s+vpdpwsud ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 20 d2 71 7f\s+vpdpwsud ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 16 b7 d2 72 80\s+vpdpwsud ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 16 07 d2 b4 f5 00 00 00 10\s+vpdpwsud xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 10 d2 31\s+vpdpwsud xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 00 d2 71 7f\s+vpdpwsud xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 16 97 d2 72 80\s+vpdpwsud xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 16 20 d3 f4\s+vpdpwsuds ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 16 00 d3 f4\s+vpdpwsuds xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 16 27 d3 b4 f5 00 00 00 10\s+vpdpwsuds ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 30 d3 31\s+vpdpwsuds ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 20 d3 71 7f\s+vpdpwsuds ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 16 b7 d3 72 80\s+vpdpwsuds ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 16 07 d3 b4 f5 00 00 00 10\s+vpdpwsuds xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 10 d3 31\s+vpdpwsuds xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 00 d3 71 7f\s+vpdpwsuds xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 16 97 d3 72 80\s+vpdpwsuds xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 15 20 d2 f4\s+vpdpwusd ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 15 00 d2 f4\s+vpdpwusd xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 15 27 d2 b4 f5 00 00 00 10\s+vpdpwusd ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 15 30 d2 31\s+vpdpwusd ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 15 20 d2 71 7f\s+vpdpwusd ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 15 b7 d2 72 80\s+vpdpwusd ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 15 07 d2 b4 f5 00 00 00 10\s+vpdpwusd xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 15 10 d2 31\s+vpdpwusd xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 15 00 d2 71 7f\s+vpdpwusd xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 15 97 d2 72 80\s+vpdpwusd xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 15 20 d3 f4\s+vpdpwusds ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 15 00 d3 f4\s+vpdpwusds xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 15 27 d3 b4 f5 00 00 00 10\s+vpdpwusds ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 15 30 d3 31\s+vpdpwusds ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 15 20 d3 71 7f\s+vpdpwusds ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 15 b7 d3 72 80\s+vpdpwusds ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 15 07 d3 b4 f5 00 00 00 10\s+vpdpwusds xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 15 10 d3 31\s+vpdpwusds xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 15 00 d3 71 7f\s+vpdpwusds xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 15 97 d3 72 80\s+vpdpwusds xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 14 20 d2 f4\s+vpdpwuud ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 14 00 d2 f4\s+vpdpwuud xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 14 27 d2 b4 f5 00 00 00 10\s+vpdpwuud ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 30 d2 31\s+vpdpwuud ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 20 d2 71 7f\s+vpdpwuud ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 14 b7 d2 72 80\s+vpdpwuud ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 14 07 d2 b4 f5 00 00 00 10\s+vpdpwuud xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 10 d2 31\s+vpdpwuud xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 00 d2 71 7f\s+vpdpwuud xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 14 97 d2 72 80\s+vpdpwuud xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 14 20 d3 f4\s+vpdpwuuds ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 14 00 d3 f4\s+vpdpwuuds xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 14 27 d3 b4 f5 00 00 00 10\s+vpdpwuuds ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 30 d3 31\s+vpdpwuuds ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 20 d3 71 7f\s+vpdpwuuds ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 14 b7 d3 72 80\s+vpdpwuuds ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 14 07 d3 b4 f5 00 00 00 10\s+vpdpwuuds xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 10 d3 31\s+vpdpwuuds xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 00 d3 71 7f\s+vpdpwuuds xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 14 97 d3 72 80\s+vpdpwuuds xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 14 20 52 f4\s+vdpphps ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 14 00 52 f4\s+vdpphps xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 14 27 52 b4 f5 00 00 00 10\s+vdpphps ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 30 52 31\s+vdpphps ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 20 52 71 7f\s+vdpphps ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 14 b7 52 72 80\s+vdpphps ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 14 07 52 b4 f5 00 00 00 10\s+vdpphps xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 10 52 31\s+vdpphps xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 00 52 71 7f\s+vdpphps xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 14 97 52 72 80\s+vdpphps xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 03 16 00 42 f4 7b\s+vmpsadbw xmm30,xmm29,xmm28,0x7b
+\s*[a-f0-9]+:\s*62 03 16 20 42 f4 7b\s+vmpsadbw ymm30,ymm29,ymm28,0x7b
+\s*[a-f0-9]+:\s*62 23 16 27 42 b4 f5 00 00 00 10 7b\s+vmpsadbw ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 43 16 20 42 31 7b\s+vmpsadbw ymm30,ymm29,YMMWORD PTR \[r9\],0x7b
+\s*[a-f0-9]+:\s*62 63 16 20 42 71 7f 7b\s+vmpsadbw ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\],0x7b
+\s*[a-f0-9]+:\s*62 63 16 a7 42 72 80 7b\s+vmpsadbw ymm30\{k7\}\{z\},ymm29,YMMWORD PTR \[rdx-0x1000\],0x7b
+\s*[a-f0-9]+:\s*62 23 16 07 42 b4 f5 00 00 00 10 7b\s+vmpsadbw xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 43 16 00 42 31 7b\s+vmpsadbw xmm30,xmm29,XMMWORD PTR \[r9\],0x7b
+\s*[a-f0-9]+:\s*62 63 16 00 42 71 7f 7b\s+vmpsadbw xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\],0x7b
+\s*[a-f0-9]+:\s*62 63 16 87 42 72 80 7b\s+vmpsadbw xmm30\{k7\}\{z\},xmm29,XMMWORD PTR \[rdx-0x800\],0x7b
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-256-1.d b/gas/testsuite/gas/i386/x86-64-avx10_2-256-1.d
new file mode 100644
index 00000000000..a512a53d0b2
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-256-1.d
@@ -0,0 +1,149 @@ 
+#objdump: -dw
+#name: x86_64 AVX10.2/256 media insns
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*62 02 17 20 50 f4\s+vpdpbssd %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 17 00 50 f4\s+vpdpbssd %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 17 27 50 b4 f5 00 00 00 10\s+vpdpbssd 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 17 30 50 31\s+vpdpbssd \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 17 20 50 71 7f\s+vpdpbssd 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 17 b7 50 72 80\s+vpdpbssd -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 17 07 50 b4 f5 00 00 00 10\s+vpdpbssd 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 17 10 50 31\s+vpdpbssd \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 17 00 50 71 7f\s+vpdpbssd 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 17 97 50 72 80\s+vpdpbssd -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 17 20 51 f4\s+vpdpbssds %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 17 00 51 f4\s+vpdpbssds %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 17 27 51 b4 f5 00 00 00 10\s+vpdpbssds 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 17 30 51 31\s+vpdpbssds \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 17 20 51 71 7f\s+vpdpbssds 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 17 b7 51 72 80\s+vpdpbssds -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 17 07 51 b4 f5 00 00 00 10\s+vpdpbssds 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 17 10 51 31\s+vpdpbssds \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 17 00 51 71 7f\s+vpdpbssds 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 17 97 51 72 80\s+vpdpbssds -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 16 20 50 f4\s+vpdpbsud %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 16 00 50 f4\s+vpdpbsud %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 16 27 50 b4 f5 00 00 00 10\s+vpdpbsud 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 30 50 31\s+vpdpbsud \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 16 20 50 71 7f\s+vpdpbsud 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 16 b7 50 72 80\s+vpdpbsud -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 16 07 50 b4 f5 00 00 00 10\s+vpdpbsud 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 10 50 31\s+vpdpbsud \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 16 00 50 71 7f\s+vpdpbsud 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 16 97 50 72 80\s+vpdpbsud -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 16 20 51 f4\s+vpdpbsuds %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 16 00 51 f4\s+vpdpbsuds %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 16 27 51 b4 f5 00 00 00 10\s+vpdpbsuds 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 30 51 31\s+vpdpbsuds \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 16 20 51 71 7f\s+vpdpbsuds 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 16 b7 51 72 80\s+vpdpbsuds -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 16 07 51 b4 f5 00 00 00 10\s+vpdpbsuds 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 10 51 31\s+vpdpbsuds \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 16 00 51 71 7f\s+vpdpbsuds 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 16 97 51 72 80\s+vpdpbsuds -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 14 20 50 f4\s+vpdpbuud %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 14 00 50 f4\s+vpdpbuud %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 14 27 50 b4 f5 00 00 00 10\s+vpdpbuud 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 30 50 31\s+vpdpbuud \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 14 20 50 71 7f\s+vpdpbuud 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 14 b7 50 72 80\s+vpdpbuud -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 14 07 50 b4 f5 00 00 00 10\s+vpdpbuud 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 10 50 31\s+vpdpbuud \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 14 00 50 71 7f\s+vpdpbuud 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 14 97 50 72 80\s+vpdpbuud -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 14 20 51 f4\s+vpdpbuuds %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 14 00 51 f4\s+vpdpbuuds %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 14 27 51 b4 f5 00 00 00 10\s+vpdpbuuds 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 30 51 31\s+vpdpbuuds \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 14 20 51 71 7f\s+vpdpbuuds 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 14 b7 51 72 80\s+vpdpbuuds -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 14 07 51 b4 f5 00 00 00 10\s+vpdpbuuds 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 10 51 31\s+vpdpbuuds \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 14 00 51 71 7f\s+vpdpbuuds 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 14 97 51 72 80\s+vpdpbuuds -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 16 20 d2 f4\s+vpdpwsud %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 16 00 d2 f4\s+vpdpwsud %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 16 27 d2 b4 f5 00 00 00 10\s+vpdpwsud 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 30 d2 31\s+vpdpwsud \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 16 20 d2 71 7f\s+vpdpwsud 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 16 b7 d2 72 80\s+vpdpwsud -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 16 07 d2 b4 f5 00 00 00 10\s+vpdpwsud 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 10 d2 31\s+vpdpwsud \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 16 00 d2 71 7f\s+vpdpwsud 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 16 97 d2 72 80\s+vpdpwsud -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 16 20 d3 f4\s+vpdpwsuds %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 16 00 d3 f4\s+vpdpwsuds %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 16 27 d3 b4 f5 00 00 00 10\s+vpdpwsuds 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 30 d3 31\s+vpdpwsuds \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 16 20 d3 71 7f\s+vpdpwsuds 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 16 b7 d3 72 80\s+vpdpwsuds -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 16 07 d3 b4 f5 00 00 00 10\s+vpdpwsuds 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 10 d3 31\s+vpdpwsuds \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 16 00 d3 71 7f\s+vpdpwsuds 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 16 97 d3 72 80\s+vpdpwsuds -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 15 20 d2 f4\s+vpdpwusd %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 15 00 d2 f4\s+vpdpwusd %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 15 27 d2 b4 f5 00 00 00 10\s+vpdpwusd 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 15 30 d2 31\s+vpdpwusd \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 15 20 d2 71 7f\s+vpdpwusd 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 15 b7 d2 72 80\s+vpdpwusd -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 15 07 d2 b4 f5 00 00 00 10\s+vpdpwusd 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 15 10 d2 31\s+vpdpwusd \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 15 00 d2 71 7f\s+vpdpwusd 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 15 97 d2 72 80\s+vpdpwusd -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 15 20 d3 f4\s+vpdpwusds %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 15 00 d3 f4\s+vpdpwusds %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 15 27 d3 b4 f5 00 00 00 10\s+vpdpwusds 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 15 30 d3 31\s+vpdpwusds \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 15 20 d3 71 7f\s+vpdpwusds 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 15 b7 d3 72 80\s+vpdpwusds -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 15 07 d3 b4 f5 00 00 00 10\s+vpdpwusds 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 15 10 d3 31\s+vpdpwusds \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 15 00 d3 71 7f\s+vpdpwusds 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 15 97 d3 72 80\s+vpdpwusds -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 14 20 d2 f4\s+vpdpwuud %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 14 00 d2 f4\s+vpdpwuud %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 14 27 d2 b4 f5 00 00 00 10\s+vpdpwuud 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 30 d2 31\s+vpdpwuud \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 14 20 d2 71 7f\s+vpdpwuud 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 14 b7 d2 72 80\s+vpdpwuud -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 14 07 d2 b4 f5 00 00 00 10\s+vpdpwuud 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 10 d2 31\s+vpdpwuud \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 14 00 d2 71 7f\s+vpdpwuud 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 14 97 d2 72 80\s+vpdpwuud -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 14 20 d3 f4\s+vpdpwuuds %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 14 00 d3 f4\s+vpdpwuuds %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 14 27 d3 b4 f5 00 00 00 10\s+vpdpwuuds 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 30 d3 31\s+vpdpwuuds \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 14 20 d3 71 7f\s+vpdpwuuds 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 14 b7 d3 72 80\s+vpdpwuuds -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 14 07 d3 b4 f5 00 00 00 10\s+vpdpwuuds 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 10 d3 31\s+vpdpwuuds \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 14 00 d3 71 7f\s+vpdpwuuds 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 14 97 d3 72 80\s+vpdpwuuds -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 14 20 52 f4\s+vdpphps %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 14 00 52 f4\s+vdpphps %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 14 27 52 b4 f5 00 00 00 10\s+vdpphps 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 30 52 31\s+vdpphps \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 14 20 52 71 7f\s+vdpphps 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 14 b7 52 72 80\s+vdpphps -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 14 07 52 b4 f5 00 00 00 10\s+vdpphps 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 10 52 31\s+vdpphps \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 14 00 52 71 7f\s+vdpphps 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 14 97 52 72 80\s+vdpphps -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 16 00 42 f4 7b\s+vmpsadbw \$0x7b,%xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 03 16 20 42 f4 7b\s+vmpsadbw \$0x7b,%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 23 16 27 42 b4 f5 00 00 00 10 7b\s+vmpsadbw \$0x7b,0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 43 16 20 42 31 7b\s+vmpsadbw \$0x7b,\(%r9\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 63 16 20 42 71 7f 7b\s+vmpsadbw \$0x7b,0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 63 16 a7 42 72 80 7b\s+vmpsadbw \$0x7b,-0x1000\(%rdx\),%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 23 16 07 42 b4 f5 00 00 00 10 7b\s+vmpsadbw \$0x7b,0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 43 16 00 42 31 7b\s+vmpsadbw \$0x7b,\(%r9\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 63 16 00 42 71 7f 7b\s+vmpsadbw \$0x7b,0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 63 16 87 42 72 80 7b\s+vmpsadbw \$0x7b,-0x800\(%rdx\),%xmm29,%xmm30\{%k7\}\{z\}
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-256-1.s b/gas/testsuite/gas/i386/x86-64-avx10_2-256-1.s
new file mode 100644
index 00000000000..1158ee7d7df
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-256-1.s
@@ -0,0 +1,110 @@ 
+# Check 64bit AVX10.2/256 instructions
+
+	.arch generic64
+	.arch .avx10.2/256
+	.text
+_start:
+	.irp m, ss, su, uu
+	.irp s, "", s
+	vpdpb\m\()d\s	%ymm28, %ymm29, %ymm30
+	vpdpb\m\()d\s	%xmm28, %xmm29, %xmm30
+	vpdpb\m\()d\s	0x10000000(%rbp, %r14, 8), %ymm29, %ymm30{%k7}
+	vpdpb\m\()d\s	(%r9){1to8}, %ymm29, %ymm30
+	vpdpb\m\()d\s	4064(%rcx), %ymm29, %ymm30
+	vpdpb\m\()d\s	-512(%rdx){1to8}, %ymm29, %ymm30{%k7}{z}
+	vpdpb\m\()d\s	0x10000000(%rbp, %r14, 8), %xmm29, %xmm30{%k7}
+	vpdpb\m\()d\s	(%r9){1to4}, %xmm29, %xmm30
+	vpdpb\m\()d\s	2032(%rcx), %xmm29, %xmm30
+	vpdpb\m\()d\s	-512(%rdx){1to4}, %xmm29, %xmm30{%k7}{z}
+	.endr
+	.endr
+
+	.irp m, su, us, uu
+	.irp s, "", s
+	vpdpw\m\()d\s	%ymm28, %ymm29, %ymm30
+	vpdpw\m\()d\s	%xmm28, %xmm29, %xmm30
+	vpdpw\m\()d\s	0x10000000(%rbp, %r14, 8), %ymm29, %ymm30{%k7}
+	vpdpw\m\()d\s	(%r9){1to8}, %ymm29, %ymm30
+	vpdpw\m\()d\s	4064(%rcx), %ymm29, %ymm30
+	vpdpw\m\()d\s	-512(%rdx){1to8}, %ymm29, %ymm30{%k7}{z}
+	vpdpw\m\()d\s	0x10000000(%rbp, %r14, 8), %xmm29, %xmm30{%k7}
+	vpdpw\m\()d\s	(%r9){1to4}, %xmm29, %xmm30
+	vpdpw\m\()d\s	2032(%rcx), %xmm29, %xmm30
+	vpdpw\m\()d\s	-512(%rdx){1to4}, %xmm29, %xmm30{%k7}{z}
+	.endr
+	.endr
+
+	vdpphps	%ymm28, %ymm29, %ymm30
+	vdpphps	%xmm28, %xmm29, %xmm30
+	vdpphps	0x10000000(%rbp, %r14, 8), %ymm29, %ymm30{%k7}
+	vdpphps	(%r9){1to8}, %ymm29, %ymm30
+	vdpphps	4064(%rcx), %ymm29, %ymm30
+	vdpphps	-512(%rdx){1to8}, %ymm29, %ymm30{%k7}{z}
+	vdpphps	0x10000000(%rbp, %r14, 8), %xmm29, %xmm30{%k7}
+	vdpphps	(%r9){1to4}, %xmm29, %xmm30
+	vdpphps	2032(%rcx), %xmm29, %xmm30
+	vdpphps	-512(%rdx){1to4}, %xmm29, %xmm30{%k7}{z}
+
+	vmpsadbw	$123, %xmm28, %xmm29, %xmm30
+	vmpsadbw	$123, %ymm28, %ymm29, %ymm30
+	vmpsadbw	$123, 0x10000000(%rbp, %r14, 8), %ymm29, %ymm30{%k7}
+	vmpsadbw	$123, (%r9), %ymm29, %ymm30
+	vmpsadbw	$123, 4064(%rcx), %ymm29, %ymm30
+	vmpsadbw	$123, -4096(%rdx), %ymm29, %ymm30{%k7}{z}
+	vmpsadbw	$123, 0x10000000(%rbp, %r14, 8), %xmm29, %xmm30{%k7}
+	vmpsadbw	$123, (%r9), %xmm29, %xmm30
+	vmpsadbw	$123, 2032(%rcx), %xmm29, %xmm30
+	vmpsadbw	$123, -2048(%rdx), %xmm29, %xmm30{%k7}{z}
+
+	.intel_syntax noprefix
+	.irp m, ss, su, uu
+	.irp s, "", s
+	vpdpb\m\()d\s	ymm30, ymm29, ymm28
+	vpdpb\m\()d\s	xmm30, xmm29, xmm28
+	vpdpb\m\()d\s	ymm30{k7}, ymm29, YMMWORD PTR [rbp+r14*8+0x10000000]
+	vpdpb\m\()d\s	ymm30, ymm29, DWORD PTR [r9]{1to8}
+	vpdpb\m\()d\s	ymm30, ymm29, YMMWORD PTR [rcx+4064]
+	vpdpb\m\()d\s	ymm30{k7}{z}, ymm29, DWORD PTR [rdx-512]{1to8}
+	vpdpb\m\()d\s	xmm30{k7}, xmm29, XMMWORD PTR [rbp+r14*8+0x10000000]
+	vpdpb\m\()d\s	xmm30, xmm29, DWORD PTR [r9]{1to4}
+	vpdpb\m\()d\s	xmm30, xmm29, XMMWORD PTR [rcx+2032]
+	vpdpb\m\()d\s	xmm30{k7}{z}, xmm29, DWORD PTR [rdx-512]{1to4}
+	.endr
+	.endr
+
+	.irp m, su, us, uu
+	.irp s, "", s
+	vpdpw\m\()d\s	ymm30, ymm29, ymm28
+	vpdpw\m\()d\s	xmm30, xmm29, xmm28
+	vpdpw\m\()d\s	ymm30{k7}, ymm29, YMMWORD PTR [rbp+r14*8+0x10000000]
+	vpdpw\m\()d\s	ymm30, ymm29, DWORD PTR [r9]{1to8}
+	vpdpw\m\()d\s	ymm30, ymm29, YMMWORD PTR [rcx+4064]
+	vpdpw\m\()d\s	ymm30{k7}{z}, ymm29, DWORD PTR [rdx-512]{1to8}
+	vpdpw\m\()d\s	xmm30{k7}, xmm29, XMMWORD PTR [rbp+r14*8+0x10000000]
+	vpdpw\m\()d\s	xmm30, xmm29, DWORD PTR [r9]{1to4}
+	vpdpw\m\()d\s	xmm30, xmm29, XMMWORD PTR [rcx+2032]
+	vpdpw\m\()d\s	xmm30{k7}{z}, xmm29, DWORD PTR [rdx-512]{1to4}
+	.endr
+	.endr
+
+	vdpphps	ymm30, ymm29, ymm28
+	vdpphps	xmm30, xmm29, xmm28
+	vdpphps	ymm30{k7}, ymm29, YMMWORD PTR [rbp+r14*8+0x10000000]
+	vdpphps	ymm30, ymm29, DWORD PTR [r9]{1to8}
+	vdpphps	ymm30, ymm29, YMMWORD PTR [rcx+4064]
+	vdpphps	ymm30{k7}{z}, ymm29, DWORD PTR [rdx-512]{1to8}
+	vdpphps	xmm30{k7}, xmm29, XMMWORD PTR [rbp+r14*8+0x10000000]
+	vdpphps	xmm30, xmm29, DWORD PTR [r9]{1to4}
+	vdpphps	xmm30, xmm29, XMMWORD PTR [rcx+2032]
+	vdpphps	xmm30{k7}{z}, xmm29, DWORD PTR [rdx-512]{1to4}
+
+	vmpsadbw	xmm30, xmm29, xmm28, 123
+	vmpsadbw	ymm30, ymm29, ymm28, 123
+	vmpsadbw	ymm30{k7}, ymm29, YMMWORD PTR [rbp+r14*8+0x10000000], 123
+	vmpsadbw	ymm30, ymm29, YMMWORD PTR [r9], 123
+	vmpsadbw	ymm30, ymm29, YMMWORD PTR [rcx+4064], 123
+	vmpsadbw	ymm30{k7}{z}, ymm29, YMMWORD PTR [rdx-4096], 123
+	vmpsadbw	xmm30{k7}, xmm29, XMMWORD PTR [rbp+r14*8+0x10000000], 123
+	vmpsadbw	xmm30, xmm29, XMMWORD PTR [r9], 123
+	vmpsadbw	xmm30, xmm29, XMMWORD PTR [rcx+2032], 123
+	vmpsadbw	xmm30{k7}{z}, xmm29, XMMWORD PTR [rdx-2048], 123
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-512-1-intel.d b/gas/testsuite/gas/i386/x86-64-avx10_2-512-1-intel.d
new file mode 100644
index 00000000000..b73532be2c0
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-512-1-intel.d
@@ -0,0 +1,81 @@ 
+#objdump: -dw -Mintel
+#name: x86_64 AVX10.2/512 media insns (Intel disassembly)
+#source: x86-64-avx10_2-512-1.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+#...
+\s*20b:\s*62 02 17 40 50 f4\s+vpdpbssd zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 17 47 50 b4 f5 00 00 00 10\s+vpdpbssd zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 17 50 50 31\s+vpdpbssd zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 17 40 50 71 7f\s+vpdpbssd zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 17 d7 50 72 80\s+vpdpbssd zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 17 40 51 f4\s+vpdpbssds zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 17 47 51 b4 f5 00 00 00 10\s+vpdpbssds zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 17 50 51 31\s+vpdpbssds zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 17 40 51 71 7f\s+vpdpbssds zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 17 d7 51 72 80\s+vpdpbssds zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 16 40 50 f4\s+vpdpbsud zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 16 47 50 b4 f5 00 00 00 10\s+vpdpbsud zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 50 50 31\s+vpdpbsud zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 40 50 71 7f\s+vpdpbsud zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 16 d7 50 72 80\s+vpdpbsud zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 16 40 51 f4\s+vpdpbsuds zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 16 47 51 b4 f5 00 00 00 10\s+vpdpbsuds zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 50 51 31\s+vpdpbsuds zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 40 51 71 7f\s+vpdpbsuds zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 16 d7 51 72 80\s+vpdpbsuds zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 14 40 50 f4\s+vpdpbuud zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 14 47 50 b4 f5 00 00 00 10\s+vpdpbuud zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 50 50 31\s+vpdpbuud zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 40 50 71 7f\s+vpdpbuud zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 14 d7 50 72 80\s+vpdpbuud zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 14 40 51 f4\s+vpdpbuuds zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 14 47 51 b4 f5 00 00 00 10\s+vpdpbuuds zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 50 51 31\s+vpdpbuuds zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 40 51 71 7f\s+vpdpbuuds zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 14 d7 51 72 80\s+vpdpbuuds zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 16 40 d2 f4\s+vpdpwsud zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 16 47 d2 b4 f5 00 00 00 10\s+vpdpwsud zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 50 d2 31\s+vpdpwsud zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 40 d2 71 7f\s+vpdpwsud zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 16 d7 d2 72 80\s+vpdpwsud zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 16 40 d3 f4\s+vpdpwsuds zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 16 47 d3 b4 f5 00 00 00 10\s+vpdpwsuds zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 50 d3 31\s+vpdpwsuds zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 40 d3 71 7f\s+vpdpwsuds zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 16 d7 d3 72 80\s+vpdpwsuds zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 15 40 d2 f4\s+vpdpwusd zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 15 47 d2 b4 f5 00 00 00 10\s+vpdpwusd zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 15 50 d2 31\s+vpdpwusd zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 15 40 d2 71 7f\s+vpdpwusd zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 15 d7 d2 72 80\s+vpdpwusd zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 15 40 d3 f4\s+vpdpwusds zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 15 47 d3 b4 f5 00 00 00 10\s+vpdpwusds zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 15 50 d3 31\s+vpdpwusds zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 15 40 d3 71 7f\s+vpdpwusds zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 15 d7 d3 72 80\s+vpdpwusds zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 14 40 d2 f4\s+vpdpwuud zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 14 47 d2 b4 f5 00 00 00 10\s+vpdpwuud zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 50 d2 31\s+vpdpwuud zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 40 d2 71 7f\s+vpdpwuud zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 14 d7 d2 72 80\s+vpdpwuud zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 14 40 d3 f4\s+vpdpwuuds zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 14 47 d3 b4 f5 00 00 00 10\s+vpdpwuuds zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 50 d3 31\s+vpdpwuuds zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 40 d3 71 7f\s+vpdpwuuds zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 14 d7 d3 72 80\s+vpdpwuuds zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 14 40 52 f4\s+vdpphps zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 14 47 52 b4 f5 00 00 00 10\s+vdpphps zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 50 52 31\s+vdpphps zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 40 52 71 7f\s+vdpphps zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 14 d7 52 72 80\s+vdpphps zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 03 16 40 42 f4 7b\s+vmpsadbw zmm30,zmm29,zmm28,0x7b
+\s*[a-f0-9]+:\s*62 23 16 47 42 b4 f5 00 00 00 10 7b\s+vmpsadbw zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 43 16 40 42 31 7b\s+vmpsadbw zmm30,zmm29,ZMMWORD PTR \[r9\],0x7b
+\s*[a-f0-9]+:\s*62 63 16 40 42 71 7f 7b\s+vmpsadbw zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\],0x7b
+\s*[a-f0-9]+:\s*62 63 16 c7 42 72 80 7b\s+vmpsadbw zmm30\{k7\}\{z\},zmm29,ZMMWORD PTR \[rdx-0x2000\],0x7b
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-512-1.d b/gas/testsuite/gas/i386/x86-64-avx10_2-512-1.d
new file mode 100644
index 00000000000..4c41b191710
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-512-1.d
@@ -0,0 +1,79 @@ 
+#objdump: -dw
+#name: x86_64 AVX10.2/512 media insns
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*62 02 17 40 50 f4\s+vpdpbssd %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 17 47 50 b4 f5 00 00 00 10\s+vpdpbssd 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 17 50 50 31\s+vpdpbssd \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 17 40 50 71 7f\s+vpdpbssd 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 17 d7 50 72 80\s+vpdpbssd -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 17 40 51 f4\s+vpdpbssds %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 17 47 51 b4 f5 00 00 00 10\s+vpdpbssds 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 17 50 51 31\s+vpdpbssds \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 17 40 51 71 7f\s+vpdpbssds 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 17 d7 51 72 80\s+vpdpbssds -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 16 40 50 f4\s+vpdpbsud %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 16 47 50 b4 f5 00 00 00 10\s+vpdpbsud 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 50 50 31\s+vpdpbsud \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 16 40 50 71 7f\s+vpdpbsud 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 16 d7 50 72 80\s+vpdpbsud -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 16 40 51 f4\s+vpdpbsuds %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 16 47 51 b4 f5 00 00 00 10\s+vpdpbsuds 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 50 51 31\s+vpdpbsuds \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 16 40 51 71 7f\s+vpdpbsuds 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 16 d7 51 72 80\s+vpdpbsuds -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 14 40 50 f4\s+vpdpbuud %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 14 47 50 b4 f5 00 00 00 10\s+vpdpbuud 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 50 50 31\s+vpdpbuud \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 14 40 50 71 7f\s+vpdpbuud 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 14 d7 50 72 80\s+vpdpbuud -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 14 40 51 f4\s+vpdpbuuds %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 14 47 51 b4 f5 00 00 00 10\s+vpdpbuuds 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 50 51 31\s+vpdpbuuds \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 14 40 51 71 7f\s+vpdpbuuds 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 14 d7 51 72 80\s+vpdpbuuds -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 16 40 d2 f4\s+vpdpwsud %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 16 47 d2 b4 f5 00 00 00 10\s+vpdpwsud 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 50 d2 31\s+vpdpwsud \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 16 40 d2 71 7f\s+vpdpwsud 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 16 d7 d2 72 80\s+vpdpwsud -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 16 40 d3 f4\s+vpdpwsuds %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 16 47 d3 b4 f5 00 00 00 10\s+vpdpwsuds 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 50 d3 31\s+vpdpwsuds \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 16 40 d3 71 7f\s+vpdpwsuds 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 16 d7 d3 72 80\s+vpdpwsuds -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 15 40 d2 f4\s+vpdpwusd %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 15 47 d2 b4 f5 00 00 00 10\s+vpdpwusd 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 15 50 d2 31\s+vpdpwusd \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 15 40 d2 71 7f\s+vpdpwusd 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 15 d7 d2 72 80\s+vpdpwusd -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 15 40 d3 f4\s+vpdpwusds %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 15 47 d3 b4 f5 00 00 00 10\s+vpdpwusds 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 15 50 d3 31\s+vpdpwusds \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 15 40 d3 71 7f\s+vpdpwusds 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 15 d7 d3 72 80\s+vpdpwusds -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 14 40 d2 f4\s+vpdpwuud %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 14 47 d2 b4 f5 00 00 00 10\s+vpdpwuud 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 50 d2 31\s+vpdpwuud \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 14 40 d2 71 7f\s+vpdpwuud 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 14 d7 d2 72 80\s+vpdpwuud -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 14 40 d3 f4\s+vpdpwuuds %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 14 47 d3 b4 f5 00 00 00 10\s+vpdpwuuds 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 50 d3 31\s+vpdpwuuds \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 14 40 d3 71 7f\s+vpdpwuuds 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 14 d7 d3 72 80\s+vpdpwuuds -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 14 40 52 f4\s+vdpphps %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 14 47 52 b4 f5 00 00 00 10\s+vdpphps 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 50 52 31\s+vdpphps \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 14 40 52 71 7f\s+vdpphps 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 14 d7 52 72 80\s+vdpphps -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 16 40 42 f4 7b\s+vmpsadbw \$0x7b,%zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 23 16 47 42 b4 f5 00 00 00 10 7b\s+vmpsadbw \$0x7b,0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 43 16 40 42 31 7b\s+vmpsadbw \$0x7b,\(%r9\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 63 16 40 42 71 7f 7b\s+vmpsadbw \$0x7b,0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 63 16 c7 42 72 80 7b\s+vmpsadbw \$0x7b,-0x2000\(%rdx\),%zmm29,%zmm30\{%k7\}\{z\}
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-512-1.s b/gas/testsuite/gas/i386/x86-64-avx10_2-512-1.s
new file mode 100644
index 00000000000..14f7a8549d0
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-512-1.s
@@ -0,0 +1,70 @@ 
+# Check 64bit AVX10.2/512 instructions
+
+	.arch generic64
+	.arch .avx10.2/512
+	.text
+_start:
+	.irp m, ss, su, uu
+	.irp s, "", s
+	vpdpb\m\()d\s	%zmm28, %zmm29, %zmm30
+	vpdpb\m\()d\s	0x10000000(%rbp, %r14, 8), %zmm29, %zmm30{%k7}
+	vpdpb\m\()d\s	(%r9){1to16}, %zmm29, %zmm30
+	vpdpb\m\()d\s	8128(%rcx), %zmm29, %zmm30
+	vpdpb\m\()d\s	-512(%rdx){1to16}, %zmm29, %zmm30{%k7}{z}
+	.endr
+	.endr
+
+	.irp m, su, us, uu
+	.irp s, "", s
+	vpdpw\m\()d\s	%zmm28, %zmm29, %zmm30
+	vpdpw\m\()d\s	0x10000000(%rbp, %r14, 8), %zmm29, %zmm30{%k7}
+	vpdpw\m\()d\s	(%r9){1to16}, %zmm29, %zmm30
+	vpdpw\m\()d\s	8128(%rcx), %zmm29, %zmm30
+	vpdpw\m\()d\s	-512(%rdx){1to16}, %zmm29, %zmm30{%k7}{z}
+	.endr
+	.endr
+
+	vdpphps	%zmm28, %zmm29, %zmm30
+	vdpphps	0x10000000(%rbp, %r14, 8), %zmm29, %zmm30{%k7}
+	vdpphps	(%r9){1to16}, %zmm29, %zmm30
+	vdpphps	8128(%rcx), %zmm29, %zmm30
+	vdpphps	-512(%rdx){1to16}, %zmm29, %zmm30{%k7}{z}
+
+	vmpsadbw	$123, %zmm28, %zmm29, %zmm30
+	vmpsadbw	$123, 0x10000000(%rbp, %r14, 8), %zmm29, %zmm30{%k7}
+	vmpsadbw	$123, (%r9), %zmm29, %zmm30
+	vmpsadbw	$123, 8128(%rcx), %zmm29, %zmm30
+	vmpsadbw	$123, -8192(%rdx), %zmm29, %zmm30{%k7}{z}
+
+	.intel_syntax noprefix
+	.irp m, ss, su, uu
+	.irp s, "", s
+	vpdpb\m\()d\s	zmm30, zmm29, zmm28
+	vpdpb\m\()d\s	zmm30{k7}, zmm29, ZMMWORD PTR [rbp+r14*8+0x10000000]
+	vpdpb\m\()d\s	zmm30, zmm29, DWORD PTR [r9]{1to16}
+	vpdpb\m\()d\s	zmm30, zmm29, ZMMWORD PTR [rcx+8128]
+	vpdpb\m\()d\s	zmm30{k7}{z}, zmm29, DWORD PTR [rdx-512]{1to16}
+	.endr
+	.endr
+
+	.irp m, su, us, uu
+	.irp s, "", s
+	vpdpw\m\()d\s	zmm30, zmm29, zmm28
+	vpdpw\m\()d\s	zmm30{k7}, zmm29, ZMMWORD PTR [rbp+r14*8+0x10000000]
+	vpdpw\m\()d\s	zmm30, zmm29, DWORD PTR [r9]{1to16}
+	vpdpw\m\()d\s	zmm30, zmm29, ZMMWORD PTR [rcx+8128]
+	vpdpw\m\()d\s	zmm30{k7}{z}, zmm29, DWORD PTR [rdx-512]{1to16}
+	.endr
+	.endr
+
+	vdpphps	zmm30, zmm29, zmm28
+	vdpphps	zmm30{k7}, zmm29, ZMMWORD PTR [rbp+r14*8+0x10000000]
+	vdpphps	zmm30, zmm29, DWORD PTR [r9]{1to16}
+	vdpphps	zmm30, zmm29, ZMMWORD PTR [rcx+8128]
+	vdpphps	zmm30{k7}{z}, zmm29, DWORD PTR [rdx-512]{1to16}
+
+	vmpsadbw	zmm30, zmm29, zmm28, 123
+	vmpsadbw	zmm30{k7}, zmm29, ZMMWORD PTR [rbp+r14*8+0x10000000], 123
+	vmpsadbw	zmm30, zmm29, ZMMWORD PTR [r9], 123
+	vmpsadbw	zmm30, zmm29, ZMMWORD PTR [rcx+8128], 123
+	vmpsadbw	zmm30{k7}{z}, zmm29, ZMMWORD PTR [rdx-8192], 123
diff --git a/gas/testsuite/gas/i386/x86-64.exp b/gas/testsuite/gas/i386/x86-64.exp
index 86e7f4a75b3..733b9708b54 100644
--- a/gas/testsuite/gas/i386/x86-64.exp
+++ b/gas/testsuite/gas/i386/x86-64.exp
@@ -500,6 +500,10 @@  run_dump_test "x86-64-user_msr-intel"
 run_list_test "x86-64-user_msr-inval"
 run_dump_test "x86-64-avx10_2-rounding"
 run_dump_test "x86-64-avx10_2-rounding-intel"
+run_dump_test "x86-64-avx10_2-512-1"
+run_dump_test "x86-64-avx10_2-512-1-intel"
+run_dump_test "x86-64-avx10_2-256-1"
+run_dump_test "x86-64-avx10_2-256-1-intel"
 run_dump_test "x86-64-clzero"
 run_dump_test "x86-64-mwaitx-bdver4"
 run_list_test "x86-64-mwaitx-reg"
diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h
index 0fb6bd4e2ad..ccfdd604c37 100644
--- a/opcodes/i386-dis-evex-prefix.h
+++ b/opcodes/i386-dis-evex-prefix.h
@@ -231,8 +231,8 @@ 
   },
   /* PREFIX_EVEX_0F3852 */
   {
-    { Bad_Opcode },
-    { "vdpbf16p%XS", { XM, Vex, EXx }, 0 },
+    { "vdpphp%XS",	{ XM, Vex, EXx }, 0 },
+    { "vdpbf16p%XS",	{ XM, Vex, EXx }, 0 },
     { VEX_W_TABLE (VEX_W_0F3852) },
     { "vp4dpws%XSd",	{ XM, Vex, Mxmm }, 0 },
   },
@@ -309,6 +309,12 @@ 
     { Bad_Opcode },
     { "vgetmants%XW",	{ XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, 0 },
   },
+  /* PREFIX_EVEX_0F3A42_W_0 */
+  {
+    { Bad_Opcode },
+    { "vmpsadbw",      { XM, Vex, EXx, Ib }, 0 },
+    { "vdbpsadbw",      { XM, Vex, EXx, Ib }, 0 },
+  },
   /* PREFIX_EVEX_0F3A56 */
   {
     { "vreducep%XH",      { XM, EXxh, EXxEVexS, Ib }, 0 },
diff --git a/opcodes/i386-dis-evex-w.h b/opcodes/i386-dis-evex-w.h
index 24c0c23f23e..27053b49b9c 100644
--- a/opcodes/i386-dis-evex-w.h
+++ b/opcodes/i386-dis-evex-w.h
@@ -425,7 +425,7 @@ 
   },
   /* EVEX_W_0F3A42 */
   {
-    { "vdbpsadbw",	{ XM, Vex, EXx, Ib }, 0 },
+    { PREFIX_TABLE (PREFIX_EVEX_0F3A42_W_0) },
   },
   /* EVEX_W_0F3A43_L_n */
   {
diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h
index 559f0fbebde..b5ca4a0aeaf 100644
--- a/opcodes/i386-dis-evex.h
+++ b/opcodes/i386-dis-evex.h
@@ -529,8 +529,8 @@  static const struct dis386 evex_table[][256] = {
     /* D0 */
     { Bad_Opcode },
     { Bad_Opcode },
-    { Bad_Opcode },
-    { Bad_Opcode },
+    { VEX_W_TABLE (VEX_W_0F38D2) },
+    { VEX_W_TABLE (VEX_W_0F38D3) },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 26d667a3b0e..a4dd734d04e 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -1199,6 +1199,7 @@  enum
   PREFIX_EVEX_0F3A0A,
   PREFIX_EVEX_0F3A26,
   PREFIX_EVEX_0F3A27,
+  PREFIX_EVEX_0F3A42_W_0,
   PREFIX_EVEX_0F3A56,
   PREFIX_EVEX_0F3A57,
   PREFIX_EVEX_0F3A66,
@@ -3987,18 +3988,18 @@  static const struct dis386 prefix_table[][4] = {
 
   /* PREFIX_VEX_0F3850_W_0 */
   {
-    { "vpdpbuud",	{ XM, Vex, EXx }, 0 },
-    { "vpdpbsud",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpbuud",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpbsud",	{ XM, Vex, EXx }, 0 },
     { "%XVvpdpbusd",	{ XM, Vex, EXx }, 0 },
-    { "vpdpbssd",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpbssd",	{ XM, Vex, EXx }, 0 },
   },
 
   /* PREFIX_VEX_0F3851_W_0 */
   {
-    { "vpdpbuuds",	{ XM, Vex, EXx }, 0 },
-    { "vpdpbsuds",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpbuuds",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpbsuds",	{ XM, Vex, EXx }, 0 },
     { "%XVvpdpbusds",	{ XM, Vex, EXx }, 0 },
-    { "vpdpbssds",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpbssds",	{ XM, Vex, EXx }, 0 },
   },
   /* PREFIX_VEX_0F385C_X86_64_L_0_W_0 */
   {
@@ -4046,16 +4047,16 @@  static const struct dis386 prefix_table[][4] = {
 
   /* PREFIX_VEX_0F38D2_W_0 */
   {
-    { "vpdpwuud",	{ XM, Vex, EXx }, 0 },
-    { "vpdpwsud",	{ XM, Vex, EXx }, 0 },
-    { "vpdpwusd",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpwuud",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpwsud",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpwusd",	{ XM, Vex, EXx }, 0 },
   },
 
   /* PREFIX_VEX_0F38D3_W_0 */
   {
-    { "vpdpwuuds",	{ XM, Vex, EXx }, 0 },
-    { "vpdpwsuds",	{ XM, Vex, EXx }, 0 },
-    { "vpdpwusds",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpwuuds",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpwsuds",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpwusds",	{ XM, Vex, EXx }, 0 },
   },
 
   /* PREFIX_VEX_0F38CB */
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index 5049a3b00f2..58bd172942d 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -3073,26 +3073,41 @@  vpdpwssd<vnni><sat>, 0x6652|<sat:opc>, <vnni:avx>_VNNI, Modrm|Space0F38|Src1VVVV
 
 // {AVX512,AVX}_VNNI instructions end
 
-// AVX-VNNI-INT8 instructions.
+// AVX-VNNI-INT8/AVX10.2 instructions.
+
+<vnni2:avx:attr:reg:mem, $y:_VNNI_INT8:Vex::, $z:10_2:Masking|Broadcast|Disp8ShiftVL:RegZMM:Dword>
 
 <dpb:pfx, uu:, ss:f2, su:f3>
 
-vpdpb<dpb>d<sat>, 0x<dpb:pfx>50|<sat:opc>, AVX_VNNI_INT8, Modrm|Vex|Space0F38|Src1VVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
+vpdpb<dpb>d<vnni2><sat>, 0x<dpb:pfx>50|<sat:opc>, AVX<vnni2:avx>, Modrm|Space0F38|Src1VVVV|VexW0|<vnni2:attr>|CheckOperandSize|NoSuf, { RegXMM|RegYMM|<vnni2:reg>|<vnni2:mem>|Unspecified|BaseIndex, RegXMM|RegYMM|<vnni2:reg>, RegXMM|RegYMM|<vnni2:reg> }
+
+<vnni2>
 
-// AVX-VNNI-INT8 instructions end.
+// AVX-VNNI-INT8/AVX10.2 instructions end.
 
-// AVX-VNNI-INT16 instructions.
+// AVX-VNNI-INT16/AVX10.2 instructions.
+
+<vnni3:avx:attr:reg:mem, $y:_VNNI_INT16:Vex::, $z:10_2:Masking|Broadcast|Disp8ShiftVL:RegZMM:Dword>
 
 <dpw:pfx, uu:, us:66, su:f3>
 
-vpdpw<dpw>d<sat>, 0x<dpw:pfx>d2|<sat:opc>, AVX_VNNI_INT16, Modrm|Vex|Space0F38|Src1VVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
+vpdpw<dpw>d<vnni3><sat>, 0x<dpw:pfx>d2|<sat:opc>, AVX<vnni3:avx>, Modrm|Space0F38|Src1VVVV|VexW0|<vnni3:attr>|CheckOperandSize|NoSuf, { RegXMM|RegYMM|<vnni3:reg>|<vnni3:mem>|Unspecified|BaseIndex, RegXMM|RegYMM|<vnni3:reg>, RegXMM|RegYMM|<vnni3:reg> }
+
+<vnni3>
 
-// AVX-VNNI-INT16 instructions end.
+// AVX-VNNI-INT16/AVX10.2 instructions end.
 
 <dpw>
 <dpb>
 <sat>
 
+// AVX10.2 media instructions.
+
+vdpphps, 0x52, AVX10_2, Modrm|Space0F38|Src1VVVV|Masking|VexW0|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Dword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
+vmpsadbw, 0xf342, AVX10_2, Modrm|Masking|Space0F3A|Src1VVVV|VexW0|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8, RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
+
+// AVX10.2 media instructions end.
+
 // AVX512_BITALG instructions
 
 vpopcnt<bw>, 0x6654, AVX512_BITALG, Modrm|Masking|Space0F38|<bw:vexw>|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }