diff mbox series

Support ymm rounding control for Intel AVX10.2

Message ID 20240801073315.3664965-1-haochen.jiang@intel.com
State New
Headers
Series Support ymm rounding control for Intel AVX10.2 |

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Commit Message

Haochen Jiang Aug. 1, 2024, 7:33 a.m. UTC 
  Hi all,

AVX10.2 tech details has been just published on July 31st in the
following link:

https://cdrdv2.intel.com/v1/dl/getContent/828965

For new features and instructions, we could divide them into two parts.
One is ymm rounding control, the other is the new instructions. We also
plan to upstream them one by one.

This patch aims to add ymm rounding control for previous AVX512
instructions for AVX10.2. We will share U bit with APX here.

In table part, for clearness, we treat them as new instructions and add
new entries.

Tested on x86-64-pc-linux-gnu. Ok for trunk?

Thx,
Haochen

gas/ChangeLog:

	* NEWS: Support Intel AVX10.2.
	* config/tc-i386.c
	(struct _i386_insn): Add ymm for U bit.
	(cpu_arch): Add avx10_2.
	(cpu_flags_match): Handle AVX10_2.
	(build_evex_prefix): Handle U bit.
	(check_VecOperands): Handle AVX10.2 and ymm roundings.
	* doc/c-i386.texi: Document .avx10.2.
	* testsuite/gas/i386/i386.exp: Run AVX10.2 tests.
	* testsuite/gas/i386/x86-64.exp: Ditto.
	* testsuite/gas/i386/avx10_2-rounding-intel.d: New test.
	* testsuite/gas/i386/avx10_2-rounding.d: Ditto.
	* testsuite/gas/i386/avx10_2-rounding.s: Ditto.
	* testsuite/gas/i386/x86-64-avx10_2-rounding-intel.d: Ditto.
	* testsuite/gas/i386/x86-64-avx10_2-rounding.d: Ditto.
	* testsuite/gas/i386/x86-64-avx10_2-rounding.s: Ditto.

opcodes/ChangeLog:

	* i386-dis.c (struct instr_info): Add U bit.
	(get_valid_dis386): Handle U bit. Also fix a typo.
	* i386-gen.c (isa_dependencies): Add AVX10.2.
	(cpu_flags): Ditto.
	* i386-init.h: Regenerated.
	* i386-opc.h (CpuAVX10_2): New.
	(i386_cpu_flags): Add cpuavx10_2.
	* i386-opc.tbl: Add AVX10_2 rounding instructions.
	* i386-tbl.h: Regenerated.
---
 gas/NEWS                                      |     2 +
 gas/config/tc-i386.c                          |    21 +-
 gas/doc/c-i386.texi                           |     6 +-
 .../gas/i386/avx10_2-rounding-intel.d         |   891 +
 gas/testsuite/gas/i386/avx10_2-rounding.d     |   451 +
 gas/testsuite/gas/i386/avx10_2-rounding.s     |   888 +
 gas/testsuite/gas/i386/i386.exp               |     2 +
 .../gas/i386/x86-64-avx10_2-rounding-intel.d  |   891 +
 .../gas/i386/x86-64-avx10_2-rounding.d        |   451 +
 .../gas/i386/x86-64-avx10_2-rounding.s        |   888 +
 gas/testsuite/gas/i386/x86-64.exp             |     2 +
 opcodes/i386-dis.c                            |    15 +-
 opcodes/i386-gen.c                            |     3 +
 opcodes/i386-init.h                           |   532 +-
 opcodes/i386-opc.h                            |     3 +
 opcodes/i386-opc.tbl                          |   105 +-
 opcodes/i386-tbl.h                            | 21796 +++++++++-------
 17 files changed, 17579 insertions(+), 9368 deletions(-)
 create mode 100644 gas/testsuite/gas/i386/avx10_2-rounding-intel.d
 create mode 100644 gas/testsuite/gas/i386/avx10_2-rounding.d
 create mode 100644 gas/testsuite/gas/i386/avx10_2-rounding.s
 create mode 100644 gas/testsuite/gas/i386/x86-64-avx10_2-rounding-intel.d
 create mode 100644 gas/testsuite/gas/i386/x86-64-avx10_2-rounding.d
 create mode 100644 gas/testsuite/gas/i386/x86-64-avx10_2-rounding.s

Comments

Jan Beulich Aug. 1, 2024, 10:08 a.m. UTC | #1 
On 01.08.2024 09:33, Haochen Jiang wrote:
> --- a/gas/NEWS
> +++ b/gas/NEWS
> @@ -1,5 +1,7 @@
>  -*- text -*-
>  
> +* Add support for Intel AVX10.2 instructions.
> +

No, I'm sorry. This is premature.

> --- a/gas/config/tc-i386.c
> +++ b/gas/config/tc-i386.c
> @@ -402,6 +402,8 @@ struct _i386_insn
>        /* In Intel syntax the operand modifier form is supposed to be used, but
>  	 we continue to accept the immediate forms as well.  */
>        bool modifier;
> +      /* The operand is ymm or not.  */
> +      bool ymm;
>      } rounding;
>  
>      /* Broadcasting attributes.
> @@ -1186,6 +1188,7 @@ static const arch_entry cpu_arch[] =
>    VECARCH (avx10.1, AVX10_1, ANY_AVX512F, set),
>    SUBARCH (user_msr, USER_MSR, USER_MSR, false),
>    SUBARCH (apx_f, APX_F, APX_F, false),
> +  VECARCH (avx10.2, AVX10_2, ANY_AVX10_2, set),
>  };
>  
>  #undef SUBARCH
> @@ -1732,6 +1735,7 @@ _is_cpu (const i386_cpu_attr *a, enum i386_cpu cpu)
>      case CpuAVX512F:  return a->bitfield.cpuavx512f;
>      case CpuAVX512VL: return a->bitfield.cpuavx512vl;
>      case CpuAPX_F:    return a->bitfield.cpuapx_f;
> +    case CpuAVX10_2:  return a->bitfield.cpuavx10_2;
>      case Cpu64:       return a->bitfield.cpu64;
>      case CpuNo64:     return a->bitfield.cpuno64;
>      default:

This shouldn't be needed; see the comment on i386-opc.h.

> @@ -4205,7 +4209,7 @@ get_broadcast_bytes (const insn_template *t, bool diag)
>  static void
>  build_evex_prefix (void)
>  {
> -  unsigned int register_specifier, w;
> +  unsigned int register_specifier, w, u;
>    rex_byte vrex_used = 0;
>  
>    /* Check register specifier.  */
> @@ -4278,10 +4282,12 @@ build_evex_prefix (void)
>    else
>      w = (flag_code == CODE_64BIT ? i.rex & REX_W : evexwig == evexw1) ? 1 : 0;
>  
> +  u = (i.rounding.type != rc_none && i.rounding.ymm) ? 0 : 1;

Do you really need the i.rounding.ymm bit here? Can't you go from
what encodes as EVEX.L'L, i.e. the EVex attribute?

> --- /dev/null
> +++ b/gas/testsuite/gas/i386/avx10_2-rounding.d
> @@ -0,0 +1,451 @@

This file is only half the size of avx10_2-rounding-intel.d - why?

> +#objdump: -dw
> +#name: i386 AVX10.2 rounding insns
> +#source: avx10_2-rounding.s

You don't really need this line here, do you?

> --- /dev/null
> +++ b/gas/testsuite/gas/i386/avx10_2-rounding.s
> @@ -0,0 +1,888 @@
> +# Check 32bit AVX10.2 instructions
> +
> +	.text
> +_start:
>[...]
> +	.intel_syntax noprefix
> +	vaddpd	ymm6, ymm5, ymm4, {rn-sae}

New tests want to please use the proper Intel syntax form; the forms with
the rounding/SAE specifier being a separate operand are supported only for
backwards compatibility. See also how the above does not match what the
disassembler produces.

Furthermore when adding new large tests with lots of redundancy, please at
least consider macro-izing a little. E.g. at least the FMA 132, 213, and
231 forms, which make for a substantial amount of the redundancy.

Testcase comments also apply to the 64-bit testcases then.

> --- a/opcodes/i386-dis.c
> +++ b/opcodes/i386-dis.c
> @@ -229,6 +229,7 @@ struct instr_info
>      bool b;
>      bool no_broadcast;
>      bool nf;
> +    bool u;
>    }
>    vex;
>  
> @@ -9030,6 +9031,8 @@ get_valid_dis386 (const struct dis386 *dp, instr_info *ins)
>  
>        if (!(*ins->codep & 0x4))
>  	ins->rex2 |= REX_X;
> +      
> +      ins->vex.u = *ins->codep & 0x4;
>  
>        switch ((*ins->codep & 0x3))
>  	{
> @@ -9066,7 +9069,7 @@ get_valid_dis386 (const struct dis386 *dp, instr_info *ins)
>  	  /* Report bad for !evex_default and when two fixed values of evex
>  	     change..  */
>  	  if (ins->evex_type != evex_default
> -	      || (ins->rex2 & (REX_B | REX_X)))
> +	      && (ins->rex2 & (REX_B | REX_X)))

I can see why you may need to change this for REX_X, but hardly for REX_B
at the same time?

> @@ -9088,14 +9091,20 @@ get_valid_dis386 (const struct dis386 *dp, instr_info *ins)
>        if (!fetch_modrm (ins))
>  	return &err_opcode;
>  
> -      if (ins->modrm.mod == 3 && (ins->rex2 & REX_X))
> +      /* When modrm.mod != 3, the U bit is used by APX for bit X4.
> +	 When modrm.mod == 3, the U bit is used by AVX10.  The U bit and
> +	 the b bit should not be zero at the same time.  */
> +      if (ins->modrm.mod == 3 && !ins->vex.u && !ins->vex.b)
>  	return &bad_opcode;

Doesn't this further want/need qualifying by an ins->evex_type check?

>        /* Set vector length. For EVEX-promoted instructions, evex.ll == 0b00,
>  	 which has the same encoding as vex.length == 128 and they can share
>  	 the same processing with vex.length in OP_VEX.  */
>        if (ins->modrm.mod == 3 && ins->vex.b && ins->evex_type != evex_from_legacy)
> -	ins->vex.length = 512;
> +	if (ins->vex.u)
> +	  ins->vex.length = 512;
> +	else
> +	  ins->vex.length = 256;

Such inner if()/else want parenthesizing against the surrounding if()...

>        else
>  	{
>  	  switch (ins->vex.ll)

... /else.

> --- a/opcodes/i386-opc.h
> +++ b/opcodes/i386-opc.h
> @@ -321,6 +321,8 @@ enum i386_cpu
>    CpuAVX512VL,
>    /* Intel APX_F Instructions support required.  */
>    CpuAPX_F,
> +  /* Intel AVX10.2 Instructions support required.  */
> +  CpuAVX10_2,
>    /* Not supported in the 64bit mode  */
>    CpuNo64,
>  
> @@ -357,6 +359,7 @@ enum i386_cpu
>  		   cpuavx512f:1, \
>  		   cpuavx512vl:1, \
>  		   cpuapx_f:1, \
> +		   cpuavx10_2:1, \
>        /* NOTE: This field needs to remain last. */ \
>  		   cpuno64:1

Why are you adding the enum/bit like this? The new flag is used on its
own only afaics, and hence doesn't need to be in the set of ones
permitting combination with other features. The idea of the splitting
was that adding support for "simple" features like this one would not
require the number of bitfield elements to grow.

> --- a/opcodes/i386-opc.tbl
> +++ b/opcodes/i386-opc.tbl
> @@ -2908,12 +2908,12 @@ vptestnm<bw>, 0xf326, AVX512BW, Modrm|Masking|Space0F38|Src1VVVV|<bw:vexw>|Disp8
>  
>  // AVX512DQ instructions.
>  
> -<xyz:vl:attr:sr:att:src, +
> -    $i::Disp8ShiftVL|IntelSyntax:StaticRounding|SAE::RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, +
> -    $a::Disp8ShiftVL|ATTSyntax:StaticRounding|SAE::RegXMM|RegYMM|RegZMM|BaseIndex, +
> -    z::EVex512|Disp8MemShift=6:StaticRounding|SAE:ATTSyntax:RegZMM|Unspecified|BaseIndex, +
> -    x:AVX512VL:EVex128|Disp8MemShift=4::ATTSyntax:RegXMM|Unspecified|BaseIndex, +
> -    y:AVX512VL:EVex256|Disp8MemShift=5::ATTSyntax:RegYMM|Unspecified|BaseIndex>
> +<xyz:vl:evex:attr:sr:att:src, +
> +    $i:::Disp8ShiftVL|IntelSyntax:StaticRounding|SAE::RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, +
> +    $a:::Disp8ShiftVL|ATTSyntax:StaticRounding|SAE::RegXMM|RegYMM|RegZMM|BaseIndex, +
> +    z::EVex512:EVex512|Disp8MemShift=6:StaticRounding|SAE:ATTSyntax:RegZMM|Unspecified|BaseIndex, +
> +    x:AVX512VL:EVex128:EVex128|Disp8MemShift=4::ATTSyntax:RegXMM|Unspecified|BaseIndex, +
> +    y:AVX512VL:EVex256:EVex256|Disp8MemShift=5::ATTSyntax:RegYMM|Unspecified|BaseIndex>

What's the reason for this change? I can't spot any use of the new
<xyz:evex>.

> @@ -3575,3 +3575,96 @@ pop2, 0x8f/0, APX_F, Modrm|VexW0|EVexMap4|DstVVVV|ImplicitStackOp|No_bSuf|No_wSu
>  pop2p, 0x8f/0, APX_F, Modrm|VexW1|EVexMap4|DstVVVV|ImplicitStackOp|No_bSuf|No_wSuf|No_lSuf|No_sSuf, { Reg64, Reg64 }
>  
>  // APX Push2/Pop2 instructions end.
> +
> +// AVX10.2 instructions.
> +
> +<yr:att:sr:sae:src, +
> +    $i:IntelSyntax:StaticRounding|SAE:SAE:RegYMM|Unspecified|BaseIndex, +
> +    $a:ATTSyntax:StaticRounding|SAE:SAE:RegYMM|BaseIndex, +
> +    y:ATTSyntax:StaticRounding|SAE:SAE:RegYMM|Unspecified|BaseIndex>

I think Ey would be a better name for this, even if I can guess what yr is
meant to stand for. Neither the sr nor the sae attributes should exist, though.
They're both identical between all three variants.

Thinking about it: Is this needed at all? The variants exist because of the
memory operands, where the sizes need expressing in some way. Yet this patch
is solely about register-only forms, where sizes are known from operands.

> +vaddp<sdh>, 0x<sdh:ppfx>58, AVX10_2, Modrm|EVex256|Masking|<sdh:spc1>|Src1VVVV|<sdh:vexw>|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|<sdh:elem>|Unspecified|BaseIndex, RegYMM, RegYMM }

At the example this: Why does this permit for a memory operand and broadcast?
Plus it needlessly specifies Disp8MemShift. All you're after is adding the
256-bit rounding form.

In fact I'm uncertain that these new templates all need adding. Ideally
no new ones would be added even to the generated table, but I can see how
that could be challenging. But at the very least, with all of this entirely
mechanical, can't you instead adjust i386-gen to suitably generate AVX10.2
counterparts to every template permitting SAE? Exceptions may be the ones
where you end up using <yr> right now, but quite possible even those can
be covered.

Jan
Haochen Jiang Aug. 2, 2024, 2:39 a.m. UTC | #2 
> -----Original Message-----
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Thursday, August 1, 2024 6:08 PM
> To: Jiang, Haochen <haochen.jiang@intel.com>
> Cc: hjl.tools@gmail.com; binutils@sourceware.org
> Subject: Re: [PATCH] Support ymm rounding control for Intel AVX10.2
> 
> On 01.08.2024 09:33, Haochen Jiang wrote:
> > --- a/gas/NEWS
> > +++ b/gas/NEWS
> > @@ -1,5 +1,7 @@
> >  -*- text -*-
> >
> > +* Add support for Intel AVX10.2 instructions.
> > +
> 
> No, I'm sorry. This is premature.

I will move this to the end of the patch series. I mean, when all the
new insts are also completed.

> 
> > --- a/gas/config/tc-i386.c
> > +++ b/gas/config/tc-i386.c
> > @@ -402,6 +402,8 @@ struct _i386_insn
> >        /* In Intel syntax the operand modifier form is supposed to be used, but
> >  	 we continue to accept the immediate forms as well.  */
> >        bool modifier;
> > +      /* The operand is ymm or not.  */
> > +      bool ymm;
> >      } rounding;
> >
> >      /* Broadcasting attributes.
> > @@ -1186,6 +1188,7 @@ static const arch_entry cpu_arch[] =
> >    VECARCH (avx10.1, AVX10_1, ANY_AVX512F, set),
> >    SUBARCH (user_msr, USER_MSR, USER_MSR, false),
> >    SUBARCH (apx_f, APX_F, APX_F, false),
> > +  VECARCH (avx10.2, AVX10_2, ANY_AVX10_2, set),
> >  };
> >
> >  #undef SUBARCH
> > @@ -1732,6 +1735,7 @@ _is_cpu (const i386_cpu_attr *a, enum i386_cpu
> cpu)
> >      case CpuAVX512F:  return a->bitfield.cpuavx512f;
> >      case CpuAVX512VL: return a->bitfield.cpuavx512vl;
> >      case CpuAPX_F:    return a->bitfield.cpuapx_f;
> > +    case CpuAVX10_2:  return a->bitfield.cpuavx10_2;
> >      case Cpu64:       return a->bitfield.cpu64;
> >      case CpuNo64:     return a->bitfield.cpuno64;
> >      default:
> 
> This shouldn't be needed; see the comment on i386-opc.h.

It seems unneeded till now or even till the end of the patch series.
But it will be needed in the future when AVX10.2 co-operate with other ISAs
in future processors, which should also happen in Binutils 2.44 timeframe.

> 
> > @@ -4205,7 +4209,7 @@ get_broadcast_bytes (const insn_template *t,
> > bool diag)  static void  build_evex_prefix (void)  {
> > -  unsigned int register_specifier, w;
> > +  unsigned int register_specifier, w, u;
> >    rex_byte vrex_used = 0;
> >
> >    /* Check register specifier.  */
> > @@ -4278,10 +4282,12 @@ build_evex_prefix (void)
> >    else
> >      w = (flag_code == CODE_64BIT ? i.rex & REX_W : evexwig == evexw1)
> > ? 1 : 0;
> >
> > +  u = (i.rounding.type != rc_none && i.rounding.ymm) ? 0 : 1;
> 
> Do you really need the i.rounding.ymm bit here? Can't you go from what
> encodes as EVEX.L'L, i.e. the EVex attribute?

I suppose the bit will reduce the understanding cost. But let me see if we
can get something a little complicated in logic to remove this bit and see
the trade-offs.

> 
> > --- /dev/null
> > +++ b/gas/testsuite/gas/i386/avx10_2-rounding.d
> > @@ -0,0 +1,451 @@
> 
> This file is only half the size of avx10_2-rounding-intel.d - why?

This is because actually in those asm file, the att syntax are on the top half
of the testcases, the second half is intel syntax. No need to check them twice
for att syntax.

For Intel syntax, since we could not just skip the first part, the size is doubled.

This is also applicable for all previous testcases currently in Binutils.

> 
> > +#objdump: -dw
> > +#name: i386 AVX10.2 rounding insns
> > +#source: avx10_2-rounding.s
> 
> You don't really need this line here, do you?

Do you mean the empty line or some others?

> 
> > --- /dev/null
> > +++ b/gas/testsuite/gas/i386/avx10_2-rounding.s
> > @@ -0,0 +1,888 @@
> > +# Check 32bit AVX10.2 instructions
> > +
> > +	.text
> > +_start:
> >[...]
> > +	.intel_syntax noprefix
> > +	vaddpd	ymm6, ymm5, ymm4, {rn-sae}
> 
> New tests want to please use the proper Intel syntax form; the forms with the
> rounding/SAE specifier being a separate operand are supported only for
> backwards compatibility. See also how the above does not match what the
> disassembler produces.
> 
> Furthermore when adding new large tests with lots of redundancy, please at
> least consider macro-izing a little. E.g. at least the FMA 132, 213, and
> 231 forms, which make for a substantial amount of the redundancy.

Let me have a try on that.

> 
> Testcase comments also apply to the 64-bit testcases then.
> 
> > --- a/opcodes/i386-dis.c
> > +++ b/opcodes/i386-dis.c
> > @@ -229,6 +229,7 @@ struct instr_info
> >      bool b;
> >      bool no_broadcast;
> >      bool nf;
> > +    bool u;
> >    }
> >    vex;
> >
> > @@ -9030,6 +9031,8 @@ get_valid_dis386 (const struct dis386 *dp,
> > instr_info *ins)
> >
> >        if (!(*ins->codep & 0x4))
> >  	ins->rex2 |= REX_X;
> > +
> > +      ins->vex.u = *ins->codep & 0x4;
> >
> >        switch ((*ins->codep & 0x3))
> >  	{
> > @@ -9066,7 +9069,7 @@ get_valid_dis386 (const struct dis386 *dp,
> instr_info *ins)
> >  	  /* Report bad for !evex_default and when two fixed values of evex
> >  	     change..  */
> >  	  if (ins->evex_type != evex_default
> > -	      || (ins->rex2 & (REX_B | REX_X)))
> > +	      && (ins->rex2 & (REX_B | REX_X)))
> 
> I can see why you may need to change this for REX_X, but hardly for REX_B at
> the same time?

I suppose it is a typo according to the comment, which is buggy potentially and
found in AVX10.2.

Let me double check the logic for REX_B.

> 
> > @@ -9088,14 +9091,20 @@ get_valid_dis386 (const struct dis386 *dp,
> instr_info *ins)
> >        if (!fetch_modrm (ins))
> >  	return &err_opcode;
> >
> > -      if (ins->modrm.mod == 3 && (ins->rex2 & REX_X))
> > +      /* When modrm.mod != 3, the U bit is used by APX for bit X4.
> > +	 When modrm.mod == 3, the U bit is used by AVX10.  The U bit and
> > +	 the b bit should not be zero at the same time.  */
> > +      if (ins->modrm.mod == 3 && !ins->vex.u && !ins->vex.b)
> >  	return &bad_opcode;
> 
> Doesn't this further want/need qualifying by an ins->evex_type check?

I get your concern, I will have a look if changing this will make some invalid
bytecode valid.

> 
> >        /* Set vector length. For EVEX-promoted instructions, evex.ll == 0b00,
> >  	 which has the same encoding as vex.length == 128 and they can share
> >  	 the same processing with vex.length in OP_VEX.  */
> >        if (ins->modrm.mod == 3 && ins->vex.b && ins->evex_type !=
> evex_from_legacy)
> > -	ins->vex.length = 512;
> > +	if (ins->vex.u)
> > +	  ins->vex.length = 512;
> > +	else
> > +	  ins->vex.length = 256;
> 
> Such inner if()/else want parenthesizing against the surrounding if()...

I will change that, it will be potential buggy without parenthesizing when
some other change is applied here.

> 
> >        else
> >  	{
> >  	  switch (ins->vex.ll)
> 
> ... /else.
> 
> > --- a/opcodes/i386-opc.h
> > +++ b/opcodes/i386-opc.h
> > @@ -321,6 +321,8 @@ enum i386_cpu
> >    CpuAVX512VL,
> >    /* Intel APX_F Instructions support required.  */
> >    CpuAPX_F,
> > +  /* Intel AVX10.2 Instructions support required.  */  CpuAVX10_2,
> >    /* Not supported in the 64bit mode  */
> >    CpuNo64,
> >
> > @@ -357,6 +359,7 @@ enum i386_cpu
> >  		   cpuavx512f:1, \
> >  		   cpuavx512vl:1, \
> >  		   cpuapx_f:1, \
> > +		   cpuavx10_2:1, \
> >        /* NOTE: This field needs to remain last. */ \
> >  		   cpuno64:1
> 
> Why are you adding the enum/bit like this? The new flag is used on its own
> only afaics, and hence doesn't need to be in the set of ones permitting
> combination with other features. The idea of the splitting was that adding
> support for "simple" features like this one would not require the number of
> bitfield elements to grow.
> 
> > --- a/opcodes/i386-opc.tbl
> > +++ b/opcodes/i386-opc.tbl
> > @@ -2908,12 +2908,12 @@ vptestnm<bw>, 0xf326, AVX512BW,
> > Modrm|Masking|Space0F38|Src1VVVV|<bw:vexw>|Disp8
> >
> >  // AVX512DQ instructions.
> >
> > -<xyz:vl:attr:sr:att:src, +
> > -
> $i::Disp8ShiftVL|IntelSyntax:StaticRounding|SAE::RegXMM|RegYMM|RegZM
> M|Unspecified|BaseIndex, +
> > -
> $a::Disp8ShiftVL|ATTSyntax:StaticRounding|SAE::RegXMM|RegYMM|RegZM
> M|BaseIndex, +
> > -
> z::EVex512|Disp8MemShift=6:StaticRounding|SAE:ATTSyntax:RegZMM|Uns
> pecified|BaseIndex, +
> > -
> x:AVX512VL:EVex128|Disp8MemShift=4::ATTSyntax:RegXMM|Unspecified|B
> aseIndex, +
> > -
> y:AVX512VL:EVex256|Disp8MemShift=5::ATTSyntax:RegYMM|Unspecified|B
> aseIndex>
> > +<xyz:vl:evex:attr:sr:att:src, +
> > +
> $i:::Disp8ShiftVL|IntelSyntax:StaticRounding|SAE::RegXMM|RegYMM|RegZ
> MM|Unspecified|BaseIndex, +
> > +
> $a:::Disp8ShiftVL|ATTSyntax:StaticRounding|SAE::RegXMM|RegYMM|RegZ
> MM|BaseIndex, +
> > +
> z::EVex512:EVex512|Disp8MemShift=6:StaticRounding|SAE:ATTSyntax:RegZ
> MM|Unspecified|BaseIndex, +
> > +
> x:AVX512VL:EVex128:EVex128|Disp8MemShift=4::ATTSyntax:RegXMM|Uns
> pecified|BaseIndex, +
> > +
> >
> +y:AVX512VL:EVex256:EVex256|Disp8MemShift=5::ATTSyntax:RegYMM|Uns
> pecif
> > +ied|BaseIndex>
> 
> What's the reason for this change? I can't spot any use of the new <xyz:evex>.

Ah... It is being used and unused when patch evolves but unused at the end of
the day. I will remove them.

> 
> > @@ -3575,3 +3575,96 @@ pop2, 0x8f/0, APX_F,
> > Modrm|VexW0|EVexMap4|DstVVVV|ImplicitStackOp|No_bSuf|No_wSu
> >  pop2p, 0x8f/0, APX_F,
> >
> Modrm|VexW1|EVexMap4|DstVVVV|ImplicitStackOp|No_bSuf|No_wSuf|N
> o_lSuf|N
> > o_sSuf, { Reg64, Reg64 }
> >
> >  // APX Push2/Pop2 instructions end.
> > +
> > +// AVX10.2 instructions.
> > +
> > +<yr:att:sr:sae:src, +
> > +
> $i:IntelSyntax:StaticRounding|SAE:SAE:RegYMM|Unspecified|BaseIndex, +
> > +    $a:ATTSyntax:StaticRounding|SAE:SAE:RegYMM|BaseIndex, +
> > +    y:ATTSyntax:StaticRounding|SAE:SAE:RegYMM|Unspecified|BaseIndex>
> 
> I think Ey would be a better name for this, even if I can guess what yr is meant
> to stand for. Neither the sr nor the sae attributes should exist, though.
> They're both identical between all three variants.
> 
> Thinking about it: Is this needed at all? The variants exist because of the
> memory operands, where the sizes need expressing in some way. Yet this
> patch is solely about register-only forms, where sizes are known from
> operands.

You get a point here. I will remove all memory, they should not be needed at all.

> 
> > +vaddp<sdh>, 0x<sdh:ppfx>58, AVX10_2,
> >
> +Modrm|EVex256|Masking|<sdh:spc1>|Src1VVVV|<sdh:vexw>|Broadcast|
> Disp8M
> > +emShift=5|NoSuf|StaticRounding|SAE, {
> > +RegYMM|<sdh:elem>|Unspecified|BaseIndex, RegYMM, RegYMM }
> 
> At the example this: Why does this permit for a memory operand and
> broadcast?
> Plus it needlessly specifies Disp8MemShift. All you're after is adding the 256-
> bit rounding form.
> 
> In fact I'm uncertain that these new templates all need adding. Ideally no new
> ones would be added even to the generated table, but I can see how that
> could be challenging. But at the very least, with all of this entirely mechanical,
> can't you instead adjust i386-gen to suitably generate AVX10.2 counterparts

I recalled that I have tried at the very beginning and did succeed, but I could not
recall why I give up to do that and choose the current way.

Let me check that.

Thx,
Haochen

> to every template permitting SAE? Exceptions may be the ones where you end
> up using <yr> right now, but quite possible even those can be covered.
> 
> Jan
Jan Beulich Aug. 2, 2024, 6:16 a.m. UTC | #3 
On 02.08.2024 04:39, Jiang, Haochen wrote:
>> -----Original Message-----
>> From: Jan Beulich <jbeulich@suse.com>
>> Sent: Thursday, August 1, 2024 6:08 PM
>>
>> On 01.08.2024 09:33, Haochen Jiang wrote:
>>> @@ -1732,6 +1735,7 @@ _is_cpu (const i386_cpu_attr *a, enum i386_cpu
>> cpu)
>>>      case CpuAVX512F:  return a->bitfield.cpuavx512f;
>>>      case CpuAVX512VL: return a->bitfield.cpuavx512vl;
>>>      case CpuAPX_F:    return a->bitfield.cpuapx_f;
>>> +    case CpuAVX10_2:  return a->bitfield.cpuavx10_2;
>>>      case Cpu64:       return a->bitfield.cpu64;
>>>      case CpuNo64:     return a->bitfield.cpuno64;
>>>      default:
>>
>> This shouldn't be needed; see the comment on i386-opc.h.
> 
> It seems unneeded till now or even till the end of the patch series.
> But it will be needed in the future when AVX10.2 co-operate with other ISAs
> in future processors, which should also happen in Binutils 2.44 timeframe.

We can move it when such interactions require it. It is only at that point
when it can be decided which of the features to move here.

>>> --- /dev/null
>>> +++ b/gas/testsuite/gas/i386/avx10_2-rounding.d
>>> @@ -0,0 +1,451 @@
>>
>> This file is only half the size of avx10_2-rounding-intel.d - why?
> 
> This is because actually in those asm file, the att syntax are on the top half
> of the testcases, the second half is intel syntax. No need to check them twice
> for att syntax.
> 
> For Intel syntax, since we could not just skip the first part, the size is doubled.

Of course you can, using "#..." on a line on its own. You'll find examples
in existing testcases.

>>> +#objdump: -dw
>>> +#name: i386 AVX10.2 rounding insns
>>> +#source: avx10_2-rounding.s
>>
>> You don't really need this line here, do you?
> 
> Do you mean the empty line or some others?

I didn't comment on an empty line, but the #source one.

>>> --- a/opcodes/i386-dis.c
>>> +++ b/opcodes/i386-dis.c
>>> @@ -229,6 +229,7 @@ struct instr_info
>>>      bool b;
>>>      bool no_broadcast;
>>>      bool nf;
>>> +    bool u;
>>>    }
>>>    vex;
>>>
>>> @@ -9030,6 +9031,8 @@ get_valid_dis386 (const struct dis386 *dp,
>>> instr_info *ins)
>>>
>>>        if (!(*ins->codep & 0x4))
>>>  	ins->rex2 |= REX_X;
>>> +
>>> +      ins->vex.u = *ins->codep & 0x4;
>>>
>>>        switch ((*ins->codep & 0x3))
>>>  	{
>>> @@ -9066,7 +9069,7 @@ get_valid_dis386 (const struct dis386 *dp,
>> instr_info *ins)
>>>  	  /* Report bad for !evex_default and when two fixed values of evex
>>>  	     change..  */
>>>  	  if (ins->evex_type != evex_default
>>> -	      || (ins->rex2 & (REX_B | REX_X)))
>>> +	      && (ins->rex2 & (REX_B | REX_X)))
>>
>> I can see why you may need to change this for REX_X, but hardly for REX_B at
>> the same time?
> 
> I suppose it is a typo according to the comment, which is buggy potentially and
> found in AVX10.2.

If it was a pre-existing bug, it would want fixing separately (so it can
be backported), or at the very least it would want calling out explicitly
in the description.

>>> +vaddp<sdh>, 0x<sdh:ppfx>58, AVX10_2,
>>>
>> +Modrm|EVex256|Masking|<sdh:spc1>|Src1VVVV|<sdh:vexw>|Broadcast|
>> Disp8M
>>> +emShift=5|NoSuf|StaticRounding|SAE, {
>>> +RegYMM|<sdh:elem>|Unspecified|BaseIndex, RegYMM, RegYMM }
>>
>> At the example this: Why does this permit for a memory operand and
>> broadcast?
>> Plus it needlessly specifies Disp8MemShift. All you're after is adding the 256-
>> bit rounding form.
>>
>> In fact I'm uncertain that these new templates all need adding. Ideally no new
>> ones would be added even to the generated table, but I can see how that
>> could be challenging. But at the very least, with all of this entirely mechanical,
>> can't you instead adjust i386-gen to suitably generate AVX10.2 counterparts
> 
> I recalled that I have tried at the very beginning and did succeed, but I could not
> recall why I give up to do that and choose the current way.
> 
> Let me check that.

Thank you. In fact, after some more thinking about it, I'm now pretty sure
we can get away without adding any new "regular" templates. We may need to
add a few "irregular" ones, particularly vcvt* between vectors of different
element width.

As an aside - the fewer it is that need adding, the more desirable it will
imo be to put them next to their AVX512 counterparts, rather than in a
separate area of the file.

Jan
Haochen Jiang Aug. 2, 2024, 6:36 a.m. UTC | #4 
> -----Original Message-----
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Friday, August 2, 2024 2:16 PM
> To: Jiang, Haochen <haochen.jiang@intel.com>
> Cc: hjl.tools@gmail.com; binutils@sourceware.org
> Subject: Re: [PATCH] Support ymm rounding control for Intel AVX10.2
> 
> On 02.08.2024 04:39, Jiang, Haochen wrote:
> >> -----Original Message-----
> >> From: Jan Beulich <jbeulich@suse.com>
> >> Sent: Thursday, August 1, 2024 6:08 PM
> >>
> >> On 01.08.2024 09:33, Haochen Jiang wrote:
> >>> @@ -1732,6 +1735,7 @@ _is_cpu (const i386_cpu_attr *a, enum
> i386_cpu
> >> cpu)
> >>>      case CpuAVX512F:  return a->bitfield.cpuavx512f;
> >>>      case CpuAVX512VL: return a->bitfield.cpuavx512vl;
> >>>      case CpuAPX_F:    return a->bitfield.cpuapx_f;
> >>> +    case CpuAVX10_2:  return a->bitfield.cpuavx10_2;
> >>>      case Cpu64:       return a->bitfield.cpu64;
> >>>      case CpuNo64:     return a->bitfield.cpuno64;
> >>>      default:
> >>
> >> This shouldn't be needed; see the comment on i386-opc.h.
> >
> > It seems unneeded till now or even till the end of the patch series.
> > But it will be needed in the future when AVX10.2 co-operate with other ISAs
> > in future processors, which should also happen in Binutils 2.44 timeframe.
> 
> We can move it when such interactions require it. It is only at that point
> when it can be decided which of the features to move here.

Ok, I will leave this part to future.

> 
> >>> --- /dev/null
> >>> +++ b/gas/testsuite/gas/i386/avx10_2-rounding.d
> >>> @@ -0,0 +1,451 @@
> >>
> >> This file is only half the size of avx10_2-rounding-intel.d - why?
> >
> > This is because actually in those asm file, the att syntax are on the top half
> > of the testcases, the second half is intel syntax. No need to check them twice
> > for att syntax.
> >
> > For Intel syntax, since we could not just skip the first part, the size is
> doubled.
> 
> Of course you can, using "#..." on a line on its own. You'll find examples
> in existing testcases.

I c. I will change them to reduce testcase size.

> >>> --- a/opcodes/i386-dis.c
> >>> +++ b/opcodes/i386-dis.c
> >>> @@ -229,6 +229,7 @@ struct instr_info
> >>>      bool b;
> >>>      bool no_broadcast;
> >>>      bool nf;
> >>> +    bool u;
> >>>    }
> >>>    vex;
> >>>
> >>> @@ -9030,6 +9031,8 @@ get_valid_dis386 (const struct dis386 *dp,
> >>> instr_info *ins)
> >>>
> >>>        if (!(*ins->codep & 0x4))
> >>>  	ins->rex2 |= REX_X;
> >>> +
> >>> +      ins->vex.u = *ins->codep & 0x4;
> >>>
> >>>        switch ((*ins->codep & 0x3))
> >>>  	{
> >>> @@ -9066,7 +9069,7 @@ get_valid_dis386 (const struct dis386 *dp,
> >> instr_info *ins)
> >>>  	  /* Report bad for !evex_default and when two fixed values of evex
> >>>  	     change..  */
> >>>  	  if (ins->evex_type != evex_default
> >>> -	      || (ins->rex2 & (REX_B | REX_X)))
> >>> +	      && (ins->rex2 & (REX_B | REX_X)))
> >>
> >> I can see why you may need to change this for REX_X, but hardly for REX_B
> at
> >> the same time?
> >
> > I suppose it is a typo according to the comment, which is buggy potentially
> and
> > found in AVX10.2.
> 
> If it was a pre-existing bug, it would want fixing separately (so it can
> be backported), or at the very least it would want calling out explicitly
> in the description.

I checked the encoding and found I misunderstood something. It is not buggy and
actually I just need to bypass REX_X. I will change the logic here.

Thx,
Haochen

> 
> Jan
Haochen Jiang Aug. 6, 2024, 3:21 a.m. UTC | #5 
> >> At the example this: Why does this permit for a memory operand and
> >> broadcast?
> >> Plus it needlessly specifies Disp8MemShift. All you're after is adding the 256-
> >> bit rounding form.
> >>
> >> In fact I'm uncertain that these new templates all need adding. Ideally no
> new
> >> ones would be added even to the generated table, but I can see how that
> >> could be challenging. But at the very least, with all of this entirely
> mechanical,
> >> can't you instead adjust i386-gen to suitably generate AVX10.2 counterparts
> >
> > I recalled that I have tried at the very beginning and did succeed, but I could not
> > recall why I give up to do that and choose the current way.
> >
> > Let me check that.
> 
> Thank you. In fact, after some more thinking about it, I'm now pretty sure
> we can get away without adding any new "regular" templates. We may need to
> add a few "irregular" ones, particularly vcvt* between vectors of different
> element width.
> 
> As an aside - the fewer it is that need adding, the more desirable it will
> imo be to put them next to their AVX512 counterparts, rather than in a
> separate area of the file.

I recalled why I used the way now. At the very beginning of the AVX10.2
implementation, in i386-opc.tbl, "|" is still the meaning of "and". At that
time, I will need much more work around to do that. But currently, "|"
is actually the meaning of "or". It should make everything much easier.

I will send out patch v2 after I finish this part.

> 
> Jan
diff mbox series

Patch

diff --git a/gas/NEWS b/gas/NEWS
index b9d742a2375..a35634fbfe1 100644
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -1,5 +1,7 @@ 
 -*- text -*-
 
+* Add support for Intel AVX10.2 instructions.
+
 Changes in 2.43:
 
 * Add support for LoongArch .option for fine-grained control of assembly
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 87a1d0cf270..3c6bc743f5b 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -402,6 +402,8 @@  struct _i386_insn
       /* In Intel syntax the operand modifier form is supposed to be used, but
 	 we continue to accept the immediate forms as well.  */
       bool modifier;
+      /* The operand is ymm or not.  */
+      bool ymm;
     } rounding;
 
     /* Broadcasting attributes.
@@ -1186,6 +1188,7 @@  static const arch_entry cpu_arch[] =
   VECARCH (avx10.1, AVX10_1, ANY_AVX512F, set),
   SUBARCH (user_msr, USER_MSR, USER_MSR, false),
   SUBARCH (apx_f, APX_F, APX_F, false),
+  VECARCH (avx10.2, AVX10_2, ANY_AVX10_2, set),
 };
 
 #undef SUBARCH
@@ -1732,6 +1735,7 @@  _is_cpu (const i386_cpu_attr *a, enum i386_cpu cpu)
     case CpuAVX512F:  return a->bitfield.cpuavx512f;
     case CpuAVX512VL: return a->bitfield.cpuavx512vl;
     case CpuAPX_F:    return a->bitfield.cpuapx_f;
+    case CpuAVX10_2:  return a->bitfield.cpuavx10_2;
     case Cpu64:       return a->bitfield.cpu64;
     case CpuNo64:     return a->bitfield.cpuno64;
     default:
@@ -4205,7 +4209,7 @@  get_broadcast_bytes (const insn_template *t, bool diag)
 static void
 build_evex_prefix (void)
 {
-  unsigned int register_specifier, w;
+  unsigned int register_specifier, w, u;
   rex_byte vrex_used = 0;
 
   /* Check register specifier.  */
@@ -4278,10 +4282,12 @@  build_evex_prefix (void)
   else
     w = (flag_code == CODE_64BIT ? i.rex & REX_W : evexwig == evexw1) ? 1 : 0;
 
+  u = (i.rounding.type != rc_none && i.rounding.ymm) ? 0 : 1;
+
   /* The third byte of the EVEX prefix.  */
   i.vex.bytes[2] = ((w << 7)
 		    | (register_specifier << 3)
-		    | 4 /* Encode the U bit.  */
+		    | (u << 2)
 		    | i.tm.opcode_modifier.opcodeprefix);
 
   /* The fourth byte of the EVEX prefix.  */
@@ -8030,8 +8036,15 @@  check_VecOperands (const insn_template *t)
 	{
 	  for (op = 0; op < t->operands; ++op)
 	    if (i.types[op].bitfield.zmmword)
-	      break;
-	  if (op >= t->operands)
+	      {
+		i.rounding.ymm = false;
+		break;
+	      }
+	    else if (i.types[op].bitfield.ymmword
+		     && is_cpu (t, CpuAVX10_2)
+		     && cpu_arch_flags.bitfield.cpuavx10_2)
+		i.rounding.ymm = true;
+	  if (op >= t->operands && i.rounding.ymm == false)
 	    {
 	      i.error = operand_size_mismatch;
 	      return 1;
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 36ba82506fe..a9e43560aea 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -219,6 +219,10 @@  accept various extension mnemonics.  For example,
 @code{avx10.1/128},
 @code{user_msr},
 @code{apx_f},
+@code{avx10.2},
+@code{avx10.2/512},
+@code{avx10.2/256},
+@code{avx10.2/128},
 @code{amx_int8},
 @code{amx_bf16},
 @code{amx_fp16},
@@ -1679,7 +1683,7 @@  supported on the CPU specified.  The choices for @var{cpu_type} are:
 @item @samp{.cmpccxadd} @tab @samp{.wrmsrns} @tab @samp{.msrlist}
 @item @samp{.avx_ne_convert} @tab @samp{.rao_int} @tab @samp{.fred} @tab @samp{.lkgs}
 @item @samp{.avx_vnni_int16} @tab @samp{.sha512} @tab @samp{.sm3} @tab @samp{.sm4}
-@item @samp{.pbndkb} @tab @samp{.user_msr}
+@item @samp{.pbndkb} @tab @samp{.user_msr} @tab @samp{.avx10.2}
 @item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote}
 @item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq}
 @item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd} @tab @samp{.tsxldtrk}
diff --git a/gas/testsuite/gas/i386/avx10_2-rounding-intel.d b/gas/testsuite/gas/i386/avx10_2-rounding-intel.d
new file mode 100644
index 00000000000..1b6a7730e6f
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-rounding-intel.d
@@ -0,0 +1,891 @@ 
+#objdump: -dw -Mintel
+#name: i386 AVX10.2 insns rounding (Intel disassembly)
+#source: avx10_2-rounding.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*62 f1 d1 18 58 f4\s+vaddpd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 3f 58 f4\s+vaddpd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 ff 58 f4\s+vaddpd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 18 58 f4\s+vaddph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 3f 58 f4\s+vaddph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 ff 58 f4\s+vaddph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 18 58 f4\s+vaddps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 3f 58 f4\s+vaddps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 ff 58 f4\s+vaddps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 18 c2 ec 7b\s+vcmppd k5,ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f1 d1 1f c2 ec 7b\s+vcmppd k5\{k7\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 50 18 c2 ec 7b\s+vcmpph k5,ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 50 1f c2 ec 7b\s+vcmpph k5\{k7\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f1 50 18 c2 ec 7b\s+vcmpps k5,ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f1 50 1f c2 ec 7b\s+vcmpps k5\{k7\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f5 78 18 5b f5\s+vcvtdq2ph xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 3f 5b f5\s+vcvtdq2ph xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 ff 5b f5\s+vcvtdq2ph xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 78 18 5b f5\s+vcvtdq2ps ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 78 3f 5b f5\s+vcvtdq2ps ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 78 ff 5b f5\s+vcvtdq2ps ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 fb 18 e6 f5\s+vcvtpd2dq xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 fb 3f e6 f5\s+vcvtpd2dq xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 fb ff e6 f5\s+vcvtpd2dq xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 f9 18 5a f5\s+vcvtpd2ph xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 f9 3f 5a f5\s+vcvtpd2ph xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 f9 ff 5a f5\s+vcvtpd2ph xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 5a f5\s+vcvtpd2ps xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 3f 5a f5\s+vcvtpd2ps xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 ff 5a f5\s+vcvtpd2ps xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 7b f5\s+vcvtpd2qq ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 3f 7b f5\s+vcvtpd2qq ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 ff 7b f5\s+vcvtpd2qq ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 f8 18 79 f5\s+vcvtpd2udq xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 f8 3f 79 f5\s+vcvtpd2udq xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 f8 ff 79 f5\s+vcvtpd2udq xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 79 f5\s+vcvtpd2uqq ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 3f 79 f5\s+vcvtpd2uqq ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 ff 79 f5\s+vcvtpd2uqq ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 18 5b f5\s+vcvtph2dq ymm6,xmm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 3f 5b f5\s+vcvtph2dq ymm6\{k7\},xmm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 ff 5b f5\s+vcvtph2dq ymm6\{k7\}\{z\},xmm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 18 5a f5\s+vcvtph2pd ymm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 78 1f 5a f5\s+vcvtph2pd ymm6\{k7\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 78 9f 5a f5\s+vcvtph2pd ymm6\{k7\}\{z\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f2 79 18 13 f5\s+vcvtph2ps ymm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f2 79 1f 13 f5\s+vcvtph2ps ymm6\{k7\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f2 79 9f 13 f5\s+vcvtph2ps ymm6\{k7\}\{z\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f6 79 18 13 f5\s+vcvtph2psx ymm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f6 79 1f 13 f5\s+vcvtph2psx ymm6\{k7\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f6 79 9f 13 f5\s+vcvtph2psx ymm6\{k7\}\{z\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 79 18 7b f5\s+vcvtph2qq ymm6,xmm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 3f 7b f5\s+vcvtph2qq ymm6\{k7\},xmm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 ff 7b f5\s+vcvtph2qq ymm6\{k7\}\{z\},xmm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 18 79 f5\s+vcvtph2udq ymm6,xmm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 3f 79 f5\s+vcvtph2udq ymm6\{k7\},xmm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 ff 79 f5\s+vcvtph2udq ymm6\{k7\}\{z\},xmm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 18 79 f5\s+vcvtph2uqq ymm6,xmm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 3f 79 f5\s+vcvtph2uqq ymm6\{k7\},xmm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 ff 79 f5\s+vcvtph2uqq ymm6\{k7\}\{z\},xmm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 18 7d f5\s+vcvtph2uw ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 3f 7d f5\s+vcvtph2uw ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 ff 7d f5\s+vcvtph2uw ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 18 7d f5\s+vcvtph2w ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 3f 7d f5\s+vcvtph2w ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 ff 7d f5\s+vcvtph2w ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 79 18 5b f5\s+vcvtps2dq ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 79 3f 5b f5\s+vcvtps2dq ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 79 ff 5b f5\s+vcvtps2dq ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 78 18 5a f5\s+vcvtps2pd ymm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 78 1f 5a f5\s+vcvtps2pd ymm6\{k7\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 78 9f 5a f5\s+vcvtps2pd ymm6\{k7\}\{z\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 79 18 1d f5\s+vcvtps2phx xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 3f 1d f5\s+vcvtps2phx xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 ff 1d f5\s+vcvtps2phx xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 79 18 7b f5\s+vcvtps2qq ymm6,xmm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 79 3f 7b f5\s+vcvtps2qq ymm6\{k7\},xmm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 79 ff 7b f5\s+vcvtps2qq ymm6\{k7\}\{z\},xmm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 78 18 79 f5\s+vcvtps2udq ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 78 3f 79 f5\s+vcvtps2udq ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 78 ff 79 f5\s+vcvtps2udq ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 79 18 79 f5\s+vcvtps2uqq ymm6,xmm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 79 3f 79 f5\s+vcvtps2uqq ymm6\{k7\},xmm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 79 ff 79 f5\s+vcvtps2uqq ymm6\{k7\}\{z\},xmm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 fa 18 e6 f5\s+vcvtqq2pd ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 fa 3f e6 f5\s+vcvtqq2pd ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 fa ff e6 f5\s+vcvtqq2pd ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 f8 18 5b f5\s+vcvtqq2ph xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 f8 3f 5b f5\s+vcvtqq2ph xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 f8 ff 5b f5\s+vcvtqq2ph xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 f8 18 5b f5\s+vcvtqq2ps xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 f8 3f 5b f5\s+vcvtqq2ps xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 f8 ff 5b f5\s+vcvtqq2ps xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 e6 f5\s+vcvttpd2dq xmm6,ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 1f e6 f5\s+vcvttpd2dq xmm6\{k7\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 9f e6 f5\s+vcvttpd2dq xmm6\{k7\}\{z\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 7a f5\s+vcvttpd2qq ymm6,ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 1f 7a f5\s+vcvttpd2qq ymm6\{k7\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 9f 7a f5\s+vcvttpd2qq ymm6\{k7\}\{z\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f8 18 78 f5\s+vcvttpd2udq xmm6,ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f8 1f 78 f5\s+vcvttpd2udq xmm6\{k7\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f8 9f 78 f5\s+vcvttpd2udq xmm6\{k7\}\{z\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 78 f5\s+vcvttpd2uqq ymm6,ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 1f 78 f5\s+vcvttpd2uqq ymm6\{k7\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 9f 78 f5\s+vcvttpd2uqq ymm6\{k7\}\{z\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 7a 18 5b f5\s+vcvttph2dq ymm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 7a 1f 5b f5\s+vcvttph2dq ymm6\{k7\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 7a 9f 5b f5\s+vcvttph2dq ymm6\{k7\}\{z\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 79 18 7a f5\s+vcvttph2qq ymm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 79 1f 7a f5\s+vcvttph2qq ymm6\{k7\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 79 9f 7a f5\s+vcvttph2qq ymm6\{k7\}\{z\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 78 18 78 f5\s+vcvttph2udq ymm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 78 1f 78 f5\s+vcvttph2udq ymm6\{k7\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 78 9f 78 f5\s+vcvttph2udq ymm6\{k7\}\{z\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 79 18 78 f5\s+vcvttph2uqq ymm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 79 1f 78 f5\s+vcvttph2uqq ymm6\{k7\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 79 9f 78 f5\s+vcvttph2uqq ymm6\{k7\}\{z\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 78 18 7c f5\s+vcvttph2uw ymm6,ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 78 1f 7c f5\s+vcvttph2uw ymm6\{k7\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 78 9f 7c f5\s+vcvttph2uw ymm6\{k7\}\{z\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 79 18 7c f5\s+vcvttph2w ymm6,ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 79 1f 7c f5\s+vcvttph2w ymm6\{k7\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 79 9f 7c f5\s+vcvttph2w ymm6\{k7\}\{z\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 7a 18 5b f5\s+vcvttps2dq ymm6,ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 7a 1f 5b f5\s+vcvttps2dq ymm6\{k7\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 7a 9f 5b f5\s+vcvttps2dq ymm6\{k7\}\{z\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 79 18 7a f5\s+vcvttps2qq ymm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 79 1f 7a f5\s+vcvttps2qq ymm6\{k7\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 79 9f 7a f5\s+vcvttps2qq ymm6\{k7\}\{z\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 78 18 78 f5\s+vcvttps2udq ymm6,ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 78 1f 78 f5\s+vcvttps2udq ymm6\{k7\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 78 9f 78 f5\s+vcvttps2udq ymm6\{k7\}\{z\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 79 18 78 f5\s+vcvttps2uqq ymm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 79 1f 78 f5\s+vcvttps2uqq ymm6\{k7\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 79 9f 78 f5\s+vcvttps2uqq ymm6\{k7\}\{z\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 7b 18 7a f5\s+vcvtudq2ph xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 7b 3f 7a f5\s+vcvtudq2ph xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 7b ff 7a f5\s+vcvtudq2ph xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 7b 18 7a f5\s+vcvtudq2ps ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 7b 3f 7a f5\s+vcvtudq2ps ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 7b ff 7a f5\s+vcvtudq2ps ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 fa 18 7a f5\s+vcvtuqq2pd ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 fa 3f 7a f5\s+vcvtuqq2pd ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 fa ff 7a f5\s+vcvtuqq2pd ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 fb 18 7a f5\s+vcvtuqq2ph xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 fb 3f 7a f5\s+vcvtuqq2ph xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 fb ff 7a f5\s+vcvtuqq2ph xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 fb 18 7a f5\s+vcvtuqq2ps xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 fb 3f 7a f5\s+vcvtuqq2ps xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 fb ff 7a f5\s+vcvtuqq2ps xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 7b 18 7d f5\s+vcvtuw2ph ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 7b 3f 7d f5\s+vcvtuw2ph ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 7b ff 7d f5\s+vcvtuw2ph ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 7a 18 7d f5\s+vcvtw2ph ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 7a 3f 7d f5\s+vcvtw2ph ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 7a ff 7d f5\s+vcvtw2ph ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 18 5e f4\s+vdivpd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 3f 5e f4\s+vdivpd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 ff 5e f4\s+vdivpd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 18 5e f4\s+vdivph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 3f 5e f4\s+vdivph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 ff 5e f4\s+vdivph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 18 5e f4\s+vdivps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 3f 5e f4\s+vdivps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 ff 5e f4\s+vdivps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 53 18 56 f4\s+vfcmaddcph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 53 3f 56 f4\s+vfcmaddcph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 53 ff 56 f4\s+vfcmaddcph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 53 18 d6 f4\s+vfcmulcph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 53 3f d6 f4\s+vfcmulcph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 53 ff d6 f4\s+vfcmulcph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f3 d1 18 54 f4 7b\s+vfixupimmpd ymm6,ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 d1 1f 54 f4 7b\s+vfixupimmpd ymm6\{k7\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 d1 9f 54 f4 7b\s+vfixupimmpd ymm6\{k7\}\{z\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 51 18 54 f4 7b\s+vfixupimmps ymm6,ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 51 1f 54 f4 7b\s+vfixupimmps ymm6\{k7\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 51 9f 54 f4 7b\s+vfixupimmps ymm6\{k7\}\{z\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f2 d1 18 98 f4\s+vfmadd132pd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 3f 98 f4\s+vfmadd132pd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff 98 f4\s+vfmadd132pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 18 98 f4\s+vfmadd132ph ymm6,ymm5,ymm4\{rn-sae\}
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+\s*[a-f0-9]+:\s*62 f6 51 18 ae f4\s+vfnmsub213ph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 3f ae f4\s+vfnmsub213ph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 ff ae f4\s+vfnmsub213ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 18 ae f4\s+vfnmsub213ps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 3f ae f4\s+vfnmsub213ps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 ff ae f4\s+vfnmsub213ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 be f4\s+vfnmsub231pd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 3f be f4\s+vfnmsub231pd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff be f4\s+vfnmsub231pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 18 be f4\s+vfnmsub231ph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 3f be f4\s+vfnmsub231ph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 ff be f4\s+vfnmsub231ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 18 be f4\s+vfnmsub231ps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 3f be f4\s+vfnmsub231ps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 ff be f4\s+vfnmsub231ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 f9 18 42 f5\s+vgetexppd ymm6,ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f2 f9 1f 42 f5\s+vgetexppd ymm6\{k7\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f2 f9 9f 42 f5\s+vgetexppd ymm6\{k7\}\{z\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f6 79 18 42 f5\s+vgetexpph ymm6,ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f6 79 1f 42 f5\s+vgetexpph ymm6\{k7\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f6 79 9f 42 f5\s+vgetexpph ymm6\{k7\}\{z\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f2 79 18 42 f5\s+vgetexpps ymm6,ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f2 79 1f 42 f5\s+vgetexpps ymm6\{k7\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f2 79 9f 42 f5\s+vgetexpps ymm6\{k7\}\{z\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f3 f9 18 26 f5 7b\s+vgetmantpd ymm6,ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 f9 1f 26 f5 7b\s+vgetmantpd ymm6\{k7\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 f9 9f 26 f5 7b\s+vgetmantpd ymm6\{k7\}\{z\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 78 18 26 f5 7b\s+vgetmantph ymm6,ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 78 1f 26 f5 7b\s+vgetmantph ymm6\{k7\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 78 9f 26 f5 7b\s+vgetmantph ymm6\{k7\}\{z\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 79 18 26 f5 7b\s+vgetmantps ymm6,ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 79 1f 26 f5 7b\s+vgetmantps ymm6\{k7\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 79 9f 26 f5 7b\s+vgetmantps ymm6\{k7\}\{z\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f1 d1 18 5f f4\s+vmaxpd ymm6,ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 1f 5f f4\s+vmaxpd ymm6\{k7\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 9f 5f f4\s+vmaxpd ymm6\{k7\}\{z\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f5 50 18 5f f4\s+vmaxph ymm6,ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f5 50 1f 5f f4\s+vmaxph ymm6\{k7\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f5 50 9f 5f f4\s+vmaxph ymm6\{k7\}\{z\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 50 18 5f f4\s+vmaxps ymm6,ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 50 1f 5f f4\s+vmaxps ymm6\{k7\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 50 9f 5f f4\s+vmaxps ymm6\{k7\}\{z\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 18 5d f4\s+vminpd ymm6,ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 1f 5d f4\s+vminpd ymm6\{k7\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 9f 5d f4\s+vminpd ymm6\{k7\}\{z\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f5 50 18 5d f4\s+vminph ymm6,ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f5 50 1f 5d f4\s+vminph ymm6\{k7\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f5 50 9f 5d f4\s+vminph ymm6\{k7\}\{z\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 50 18 5d f4\s+vminps ymm6,ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 50 1f 5d f4\s+vminps ymm6\{k7\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 50 9f 5d f4\s+vminps ymm6\{k7\}\{z\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 18 59 f4\s+vmulpd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 3f 59 f4\s+vmulpd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 ff 59 f4\s+vmulpd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 18 59 f4\s+vmulph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 3f 59 f4\s+vmulph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 ff 59 f4\s+vmulph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 18 59 f4\s+vmulps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 3f 59 f4\s+vmulps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 ff 59 f4\s+vmulps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f3 d1 18 50 f4 7b\s+vrangepd ymm6,ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 d1 1f 50 f4 7b\s+vrangepd ymm6\{k7\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 d1 9f 50 f4 7b\s+vrangepd ymm6\{k7\}\{z\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 51 18 50 f4 7b\s+vrangeps ymm6,ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 51 1f 50 f4 7b\s+vrangeps ymm6\{k7\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 51 9f 50 f4 7b\s+vrangeps ymm6\{k7\}\{z\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 f9 18 56 f5 7b\s+vreducepd ymm6,ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 f9 1f 56 f5 7b\s+vreducepd ymm6\{k7\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 f9 9f 56 f5 7b\s+vreducepd ymm6\{k7\}\{z\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 78 18 56 f5 7b\s+vreduceph ymm6,ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 78 1f 56 f5 7b\s+vreduceph ymm6\{k7\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 78 9f 56 f5 7b\s+vreduceph ymm6\{k7\}\{z\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 79 18 56 f5 7b\s+vreduceps ymm6,ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 79 1f 56 f5 7b\s+vreduceps ymm6\{k7\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 79 9f 56 f5 7b\s+vreduceps ymm6\{k7\}\{z\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 f9 18 09 f5 7b\s+vrndscalepd ymm6,ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 f9 1f 09 f5 7b\s+vrndscalepd ymm6\{k7\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 f9 9f 09 f5 7b\s+vrndscalepd ymm6\{k7\}\{z\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 78 18 08 f5 7b\s+vrndscaleph ymm6,ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 78 1f 08 f5 7b\s+vrndscaleph ymm6\{k7\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 78 9f 08 f5 7b\s+vrndscaleph ymm6\{k7\}\{z\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 79 18 08 f5 7b\s+vrndscaleps ymm6,ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 79 1f 08 f5 7b\s+vrndscaleps ymm6\{k7\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 79 9f 08 f5 7b\s+vrndscaleps ymm6\{k7\}\{z\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f2 d1 18 2c f4\s+vscalefpd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 3f 2c f4\s+vscalefpd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff 2c f4\s+vscalefpd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 18 2c f4\s+vscalefph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 3f 2c f4\s+vscalefph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 ff 2c f4\s+vscalefph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 18 2c f4\s+vscalefps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 3f 2c f4\s+vscalefps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 ff 2c f4\s+vscalefps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 51 f5\s+vsqrtpd ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 3f 51 f5\s+vsqrtpd ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 ff 51 f5\s+vsqrtpd ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 18 51 f5\s+vsqrtph ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 3f 51 f5\s+vsqrtph ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 ff 51 f5\s+vsqrtph ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 78 18 51 f5\s+vsqrtps ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 78 3f 51 f5\s+vsqrtps ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 78 ff 51 f5\s+vsqrtps ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 18 5c f4\s+vsubpd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 3f 5c f4\s+vsubpd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 ff 5c f4\s+vsubpd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 18 5c f4\s+vsubph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 3f 5c f4\s+vsubph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 ff 5c f4\s+vsubph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 18 5c f4\s+vsubps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 3f 5c f4\s+vsubps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 ff 5c f4\s+vsubps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 18 58 f4\s+vaddpd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 3f 58 f4\s+vaddpd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 ff 58 f4\s+vaddpd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 18 58 f4\s+vaddph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 3f 58 f4\s+vaddph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 ff 58 f4\s+vaddph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 18 58 f4\s+vaddps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 3f 58 f4\s+vaddps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 ff 58 f4\s+vaddps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 18 c2 ec 7b\s+vcmppd k5,ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f1 d1 1f c2 ec 7b\s+vcmppd k5\{k7\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 50 18 c2 ec 7b\s+vcmpph k5,ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 50 1f c2 ec 7b\s+vcmpph k5\{k7\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f1 50 18 c2 ec 7b\s+vcmpps k5,ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f1 50 1f c2 ec 7b\s+vcmpps k5\{k7\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f5 78 18 5b f5\s+vcvtdq2ph xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 3f 5b f5\s+vcvtdq2ph xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 ff 5b f5\s+vcvtdq2ph xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 78 18 5b f5\s+vcvtdq2ps ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 78 3f 5b f5\s+vcvtdq2ps ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 78 ff 5b f5\s+vcvtdq2ps ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 fb 18 e6 f5\s+vcvtpd2dq xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 fb 3f e6 f5\s+vcvtpd2dq xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 fb ff e6 f5\s+vcvtpd2dq xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 f9 18 5a f5\s+vcvtpd2ph xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 f9 3f 5a f5\s+vcvtpd2ph xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 f9 ff 5a f5\s+vcvtpd2ph xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 5a f5\s+vcvtpd2ps xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 3f 5a f5\s+vcvtpd2ps xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 ff 5a f5\s+vcvtpd2ps xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 7b f5\s+vcvtpd2qq ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 3f 7b f5\s+vcvtpd2qq ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 ff 7b f5\s+vcvtpd2qq ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 f8 18 79 f5\s+vcvtpd2udq xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 f8 3f 79 f5\s+vcvtpd2udq xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 f8 ff 79 f5\s+vcvtpd2udq xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 79 f5\s+vcvtpd2uqq ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 3f 79 f5\s+vcvtpd2uqq ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 ff 79 f5\s+vcvtpd2uqq ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 18 5b f5\s+vcvtph2dq ymm6,xmm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 3f 5b f5\s+vcvtph2dq ymm6\{k7\},xmm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 ff 5b f5\s+vcvtph2dq ymm6\{k7\}\{z\},xmm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 18 5a f5\s+vcvtph2pd ymm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 78 1f 5a f5\s+vcvtph2pd ymm6\{k7\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 78 9f 5a f5\s+vcvtph2pd ymm6\{k7\}\{z\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f2 79 18 13 f5\s+vcvtph2ps ymm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f2 79 1f 13 f5\s+vcvtph2ps ymm6\{k7\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f2 79 9f 13 f5\s+vcvtph2ps ymm6\{k7\}\{z\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f6 79 18 13 f5\s+vcvtph2psx ymm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f6 79 1f 13 f5\s+vcvtph2psx ymm6\{k7\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f6 79 9f 13 f5\s+vcvtph2psx ymm6\{k7\}\{z\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 79 18 7b f5\s+vcvtph2qq ymm6,xmm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 3f 7b f5\s+vcvtph2qq ymm6\{k7\},xmm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 ff 7b f5\s+vcvtph2qq ymm6\{k7\}\{z\},xmm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 18 79 f5\s+vcvtph2udq ymm6,xmm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 3f 79 f5\s+vcvtph2udq ymm6\{k7\},xmm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 ff 79 f5\s+vcvtph2udq ymm6\{k7\}\{z\},xmm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 18 79 f5\s+vcvtph2uqq ymm6,xmm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 3f 79 f5\s+vcvtph2uqq ymm6\{k7\},xmm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 ff 79 f5\s+vcvtph2uqq ymm6\{k7\}\{z\},xmm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 18 7d f5\s+vcvtph2uw ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 3f 7d f5\s+vcvtph2uw ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 ff 7d f5\s+vcvtph2uw ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 18 7d f5\s+vcvtph2w ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 3f 7d f5\s+vcvtph2w ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 ff 7d f5\s+vcvtph2w ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 79 18 5b f5\s+vcvtps2dq ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 79 3f 5b f5\s+vcvtps2dq ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 79 ff 5b f5\s+vcvtps2dq ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 78 18 5a f5\s+vcvtps2pd ymm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 78 1f 5a f5\s+vcvtps2pd ymm6\{k7\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 78 9f 5a f5\s+vcvtps2pd ymm6\{k7\}\{z\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 79 18 1d f5\s+vcvtps2phx xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 3f 1d f5\s+vcvtps2phx xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 ff 1d f5\s+vcvtps2phx xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 79 18 7b f5\s+vcvtps2qq ymm6,xmm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 79 3f 7b f5\s+vcvtps2qq ymm6\{k7\},xmm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 79 ff 7b f5\s+vcvtps2qq ymm6\{k7\}\{z\},xmm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 78 18 79 f5\s+vcvtps2udq ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 78 3f 79 f5\s+vcvtps2udq ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 78 ff 79 f5\s+vcvtps2udq ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 79 18 79 f5\s+vcvtps2uqq ymm6,xmm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 79 3f 79 f5\s+vcvtps2uqq ymm6\{k7\},xmm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 79 ff 79 f5\s+vcvtps2uqq ymm6\{k7\}\{z\},xmm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 fa 18 e6 f5\s+vcvtqq2pd ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 fa 3f e6 f5\s+vcvtqq2pd ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 fa ff e6 f5\s+vcvtqq2pd ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 f8 18 5b f5\s+vcvtqq2ph xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 f8 3f 5b f5\s+vcvtqq2ph xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 f8 ff 5b f5\s+vcvtqq2ph xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 f8 18 5b f5\s+vcvtqq2ps xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 f8 3f 5b f5\s+vcvtqq2ps xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 f8 ff 5b f5\s+vcvtqq2ps xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 e6 f5\s+vcvttpd2dq xmm6,ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 1f e6 f5\s+vcvttpd2dq xmm6\{k7\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 9f e6 f5\s+vcvttpd2dq xmm6\{k7\}\{z\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 7a f5\s+vcvttpd2qq ymm6,ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 1f 7a f5\s+vcvttpd2qq ymm6\{k7\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 9f 7a f5\s+vcvttpd2qq ymm6\{k7\}\{z\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f8 18 78 f5\s+vcvttpd2udq xmm6,ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f8 1f 78 f5\s+vcvttpd2udq xmm6\{k7\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f8 9f 78 f5\s+vcvttpd2udq xmm6\{k7\}\{z\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 78 f5\s+vcvttpd2uqq ymm6,ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 1f 78 f5\s+vcvttpd2uqq ymm6\{k7\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 9f 78 f5\s+vcvttpd2uqq ymm6\{k7\}\{z\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 7a 18 5b f5\s+vcvttph2dq ymm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 7a 1f 5b f5\s+vcvttph2dq ymm6\{k7\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 7a 9f 5b f5\s+vcvttph2dq ymm6\{k7\}\{z\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 79 18 7a f5\s+vcvttph2qq ymm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 79 1f 7a f5\s+vcvttph2qq ymm6\{k7\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 79 9f 7a f5\s+vcvttph2qq ymm6\{k7\}\{z\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 78 18 78 f5\s+vcvttph2udq ymm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 78 1f 78 f5\s+vcvttph2udq ymm6\{k7\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 78 9f 78 f5\s+vcvttph2udq ymm6\{k7\}\{z\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 79 18 78 f5\s+vcvttph2uqq ymm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 79 1f 78 f5\s+vcvttph2uqq ymm6\{k7\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 79 9f 78 f5\s+vcvttph2uqq ymm6\{k7\}\{z\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 78 18 7c f5\s+vcvttph2uw ymm6,ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 78 1f 7c f5\s+vcvttph2uw ymm6\{k7\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 78 9f 7c f5\s+vcvttph2uw ymm6\{k7\}\{z\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 79 18 7c f5\s+vcvttph2w ymm6,ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 79 1f 7c f5\s+vcvttph2w ymm6\{k7\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 79 9f 7c f5\s+vcvttph2w ymm6\{k7\}\{z\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 7a 18 5b f5\s+vcvttps2dq ymm6,ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 7a 1f 5b f5\s+vcvttps2dq ymm6\{k7\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 7a 9f 5b f5\s+vcvttps2dq ymm6\{k7\}\{z\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 79 18 7a f5\s+vcvttps2qq ymm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 79 1f 7a f5\s+vcvttps2qq ymm6\{k7\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 79 9f 7a f5\s+vcvttps2qq ymm6\{k7\}\{z\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 78 18 78 f5\s+vcvttps2udq ymm6,ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 78 1f 78 f5\s+vcvttps2udq ymm6\{k7\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 78 9f 78 f5\s+vcvttps2udq ymm6\{k7\}\{z\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 79 18 78 f5\s+vcvttps2uqq ymm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 79 1f 78 f5\s+vcvttps2uqq ymm6\{k7\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 79 9f 78 f5\s+vcvttps2uqq ymm6\{k7\}\{z\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 7b 18 7a f5\s+vcvtudq2ph xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 7b 3f 7a f5\s+vcvtudq2ph xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 7b ff 7a f5\s+vcvtudq2ph xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 7b 18 7a f5\s+vcvtudq2ps ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 7b 3f 7a f5\s+vcvtudq2ps ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 7b ff 7a f5\s+vcvtudq2ps ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 fa 18 7a f5\s+vcvtuqq2pd ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 fa 3f 7a f5\s+vcvtuqq2pd ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 fa ff 7a f5\s+vcvtuqq2pd ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 fb 18 7a f5\s+vcvtuqq2ph xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 fb 3f 7a f5\s+vcvtuqq2ph xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 fb ff 7a f5\s+vcvtuqq2ph xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 fb 18 7a f5\s+vcvtuqq2ps xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 fb 3f 7a f5\s+vcvtuqq2ps xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 fb ff 7a f5\s+vcvtuqq2ps xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 7b 18 7d f5\s+vcvtuw2ph ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 7b 3f 7d f5\s+vcvtuw2ph ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 7b ff 7d f5\s+vcvtuw2ph ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 7a 18 7d f5\s+vcvtw2ph ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 7a 3f 7d f5\s+vcvtw2ph ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 7a ff 7d f5\s+vcvtw2ph ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 18 5e f4\s+vdivpd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 3f 5e f4\s+vdivpd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 ff 5e f4\s+vdivpd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 18 5e f4\s+vdivph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 3f 5e f4\s+vdivph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 ff 5e f4\s+vdivph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 18 5e f4\s+vdivps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 3f 5e f4\s+vdivps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 ff 5e f4\s+vdivps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 53 18 56 f4\s+vfcmaddcph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 53 3f 56 f4\s+vfcmaddcph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 53 ff 56 f4\s+vfcmaddcph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 53 18 d6 f4\s+vfcmulcph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 53 3f d6 f4\s+vfcmulcph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 53 ff d6 f4\s+vfcmulcph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f3 d1 18 54 f4 7b\s+vfixupimmpd ymm6,ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 d1 1f 54 f4 7b\s+vfixupimmpd ymm6\{k7\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 d1 9f 54 f4 7b\s+vfixupimmpd ymm6\{k7\}\{z\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 51 18 54 f4 7b\s+vfixupimmps ymm6,ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 51 1f 54 f4 7b\s+vfixupimmps ymm6\{k7\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 51 9f 54 f4 7b\s+vfixupimmps ymm6\{k7\}\{z\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f2 d1 18 98 f4\s+vfmadd132pd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 3f 98 f4\s+vfmadd132pd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff 98 f4\s+vfmadd132pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 18 98 f4\s+vfmadd132ph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 3f 98 f4\s+vfmadd132ph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 ff 98 f4\s+vfmadd132ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 18 98 f4\s+vfmadd132ps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 3f 98 f4\s+vfmadd132ps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 ff 98 f4\s+vfmadd132ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 a8 f4\s+vfmadd213pd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 3f a8 f4\s+vfmadd213pd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff a8 f4\s+vfmadd213pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 18 a8 f4\s+vfmadd213ph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 3f a8 f4\s+vfmadd213ph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 ff a8 f4\s+vfmadd213ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 18 a8 f4\s+vfmadd213ps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 3f a8 f4\s+vfmadd213ps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 ff a8 f4\s+vfmadd213ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 b8 f4\s+vfmadd231pd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 3f b8 f4\s+vfmadd231pd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff b8 f4\s+vfmadd231pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 18 b8 f4\s+vfmadd231ph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 3f b8 f4\s+vfmadd231ph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 ff b8 f4\s+vfmadd231ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 18 b8 f4\s+vfmadd231ps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 3f b8 f4\s+vfmadd231ps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 ff b8 f4\s+vfmadd231ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 52 18 56 f4\s+vfmaddcph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 52 3f 56 f4\s+vfmaddcph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 52 ff 56 f4\s+vfmaddcph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
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+\s*[a-f0-9]+:\s*62 f3 f9 1f 26 f5 7b\s+vgetmantpd ymm6\{k7\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 f9 9f 26 f5 7b\s+vgetmantpd ymm6\{k7\}\{z\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 78 18 26 f5 7b\s+vgetmantph ymm6,ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 78 1f 26 f5 7b\s+vgetmantph ymm6\{k7\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 78 9f 26 f5 7b\s+vgetmantph ymm6\{k7\}\{z\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 79 18 26 f5 7b\s+vgetmantps ymm6,ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 79 1f 26 f5 7b\s+vgetmantps ymm6\{k7\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 79 9f 26 f5 7b\s+vgetmantps ymm6\{k7\}\{z\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f1 d1 18 5f f4\s+vmaxpd ymm6,ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 1f 5f f4\s+vmaxpd ymm6\{k7\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 9f 5f f4\s+vmaxpd ymm6\{k7\}\{z\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f5 50 18 5f f4\s+vmaxph ymm6,ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f5 50 1f 5f f4\s+vmaxph ymm6\{k7\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f5 50 9f 5f f4\s+vmaxph ymm6\{k7\}\{z\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 50 18 5f f4\s+vmaxps ymm6,ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 50 1f 5f f4\s+vmaxps ymm6\{k7\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 50 9f 5f f4\s+vmaxps ymm6\{k7\}\{z\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 18 5d f4\s+vminpd ymm6,ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 1f 5d f4\s+vminpd ymm6\{k7\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 9f 5d f4\s+vminpd ymm6\{k7\}\{z\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f5 50 18 5d f4\s+vminph ymm6,ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f5 50 1f 5d f4\s+vminph ymm6\{k7\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f5 50 9f 5d f4\s+vminph ymm6\{k7\}\{z\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 50 18 5d f4\s+vminps ymm6,ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 50 1f 5d f4\s+vminps ymm6\{k7\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 50 9f 5d f4\s+vminps ymm6\{k7\}\{z\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 18 59 f4\s+vmulpd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 3f 59 f4\s+vmulpd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 ff 59 f4\s+vmulpd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 18 59 f4\s+vmulph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 3f 59 f4\s+vmulph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 ff 59 f4\s+vmulph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 18 59 f4\s+vmulps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 3f 59 f4\s+vmulps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 ff 59 f4\s+vmulps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f3 d1 18 50 f4 7b\s+vrangepd ymm6,ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 d1 1f 50 f4 7b\s+vrangepd ymm6\{k7\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 d1 9f 50 f4 7b\s+vrangepd ymm6\{k7\}\{z\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 51 18 50 f4 7b\s+vrangeps ymm6,ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 51 1f 50 f4 7b\s+vrangeps ymm6\{k7\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 51 9f 50 f4 7b\s+vrangeps ymm6\{k7\}\{z\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 f9 18 56 f5 7b\s+vreducepd ymm6,ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 f9 1f 56 f5 7b\s+vreducepd ymm6\{k7\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 f9 9f 56 f5 7b\s+vreducepd ymm6\{k7\}\{z\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 78 18 56 f5 7b\s+vreduceph ymm6,ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 78 1f 56 f5 7b\s+vreduceph ymm6\{k7\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 78 9f 56 f5 7b\s+vreduceph ymm6\{k7\}\{z\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 79 18 56 f5 7b\s+vreduceps ymm6,ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 79 1f 56 f5 7b\s+vreduceps ymm6\{k7\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 79 9f 56 f5 7b\s+vreduceps ymm6\{k7\}\{z\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 f9 18 09 f5 7b\s+vrndscalepd ymm6,ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 f9 1f 09 f5 7b\s+vrndscalepd ymm6\{k7\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 f9 9f 09 f5 7b\s+vrndscalepd ymm6\{k7\}\{z\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 78 18 08 f5 7b\s+vrndscaleph ymm6,ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 78 1f 08 f5 7b\s+vrndscaleph ymm6\{k7\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 78 9f 08 f5 7b\s+vrndscaleph ymm6\{k7\}\{z\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 79 18 08 f5 7b\s+vrndscaleps ymm6,ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 79 1f 08 f5 7b\s+vrndscaleps ymm6\{k7\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 79 9f 08 f5 7b\s+vrndscaleps ymm6\{k7\}\{z\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f2 d1 18 2c f4\s+vscalefpd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 3f 2c f4\s+vscalefpd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff 2c f4\s+vscalefpd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 18 2c f4\s+vscalefph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 3f 2c f4\s+vscalefph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 ff 2c f4\s+vscalefph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 18 2c f4\s+vscalefps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 3f 2c f4\s+vscalefps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 ff 2c f4\s+vscalefps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 51 f5\s+vsqrtpd ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 3f 51 f5\s+vsqrtpd ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 ff 51 f5\s+vsqrtpd ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 18 51 f5\s+vsqrtph ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 3f 51 f5\s+vsqrtph ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 ff 51 f5\s+vsqrtph ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 78 18 51 f5\s+vsqrtps ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 78 3f 51 f5\s+vsqrtps ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 78 ff 51 f5\s+vsqrtps ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 18 5c f4\s+vsubpd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 3f 5c f4\s+vsubpd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 ff 5c f4\s+vsubpd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 18 5c f4\s+vsubph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 3f 5c f4\s+vsubph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 ff 5c f4\s+vsubph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 18 5c f4\s+vsubps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 3f 5c f4\s+vsubps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 ff 5c f4\s+vsubps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
diff --git a/gas/testsuite/gas/i386/avx10_2-rounding.d b/gas/testsuite/gas/i386/avx10_2-rounding.d
new file mode 100644
index 00000000000..14ebb83c679
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-rounding.d
@@ -0,0 +1,451 @@ 
+#objdump: -dw
+#name: i386 AVX10.2 rounding insns
+#source: avx10_2-rounding.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*62 f1 d1 18 58 f4\s+vaddpd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 d1 3f 58 f4\s+vaddpd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 d1 ff 58 f4\s+vaddpd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 50 18 58 f4\s+vaddph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 50 3f 58 f4\s+vaddph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 50 ff 58 f4\s+vaddph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 50 18 58 f4\s+vaddps \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 50 3f 58 f4\s+vaddps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 50 ff 58 f4\s+vaddps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 d1 18 c2 ec 7b\s+vcmppd \$0x7b,\{sae\},%ymm4,%ymm5,%k5
+\s*[a-f0-9]+:\s*62 f1 d1 1f c2 ec 7b\s+vcmppd \$0x7b,\{sae\},%ymm4,%ymm5,%k5\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 50 18 c2 ec 7b\s+vcmpph \$0x7b,\{sae\},%ymm4,%ymm5,%k5
+\s*[a-f0-9]+:\s*62 f3 50 1f c2 ec 7b\s+vcmpph \$0x7b,\{sae\},%ymm4,%ymm5,%k5\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 50 18 c2 ec 7b\s+vcmpps \$0x7b,\{sae\},%ymm4,%ymm5,%k5
+\s*[a-f0-9]+:\s*62 f1 50 1f c2 ec 7b\s+vcmpps \$0x7b,\{sae\},%ymm4,%ymm5,%k5\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 78 18 5b f5\s+vcvtdq2ph \{rn-sae\},%ymm5,%xmm6
+\s*[a-f0-9]+:\s*62 f5 78 3f 5b f5\s+vcvtdq2ph \{rd-sae\},%ymm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 78 ff 5b f5\s+vcvtdq2ph \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 78 18 5b f5\s+vcvtdq2ps \{rn-sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 78 3f 5b f5\s+vcvtdq2ps \{rd-sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 78 ff 5b f5\s+vcvtdq2ps \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 fb 18 e6 f5\s+vcvtpd2dq \{rn-sae\},%ymm5,%xmm6
+\s*[a-f0-9]+:\s*62 f1 fb 3f e6 f5\s+vcvtpd2dq \{rd-sae\},%ymm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 fb ff e6 f5\s+vcvtpd2dq \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 f9 18 5a f5\s+vcvtpd2ph \{rn-sae\},%ymm5,%xmm6
+\s*[a-f0-9]+:\s*62 f5 f9 3f 5a f5\s+vcvtpd2ph \{rd-sae\},%ymm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 f9 ff 5a f5\s+vcvtpd2ph \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 5a f5\s+vcvtpd2ps \{rn-sae\},%ymm5,%xmm6
+\s*[a-f0-9]+:\s*62 f1 f9 3f 5a f5\s+vcvtpd2ps \{rd-sae\},%ymm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 f9 ff 5a f5\s+vcvtpd2ps \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 7b f5\s+vcvtpd2qq \{rn-sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 f9 3f 7b f5\s+vcvtpd2qq \{rd-sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 f9 ff 7b f5\s+vcvtpd2qq \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 f8 18 79 f5\s+vcvtpd2udq \{rn-sae\},%ymm5,%xmm6
+\s*[a-f0-9]+:\s*62 f1 f8 3f 79 f5\s+vcvtpd2udq \{rd-sae\},%ymm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 f8 ff 79 f5\s+vcvtpd2udq \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 79 f5\s+vcvtpd2uqq \{rn-sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 f9 3f 79 f5\s+vcvtpd2uqq \{rd-sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 f9 ff 79 f5\s+vcvtpd2uqq \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 79 18 5b f5\s+vcvtph2dq \{rn-sae\},%xmm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 79 3f 5b f5\s+vcvtph2dq \{rd-sae\},%xmm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 79 ff 5b f5\s+vcvtph2dq \{rz-sae\},%xmm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 78 18 5a f5\s+vcvtph2pd \{sae\},%xmm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 78 1f 5a f5\s+vcvtph2pd \{sae\},%xmm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 78 9f 5a f5\s+vcvtph2pd \{sae\},%xmm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 79 18 13 f5\s+vcvtph2ps \{sae\},%xmm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 79 1f 13 f5\s+vcvtph2ps \{sae\},%xmm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 79 9f 13 f5\s+vcvtph2ps \{sae\},%xmm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 79 18 13 f5\s+vcvtph2psx \{sae\},%xmm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 79 1f 13 f5\s+vcvtph2psx \{sae\},%xmm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 79 9f 13 f5\s+vcvtph2psx \{sae\},%xmm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 79 18 7b f5\s+vcvtph2qq \{rn-sae\},%xmm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 79 3f 7b f5\s+vcvtph2qq \{rd-sae\},%xmm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 79 ff 7b f5\s+vcvtph2qq \{rz-sae\},%xmm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 78 18 79 f5\s+vcvtph2udq \{rn-sae\},%xmm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 78 3f 79 f5\s+vcvtph2udq \{rd-sae\},%xmm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 78 ff 79 f5\s+vcvtph2udq \{rz-sae\},%xmm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 79 18 79 f5\s+vcvtph2uqq \{rn-sae\},%xmm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 79 3f 79 f5\s+vcvtph2uqq \{rd-sae\},%xmm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 79 ff 79 f5\s+vcvtph2uqq \{rz-sae\},%xmm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 78 18 7d f5\s+vcvtph2uw \{rn-sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 78 3f 7d f5\s+vcvtph2uw \{rd-sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 78 ff 7d f5\s+vcvtph2uw \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 79 18 7d f5\s+vcvtph2w \{rn-sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 79 3f 7d f5\s+vcvtph2w \{rd-sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 79 ff 7d f5\s+vcvtph2w \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 79 18 5b f5\s+vcvtps2dq \{rn-sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 79 3f 5b f5\s+vcvtps2dq \{rd-sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 79 ff 5b f5\s+vcvtps2dq \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 78 18 5a f5\s+vcvtps2pd \{sae\},%xmm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 78 1f 5a f5\s+vcvtps2pd \{sae\},%xmm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 78 9f 5a f5\s+vcvtps2pd \{sae\},%xmm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 79 18 1d f5\s+vcvtps2phx \{rn-sae\},%ymm5,%xmm6
+\s*[a-f0-9]+:\s*62 f5 79 3f 1d f5\s+vcvtps2phx \{rd-sae\},%ymm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 79 ff 1d f5\s+vcvtps2phx \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 79 18 7b f5\s+vcvtps2qq \{rn-sae\},%xmm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 79 3f 7b f5\s+vcvtps2qq \{rd-sae\},%xmm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 79 ff 7b f5\s+vcvtps2qq \{rz-sae\},%xmm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 78 18 79 f5\s+vcvtps2udq \{rn-sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 78 3f 79 f5\s+vcvtps2udq \{rd-sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 78 ff 79 f5\s+vcvtps2udq \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 79 18 79 f5\s+vcvtps2uqq \{rn-sae\},%xmm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 79 3f 79 f5\s+vcvtps2uqq \{rd-sae\},%xmm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 79 ff 79 f5\s+vcvtps2uqq \{rz-sae\},%xmm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 fa 18 e6 f5\s+vcvtqq2pd \{rn-sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 fa 3f e6 f5\s+vcvtqq2pd \{rd-sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 fa ff e6 f5\s+vcvtqq2pd \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 f8 18 5b f5\s+vcvtqq2ph \{rn-sae\},%ymm5,%xmm6
+\s*[a-f0-9]+:\s*62 f5 f8 3f 5b f5\s+vcvtqq2ph \{rd-sae\},%ymm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 f8 ff 5b f5\s+vcvtqq2ph \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 f8 18 5b f5\s+vcvtqq2ps \{rn-sae\},%ymm5,%xmm6
+\s*[a-f0-9]+:\s*62 f1 f8 3f 5b f5\s+vcvtqq2ps \{rd-sae\},%ymm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 f8 ff 5b f5\s+vcvtqq2ps \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 e6 f5\s+vcvttpd2dq \{sae\},%ymm5,%xmm6
+\s*[a-f0-9]+:\s*62 f1 f9 1f e6 f5\s+vcvttpd2dq \{sae\},%ymm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 f9 9f e6 f5\s+vcvttpd2dq \{sae\},%ymm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 7a f5\s+vcvttpd2qq \{sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 f9 1f 7a f5\s+vcvttpd2qq \{sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 f9 9f 7a f5\s+vcvttpd2qq \{sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 f8 18 78 f5\s+vcvttpd2udq \{sae\},%ymm5,%xmm6
+\s*[a-f0-9]+:\s*62 f1 f8 1f 78 f5\s+vcvttpd2udq \{sae\},%ymm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 f8 9f 78 f5\s+vcvttpd2udq \{sae\},%ymm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 78 f5\s+vcvttpd2uqq \{sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 f9 1f 78 f5\s+vcvttpd2uqq \{sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 f9 9f 78 f5\s+vcvttpd2uqq \{sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 7a 18 5b f5\s+vcvttph2dq \{sae\},%xmm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 7a 1f 5b f5\s+vcvttph2dq \{sae\},%xmm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 7a 9f 5b f5\s+vcvttph2dq \{sae\},%xmm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 79 18 7a f5\s+vcvttph2qq \{sae\},%xmm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 79 1f 7a f5\s+vcvttph2qq \{sae\},%xmm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 79 9f 7a f5\s+vcvttph2qq \{sae\},%xmm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 78 18 78 f5\s+vcvttph2udq \{sae\},%xmm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 78 1f 78 f5\s+vcvttph2udq \{sae\},%xmm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 78 9f 78 f5\s+vcvttph2udq \{sae\},%xmm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 79 18 78 f5\s+vcvttph2uqq \{sae\},%xmm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 79 1f 78 f5\s+vcvttph2uqq \{sae\},%xmm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 79 9f 78 f5\s+vcvttph2uqq \{sae\},%xmm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 78 18 7c f5\s+vcvttph2uw \{sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 78 1f 7c f5\s+vcvttph2uw \{sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 78 9f 7c f5\s+vcvttph2uw \{sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 79 18 7c f5\s+vcvttph2w \{sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 79 1f 7c f5\s+vcvttph2w \{sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 79 9f 7c f5\s+vcvttph2w \{sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 7a 18 5b f5\s+vcvttps2dq \{sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 7a 1f 5b f5\s+vcvttps2dq \{sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 7a 9f 5b f5\s+vcvttps2dq \{sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 79 18 7a f5\s+vcvttps2qq \{sae\},%xmm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 79 1f 7a f5\s+vcvttps2qq \{sae\},%xmm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 79 9f 7a f5\s+vcvttps2qq \{sae\},%xmm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 78 18 78 f5\s+vcvttps2udq \{sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 78 1f 78 f5\s+vcvttps2udq \{sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 78 9f 78 f5\s+vcvttps2udq \{sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 79 18 78 f5\s+vcvttps2uqq \{sae\},%xmm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 79 1f 78 f5\s+vcvttps2uqq \{sae\},%xmm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 79 9f 78 f5\s+vcvttps2uqq \{sae\},%xmm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 7b 18 7a f5\s+vcvtudq2ph \{rn-sae\},%ymm5,%xmm6
+\s*[a-f0-9]+:\s*62 f5 7b 3f 7a f5\s+vcvtudq2ph \{rd-sae\},%ymm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 7b ff 7a f5\s+vcvtudq2ph \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 7b 18 7a f5\s+vcvtudq2ps \{rn-sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 7b 3f 7a f5\s+vcvtudq2ps \{rd-sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 7b ff 7a f5\s+vcvtudq2ps \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 fa 18 7a f5\s+vcvtuqq2pd \{rn-sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 fa 3f 7a f5\s+vcvtuqq2pd \{rd-sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 fa ff 7a f5\s+vcvtuqq2pd \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 fb 18 7a f5\s+vcvtuqq2ph \{rn-sae\},%ymm5,%xmm6
+\s*[a-f0-9]+:\s*62 f5 fb 3f 7a f5\s+vcvtuqq2ph \{rd-sae\},%ymm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 fb ff 7a f5\s+vcvtuqq2ph \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 fb 18 7a f5\s+vcvtuqq2ps \{rn-sae\},%ymm5,%xmm6
+\s*[a-f0-9]+:\s*62 f1 fb 3f 7a f5\s+vcvtuqq2ps \{rd-sae\},%ymm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 fb ff 7a f5\s+vcvtuqq2ps \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 7b 18 7d f5\s+vcvtuw2ph \{rn-sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 7b 3f 7d f5\s+vcvtuw2ph \{rd-sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 7b ff 7d f5\s+vcvtuw2ph \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 7a 18 7d f5\s+vcvtw2ph \{rn-sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 7a 3f 7d f5\s+vcvtw2ph \{rd-sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 7a ff 7d f5\s+vcvtw2ph \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 d1 18 5e f4\s+vdivpd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 d1 3f 5e f4\s+vdivpd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 d1 ff 5e f4\s+vdivpd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 50 18 5e f4\s+vdivph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 50 3f 5e f4\s+vdivph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 50 ff 5e f4\s+vdivph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 50 18 5e f4\s+vdivps \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 50 3f 5e f4\s+vdivps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 50 ff 5e f4\s+vdivps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 53 18 56 f4\s+vfcmaddcph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 53 3f 56 f4\s+vfcmaddcph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 53 ff 56 f4\s+vfcmaddcph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 53 18 d6 f4\s+vfcmulcph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 53 3f d6 f4\s+vfcmulcph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 53 ff d6 f4\s+vfcmulcph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 d1 18 54 f4 7b\s+vfixupimmpd \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 d1 1f 54 f4 7b\s+vfixupimmpd \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 d1 9f 54 f4 7b\s+vfixupimmpd \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 51 18 54 f4 7b\s+vfixupimmps \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 51 1f 54 f4 7b\s+vfixupimmps \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 51 9f 54 f4 7b\s+vfixupimmps \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 98 f4\s+vfmadd132pd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 d1 3f 98 f4\s+vfmadd132pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff 98 f4\s+vfmadd132pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 51 18 98 f4\s+vfmadd132ph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 51 3f 98 f4\s+vfmadd132ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 51 ff 98 f4\s+vfmadd132ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 51 18 98 f4\s+vfmadd132ps \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 51 3f 98 f4\s+vfmadd132ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 51 ff 98 f4\s+vfmadd132ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 a8 f4\s+vfmadd213pd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 d1 3f a8 f4\s+vfmadd213pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff a8 f4\s+vfmadd213pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 51 18 a8 f4\s+vfmadd213ph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 51 3f a8 f4\s+vfmadd213ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 51 ff a8 f4\s+vfmadd213ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 51 18 a8 f4\s+vfmadd213ps \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 51 3f a8 f4\s+vfmadd213ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 51 ff a8 f4\s+vfmadd213ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 b8 f4\s+vfmadd231pd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 d1 3f b8 f4\s+vfmadd231pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff b8 f4\s+vfmadd231pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 51 18 b8 f4\s+vfmadd231ph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 51 3f b8 f4\s+vfmadd231ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 51 ff b8 f4\s+vfmadd231ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 51 18 b8 f4\s+vfmadd231ps \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 51 3f b8 f4\s+vfmadd231ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 51 ff b8 f4\s+vfmadd231ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 52 18 56 f4\s+vfmaddcph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 52 3f 56 f4\s+vfmaddcph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 52 ff 56 f4\s+vfmaddcph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 96 f4\s+vfmaddsub132pd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 d1 3f 96 f4\s+vfmaddsub132pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff 96 f4\s+vfmaddsub132pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 51 18 96 f4\s+vfmaddsub132ph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 51 3f 96 f4\s+vfmaddsub132ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 51 ff 96 f4\s+vfmaddsub132ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 51 18 96 f4\s+vfmaddsub132ps \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 51 3f 96 f4\s+vfmaddsub132ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 51 ff 96 f4\s+vfmaddsub132ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 a6 f4\s+vfmaddsub213pd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 d1 3f a6 f4\s+vfmaddsub213pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
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+\s*[a-f0-9]+:\s*62 f3 79 9f 26 f5 7b\s+vgetmantps \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 d1 18 5f f4\s+vmaxpd \{sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 d1 1f 5f f4\s+vmaxpd \{sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 d1 9f 5f f4\s+vmaxpd \{sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 50 18 5f f4\s+vmaxph \{sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 50 1f 5f f4\s+vmaxph \{sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 50 9f 5f f4\s+vmaxph \{sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 50 18 5f f4\s+vmaxps \{sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 50 1f 5f f4\s+vmaxps \{sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 50 9f 5f f4\s+vmaxps \{sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 d1 18 5d f4\s+vminpd \{sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 d1 1f 5d f4\s+vminpd \{sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 d1 9f 5d f4\s+vminpd \{sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 50 18 5d f4\s+vminph \{sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 50 1f 5d f4\s+vminph \{sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 50 9f 5d f4\s+vminph \{sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 50 18 5d f4\s+vminps \{sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 50 1f 5d f4\s+vminps \{sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 50 9f 5d f4\s+vminps \{sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 d1 18 59 f4\s+vmulpd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 d1 3f 59 f4\s+vmulpd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 d1 ff 59 f4\s+vmulpd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 50 18 59 f4\s+vmulph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 50 3f 59 f4\s+vmulph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 50 ff 59 f4\s+vmulph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 50 18 59 f4\s+vmulps \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 50 3f 59 f4\s+vmulps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 50 ff 59 f4\s+vmulps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 d1 18 50 f4 7b\s+vrangepd \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 d1 1f 50 f4 7b\s+vrangepd \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 d1 9f 50 f4 7b\s+vrangepd \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 51 18 50 f4 7b\s+vrangeps \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 51 1f 50 f4 7b\s+vrangeps \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 51 9f 50 f4 7b\s+vrangeps \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 f9 18 56 f5 7b\s+vreducepd \$0x7b,\{sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 f9 1f 56 f5 7b\s+vreducepd \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 f9 9f 56 f5 7b\s+vreducepd \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 78 18 56 f5 7b\s+vreduceph \$0x7b,\{sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 78 1f 56 f5 7b\s+vreduceph \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 78 9f 56 f5 7b\s+vreduceph \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 79 18 56 f5 7b\s+vreduceps \$0x7b,\{sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 79 1f 56 f5 7b\s+vreduceps \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 79 9f 56 f5 7b\s+vreduceps \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 f9 18 09 f5 7b\s+vrndscalepd \$0x7b,\{sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 f9 1f 09 f5 7b\s+vrndscalepd \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 f9 9f 09 f5 7b\s+vrndscalepd \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 78 18 08 f5 7b\s+vrndscaleph \$0x7b,\{sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 78 1f 08 f5 7b\s+vrndscaleph \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 78 9f 08 f5 7b\s+vrndscaleph \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 79 18 08 f5 7b\s+vrndscaleps \$0x7b,\{sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 79 1f 08 f5 7b\s+vrndscaleps \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 79 9f 08 f5 7b\s+vrndscaleps \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 2c f4\s+vscalefpd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 d1 3f 2c f4\s+vscalefpd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff 2c f4\s+vscalefpd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 51 18 2c f4\s+vscalefph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 51 3f 2c f4\s+vscalefph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 51 ff 2c f4\s+vscalefph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 51 18 2c f4\s+vscalefps \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 51 3f 2c f4\s+vscalefps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 51 ff 2c f4\s+vscalefps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 51 f5\s+vsqrtpd \{rn-sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 f9 3f 51 f5\s+vsqrtpd \{rd-sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 f9 ff 51 f5\s+vsqrtpd \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 78 18 51 f5\s+vsqrtph \{rn-sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 78 3f 51 f5\s+vsqrtph \{rd-sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 78 ff 51 f5\s+vsqrtph \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 78 18 51 f5\s+vsqrtps \{rn-sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 78 3f 51 f5\s+vsqrtps \{rd-sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 78 ff 51 f5\s+vsqrtps \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 d1 18 5c f4\s+vsubpd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 d1 3f 5c f4\s+vsubpd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 d1 ff 5c f4\s+vsubpd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 50 18 5c f4\s+vsubph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 50 3f 5c f4\s+vsubph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 50 ff 5c f4\s+vsubph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 50 18 5c f4\s+vsubps \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 50 3f 5c f4\s+vsubps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 50 ff 5c f4\s+vsubps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+#pass
diff --git a/gas/testsuite/gas/i386/avx10_2-rounding.s b/gas/testsuite/gas/i386/avx10_2-rounding.s
new file mode 100644
index 00000000000..7dcb2eb9493
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-rounding.s
@@ -0,0 +1,888 @@ 
+# Check 32bit AVX10.2 instructions
+
+	.text
+_start:
+	vaddpd	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vaddpd	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vaddpd	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vaddph	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vaddph	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vaddph	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vaddps	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vaddps	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vaddps	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vcmppd	$123, {sae}, %ymm4, %ymm5, %k5
+	vcmppd	$123, {sae}, %ymm4, %ymm5, %k5{%k7}
+	vcmpph	$123, {sae}, %ymm4, %ymm5, %k5
+	vcmpph	$123, {sae}, %ymm4, %ymm5, %k5{%k7}
+	vcmpps	$123, {sae}, %ymm4, %ymm5, %k5
+	vcmpps	$123, {sae}, %ymm4, %ymm5, %k5{%k7}
+	vcvtdq2ph	{rn-sae}, %ymm5, %xmm6
+	vcvtdq2ph	{rd-sae}, %ymm5, %xmm6{%k7}
+	vcvtdq2ph	{rz-sae}, %ymm5, %xmm6{%k7}{z}
+	vcvtdq2ps	{rn-sae}, %ymm5, %ymm6
+	vcvtdq2ps	{rd-sae}, %ymm5, %ymm6{%k7}
+	vcvtdq2ps	{rz-sae}, %ymm5, %ymm6{%k7}{z}
+	vcvtpd2dq	{rn-sae}, %ymm5, %xmm6
+	vcvtpd2dq	{rd-sae}, %ymm5, %xmm6{%k7}
+	vcvtpd2dq	{rz-sae}, %ymm5, %xmm6{%k7}{z}
+	vcvtpd2ph	{rn-sae}, %ymm5, %xmm6
+	vcvtpd2ph	{rd-sae}, %ymm5, %xmm6{%k7}
+	vcvtpd2ph	{rz-sae}, %ymm5, %xmm6{%k7}{z}
+	vcvtpd2ps	{rn-sae}, %ymm5, %xmm6
+	vcvtpd2ps	{rd-sae}, %ymm5, %xmm6{%k7}
+	vcvtpd2ps	{rz-sae}, %ymm5, %xmm6{%k7}{z}
+	vcvtpd2qq	{rn-sae}, %ymm5, %ymm6
+	vcvtpd2qq	{rd-sae}, %ymm5, %ymm6{%k7}
+	vcvtpd2qq	{rz-sae}, %ymm5, %ymm6{%k7}{z}
+	vcvtpd2udq	{rn-sae}, %ymm5, %xmm6
+	vcvtpd2udq	{rd-sae}, %ymm5, %xmm6{%k7}
+	vcvtpd2udq	{rz-sae}, %ymm5, %xmm6{%k7}{z}
+	vcvtpd2uqq	{rn-sae}, %ymm5, %ymm6
+	vcvtpd2uqq	{rd-sae}, %ymm5, %ymm6{%k7}
+	vcvtpd2uqq	{rz-sae}, %ymm5, %ymm6{%k7}{z}
+	vcvtph2dq	{rn-sae}, %xmm5, %ymm6
+	vcvtph2dq	{rd-sae}, %xmm5, %ymm6{%k7}
+	vcvtph2dq	{rz-sae}, %xmm5, %ymm6{%k7}{z}
+	vcvtph2pd	{sae}, %xmm5, %ymm6
+	vcvtph2pd	{sae}, %xmm5, %ymm6{%k7}
+	vcvtph2pd	{sae}, %xmm5, %ymm6{%k7}{z}
+	vcvtph2ps	{sae}, %xmm5, %ymm6
+	vcvtph2ps	{sae}, %xmm5, %ymm6{%k7}
+	vcvtph2ps	{sae}, %xmm5, %ymm6{%k7}{z}
+	vcvtph2psx	{sae}, %xmm5, %ymm6
+	vcvtph2psx	{sae}, %xmm5, %ymm6{%k7}
+	vcvtph2psx	{sae}, %xmm5, %ymm6{%k7}{z}
+	vcvtph2qq	{rn-sae}, %xmm5, %ymm6
+	vcvtph2qq	{rd-sae}, %xmm5, %ymm6{%k7}
+	vcvtph2qq	{rz-sae}, %xmm5, %ymm6{%k7}{z}
+	vcvtph2udq	{rn-sae}, %xmm5, %ymm6
+	vcvtph2udq	{rd-sae}, %xmm5, %ymm6{%k7}
+	vcvtph2udq	{rz-sae}, %xmm5, %ymm6{%k7}{z}
+	vcvtph2uqq	{rn-sae}, %xmm5, %ymm6
+	vcvtph2uqq	{rd-sae}, %xmm5, %ymm6{%k7}
+	vcvtph2uqq	{rz-sae}, %xmm5, %ymm6{%k7}{z}
+	vcvtph2uw	{rn-sae}, %ymm5, %ymm6
+	vcvtph2uw	{rd-sae}, %ymm5, %ymm6{%k7}
+	vcvtph2uw	{rz-sae}, %ymm5, %ymm6{%k7}{z}
+	vcvtph2w	{rn-sae}, %ymm5, %ymm6
+	vcvtph2w	{rd-sae}, %ymm5, %ymm6{%k7}
+	vcvtph2w	{rz-sae}, %ymm5, %ymm6{%k7}{z}
+	vcvtps2dq	{rn-sae}, %ymm5, %ymm6
+	vcvtps2dq	{rd-sae}, %ymm5, %ymm6{%k7}
+	vcvtps2dq	{rz-sae}, %ymm5, %ymm6{%k7}{z}
+	vcvtps2pd	{sae}, %xmm5, %ymm6
+	vcvtps2pd	{sae}, %xmm5, %ymm6{%k7}
+	vcvtps2pd	{sae}, %xmm5, %ymm6{%k7}{z}
+	vcvtps2phx	{rn-sae}, %ymm5, %xmm6
+	vcvtps2phx	{rd-sae}, %ymm5, %xmm6{%k7}
+	vcvtps2phx	{rz-sae}, %ymm5, %xmm6{%k7}{z}
+	vcvtps2qq	{rn-sae}, %xmm5, %ymm6
+	vcvtps2qq	{rd-sae}, %xmm5, %ymm6{%k7}
+	vcvtps2qq	{rz-sae}, %xmm5, %ymm6{%k7}{z}
+	vcvtps2udq	{rn-sae}, %ymm5, %ymm6
+	vcvtps2udq	{rd-sae}, %ymm5, %ymm6{%k7}
+	vcvtps2udq	{rz-sae}, %ymm5, %ymm6{%k7}{z}
+	vcvtps2uqq	{rn-sae}, %xmm5, %ymm6
+	vcvtps2uqq	{rd-sae}, %xmm5, %ymm6{%k7}
+	vcvtps2uqq	{rz-sae}, %xmm5, %ymm6{%k7}{z}
+	vcvtqq2pd	{rn-sae}, %ymm5, %ymm6
+	vcvtqq2pd	{rd-sae}, %ymm5, %ymm6{%k7}
+	vcvtqq2pd	{rz-sae}, %ymm5, %ymm6{%k7}{z}
+	vcvtqq2ph	{rn-sae}, %ymm5, %xmm6
+	vcvtqq2ph	{rd-sae}, %ymm5, %xmm6{%k7}
+	vcvtqq2ph	{rz-sae}, %ymm5, %xmm6{%k7}{z}
+	vcvtqq2ps	{rn-sae}, %ymm5, %xmm6
+	vcvtqq2ps	{rd-sae}, %ymm5, %xmm6{%k7}
+	vcvtqq2ps	{rz-sae}, %ymm5, %xmm6{%k7}{z}
+	vcvttpd2dq	{sae}, %ymm5, %xmm6
+	vcvttpd2dq	{sae}, %ymm5, %xmm6{%k7}
+	vcvttpd2dq	{sae}, %ymm5, %xmm6{%k7}{z}
+	vcvttpd2qq	{sae}, %ymm5, %ymm6
+	vcvttpd2qq	{sae}, %ymm5, %ymm6{%k7}
+	vcvttpd2qq	{sae}, %ymm5, %ymm6{%k7}{z}
+	vcvttpd2udq	{sae}, %ymm5, %xmm6
+	vcvttpd2udq	{sae}, %ymm5, %xmm6{%k7}
+	vcvttpd2udq	{sae}, %ymm5, %xmm6{%k7}{z}
+	vcvttpd2uqq	{sae}, %ymm5, %ymm6
+	vcvttpd2uqq	{sae}, %ymm5, %ymm6{%k7}
+	vcvttpd2uqq	{sae}, %ymm5, %ymm6{%k7}{z}
+	vcvttph2dq	{sae}, %xmm5, %ymm6
+	vcvttph2dq	{sae}, %xmm5, %ymm6{%k7}
+	vcvttph2dq	{sae}, %xmm5, %ymm6{%k7}{z}
+	vcvttph2qq	{sae}, %xmm5, %ymm6
+	vcvttph2qq	{sae}, %xmm5, %ymm6{%k7}
+	vcvttph2qq	{sae}, %xmm5, %ymm6{%k7}{z}
+	vcvttph2udq	{sae}, %xmm5, %ymm6
+	vcvttph2udq	{sae}, %xmm5, %ymm6{%k7}
+	vcvttph2udq	{sae}, %xmm5, %ymm6{%k7}{z}
+	vcvttph2uqq	{sae}, %xmm5, %ymm6
+	vcvttph2uqq	{sae}, %xmm5, %ymm6{%k7}
+	vcvttph2uqq	{sae}, %xmm5, %ymm6{%k7}{z}
+	vcvttph2uw	{sae}, %ymm5, %ymm6
+	vcvttph2uw	{sae}, %ymm5, %ymm6{%k7}
+	vcvttph2uw	{sae}, %ymm5, %ymm6{%k7}{z}
+	vcvttph2w	{sae}, %ymm5, %ymm6
+	vcvttph2w	{sae}, %ymm5, %ymm6{%k7}
+	vcvttph2w	{sae}, %ymm5, %ymm6{%k7}{z}
+	vcvttps2dq	{sae}, %ymm5, %ymm6
+	vcvttps2dq	{sae}, %ymm5, %ymm6{%k7}
+	vcvttps2dq	{sae}, %ymm5, %ymm6{%k7}{z}
+	vcvttps2qq	{sae}, %xmm5, %ymm6
+	vcvttps2qq	{sae}, %xmm5, %ymm6{%k7}
+	vcvttps2qq	{sae}, %xmm5, %ymm6{%k7}{z}
+	vcvttps2udq	{sae}, %ymm5, %ymm6
+	vcvttps2udq	{sae}, %ymm5, %ymm6{%k7}
+	vcvttps2udq	{sae}, %ymm5, %ymm6{%k7}{z}
+	vcvttps2uqq	{sae}, %xmm5, %ymm6
+	vcvttps2uqq	{sae}, %xmm5, %ymm6{%k7}
+	vcvttps2uqq	{sae}, %xmm5, %ymm6{%k7}{z}
+	vcvtudq2ph	{rn-sae}, %ymm5, %xmm6
+	vcvtudq2ph	{rd-sae}, %ymm5, %xmm6{%k7}
+	vcvtudq2ph	{rz-sae}, %ymm5, %xmm6{%k7}{z}
+	vcvtudq2ps	{rn-sae}, %ymm5, %ymm6
+	vcvtudq2ps	{rd-sae}, %ymm5, %ymm6{%k7}
+	vcvtudq2ps	{rz-sae}, %ymm5, %ymm6{%k7}{z}
+	vcvtuqq2pd	{rn-sae}, %ymm5, %ymm6
+	vcvtuqq2pd	{rd-sae}, %ymm5, %ymm6{%k7}
+	vcvtuqq2pd	{rz-sae}, %ymm5, %ymm6{%k7}{z}
+	vcvtuqq2ph	{rn-sae}, %ymm5, %xmm6
+	vcvtuqq2ph	{rd-sae}, %ymm5, %xmm6{%k7}
+	vcvtuqq2ph	{rz-sae}, %ymm5, %xmm6{%k7}{z}
+	vcvtuqq2ps	{rn-sae}, %ymm5, %xmm6
+	vcvtuqq2ps	{rd-sae}, %ymm5, %xmm6{%k7}
+	vcvtuqq2ps	{rz-sae}, %ymm5, %xmm6{%k7}{z}
+	vcvtuw2ph	{rn-sae}, %ymm5, %ymm6
+	vcvtuw2ph	{rd-sae}, %ymm5, %ymm6{%k7}
+	vcvtuw2ph	{rz-sae}, %ymm5, %ymm6{%k7}{z}
+	vcvtw2ph	{rn-sae}, %ymm5, %ymm6
+	vcvtw2ph	{rd-sae}, %ymm5, %ymm6{%k7}
+	vcvtw2ph	{rz-sae}, %ymm5, %ymm6{%k7}{z}
+	vdivpd	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vdivpd	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vdivpd	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vdivph	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vdivph	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vdivph	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vdivps	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vdivps	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vdivps	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfcmaddcph	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfcmaddcph	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfcmaddcph	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfcmulcph	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfcmulcph	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfcmulcph	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfixupimmpd	$123, {sae}, %ymm4, %ymm5, %ymm6
+	vfixupimmpd	$123, {sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfixupimmpd	$123, {sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfixupimmps	$123, {sae}, %ymm4, %ymm5, %ymm6
+	vfixupimmps	$123, {sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfixupimmps	$123, {sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmadd132pd	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmadd132pd	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmadd132pd	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmadd132ph	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmadd132ph	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmadd132ph	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmadd132ps	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmadd132ps	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmadd132ps	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmadd213pd	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmadd213pd	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmadd213pd	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmadd213ph	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmadd213ph	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmadd213ph	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmadd213ps	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmadd213ps	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmadd213ps	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmadd231pd	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmadd231pd	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmadd231pd	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmadd231ph	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmadd231ph	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmadd231ph	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmadd231ps	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmadd231ps	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmadd231ps	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmaddcph	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmaddcph	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmaddcph	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmaddsub132pd	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmaddsub132pd	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmaddsub132pd	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmaddsub132ph	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmaddsub132ph	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmaddsub132ph	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmaddsub132ps	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmaddsub132ps	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmaddsub132ps	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmaddsub213pd	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmaddsub213pd	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmaddsub213pd	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmaddsub213ph	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmaddsub213ph	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmaddsub213ph	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmaddsub213ps	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmaddsub213ps	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmaddsub213ps	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmaddsub231pd	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmaddsub231pd	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmaddsub231pd	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmaddsub231ph	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmaddsub231ph	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmaddsub231ph	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmaddsub231ps	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmaddsub231ps	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmaddsub231ps	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmsub132pd	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmsub132pd	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmsub132pd	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmsub132ph	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmsub132ph	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmsub132ph	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmsub132ps	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmsub132ps	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmsub132ps	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmsub213pd	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmsub213pd	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmsub213pd	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmsub213ph	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmsub213ph	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmsub213ph	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmsub213ps	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmsub213ps	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmsub213ps	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmsub231pd	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmsub231pd	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmsub231pd	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmsub231ph	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmsub231ph	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmsub231ph	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmsub231ps	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmsub231ps	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmsub231ps	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmsubadd132pd	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmsubadd132pd	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmsubadd132pd	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmsubadd132ph	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmsubadd132ph	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmsubadd132ph	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmsubadd132ps	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmsubadd132ps	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmsubadd132ps	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmsubadd213pd	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmsubadd213pd	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmsubadd213pd	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmsubadd213ph	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmsubadd213ph	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmsubadd213ph	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmsubadd213ps	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmsubadd213ps	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmsubadd213ps	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmsubadd231pd	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmsubadd231pd	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmsubadd231pd	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmsubadd231ph	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmsubadd231ph	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmsubadd231ph	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmsubadd231ps	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmsubadd231ps	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmsubadd231ps	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfmulcph	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfmulcph	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfmulcph	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfnmadd132pd	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfnmadd132pd	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfnmadd132pd	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfnmadd132ph	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfnmadd132ph	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfnmadd132ph	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfnmadd132ps	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfnmadd132ps	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfnmadd132ps	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfnmadd213pd	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfnmadd213pd	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfnmadd213pd	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfnmadd213ph	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfnmadd213ph	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfnmadd213ph	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfnmadd213ps	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfnmadd213ps	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfnmadd213ps	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfnmadd231pd	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfnmadd231pd	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfnmadd231pd	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfnmadd231ph	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfnmadd231ph	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfnmadd231ph	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfnmadd231ps	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfnmadd231ps	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfnmadd231ps	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfnmsub132pd	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfnmsub132pd	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfnmsub132pd	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfnmsub132ph	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfnmsub132ph	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfnmsub132ph	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfnmsub132ps	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfnmsub132ps	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfnmsub132ps	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfnmsub213pd	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfnmsub213pd	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfnmsub213pd	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfnmsub213ph	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfnmsub213ph	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfnmsub213ph	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfnmsub213ps	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfnmsub213ps	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfnmsub213ps	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfnmsub231pd	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfnmsub231pd	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfnmsub231pd	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfnmsub231ph	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfnmsub231ph	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfnmsub231ph	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vfnmsub231ps	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vfnmsub231ps	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vfnmsub231ps	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vgetexppd	{sae}, %ymm5, %ymm6
+	vgetexppd	{sae}, %ymm5, %ymm6{%k7}
+	vgetexppd	{sae}, %ymm5, %ymm6{%k7}{z}
+	vgetexpph	{sae}, %ymm5, %ymm6
+	vgetexpph	{sae}, %ymm5, %ymm6{%k7}
+	vgetexpph	{sae}, %ymm5, %ymm6{%k7}{z}
+	vgetexpps	{sae}, %ymm5, %ymm6
+	vgetexpps	{sae}, %ymm5, %ymm6{%k7}
+	vgetexpps	{sae}, %ymm5, %ymm6{%k7}{z}
+	vgetmantpd	$123, {sae}, %ymm5, %ymm6
+	vgetmantpd	$123, {sae}, %ymm5, %ymm6{%k7}
+	vgetmantpd	$123, {sae}, %ymm5, %ymm6{%k7}{z}
+	vgetmantph	$123, {sae}, %ymm5, %ymm6
+	vgetmantph	$123, {sae}, %ymm5, %ymm6{%k7}
+	vgetmantph	$123, {sae}, %ymm5, %ymm6{%k7}{z}
+	vgetmantps	$123, {sae}, %ymm5, %ymm6
+	vgetmantps	$123, {sae}, %ymm5, %ymm6{%k7}
+	vgetmantps	$123, {sae}, %ymm5, %ymm6{%k7}{z}
+	vmaxpd	{sae}, %ymm4, %ymm5, %ymm6
+	vmaxpd	{sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vmaxpd	{sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vmaxph	{sae}, %ymm4, %ymm5, %ymm6
+	vmaxph	{sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vmaxph	{sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vmaxps	{sae}, %ymm4, %ymm5, %ymm6
+	vmaxps	{sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vmaxps	{sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vminpd	{sae}, %ymm4, %ymm5, %ymm6
+	vminpd	{sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vminpd	{sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vminph	{sae}, %ymm4, %ymm5, %ymm6
+	vminph	{sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vminph	{sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vminps	{sae}, %ymm4, %ymm5, %ymm6
+	vminps	{sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vminps	{sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vmulpd	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vmulpd	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vmulpd	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vmulph	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vmulph	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vmulph	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vmulps	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vmulps	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vmulps	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vrangepd	$123, {sae}, %ymm4, %ymm5, %ymm6
+	vrangepd	$123, {sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vrangepd	$123, {sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vrangeps	$123, {sae}, %ymm4, %ymm5, %ymm6
+	vrangeps	$123, {sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vrangeps	$123, {sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vreducepd	$123, {sae}, %ymm5, %ymm6
+	vreducepd	$123, {sae}, %ymm5, %ymm6{%k7}
+	vreducepd	$123, {sae}, %ymm5, %ymm6{%k7}{z}
+	vreduceph	$123, {sae}, %ymm5, %ymm6
+	vreduceph	$123, {sae}, %ymm5, %ymm6{%k7}
+	vreduceph	$123, {sae}, %ymm5, %ymm6{%k7}{z}
+	vreduceps	$123, {sae}, %ymm5, %ymm6
+	vreduceps	$123, {sae}, %ymm5, %ymm6{%k7}
+	vreduceps	$123, {sae}, %ymm5, %ymm6{%k7}{z}
+	vrndscalepd	$123, {sae}, %ymm5, %ymm6
+	vrndscalepd	$123, {sae}, %ymm5, %ymm6{%k7}
+	vrndscalepd	$123, {sae}, %ymm5, %ymm6{%k7}{z}
+	vrndscaleph	$123, {sae}, %ymm5, %ymm6
+	vrndscaleph	$123, {sae}, %ymm5, %ymm6{%k7}
+	vrndscaleph	$123, {sae}, %ymm5, %ymm6{%k7}{z}
+	vrndscaleps	$123, {sae}, %ymm5, %ymm6
+	vrndscaleps	$123, {sae}, %ymm5, %ymm6{%k7}
+	vrndscaleps	$123, {sae}, %ymm5, %ymm6{%k7}{z}
+	vscalefpd	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vscalefpd	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vscalefpd	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vscalefph	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vscalefph	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vscalefph	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vscalefps	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vscalefps	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vscalefps	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vsqrtpd	{rn-sae}, %ymm5, %ymm6
+	vsqrtpd	{rd-sae}, %ymm5, %ymm6{%k7}
+	vsqrtpd	{rz-sae}, %ymm5, %ymm6{%k7}{z}
+	vsqrtph	{rn-sae}, %ymm5, %ymm6
+	vsqrtph	{rd-sae}, %ymm5, %ymm6{%k7}
+	vsqrtph	{rz-sae}, %ymm5, %ymm6{%k7}{z}
+	vsqrtps	{rn-sae}, %ymm5, %ymm6
+	vsqrtps	{rd-sae}, %ymm5, %ymm6{%k7}
+	vsqrtps	{rz-sae}, %ymm5, %ymm6{%k7}{z}
+	vsubpd	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vsubpd	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vsubpd	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vsubph	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vsubph	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vsubph	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	vsubps	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vsubps	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vsubps	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+
+	.intel_syntax noprefix
+	vaddpd	ymm6, ymm5, ymm4, {rn-sae}
+	vaddpd	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vaddpd	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vaddph	ymm6, ymm5, ymm4, {rn-sae}
+	vaddph	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vaddph	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vaddps	ymm6, ymm5, ymm4, {rn-sae}
+	vaddps	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vaddps	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vcmppd	k5, ymm5, ymm4, {sae}, 123
+	vcmppd	k5{k7}, ymm5, ymm4, {sae}, 123
+	vcmpph	k5, ymm5, ymm4, {sae}, 123
+	vcmpph	k5{k7}, ymm5, ymm4, {sae}, 123
+	vcmpps	k5, ymm5, ymm4, {sae}, 123
+	vcmpps	k5{k7}, ymm5, ymm4, {sae}, 123
+	vcvtdq2ph	xmm6, ymm5, {rn-sae}
+	vcvtdq2ph	xmm6{k7}, ymm5, {rd-sae}
+	vcvtdq2ph	xmm6{k7}{z}, ymm5, {rz-sae}
+	vcvtdq2ps	ymm6, ymm5, {rn-sae}
+	vcvtdq2ps	ymm6{k7}, ymm5, {rd-sae}
+	vcvtdq2ps	ymm6{k7}{z}, ymm5, {rz-sae}
+	vcvtpd2dq	xmm6, ymm5, {rn-sae}
+	vcvtpd2dq	xmm6{k7}, ymm5, {rd-sae}
+	vcvtpd2dq	xmm6{k7}{z}, ymm5, {rz-sae}
+	vcvtpd2ph	xmm6, ymm5, {rn-sae}
+	vcvtpd2ph	xmm6{k7}, ymm5, {rd-sae}
+	vcvtpd2ph	xmm6{k7}{z}, ymm5, {rz-sae}
+	vcvtpd2ps	xmm6, ymm5, {rn-sae}
+	vcvtpd2ps	xmm6{k7}, ymm5, {rd-sae}
+	vcvtpd2ps	xmm6{k7}{z}, ymm5, {rz-sae}
+	vcvtpd2qq	ymm6, ymm5, {rn-sae}
+	vcvtpd2qq	ymm6{k7}, ymm5, {rd-sae}
+	vcvtpd2qq	ymm6{k7}{z}, ymm5, {rz-sae}
+	vcvtpd2udq	xmm6, ymm5, {rn-sae}
+	vcvtpd2udq	xmm6{k7}, ymm5, {rd-sae}
+	vcvtpd2udq	xmm6{k7}{z}, ymm5, {rz-sae}
+	vcvtpd2uqq	ymm6, ymm5, {rn-sae}
+	vcvtpd2uqq	ymm6{k7}, ymm5, {rd-sae}
+	vcvtpd2uqq	ymm6{k7}{z}, ymm5, {rz-sae}
+	vcvtph2dq	ymm6, xmm5, {rn-sae}
+	vcvtph2dq	ymm6{k7}, xmm5, {rd-sae}
+	vcvtph2dq	ymm6{k7}{z}, xmm5, {rz-sae}
+	vcvtph2pd	ymm6, xmm5, {sae}
+	vcvtph2pd	ymm6{k7}, xmm5, {sae}
+	vcvtph2pd	ymm6{k7}{z}, xmm5, {sae}
+	vcvtph2ps	ymm6, xmm5, {sae}
+	vcvtph2ps	ymm6{k7}, xmm5, {sae}
+	vcvtph2ps	ymm6{k7}{z}, xmm5, {sae}
+	vcvtph2psx	ymm6, xmm5, {sae}
+	vcvtph2psx	ymm6{k7}, xmm5, {sae}
+	vcvtph2psx	ymm6{k7}{z}, xmm5, {sae}
+	vcvtph2qq	ymm6, xmm5, {rn-sae}
+	vcvtph2qq	ymm6{k7}, xmm5, {rd-sae}
+	vcvtph2qq	ymm6{k7}{z}, xmm5, {rz-sae}
+	vcvtph2udq	ymm6, xmm5, {rn-sae}
+	vcvtph2udq	ymm6{k7}, xmm5, {rd-sae}
+	vcvtph2udq	ymm6{k7}{z}, xmm5, {rz-sae}
+	vcvtph2uqq	ymm6, xmm5, {rn-sae}
+	vcvtph2uqq	ymm6{k7}, xmm5, {rd-sae}
+	vcvtph2uqq	ymm6{k7}{z}, xmm5, {rz-sae}
+	vcvtph2uw	ymm6, ymm5, {rn-sae}
+	vcvtph2uw	ymm6{k7}, ymm5, {rd-sae}
+	vcvtph2uw	ymm6{k7}{z}, ymm5, {rz-sae}
+	vcvtph2w	ymm6, ymm5, {rn-sae}
+	vcvtph2w	ymm6{k7}, ymm5, {rd-sae}
+	vcvtph2w	ymm6{k7}{z}, ymm5, {rz-sae}
+	vcvtps2dq	ymm6, ymm5, {rn-sae}
+	vcvtps2dq	ymm6{k7}, ymm5, {rd-sae}
+	vcvtps2dq	ymm6{k7}{z}, ymm5, {rz-sae}
+	vcvtps2pd	ymm6, xmm5, {sae}
+	vcvtps2pd	ymm6{k7}, xmm5, {sae}
+	vcvtps2pd	ymm6{k7}{z}, xmm5, {sae}
+	vcvtps2phx	xmm6, ymm5, {rn-sae}
+	vcvtps2phx	xmm6{k7}, ymm5, {rd-sae}
+	vcvtps2phx	xmm6{k7}{z}, ymm5, {rz-sae}
+	vcvtps2qq	ymm6, xmm5, {rn-sae}
+	vcvtps2qq	ymm6{k7}, xmm5, {rd-sae}
+	vcvtps2qq	ymm6{k7}{z}, xmm5, {rz-sae}
+	vcvtps2udq	ymm6, ymm5, {rn-sae}
+	vcvtps2udq	ymm6{k7}, ymm5, {rd-sae}
+	vcvtps2udq	ymm6{k7}{z}, ymm5, {rz-sae}
+	vcvtps2uqq	ymm6, xmm5, {rn-sae}
+	vcvtps2uqq	ymm6{k7}, xmm5, {rd-sae}
+	vcvtps2uqq	ymm6{k7}{z}, xmm5, {rz-sae}
+	vcvtqq2pd	ymm6, ymm5, {rn-sae}
+	vcvtqq2pd	ymm6{k7}, ymm5, {rd-sae}
+	vcvtqq2pd	ymm6{k7}{z}, ymm5, {rz-sae}
+	vcvtqq2ph	xmm6, ymm5, {rn-sae}
+	vcvtqq2ph	xmm6{k7}, ymm5, {rd-sae}
+	vcvtqq2ph	xmm6{k7}{z}, ymm5, {rz-sae}
+	vcvtqq2ps	xmm6, ymm5, {rn-sae}
+	vcvtqq2ps	xmm6{k7}, ymm5, {rd-sae}
+	vcvtqq2ps	xmm6{k7}{z}, ymm5, {rz-sae}
+	vcvttpd2dq	xmm6, ymm5, {sae}
+	vcvttpd2dq	xmm6{k7}, ymm5, {sae}
+	vcvttpd2dq	xmm6{k7}{z}, ymm5, {sae}
+	vcvttpd2qq	ymm6, ymm5, {sae}
+	vcvttpd2qq	ymm6{k7}, ymm5, {sae}
+	vcvttpd2qq	ymm6{k7}{z}, ymm5, {sae}
+	vcvttpd2udq	xmm6, ymm5, {sae}
+	vcvttpd2udq	xmm6{k7}, ymm5, {sae}
+	vcvttpd2udq	xmm6{k7}{z}, ymm5, {sae}
+	vcvttpd2uqq	ymm6, ymm5, {sae}
+	vcvttpd2uqq	ymm6{k7}, ymm5, {sae}
+	vcvttpd2uqq	ymm6{k7}{z}, ymm5, {sae}
+	vcvttph2dq	ymm6, xmm5, {sae}
+	vcvttph2dq	ymm6{k7}, xmm5, {sae}
+	vcvttph2dq	ymm6{k7}{z}, xmm5, {sae}
+	vcvttph2qq	ymm6, xmm5, {sae}
+	vcvttph2qq	ymm6{k7}, xmm5, {sae}
+	vcvttph2qq	ymm6{k7}{z}, xmm5, {sae}
+	vcvttph2udq	ymm6, xmm5, {sae}
+	vcvttph2udq	ymm6{k7}, xmm5, {sae}
+	vcvttph2udq	ymm6{k7}{z}, xmm5, {sae}
+	vcvttph2uqq	ymm6, xmm5, {sae}
+	vcvttph2uqq	ymm6{k7}, xmm5, {sae}
+	vcvttph2uqq	ymm6{k7}{z}, xmm5, {sae}
+	vcvttph2uw	ymm6, ymm5, {sae}
+	vcvttph2uw	ymm6{k7}, ymm5, {sae}
+	vcvttph2uw	ymm6{k7}{z}, ymm5, {sae}
+	vcvttph2w	ymm6, ymm5, {sae}
+	vcvttph2w	ymm6{k7}, ymm5, {sae}
+	vcvttph2w	ymm6{k7}{z}, ymm5, {sae}
+	vcvttps2dq	ymm6, ymm5, {sae}
+	vcvttps2dq	ymm6{k7}, ymm5, {sae}
+	vcvttps2dq	ymm6{k7}{z}, ymm5, {sae}
+	vcvttps2qq	ymm6, xmm5, {sae}
+	vcvttps2qq	ymm6{k7}, xmm5, {sae}
+	vcvttps2qq	ymm6{k7}{z}, xmm5, {sae}
+	vcvttps2udq	ymm6, ymm5, {sae}
+	vcvttps2udq	ymm6{k7}, ymm5, {sae}
+	vcvttps2udq	ymm6{k7}{z}, ymm5, {sae}
+	vcvttps2uqq	ymm6, xmm5, {sae}
+	vcvttps2uqq	ymm6{k7}, xmm5, {sae}
+	vcvttps2uqq	ymm6{k7}{z}, xmm5, {sae}
+	vcvtudq2ph	xmm6, ymm5, {rn-sae}
+	vcvtudq2ph	xmm6{k7}, ymm5, {rd-sae}
+	vcvtudq2ph	xmm6{k7}{z}, ymm5, {rz-sae}
+	vcvtudq2ps	ymm6, ymm5, {rn-sae}
+	vcvtudq2ps	ymm6{k7}, ymm5, {rd-sae}
+	vcvtudq2ps	ymm6{k7}{z}, ymm5, {rz-sae}
+	vcvtuqq2pd	ymm6, ymm5, {rn-sae}
+	vcvtuqq2pd	ymm6{k7}, ymm5, {rd-sae}
+	vcvtuqq2pd	ymm6{k7}{z}, ymm5, {rz-sae}
+	vcvtuqq2ph	xmm6, ymm5, {rn-sae}
+	vcvtuqq2ph	xmm6{k7}, ymm5, {rd-sae}
+	vcvtuqq2ph	xmm6{k7}{z}, ymm5, {rz-sae}
+	vcvtuqq2ps	xmm6, ymm5, {rn-sae}
+	vcvtuqq2ps	xmm6{k7}, ymm5, {rd-sae}
+	vcvtuqq2ps	xmm6{k7}{z}, ymm5, {rz-sae}
+	vcvtuw2ph	ymm6, ymm5, {rn-sae}
+	vcvtuw2ph	ymm6{k7}, ymm5, {rd-sae}
+	vcvtuw2ph	ymm6{k7}{z}, ymm5, {rz-sae}
+	vcvtw2ph	ymm6, ymm5, {rn-sae}
+	vcvtw2ph	ymm6{k7}, ymm5, {rd-sae}
+	vcvtw2ph	ymm6{k7}{z}, ymm5, {rz-sae}
+	vdivpd	ymm6, ymm5, ymm4, {rn-sae}
+	vdivpd	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vdivpd	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vdivph	ymm6, ymm5, ymm4, {rn-sae}
+	vdivph	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vdivph	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vdivps	ymm6, ymm5, ymm4, {rn-sae}
+	vdivps	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vdivps	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfcmaddcph	ymm6, ymm5, ymm4, {rn-sae}
+	vfcmaddcph	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfcmaddcph	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfcmulcph	ymm6, ymm5, ymm4, {rn-sae}
+	vfcmulcph	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfcmulcph	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfixupimmpd	ymm6, ymm5, ymm4, {sae}, 123
+	vfixupimmpd	ymm6{k7}, ymm5, ymm4, {sae}, 123
+	vfixupimmpd	ymm6{k7}{z}, ymm5, ymm4, {sae}, 123
+	vfixupimmps	ymm6, ymm5, ymm4, {sae}, 123
+	vfixupimmps	ymm6{k7}, ymm5, ymm4, {sae}, 123
+	vfixupimmps	ymm6{k7}{z}, ymm5, ymm4, {sae}, 123
+	vfmadd132pd	ymm6, ymm5, ymm4, {rn-sae}
+	vfmadd132pd	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmadd132pd	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmadd132ph	ymm6, ymm5, ymm4, {rn-sae}
+	vfmadd132ph	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmadd132ph	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmadd132ps	ymm6, ymm5, ymm4, {rn-sae}
+	vfmadd132ps	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmadd132ps	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmadd213pd	ymm6, ymm5, ymm4, {rn-sae}
+	vfmadd213pd	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmadd213pd	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmadd213ph	ymm6, ymm5, ymm4, {rn-sae}
+	vfmadd213ph	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmadd213ph	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmadd213ps	ymm6, ymm5, ymm4, {rn-sae}
+	vfmadd213ps	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmadd213ps	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmadd231pd	ymm6, ymm5, ymm4, {rn-sae}
+	vfmadd231pd	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmadd231pd	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmadd231ph	ymm6, ymm5, ymm4, {rn-sae}
+	vfmadd231ph	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmadd231ph	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmadd231ps	ymm6, ymm5, ymm4, {rn-sae}
+	vfmadd231ps	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmadd231ps	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmaddcph	ymm6, ymm5, ymm4, {rn-sae}
+	vfmaddcph	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmaddcph	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmaddsub132pd	ymm6, ymm5, ymm4, {rn-sae}
+	vfmaddsub132pd	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmaddsub132pd	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmaddsub132ph	ymm6, ymm5, ymm4, {rn-sae}
+	vfmaddsub132ph	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmaddsub132ph	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmaddsub132ps	ymm6, ymm5, ymm4, {rn-sae}
+	vfmaddsub132ps	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmaddsub132ps	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmaddsub213pd	ymm6, ymm5, ymm4, {rn-sae}
+	vfmaddsub213pd	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmaddsub213pd	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmaddsub213ph	ymm6, ymm5, ymm4, {rn-sae}
+	vfmaddsub213ph	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmaddsub213ph	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmaddsub213ps	ymm6, ymm5, ymm4, {rn-sae}
+	vfmaddsub213ps	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmaddsub213ps	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmaddsub231pd	ymm6, ymm5, ymm4, {rn-sae}
+	vfmaddsub231pd	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmaddsub231pd	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmaddsub231ph	ymm6, ymm5, ymm4, {rn-sae}
+	vfmaddsub231ph	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmaddsub231ph	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmaddsub231ps	ymm6, ymm5, ymm4, {rn-sae}
+	vfmaddsub231ps	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmaddsub231ps	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmsub132pd	ymm6, ymm5, ymm4, {rn-sae}
+	vfmsub132pd	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmsub132pd	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmsub132ph	ymm6, ymm5, ymm4, {rn-sae}
+	vfmsub132ph	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmsub132ph	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmsub132ps	ymm6, ymm5, ymm4, {rn-sae}
+	vfmsub132ps	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmsub132ps	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmsub213pd	ymm6, ymm5, ymm4, {rn-sae}
+	vfmsub213pd	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmsub213pd	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmsub213ph	ymm6, ymm5, ymm4, {rn-sae}
+	vfmsub213ph	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmsub213ph	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmsub213ps	ymm6, ymm5, ymm4, {rn-sae}
+	vfmsub213ps	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmsub213ps	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmsub231pd	ymm6, ymm5, ymm4, {rn-sae}
+	vfmsub231pd	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmsub231pd	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmsub231ph	ymm6, ymm5, ymm4, {rn-sae}
+	vfmsub231ph	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmsub231ph	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmsub231ps	ymm6, ymm5, ymm4, {rn-sae}
+	vfmsub231ps	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmsub231ps	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmsubadd132pd	ymm6, ymm5, ymm4, {rn-sae}
+	vfmsubadd132pd	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmsubadd132pd	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmsubadd132ph	ymm6, ymm5, ymm4, {rn-sae}
+	vfmsubadd132ph	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmsubadd132ph	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmsubadd132ps	ymm6, ymm5, ymm4, {rn-sae}
+	vfmsubadd132ps	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmsubadd132ps	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmsubadd213pd	ymm6, ymm5, ymm4, {rn-sae}
+	vfmsubadd213pd	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmsubadd213pd	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmsubadd213ph	ymm6, ymm5, ymm4, {rn-sae}
+	vfmsubadd213ph	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmsubadd213ph	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmsubadd213ps	ymm6, ymm5, ymm4, {rn-sae}
+	vfmsubadd213ps	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmsubadd213ps	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmsubadd231pd	ymm6, ymm5, ymm4, {rn-sae}
+	vfmsubadd231pd	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmsubadd231pd	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmsubadd231ph	ymm6, ymm5, ymm4, {rn-sae}
+	vfmsubadd231ph	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmsubadd231ph	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmsubadd231ps	ymm6, ymm5, ymm4, {rn-sae}
+	vfmsubadd231ps	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmsubadd231ps	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfmulcph	ymm6, ymm5, ymm4, {rn-sae}
+	vfmulcph	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfmulcph	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfnmadd132pd	ymm6, ymm5, ymm4, {rn-sae}
+	vfnmadd132pd	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfnmadd132pd	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfnmadd132ph	ymm6, ymm5, ymm4, {rn-sae}
+	vfnmadd132ph	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfnmadd132ph	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfnmadd132ps	ymm6, ymm5, ymm4, {rn-sae}
+	vfnmadd132ps	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfnmadd132ps	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfnmadd213pd	ymm6, ymm5, ymm4, {rn-sae}
+	vfnmadd213pd	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfnmadd213pd	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfnmadd213ph	ymm6, ymm5, ymm4, {rn-sae}
+	vfnmadd213ph	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfnmadd213ph	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfnmadd213ps	ymm6, ymm5, ymm4, {rn-sae}
+	vfnmadd213ps	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfnmadd213ps	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfnmadd231pd	ymm6, ymm5, ymm4, {rn-sae}
+	vfnmadd231pd	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfnmadd231pd	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfnmadd231ph	ymm6, ymm5, ymm4, {rn-sae}
+	vfnmadd231ph	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfnmadd231ph	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfnmadd231ps	ymm6, ymm5, ymm4, {rn-sae}
+	vfnmadd231ps	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfnmadd231ps	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfnmsub132pd	ymm6, ymm5, ymm4, {rn-sae}
+	vfnmsub132pd	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfnmsub132pd	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfnmsub132ph	ymm6, ymm5, ymm4, {rn-sae}
+	vfnmsub132ph	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfnmsub132ph	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfnmsub132ps	ymm6, ymm5, ymm4, {rn-sae}
+	vfnmsub132ps	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfnmsub132ps	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfnmsub213pd	ymm6, ymm5, ymm4, {rn-sae}
+	vfnmsub213pd	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfnmsub213pd	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfnmsub213ph	ymm6, ymm5, ymm4, {rn-sae}
+	vfnmsub213ph	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfnmsub213ph	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfnmsub213ps	ymm6, ymm5, ymm4, {rn-sae}
+	vfnmsub213ps	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfnmsub213ps	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfnmsub231pd	ymm6, ymm5, ymm4, {rn-sae}
+	vfnmsub231pd	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfnmsub231pd	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfnmsub231ph	ymm6, ymm5, ymm4, {rn-sae}
+	vfnmsub231ph	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfnmsub231ph	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vfnmsub231ps	ymm6, ymm5, ymm4, {rn-sae}
+	vfnmsub231ps	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vfnmsub231ps	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vgetexppd	ymm6, ymm5, {sae}
+	vgetexppd	ymm6{k7}, ymm5, {sae}
+	vgetexppd	ymm6{k7}{z}, ymm5, {sae}
+	vgetexpph	ymm6, ymm5, {sae}
+	vgetexpph	ymm6{k7}, ymm5, {sae}
+	vgetexpph	ymm6{k7}{z}, ymm5, {sae}
+	vgetexpps	ymm6, ymm5, {sae}
+	vgetexpps	ymm6{k7}, ymm5, {sae}
+	vgetexpps	ymm6{k7}{z}, ymm5, {sae}
+	vgetmantpd	ymm6, ymm5, {sae}, 123
+	vgetmantpd	ymm6{k7}, ymm5, {sae}, 123
+	vgetmantpd	ymm6{k7}{z}, ymm5, {sae}, 123
+	vgetmantph	ymm6, ymm5, {sae}, 123
+	vgetmantph	ymm6{k7}, ymm5, {sae}, 123
+	vgetmantph	ymm6{k7}{z}, ymm5, {sae}, 123
+	vgetmantps	ymm6, ymm5, {sae}, 123
+	vgetmantps	ymm6{k7}, ymm5, {sae}, 123
+	vgetmantps	ymm6{k7}{z}, ymm5, {sae}, 123
+	vmaxpd	ymm6, ymm5, ymm4, {sae}
+	vmaxpd	ymm6{k7}, ymm5, ymm4, {sae}
+	vmaxpd	ymm6{k7}{z}, ymm5, ymm4, {sae}
+	vmaxph	ymm6, ymm5, ymm4, {sae}
+	vmaxph	ymm6{k7}, ymm5, ymm4, {sae}
+	vmaxph	ymm6{k7}{z}, ymm5, ymm4, {sae}
+	vmaxps	ymm6, ymm5, ymm4, {sae}
+	vmaxps	ymm6{k7}, ymm5, ymm4, {sae}
+	vmaxps	ymm6{k7}{z}, ymm5, ymm4, {sae}
+	vminpd	ymm6, ymm5, ymm4, {sae}
+	vminpd	ymm6{k7}, ymm5, ymm4, {sae}
+	vminpd	ymm6{k7}{z}, ymm5, ymm4, {sae}
+	vminph	ymm6, ymm5, ymm4, {sae}
+	vminph	ymm6{k7}, ymm5, ymm4, {sae}
+	vminph	ymm6{k7}{z}, ymm5, ymm4, {sae}
+	vminps	ymm6, ymm5, ymm4, {sae}
+	vminps	ymm6{k7}, ymm5, ymm4, {sae}
+	vminps	ymm6{k7}{z}, ymm5, ymm4, {sae}
+	vmulpd	ymm6, ymm5, ymm4, {rn-sae}
+	vmulpd	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vmulpd	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vmulph	ymm6, ymm5, ymm4, {rn-sae}
+	vmulph	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vmulph	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vmulps	ymm6, ymm5, ymm4, {rn-sae}
+	vmulps	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vmulps	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vrangepd	ymm6, ymm5, ymm4, {sae}, 123
+	vrangepd	ymm6{k7}, ymm5, ymm4, {sae}, 123
+	vrangepd	ymm6{k7}{z}, ymm5, ymm4, {sae}, 123
+	vrangeps	ymm6, ymm5, ymm4, {sae}, 123
+	vrangeps	ymm6{k7}, ymm5, ymm4, {sae}, 123
+	vrangeps	ymm6{k7}{z}, ymm5, ymm4, {sae}, 123
+	vreducepd	ymm6, ymm5, {sae}, 123
+	vreducepd	ymm6{k7}, ymm5, {sae}, 123
+	vreducepd	ymm6{k7}{z}, ymm5, {sae}, 123
+	vreduceph	ymm6, ymm5, {sae}, 123
+	vreduceph	ymm6{k7}, ymm5, {sae}, 123
+	vreduceph	ymm6{k7}{z}, ymm5, {sae}, 123
+	vreduceps	ymm6, ymm5, {sae}, 123
+	vreduceps	ymm6{k7}, ymm5, {sae}, 123
+	vreduceps	ymm6{k7}{z}, ymm5, {sae}, 123
+	vrndscalepd	ymm6, ymm5, {sae}, 123
+	vrndscalepd	ymm6{k7}, ymm5, {sae}, 123
+	vrndscalepd	ymm6{k7}{z}, ymm5, {sae}, 123
+	vrndscaleph	ymm6, ymm5, {sae}, 123
+	vrndscaleph	ymm6{k7}, ymm5, {sae}, 123
+	vrndscaleph	ymm6{k7}{z}, ymm5, {sae}, 123
+	vrndscaleps	ymm6, ymm5, {sae}, 123
+	vrndscaleps	ymm6{k7}, ymm5, {sae}, 123
+	vrndscaleps	ymm6{k7}{z}, ymm5, {sae}, 123
+	vscalefpd	ymm6, ymm5, ymm4, {rn-sae}
+	vscalefpd	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vscalefpd	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vscalefph	ymm6, ymm5, ymm4, {rn-sae}
+	vscalefph	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vscalefph	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vscalefps	ymm6, ymm5, ymm4, {rn-sae}
+	vscalefps	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vscalefps	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vsqrtpd	ymm6, ymm5, {rn-sae}
+	vsqrtpd	ymm6{k7}, ymm5, {rd-sae}
+	vsqrtpd	ymm6{k7}{z}, ymm5, {rz-sae}
+	vsqrtph	ymm6, ymm5, {rn-sae}
+	vsqrtph	ymm6{k7}, ymm5, {rd-sae}
+	vsqrtph	ymm6{k7}{z}, ymm5, {rz-sae}
+	vsqrtps	ymm6, ymm5, {rn-sae}
+	vsqrtps	ymm6{k7}, ymm5, {rd-sae}
+	vsqrtps	ymm6{k7}{z}, ymm5, {rz-sae}
+	vsubpd	ymm6, ymm5, ymm4, {rn-sae}
+	vsubpd	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vsubpd	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vsubph	ymm6, ymm5, ymm4, {rn-sae}
+	vsubph	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vsubph	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
+	vsubps	ymm6, ymm5, ymm4, {rn-sae}
+	vsubps	ymm6{k7}, ymm5, ymm4, {rd-sae}
+	vsubps	ymm6{k7}{z}, ymm5, ymm4, {rz-sae}
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 590a55d0c81..0d6eb92779f 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -518,6 +518,8 @@  if [gas_32_check] then {
     run_list_test "pbndkb-inval"
     run_list_test "user_msr-inval"
     run_list_test "apx-push2pop2-inval"
+    run_dump_test "avx10_2-rounding"
+    run_dump_test "avx10_2-rounding-intel"
     run_list_test "sg"
     run_dump_test "clzero"
     run_dump_test "invlpgb"
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-rounding-intel.d b/gas/testsuite/gas/i386/x86-64-avx10_2-rounding-intel.d
new file mode 100644
index 00000000000..a2b1c7933c2
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-rounding-intel.d
@@ -0,0 +1,891 @@ 
+#objdump: -dw -Mintel
+#name: x86_64 AVX10.2 rounding insns (Intel disassembly)
+#source: x86-64-avx10_2-rounding.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*62 01 91 10 58 f4\s+vaddpd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 91 37 58 f4\s+vaddpd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 91 f7 58 f4\s+vaddpd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 10 10 58 f4\s+vaddph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 10 37 58 f4\s+vaddph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 10 f7 58 f4\s+vaddph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 10 10 58 f4\s+vaddps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 10 37 58 f4\s+vaddps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 10 f7 58 f4\s+vaddps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 91 91 10 c2 ec 7b\s+vcmppd k5,ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 91 91 17 c2 ec 7b\s+vcmppd k5\{k7\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 93 10 10 c2 ec 7b\s+vcmpph k5,ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 93 10 17 c2 ec 7b\s+vcmpph k5\{k7\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 91 10 10 c2 ec 7b\s+vcmpps k5,ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 91 10 17 c2 ec 7b\s+vcmpps k5\{k7\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 05 78 18 5b f5\s+vcvtdq2ph xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 78 3f 5b f5\s+vcvtdq2ph xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 78 ff 5b f5\s+vcvtdq2ph xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 78 18 5b f5\s+vcvtdq2ps ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 78 3f 5b f5\s+vcvtdq2ps ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 78 ff 5b f5\s+vcvtdq2ps ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 fb 18 e6 f5\s+vcvtpd2dq xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 fb 3f e6 f5\s+vcvtpd2dq xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 fb ff e6 f5\s+vcvtpd2dq xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 f9 18 5a f5\s+vcvtpd2ph xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 f9 3f 5a f5\s+vcvtpd2ph xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 f9 ff 5a f5\s+vcvtpd2ph xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 18 5a f5\s+vcvtpd2ps xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 3f 5a f5\s+vcvtpd2ps xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 ff 5a f5\s+vcvtpd2ps xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 18 7b f5\s+vcvtpd2qq ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 3f 7b f5\s+vcvtpd2qq ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 ff 7b f5\s+vcvtpd2qq ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 f8 18 79 f5\s+vcvtpd2udq xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 f8 3f 79 f5\s+vcvtpd2udq xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 f8 ff 79 f5\s+vcvtpd2udq xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 18 79 f5\s+vcvtpd2uqq ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 3f 79 f5\s+vcvtpd2uqq ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 ff 79 f5\s+vcvtpd2uqq ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 79 18 5b f5\s+vcvtph2dq ymm30,xmm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 79 3f 5b f5\s+vcvtph2dq ymm30\{k7\},xmm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 79 ff 5b f5\s+vcvtph2dq ymm30\{k7\}\{z\},xmm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 78 18 5a f5\s+vcvtph2pd ymm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 78 1f 5a f5\s+vcvtph2pd ymm30\{k7\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 78 9f 5a f5\s+vcvtph2pd ymm30\{k7\}\{z\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 02 79 18 13 f5\s+vcvtph2ps ymm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 02 79 1f 13 f5\s+vcvtph2ps ymm30\{k7\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 02 79 9f 13 f5\s+vcvtph2ps ymm30\{k7\}\{z\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 06 79 18 13 f5\s+vcvtph2psx ymm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 06 79 1f 13 f5\s+vcvtph2psx ymm30\{k7\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 06 79 9f 13 f5\s+vcvtph2psx ymm30\{k7\}\{z\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 79 18 7b f5\s+vcvtph2qq ymm30,xmm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 79 3f 7b f5\s+vcvtph2qq ymm30\{k7\},xmm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 79 ff 7b f5\s+vcvtph2qq ymm30\{k7\}\{z\},xmm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 78 18 79 f5\s+vcvtph2udq ymm30,xmm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 78 3f 79 f5\s+vcvtph2udq ymm30\{k7\},xmm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 78 ff 79 f5\s+vcvtph2udq ymm30\{k7\}\{z\},xmm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 79 18 79 f5\s+vcvtph2uqq ymm30,xmm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 79 3f 79 f5\s+vcvtph2uqq ymm30\{k7\},xmm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 79 ff 79 f5\s+vcvtph2uqq ymm30\{k7\}\{z\},xmm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 78 18 7d f5\s+vcvtph2uw ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 78 3f 7d f5\s+vcvtph2uw ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 78 ff 7d f5\s+vcvtph2uw ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 79 18 7d f5\s+vcvtph2w ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 79 3f 7d f5\s+vcvtph2w ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 79 ff 7d f5\s+vcvtph2w ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 79 18 5b f5\s+vcvtps2dq ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 79 3f 5b f5\s+vcvtps2dq ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 79 ff 5b f5\s+vcvtps2dq ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 78 18 5a f5\s+vcvtps2pd ymm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 78 1f 5a f5\s+vcvtps2pd ymm30\{k7\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 78 9f 5a f5\s+vcvtps2pd ymm30\{k7\}\{z\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 79 18 1d f5\s+vcvtps2phx xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 79 3f 1d f5\s+vcvtps2phx xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 79 ff 1d f5\s+vcvtps2phx xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 79 18 7b f5\s+vcvtps2qq ymm30,xmm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 79 3f 7b f5\s+vcvtps2qq ymm30\{k7\},xmm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 79 ff 7b f5\s+vcvtps2qq ymm30\{k7\}\{z\},xmm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 78 18 79 f5\s+vcvtps2udq ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 78 3f 79 f5\s+vcvtps2udq ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 78 ff 79 f5\s+vcvtps2udq ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 79 18 79 f5\s+vcvtps2uqq ymm30,xmm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 79 3f 79 f5\s+vcvtps2uqq ymm30\{k7\},xmm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 79 ff 79 f5\s+vcvtps2uqq ymm30\{k7\}\{z\},xmm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 fa 18 e6 f5\s+vcvtqq2pd ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 fa 3f e6 f5\s+vcvtqq2pd ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 fa ff e6 f5\s+vcvtqq2pd ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 f8 18 5b f5\s+vcvtqq2ph xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 f8 3f 5b f5\s+vcvtqq2ph xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 f8 ff 5b f5\s+vcvtqq2ph xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 f8 18 5b f5\s+vcvtqq2ps xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 f8 3f 5b f5\s+vcvtqq2ps xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 f8 ff 5b f5\s+vcvtqq2ps xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 18 e6 f5\s+vcvttpd2dq xmm30,ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f9 1f e6 f5\s+vcvttpd2dq xmm30\{k7\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f9 9f e6 f5\s+vcvttpd2dq xmm30\{k7\}\{z\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f9 18 7a f5\s+vcvttpd2qq ymm30,ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f9 1f 7a f5\s+vcvttpd2qq ymm30\{k7\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f9 9f 7a f5\s+vcvttpd2qq ymm30\{k7\}\{z\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f8 18 78 f5\s+vcvttpd2udq xmm30,ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f8 1f 78 f5\s+vcvttpd2udq xmm30\{k7\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f8 9f 78 f5\s+vcvttpd2udq xmm30\{k7\}\{z\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f9 18 78 f5\s+vcvttpd2uqq ymm30,ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f9 1f 78 f5\s+vcvttpd2uqq ymm30\{k7\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f9 9f 78 f5\s+vcvttpd2uqq ymm30\{k7\}\{z\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 7a 18 5b f5\s+vcvttph2dq ymm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 7a 1f 5b f5\s+vcvttph2dq ymm30\{k7\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 7a 9f 5b f5\s+vcvttph2dq ymm30\{k7\}\{z\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 79 18 7a f5\s+vcvttph2qq ymm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 79 1f 7a f5\s+vcvttph2qq ymm30\{k7\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 79 9f 7a f5\s+vcvttph2qq ymm30\{k7\}\{z\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 78 18 78 f5\s+vcvttph2udq ymm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 78 1f 78 f5\s+vcvttph2udq ymm30\{k7\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 78 9f 78 f5\s+vcvttph2udq ymm30\{k7\}\{z\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 79 18 78 f5\s+vcvttph2uqq ymm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 79 1f 78 f5\s+vcvttph2uqq ymm30\{k7\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 79 9f 78 f5\s+vcvttph2uqq ymm30\{k7\}\{z\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 78 18 7c f5\s+vcvttph2uw ymm30,ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 78 1f 7c f5\s+vcvttph2uw ymm30\{k7\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 78 9f 7c f5\s+vcvttph2uw ymm30\{k7\}\{z\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 79 18 7c f5\s+vcvttph2w ymm30,ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 79 1f 7c f5\s+vcvttph2w ymm30\{k7\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 79 9f 7c f5\s+vcvttph2w ymm30\{k7\}\{z\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 7a 18 5b f5\s+vcvttps2dq ymm30,ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 7a 1f 5b f5\s+vcvttps2dq ymm30\{k7\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 7a 9f 5b f5\s+vcvttps2dq ymm30\{k7\}\{z\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 79 18 7a f5\s+vcvttps2qq ymm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 79 1f 7a f5\s+vcvttps2qq ymm30\{k7\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 79 9f 7a f5\s+vcvttps2qq ymm30\{k7\}\{z\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 78 18 78 f5\s+vcvttps2udq ymm30,ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 78 1f 78 f5\s+vcvttps2udq ymm30\{k7\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 78 9f 78 f5\s+vcvttps2udq ymm30\{k7\}\{z\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 79 18 78 f5\s+vcvttps2uqq ymm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 79 1f 78 f5\s+vcvttps2uqq ymm30\{k7\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 79 9f 78 f5\s+vcvttps2uqq ymm30\{k7\}\{z\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 7b 18 7a f5\s+vcvtudq2ph xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 7b 3f 7a f5\s+vcvtudq2ph xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 7b ff 7a f5\s+vcvtudq2ph xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 7b 18 7a f5\s+vcvtudq2ps ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 7b 3f 7a f5\s+vcvtudq2ps ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 7b ff 7a f5\s+vcvtudq2ps ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 fa 18 7a f5\s+vcvtuqq2pd ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 fa 3f 7a f5\s+vcvtuqq2pd ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 fa ff 7a f5\s+vcvtuqq2pd ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 fb 18 7a f5\s+vcvtuqq2ph xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 fb 3f 7a f5\s+vcvtuqq2ph xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 fb ff 7a f5\s+vcvtuqq2ph xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 fb 18 7a f5\s+vcvtuqq2ps xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 fb 3f 7a f5\s+vcvtuqq2ps xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 fb ff 7a f5\s+vcvtuqq2ps xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 7b 18 7d f5\s+vcvtuw2ph ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 7b 3f 7d f5\s+vcvtuw2ph ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 7b ff 7d f5\s+vcvtuw2ph ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 7a 18 7d f5\s+vcvtw2ph ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 7a 3f 7d f5\s+vcvtw2ph ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 7a ff 7d f5\s+vcvtw2ph ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 91 10 5e f4\s+vdivpd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 91 37 5e f4\s+vdivpd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 91 f7 5e f4\s+vdivpd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 10 10 5e f4\s+vdivph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 10 37 5e f4\s+vdivph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 10 f7 5e f4\s+vdivph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 10 10 5e f4\s+vdivps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 10 37 5e f4\s+vdivps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 10 f7 5e f4\s+vdivps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 13 10 56 f4\s+vfcmaddcph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 13 37 56 f4\s+vfcmaddcph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 13 f7 56 f4\s+vfcmaddcph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 13 10 d6 f4\s+vfcmulcph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 13 37 d6 f4\s+vfcmulcph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 13 f7 d6 f4\s+vfcmulcph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 03 91 10 54 f4 7b\s+vfixupimmpd ymm30,ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 91 17 54 f4 7b\s+vfixupimmpd ymm30\{k7\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 91 97 54 f4 7b\s+vfixupimmpd ymm30\{k7\}\{z\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 11 10 54 f4 7b\s+vfixupimmps ymm30,ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 11 17 54 f4 7b\s+vfixupimmps ymm30\{k7\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 11 97 54 f4 7b\s+vfixupimmps ymm30\{k7\}\{z\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 02 91 10 98 f4\s+vfmadd132pd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 91 37 98 f4\s+vfmadd132pd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 91 f7 98 f4\s+vfmadd132pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 11 10 98 f4\s+vfmadd132ph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 11 37 98 f4\s+vfmadd132ph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 11 f7 98 f4\s+vfmadd132ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 11 10 98 f4\s+vfmadd132ps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 11 37 98 f4\s+vfmadd132ps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 11 f7 98 f4\s+vfmadd132ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 91 10 a8 f4\s+vfmadd213pd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 91 37 a8 f4\s+vfmadd213pd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 91 f7 a8 f4\s+vfmadd213pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 11 10 a8 f4\s+vfmadd213ph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 11 37 a8 f4\s+vfmadd213ph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 11 f7 a8 f4\s+vfmadd213ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
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+\s*[a-f0-9]+:\s*62 02 f9 18 42 f5\s+vgetexppd ymm30,ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 02 f9 1f 42 f5\s+vgetexppd ymm30\{k7\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 02 f9 9f 42 f5\s+vgetexppd ymm30\{k7\}\{z\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 06 79 18 42 f5\s+vgetexpph ymm30,ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 06 79 1f 42 f5\s+vgetexpph ymm30\{k7\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 06 79 9f 42 f5\s+vgetexpph ymm30\{k7\}\{z\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 02 79 18 42 f5\s+vgetexpps ymm30,ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 02 79 1f 42 f5\s+vgetexpps ymm30\{k7\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 02 79 9f 42 f5\s+vgetexpps ymm30\{k7\}\{z\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 03 f9 18 26 f5 7b\s+vgetmantpd ymm30,ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 f9 1f 26 f5 7b\s+vgetmantpd ymm30\{k7\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 f9 9f 26 f5 7b\s+vgetmantpd ymm30\{k7\}\{z\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 78 18 26 f5 7b\s+vgetmantph ymm30,ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 78 1f 26 f5 7b\s+vgetmantph ymm30\{k7\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 78 9f 26 f5 7b\s+vgetmantph ymm30\{k7\}\{z\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 79 18 26 f5 7b\s+vgetmantps ymm30,ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 79 1f 26 f5 7b\s+vgetmantps ymm30\{k7\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 79 9f 26 f5 7b\s+vgetmantps ymm30\{k7\}\{z\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 01 91 10 5f f4\s+vmaxpd ymm30,ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 01 91 17 5f f4\s+vmaxpd ymm30\{k7\},ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 01 91 97 5f f4\s+vmaxpd ymm30\{k7\}\{z\},ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 05 10 10 5f f4\s+vmaxph ymm30,ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 05 10 17 5f f4\s+vmaxph ymm30\{k7\},ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 05 10 97 5f f4\s+vmaxph ymm30\{k7\}\{z\},ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 01 10 10 5f f4\s+vmaxps ymm30,ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 01 10 17 5f f4\s+vmaxps ymm30\{k7\},ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 01 10 97 5f f4\s+vmaxps ymm30\{k7\}\{z\},ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 01 91 10 5d f4\s+vminpd ymm30,ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 01 91 17 5d f4\s+vminpd ymm30\{k7\},ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 01 91 97 5d f4\s+vminpd ymm30\{k7\}\{z\},ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 05 10 10 5d f4\s+vminph ymm30,ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 05 10 17 5d f4\s+vminph ymm30\{k7\},ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 05 10 97 5d f4\s+vminph ymm30\{k7\}\{z\},ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 01 10 10 5d f4\s+vminps ymm30,ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 01 10 17 5d f4\s+vminps ymm30\{k7\},ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 01 10 97 5d f4\s+vminps ymm30\{k7\}\{z\},ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 01 91 10 59 f4\s+vmulpd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 91 37 59 f4\s+vmulpd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 91 f7 59 f4\s+vmulpd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 10 10 59 f4\s+vmulph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 10 37 59 f4\s+vmulph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 10 f7 59 f4\s+vmulph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 10 10 59 f4\s+vmulps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 10 37 59 f4\s+vmulps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 10 f7 59 f4\s+vmulps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 03 91 10 50 f4 7b\s+vrangepd ymm30,ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 91 17 50 f4 7b\s+vrangepd ymm30\{k7\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 91 97 50 f4 7b\s+vrangepd ymm30\{k7\}\{z\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 11 10 50 f4 7b\s+vrangeps ymm30,ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 11 17 50 f4 7b\s+vrangeps ymm30\{k7\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 11 97 50 f4 7b\s+vrangeps ymm30\{k7\}\{z\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 f9 18 56 f5 7b\s+vreducepd ymm30,ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 f9 1f 56 f5 7b\s+vreducepd ymm30\{k7\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 f9 9f 56 f5 7b\s+vreducepd ymm30\{k7\}\{z\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 78 18 56 f5 7b\s+vreduceph ymm30,ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 78 1f 56 f5 7b\s+vreduceph ymm30\{k7\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 78 9f 56 f5 7b\s+vreduceph ymm30\{k7\}\{z\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 79 18 56 f5 7b\s+vreduceps ymm30,ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 79 1f 56 f5 7b\s+vreduceps ymm30\{k7\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 79 9f 56 f5 7b\s+vreduceps ymm30\{k7\}\{z\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 f9 18 09 f5 7b\s+vrndscalepd ymm30,ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 f9 1f 09 f5 7b\s+vrndscalepd ymm30\{k7\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 f9 9f 09 f5 7b\s+vrndscalepd ymm30\{k7\}\{z\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 78 18 08 f5 7b\s+vrndscaleph ymm30,ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 78 1f 08 f5 7b\s+vrndscaleph ymm30\{k7\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 78 9f 08 f5 7b\s+vrndscaleph ymm30\{k7\}\{z\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 79 18 08 f5 7b\s+vrndscaleps ymm30,ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 79 1f 08 f5 7b\s+vrndscaleps ymm30\{k7\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 79 9f 08 f5 7b\s+vrndscaleps ymm30\{k7\}\{z\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 02 91 10 2c f4\s+vscalefpd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 91 37 2c f4\s+vscalefpd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 91 f7 2c f4\s+vscalefpd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 11 10 2c f4\s+vscalefph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 11 37 2c f4\s+vscalefph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 11 f7 2c f4\s+vscalefph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 11 10 2c f4\s+vscalefps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 11 37 2c f4\s+vscalefps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 11 f7 2c f4\s+vscalefps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 18 51 f5\s+vsqrtpd ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 3f 51 f5\s+vsqrtpd ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 ff 51 f5\s+vsqrtpd ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 78 18 51 f5\s+vsqrtph ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 78 3f 51 f5\s+vsqrtph ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 78 ff 51 f5\s+vsqrtph ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 78 18 51 f5\s+vsqrtps ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 78 3f 51 f5\s+vsqrtps ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 78 ff 51 f5\s+vsqrtps ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 91 10 5c f4\s+vsubpd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 91 37 5c f4\s+vsubpd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 91 f7 5c f4\s+vsubpd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 10 10 5c f4\s+vsubph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 10 37 5c f4\s+vsubph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 10 f7 5c f4\s+vsubph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 10 10 5c f4\s+vsubps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 10 37 5c f4\s+vsubps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 10 f7 5c f4\s+vsubps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 91 10 58 f4\s+vaddpd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 91 37 58 f4\s+vaddpd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 91 f7 58 f4\s+vaddpd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 10 10 58 f4\s+vaddph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 10 37 58 f4\s+vaddph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 10 f7 58 f4\s+vaddph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 10 10 58 f4\s+vaddps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 10 37 58 f4\s+vaddps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 10 f7 58 f4\s+vaddps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 91 91 10 c2 ec 7b\s+vcmppd k5,ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 91 91 17 c2 ec 7b\s+vcmppd k5\{k7\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 93 10 10 c2 ec 7b\s+vcmpph k5,ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 93 10 17 c2 ec 7b\s+vcmpph k5\{k7\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 91 10 10 c2 ec 7b\s+vcmpps k5,ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 91 10 17 c2 ec 7b\s+vcmpps k5\{k7\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 05 78 18 5b f5\s+vcvtdq2ph xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 78 3f 5b f5\s+vcvtdq2ph xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 78 ff 5b f5\s+vcvtdq2ph xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 78 18 5b f5\s+vcvtdq2ps ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 78 3f 5b f5\s+vcvtdq2ps ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 78 ff 5b f5\s+vcvtdq2ps ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 fb 18 e6 f5\s+vcvtpd2dq xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 fb 3f e6 f5\s+vcvtpd2dq xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 fb ff e6 f5\s+vcvtpd2dq xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 f9 18 5a f5\s+vcvtpd2ph xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 f9 3f 5a f5\s+vcvtpd2ph xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 f9 ff 5a f5\s+vcvtpd2ph xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 18 5a f5\s+vcvtpd2ps xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 3f 5a f5\s+vcvtpd2ps xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 ff 5a f5\s+vcvtpd2ps xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 18 7b f5\s+vcvtpd2qq ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 3f 7b f5\s+vcvtpd2qq ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 ff 7b f5\s+vcvtpd2qq ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 f8 18 79 f5\s+vcvtpd2udq xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 f8 3f 79 f5\s+vcvtpd2udq xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 f8 ff 79 f5\s+vcvtpd2udq xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 18 79 f5\s+vcvtpd2uqq ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 3f 79 f5\s+vcvtpd2uqq ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 ff 79 f5\s+vcvtpd2uqq ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 79 18 5b f5\s+vcvtph2dq ymm30,xmm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 79 3f 5b f5\s+vcvtph2dq ymm30\{k7\},xmm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 79 ff 5b f5\s+vcvtph2dq ymm30\{k7\}\{z\},xmm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 78 18 5a f5\s+vcvtph2pd ymm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 78 1f 5a f5\s+vcvtph2pd ymm30\{k7\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 78 9f 5a f5\s+vcvtph2pd ymm30\{k7\}\{z\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 02 79 18 13 f5\s+vcvtph2ps ymm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 02 79 1f 13 f5\s+vcvtph2ps ymm30\{k7\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 02 79 9f 13 f5\s+vcvtph2ps ymm30\{k7\}\{z\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 06 79 18 13 f5\s+vcvtph2psx ymm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 06 79 1f 13 f5\s+vcvtph2psx ymm30\{k7\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 06 79 9f 13 f5\s+vcvtph2psx ymm30\{k7\}\{z\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 79 18 7b f5\s+vcvtph2qq ymm30,xmm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 79 3f 7b f5\s+vcvtph2qq ymm30\{k7\},xmm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 79 ff 7b f5\s+vcvtph2qq ymm30\{k7\}\{z\},xmm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 78 18 79 f5\s+vcvtph2udq ymm30,xmm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 78 3f 79 f5\s+vcvtph2udq ymm30\{k7\},xmm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 78 ff 79 f5\s+vcvtph2udq ymm30\{k7\}\{z\},xmm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 79 18 79 f5\s+vcvtph2uqq ymm30,xmm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 79 3f 79 f5\s+vcvtph2uqq ymm30\{k7\},xmm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 79 ff 79 f5\s+vcvtph2uqq ymm30\{k7\}\{z\},xmm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 78 18 7d f5\s+vcvtph2uw ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 78 3f 7d f5\s+vcvtph2uw ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 78 ff 7d f5\s+vcvtph2uw ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 79 18 7d f5\s+vcvtph2w ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 79 3f 7d f5\s+vcvtph2w ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 79 ff 7d f5\s+vcvtph2w ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 79 18 5b f5\s+vcvtps2dq ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 79 3f 5b f5\s+vcvtps2dq ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 79 ff 5b f5\s+vcvtps2dq ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 78 18 5a f5\s+vcvtps2pd ymm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 78 1f 5a f5\s+vcvtps2pd ymm30\{k7\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 78 9f 5a f5\s+vcvtps2pd ymm30\{k7\}\{z\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 79 18 1d f5\s+vcvtps2phx xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 79 3f 1d f5\s+vcvtps2phx xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 79 ff 1d f5\s+vcvtps2phx xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 79 18 7b f5\s+vcvtps2qq ymm30,xmm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 79 3f 7b f5\s+vcvtps2qq ymm30\{k7\},xmm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 79 ff 7b f5\s+vcvtps2qq ymm30\{k7\}\{z\},xmm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 78 18 79 f5\s+vcvtps2udq ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 78 3f 79 f5\s+vcvtps2udq ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 78 ff 79 f5\s+vcvtps2udq ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 79 18 79 f5\s+vcvtps2uqq ymm30,xmm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 79 3f 79 f5\s+vcvtps2uqq ymm30\{k7\},xmm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 79 ff 79 f5\s+vcvtps2uqq ymm30\{k7\}\{z\},xmm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 fa 18 e6 f5\s+vcvtqq2pd ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 fa 3f e6 f5\s+vcvtqq2pd ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 fa ff e6 f5\s+vcvtqq2pd ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 f8 18 5b f5\s+vcvtqq2ph xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 f8 3f 5b f5\s+vcvtqq2ph xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 f8 ff 5b f5\s+vcvtqq2ph xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 f8 18 5b f5\s+vcvtqq2ps xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 f8 3f 5b f5\s+vcvtqq2ps xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 f8 ff 5b f5\s+vcvtqq2ps xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 18 e6 f5\s+vcvttpd2dq xmm30,ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f9 1f e6 f5\s+vcvttpd2dq xmm30\{k7\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f9 9f e6 f5\s+vcvttpd2dq xmm30\{k7\}\{z\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f9 18 7a f5\s+vcvttpd2qq ymm30,ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f9 1f 7a f5\s+vcvttpd2qq ymm30\{k7\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f9 9f 7a f5\s+vcvttpd2qq ymm30\{k7\}\{z\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f8 18 78 f5\s+vcvttpd2udq xmm30,ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f8 1f 78 f5\s+vcvttpd2udq xmm30\{k7\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f8 9f 78 f5\s+vcvttpd2udq xmm30\{k7\}\{z\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f9 18 78 f5\s+vcvttpd2uqq ymm30,ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f9 1f 78 f5\s+vcvttpd2uqq ymm30\{k7\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f9 9f 78 f5\s+vcvttpd2uqq ymm30\{k7\}\{z\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 7a 18 5b f5\s+vcvttph2dq ymm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 7a 1f 5b f5\s+vcvttph2dq ymm30\{k7\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 7a 9f 5b f5\s+vcvttph2dq ymm30\{k7\}\{z\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 79 18 7a f5\s+vcvttph2qq ymm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 79 1f 7a f5\s+vcvttph2qq ymm30\{k7\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 79 9f 7a f5\s+vcvttph2qq ymm30\{k7\}\{z\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 78 18 78 f5\s+vcvttph2udq ymm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 78 1f 78 f5\s+vcvttph2udq ymm30\{k7\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 78 9f 78 f5\s+vcvttph2udq ymm30\{k7\}\{z\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 79 18 78 f5\s+vcvttph2uqq ymm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 79 1f 78 f5\s+vcvttph2uqq ymm30\{k7\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 79 9f 78 f5\s+vcvttph2uqq ymm30\{k7\}\{z\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 78 18 7c f5\s+vcvttph2uw ymm30,ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 78 1f 7c f5\s+vcvttph2uw ymm30\{k7\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 78 9f 7c f5\s+vcvttph2uw ymm30\{k7\}\{z\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 79 18 7c f5\s+vcvttph2w ymm30,ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 79 1f 7c f5\s+vcvttph2w ymm30\{k7\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 79 9f 7c f5\s+vcvttph2w ymm30\{k7\}\{z\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 7a 18 5b f5\s+vcvttps2dq ymm30,ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 7a 1f 5b f5\s+vcvttps2dq ymm30\{k7\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 7a 9f 5b f5\s+vcvttps2dq ymm30\{k7\}\{z\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 79 18 7a f5\s+vcvttps2qq ymm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 79 1f 7a f5\s+vcvttps2qq ymm30\{k7\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 79 9f 7a f5\s+vcvttps2qq ymm30\{k7\}\{z\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 78 18 78 f5\s+vcvttps2udq ymm30,ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 78 1f 78 f5\s+vcvttps2udq ymm30\{k7\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 78 9f 78 f5\s+vcvttps2udq ymm30\{k7\}\{z\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 79 18 78 f5\s+vcvttps2uqq ymm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 79 1f 78 f5\s+vcvttps2uqq ymm30\{k7\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 79 9f 78 f5\s+vcvttps2uqq ymm30\{k7\}\{z\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 7b 18 7a f5\s+vcvtudq2ph xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 7b 3f 7a f5\s+vcvtudq2ph xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 7b ff 7a f5\s+vcvtudq2ph xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 7b 18 7a f5\s+vcvtudq2ps ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 7b 3f 7a f5\s+vcvtudq2ps ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 7b ff 7a f5\s+vcvtudq2ps ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 fa 18 7a f5\s+vcvtuqq2pd ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 fa 3f 7a f5\s+vcvtuqq2pd ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 fa ff 7a f5\s+vcvtuqq2pd ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 fb 18 7a f5\s+vcvtuqq2ph xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 fb 3f 7a f5\s+vcvtuqq2ph xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 fb ff 7a f5\s+vcvtuqq2ph xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 fb 18 7a f5\s+vcvtuqq2ps xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 fb 3f 7a f5\s+vcvtuqq2ps xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 fb ff 7a f5\s+vcvtuqq2ps xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 7b 18 7d f5\s+vcvtuw2ph ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 7b 3f 7d f5\s+vcvtuw2ph ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 7b ff 7d f5\s+vcvtuw2ph ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 7a 18 7d f5\s+vcvtw2ph ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 7a 3f 7d f5\s+vcvtw2ph ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 7a ff 7d f5\s+vcvtw2ph ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 91 10 5e f4\s+vdivpd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 91 37 5e f4\s+vdivpd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 91 f7 5e f4\s+vdivpd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 10 10 5e f4\s+vdivph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 10 37 5e f4\s+vdivph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 10 f7 5e f4\s+vdivph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 10 10 5e f4\s+vdivps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 10 37 5e f4\s+vdivps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 10 f7 5e f4\s+vdivps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 13 10 56 f4\s+vfcmaddcph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 13 37 56 f4\s+vfcmaddcph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 13 f7 56 f4\s+vfcmaddcph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 13 10 d6 f4\s+vfcmulcph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 13 37 d6 f4\s+vfcmulcph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 13 f7 d6 f4\s+vfcmulcph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 03 91 10 54 f4 7b\s+vfixupimmpd ymm30,ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 91 17 54 f4 7b\s+vfixupimmpd ymm30\{k7\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 91 97 54 f4 7b\s+vfixupimmpd ymm30\{k7\}\{z\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 11 10 54 f4 7b\s+vfixupimmps ymm30,ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 11 17 54 f4 7b\s+vfixupimmps ymm30\{k7\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 11 97 54 f4 7b\s+vfixupimmps ymm30\{k7\}\{z\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 02 91 10 98 f4\s+vfmadd132pd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 91 37 98 f4\s+vfmadd132pd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 91 f7 98 f4\s+vfmadd132pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 11 10 98 f4\s+vfmadd132ph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 11 37 98 f4\s+vfmadd132ph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 11 f7 98 f4\s+vfmadd132ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 11 10 98 f4\s+vfmadd132ps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 11 37 98 f4\s+vfmadd132ps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 11 f7 98 f4\s+vfmadd132ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 91 10 a8 f4\s+vfmadd213pd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 91 37 a8 f4\s+vfmadd213pd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 91 f7 a8 f4\s+vfmadd213pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 11 10 a8 f4\s+vfmadd213ph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 11 37 a8 f4\s+vfmadd213ph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 11 f7 a8 f4\s+vfmadd213ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 11 10 a8 f4\s+vfmadd213ps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 11 37 a8 f4\s+vfmadd213ps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 11 f7 a8 f4\s+vfmadd213ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 91 10 b8 f4\s+vfmadd231pd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 91 37 b8 f4\s+vfmadd231pd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 91 f7 b8 f4\s+vfmadd231pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 11 10 b8 f4\s+vfmadd231ph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 11 37 b8 f4\s+vfmadd231ph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 11 f7 b8 f4\s+vfmadd231ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 11 10 b8 f4\s+vfmadd231ps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 11 37 b8 f4\s+vfmadd231ps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 11 f7 b8 f4\s+vfmadd231ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 12 10 56 f4\s+vfmaddcph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 12 37 56 f4\s+vfmaddcph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 12 f7 56 f4\s+vfmaddcph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 91 10 96 f4\s+vfmaddsub132pd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 91 37 96 f4\s+vfmaddsub132pd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 91 f7 96 f4\s+vfmaddsub132pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 11 10 96 f4\s+vfmaddsub132ph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 11 37 96 f4\s+vfmaddsub132ph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 11 f7 96 f4\s+vfmaddsub132ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 11 10 96 f4\s+vfmaddsub132ps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 11 37 96 f4\s+vfmaddsub132ps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 11 f7 96 f4\s+vfmaddsub132ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 91 10 a6 f4\s+vfmaddsub213pd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 91 37 a6 f4\s+vfmaddsub213pd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 91 f7 a6 f4\s+vfmaddsub213pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 11 10 a6 f4\s+vfmaddsub213ph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 11 37 a6 f4\s+vfmaddsub213ph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 11 f7 a6 f4\s+vfmaddsub213ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 11 10 a6 f4\s+vfmaddsub213ps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 11 37 a6 f4\s+vfmaddsub213ps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 11 f7 a6 f4\s+vfmaddsub213ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 91 10 b6 f4\s+vfmaddsub231pd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 91 37 b6 f4\s+vfmaddsub231pd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 91 f7 b6 f4\s+vfmaddsub231pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 11 10 b6 f4\s+vfmaddsub231ph ymm30,ymm29,ymm28\{rn-sae\}
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+\s*[a-f0-9]+:\s*62 01 91 f7 59 f4\s+vmulpd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 10 10 59 f4\s+vmulph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 10 37 59 f4\s+vmulph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 10 f7 59 f4\s+vmulph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 10 10 59 f4\s+vmulps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 10 37 59 f4\s+vmulps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 10 f7 59 f4\s+vmulps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 03 91 10 50 f4 7b\s+vrangepd ymm30,ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 91 17 50 f4 7b\s+vrangepd ymm30\{k7\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 91 97 50 f4 7b\s+vrangepd ymm30\{k7\}\{z\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 11 10 50 f4 7b\s+vrangeps ymm30,ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 11 17 50 f4 7b\s+vrangeps ymm30\{k7\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 11 97 50 f4 7b\s+vrangeps ymm30\{k7\}\{z\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 f9 18 56 f5 7b\s+vreducepd ymm30,ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 f9 1f 56 f5 7b\s+vreducepd ymm30\{k7\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 f9 9f 56 f5 7b\s+vreducepd ymm30\{k7\}\{z\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 78 18 56 f5 7b\s+vreduceph ymm30,ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 78 1f 56 f5 7b\s+vreduceph ymm30\{k7\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 78 9f 56 f5 7b\s+vreduceph ymm30\{k7\}\{z\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 79 18 56 f5 7b\s+vreduceps ymm30,ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 79 1f 56 f5 7b\s+vreduceps ymm30\{k7\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 79 9f 56 f5 7b\s+vreduceps ymm30\{k7\}\{z\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 f9 18 09 f5 7b\s+vrndscalepd ymm30,ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 f9 1f 09 f5 7b\s+vrndscalepd ymm30\{k7\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 f9 9f 09 f5 7b\s+vrndscalepd ymm30\{k7\}\{z\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 78 18 08 f5 7b\s+vrndscaleph ymm30,ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 78 1f 08 f5 7b\s+vrndscaleph ymm30\{k7\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 78 9f 08 f5 7b\s+vrndscaleph ymm30\{k7\}\{z\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 79 18 08 f5 7b\s+vrndscaleps ymm30,ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 79 1f 08 f5 7b\s+vrndscaleps ymm30\{k7\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 79 9f 08 f5 7b\s+vrndscaleps ymm30\{k7\}\{z\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 02 91 10 2c f4\s+vscalefpd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 91 37 2c f4\s+vscalefpd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 91 f7 2c f4\s+vscalefpd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 11 10 2c f4\s+vscalefph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 11 37 2c f4\s+vscalefph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 11 f7 2c f4\s+vscalefph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 11 10 2c f4\s+vscalefps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 11 37 2c f4\s+vscalefps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 11 f7 2c f4\s+vscalefps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 18 51 f5\s+vsqrtpd ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 3f 51 f5\s+vsqrtpd ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 ff 51 f5\s+vsqrtpd ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 78 18 51 f5\s+vsqrtph ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 78 3f 51 f5\s+vsqrtph ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 78 ff 51 f5\s+vsqrtph ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 78 18 51 f5\s+vsqrtps ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 78 3f 51 f5\s+vsqrtps ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 78 ff 51 f5\s+vsqrtps ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 91 10 5c f4\s+vsubpd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 91 37 5c f4\s+vsubpd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 91 f7 5c f4\s+vsubpd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 10 10 5c f4\s+vsubph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 10 37 5c f4\s+vsubph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 10 f7 5c f4\s+vsubph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 10 10 5c f4\s+vsubps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 10 37 5c f4\s+vsubps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 10 f7 5c f4\s+vsubps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-rounding.d b/gas/testsuite/gas/i386/x86-64-avx10_2-rounding.d
new file mode 100644
index 00000000000..fccdc398528
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-rounding.d
@@ -0,0 +1,451 @@ 
+#objdump: -dw
+#name: x86_64 AVX10.2 rounding insns
+#source: x86-64-avx10_2-rounding.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*62 01 91 10 58 f4\s+vaddpd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 91 37 58 f4\s+vaddpd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 91 f7 58 f4\s+vaddpd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 10 10 58 f4\s+vaddph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 10 37 58 f4\s+vaddph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 10 f7 58 f4\s+vaddph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 10 10 58 f4\s+vaddps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 10 37 58 f4\s+vaddps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 10 f7 58 f4\s+vaddps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 91 91 10 c2 ec 7b\s+vcmppd \$0x7b,\{sae\},%ymm28,%ymm29,%k5
+\s*[a-f0-9]+:\s*62 91 91 17 c2 ec 7b\s+vcmppd \$0x7b,\{sae\},%ymm28,%ymm29,%k5\{%k7\}
+\s*[a-f0-9]+:\s*62 93 10 10 c2 ec 7b\s+vcmpph \$0x7b,\{sae\},%ymm28,%ymm29,%k5
+\s*[a-f0-9]+:\s*62 93 10 17 c2 ec 7b\s+vcmpph \$0x7b,\{sae\},%ymm28,%ymm29,%k5\{%k7\}
+\s*[a-f0-9]+:\s*62 91 10 10 c2 ec 7b\s+vcmpps \$0x7b,\{sae\},%ymm28,%ymm29,%k5
+\s*[a-f0-9]+:\s*62 91 10 17 c2 ec 7b\s+vcmpps \$0x7b,\{sae\},%ymm28,%ymm29,%k5\{%k7\}
+\s*[a-f0-9]+:\s*62 05 78 18 5b f5\s+vcvtdq2ph \{rn-sae\},%ymm29,%xmm30
+\s*[a-f0-9]+:\s*62 05 78 3f 5b f5\s+vcvtdq2ph \{rd-sae\},%ymm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 78 ff 5b f5\s+vcvtdq2ph \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 78 18 5b f5\s+vcvtdq2ps \{rn-sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 78 3f 5b f5\s+vcvtdq2ps \{rd-sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 78 ff 5b f5\s+vcvtdq2ps \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 fb 18 e6 f5\s+vcvtpd2dq \{rn-sae\},%ymm29,%xmm30
+\s*[a-f0-9]+:\s*62 01 fb 3f e6 f5\s+vcvtpd2dq \{rd-sae\},%ymm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 fb ff e6 f5\s+vcvtpd2dq \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 f9 18 5a f5\s+vcvtpd2ph \{rn-sae\},%ymm29,%xmm30
+\s*[a-f0-9]+:\s*62 05 f9 3f 5a f5\s+vcvtpd2ph \{rd-sae\},%ymm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 f9 ff 5a f5\s+vcvtpd2ph \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 f9 18 5a f5\s+vcvtpd2ps \{rn-sae\},%ymm29,%xmm30
+\s*[a-f0-9]+:\s*62 01 f9 3f 5a f5\s+vcvtpd2ps \{rd-sae\},%ymm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 f9 ff 5a f5\s+vcvtpd2ps \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 f9 18 7b f5\s+vcvtpd2qq \{rn-sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 f9 3f 7b f5\s+vcvtpd2qq \{rd-sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 f9 ff 7b f5\s+vcvtpd2qq \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 f8 18 79 f5\s+vcvtpd2udq \{rn-sae\},%ymm29,%xmm30
+\s*[a-f0-9]+:\s*62 01 f8 3f 79 f5\s+vcvtpd2udq \{rd-sae\},%ymm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 f8 ff 79 f5\s+vcvtpd2udq \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 f9 18 79 f5\s+vcvtpd2uqq \{rn-sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 f9 3f 79 f5\s+vcvtpd2uqq \{rd-sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 f9 ff 79 f5\s+vcvtpd2uqq \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 79 18 5b f5\s+vcvtph2dq \{rn-sae\},%xmm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 79 3f 5b f5\s+vcvtph2dq \{rd-sae\},%xmm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 79 ff 5b f5\s+vcvtph2dq \{rz-sae\},%xmm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 78 18 5a f5\s+vcvtph2pd \{sae\},%xmm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 78 1f 5a f5\s+vcvtph2pd \{sae\},%xmm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 78 9f 5a f5\s+vcvtph2pd \{sae\},%xmm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 79 18 13 f5\s+vcvtph2ps \{sae\},%xmm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 79 1f 13 f5\s+vcvtph2ps \{sae\},%xmm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 79 9f 13 f5\s+vcvtph2ps \{sae\},%xmm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 79 18 13 f5\s+vcvtph2psx \{sae\},%xmm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 79 1f 13 f5\s+vcvtph2psx \{sae\},%xmm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 79 9f 13 f5\s+vcvtph2psx \{sae\},%xmm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 79 18 7b f5\s+vcvtph2qq \{rn-sae\},%xmm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 79 3f 7b f5\s+vcvtph2qq \{rd-sae\},%xmm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 79 ff 7b f5\s+vcvtph2qq \{rz-sae\},%xmm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 78 18 79 f5\s+vcvtph2udq \{rn-sae\},%xmm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 78 3f 79 f5\s+vcvtph2udq \{rd-sae\},%xmm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 78 ff 79 f5\s+vcvtph2udq \{rz-sae\},%xmm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 79 18 79 f5\s+vcvtph2uqq \{rn-sae\},%xmm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 79 3f 79 f5\s+vcvtph2uqq \{rd-sae\},%xmm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 79 ff 79 f5\s+vcvtph2uqq \{rz-sae\},%xmm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 78 18 7d f5\s+vcvtph2uw \{rn-sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 78 3f 7d f5\s+vcvtph2uw \{rd-sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 78 ff 7d f5\s+vcvtph2uw \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 79 18 7d f5\s+vcvtph2w \{rn-sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 79 3f 7d f5\s+vcvtph2w \{rd-sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 79 ff 7d f5\s+vcvtph2w \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 79 18 5b f5\s+vcvtps2dq \{rn-sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 79 3f 5b f5\s+vcvtps2dq \{rd-sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 79 ff 5b f5\s+vcvtps2dq \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 78 18 5a f5\s+vcvtps2pd \{sae\},%xmm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 78 1f 5a f5\s+vcvtps2pd \{sae\},%xmm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 78 9f 5a f5\s+vcvtps2pd \{sae\},%xmm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 79 18 1d f5\s+vcvtps2phx \{rn-sae\},%ymm29,%xmm30
+\s*[a-f0-9]+:\s*62 05 79 3f 1d f5\s+vcvtps2phx \{rd-sae\},%ymm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 79 ff 1d f5\s+vcvtps2phx \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 79 18 7b f5\s+vcvtps2qq \{rn-sae\},%xmm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 79 3f 7b f5\s+vcvtps2qq \{rd-sae\},%xmm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 79 ff 7b f5\s+vcvtps2qq \{rz-sae\},%xmm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 78 18 79 f5\s+vcvtps2udq \{rn-sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 78 3f 79 f5\s+vcvtps2udq \{rd-sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 78 ff 79 f5\s+vcvtps2udq \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 79 18 79 f5\s+vcvtps2uqq \{rn-sae\},%xmm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 79 3f 79 f5\s+vcvtps2uqq \{rd-sae\},%xmm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 79 ff 79 f5\s+vcvtps2uqq \{rz-sae\},%xmm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 fa 18 e6 f5\s+vcvtqq2pd \{rn-sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 fa 3f e6 f5\s+vcvtqq2pd \{rd-sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 fa ff e6 f5\s+vcvtqq2pd \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 f8 18 5b f5\s+vcvtqq2ph \{rn-sae\},%ymm29,%xmm30
+\s*[a-f0-9]+:\s*62 05 f8 3f 5b f5\s+vcvtqq2ph \{rd-sae\},%ymm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 f8 ff 5b f5\s+vcvtqq2ph \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 f8 18 5b f5\s+vcvtqq2ps \{rn-sae\},%ymm29,%xmm30
+\s*[a-f0-9]+:\s*62 01 f8 3f 5b f5\s+vcvtqq2ps \{rd-sae\},%ymm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 f8 ff 5b f5\s+vcvtqq2ps \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 f9 18 e6 f5\s+vcvttpd2dq \{sae\},%ymm29,%xmm30
+\s*[a-f0-9]+:\s*62 01 f9 1f e6 f5\s+vcvttpd2dq \{sae\},%ymm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 f9 9f e6 f5\s+vcvttpd2dq \{sae\},%ymm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 f9 18 7a f5\s+vcvttpd2qq \{sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 f9 1f 7a f5\s+vcvttpd2qq \{sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 f9 9f 7a f5\s+vcvttpd2qq \{sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 f8 18 78 f5\s+vcvttpd2udq \{sae\},%ymm29,%xmm30
+\s*[a-f0-9]+:\s*62 01 f8 1f 78 f5\s+vcvttpd2udq \{sae\},%ymm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 f8 9f 78 f5\s+vcvttpd2udq \{sae\},%ymm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 f9 18 78 f5\s+vcvttpd2uqq \{sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 f9 1f 78 f5\s+vcvttpd2uqq \{sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 f9 9f 78 f5\s+vcvttpd2uqq \{sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 7a 18 5b f5\s+vcvttph2dq \{sae\},%xmm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 7a 1f 5b f5\s+vcvttph2dq \{sae\},%xmm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 7a 9f 5b f5\s+vcvttph2dq \{sae\},%xmm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 79 18 7a f5\s+vcvttph2qq \{sae\},%xmm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 79 1f 7a f5\s+vcvttph2qq \{sae\},%xmm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 79 9f 7a f5\s+vcvttph2qq \{sae\},%xmm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 78 18 78 f5\s+vcvttph2udq \{sae\},%xmm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 78 1f 78 f5\s+vcvttph2udq \{sae\},%xmm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 78 9f 78 f5\s+vcvttph2udq \{sae\},%xmm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 79 18 78 f5\s+vcvttph2uqq \{sae\},%xmm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 79 1f 78 f5\s+vcvttph2uqq \{sae\},%xmm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 79 9f 78 f5\s+vcvttph2uqq \{sae\},%xmm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 78 18 7c f5\s+vcvttph2uw \{sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 78 1f 7c f5\s+vcvttph2uw \{sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 78 9f 7c f5\s+vcvttph2uw \{sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 79 18 7c f5\s+vcvttph2w \{sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 79 1f 7c f5\s+vcvttph2w \{sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 79 9f 7c f5\s+vcvttph2w \{sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 7a 18 5b f5\s+vcvttps2dq \{sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 7a 1f 5b f5\s+vcvttps2dq \{sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 7a 9f 5b f5\s+vcvttps2dq \{sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 79 18 7a f5\s+vcvttps2qq \{sae\},%xmm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 79 1f 7a f5\s+vcvttps2qq \{sae\},%xmm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 79 9f 7a f5\s+vcvttps2qq \{sae\},%xmm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 78 18 78 f5\s+vcvttps2udq \{sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 78 1f 78 f5\s+vcvttps2udq \{sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 78 9f 78 f5\s+vcvttps2udq \{sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 79 18 78 f5\s+vcvttps2uqq \{sae\},%xmm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 79 1f 78 f5\s+vcvttps2uqq \{sae\},%xmm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 79 9f 78 f5\s+vcvttps2uqq \{sae\},%xmm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 7b 18 7a f5\s+vcvtudq2ph \{rn-sae\},%ymm29,%xmm30
+\s*[a-f0-9]+:\s*62 05 7b 3f 7a f5\s+vcvtudq2ph \{rd-sae\},%ymm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 7b ff 7a f5\s+vcvtudq2ph \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 7b 18 7a f5\s+vcvtudq2ps \{rn-sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 7b 3f 7a f5\s+vcvtudq2ps \{rd-sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 7b ff 7a f5\s+vcvtudq2ps \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 fa 18 7a f5\s+vcvtuqq2pd \{rn-sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 fa 3f 7a f5\s+vcvtuqq2pd \{rd-sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 fa ff 7a f5\s+vcvtuqq2pd \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 fb 18 7a f5\s+vcvtuqq2ph \{rn-sae\},%ymm29,%xmm30
+\s*[a-f0-9]+:\s*62 05 fb 3f 7a f5\s+vcvtuqq2ph \{rd-sae\},%ymm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 fb ff 7a f5\s+vcvtuqq2ph \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 fb 18 7a f5\s+vcvtuqq2ps \{rn-sae\},%ymm29,%xmm30
+\s*[a-f0-9]+:\s*62 01 fb 3f 7a f5\s+vcvtuqq2ps \{rd-sae\},%ymm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 fb ff 7a f5\s+vcvtuqq2ps \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 7b 18 7d f5\s+vcvtuw2ph \{rn-sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 7b 3f 7d f5\s+vcvtuw2ph \{rd-sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 7b ff 7d f5\s+vcvtuw2ph \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 7a 18 7d f5\s+vcvtw2ph \{rn-sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 7a 3f 7d f5\s+vcvtw2ph \{rd-sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 7a ff 7d f5\s+vcvtw2ph \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 91 10 5e f4\s+vdivpd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 91 37 5e f4\s+vdivpd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 91 f7 5e f4\s+vdivpd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 10 10 5e f4\s+vdivph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 10 37 5e f4\s+vdivph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 10 f7 5e f4\s+vdivph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 10 10 5e f4\s+vdivps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 10 37 5e f4\s+vdivps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 10 f7 5e f4\s+vdivps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 13 10 56 f4\s+vfcmaddcph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 13 37 56 f4\s+vfcmaddcph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 13 f7 56 f4\s+vfcmaddcph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 13 10 d6 f4\s+vfcmulcph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 13 37 d6 f4\s+vfcmulcph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 13 f7 d6 f4\s+vfcmulcph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 91 10 54 f4 7b\s+vfixupimmpd \$0x7b,\{sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 03 91 17 54 f4 7b\s+vfixupimmpd \$0x7b,\{sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 03 91 97 54 f4 7b\s+vfixupimmpd \$0x7b,\{sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 11 10 54 f4 7b\s+vfixupimmps \$0x7b,\{sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 03 11 17 54 f4 7b\s+vfixupimmps \$0x7b,\{sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 03 11 97 54 f4 7b\s+vfixupimmps \$0x7b,\{sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 91 10 98 f4\s+vfmadd132pd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 91 37 98 f4\s+vfmadd132pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 91 f7 98 f4\s+vfmadd132pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 11 10 98 f4\s+vfmadd132ph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 11 37 98 f4\s+vfmadd132ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 11 f7 98 f4\s+vfmadd132ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 11 10 98 f4\s+vfmadd132ps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 11 37 98 f4\s+vfmadd132ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 11 f7 98 f4\s+vfmadd132ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 91 10 a8 f4\s+vfmadd213pd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 91 37 a8 f4\s+vfmadd213pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 91 f7 a8 f4\s+vfmadd213pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 11 10 a8 f4\s+vfmadd213ph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 11 37 a8 f4\s+vfmadd213ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 11 f7 a8 f4\s+vfmadd213ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 11 10 a8 f4\s+vfmadd213ps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 11 37 a8 f4\s+vfmadd213ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 11 f7 a8 f4\s+vfmadd213ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 91 10 b8 f4\s+vfmadd231pd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 91 37 b8 f4\s+vfmadd231pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 91 f7 b8 f4\s+vfmadd231pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 11 10 b8 f4\s+vfmadd231ph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 11 37 b8 f4\s+vfmadd231ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 11 f7 b8 f4\s+vfmadd231ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 11 10 b8 f4\s+vfmadd231ps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 11 37 b8 f4\s+vfmadd231ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 11 f7 b8 f4\s+vfmadd231ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 12 10 56 f4\s+vfmaddcph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 12 37 56 f4\s+vfmaddcph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 12 f7 56 f4\s+vfmaddcph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 91 10 96 f4\s+vfmaddsub132pd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 91 37 96 f4\s+vfmaddsub132pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 91 f7 96 f4\s+vfmaddsub132pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 11 10 96 f4\s+vfmaddsub132ph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 11 37 96 f4\s+vfmaddsub132ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 11 f7 96 f4\s+vfmaddsub132ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 11 10 96 f4\s+vfmaddsub132ps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 11 37 96 f4\s+vfmaddsub132ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 11 f7 96 f4\s+vfmaddsub132ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 91 10 a6 f4\s+vfmaddsub213pd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 91 37 a6 f4\s+vfmaddsub213pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 91 f7 a6 f4\s+vfmaddsub213pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 11 10 a6 f4\s+vfmaddsub213ph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 11 37 a6 f4\s+vfmaddsub213ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 11 f7 a6 f4\s+vfmaddsub213ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 11 10 a6 f4\s+vfmaddsub213ps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 11 37 a6 f4\s+vfmaddsub213ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 11 f7 a6 f4\s+vfmaddsub213ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 91 10 b6 f4\s+vfmaddsub231pd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 91 37 b6 f4\s+vfmaddsub231pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 91 f7 b6 f4\s+vfmaddsub231pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 11 10 b6 f4\s+vfmaddsub231ph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 11 37 b6 f4\s+vfmaddsub231ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 11 f7 b6 f4\s+vfmaddsub231ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 11 10 b6 f4\s+vfmaddsub231ps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 11 37 b6 f4\s+vfmaddsub231ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 11 f7 b6 f4\s+vfmaddsub231ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 91 10 9a f4\s+vfmsub132pd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 91 37 9a f4\s+vfmsub132pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 91 f7 9a f4\s+vfmsub132pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 11 10 9a f4\s+vfmsub132ph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 11 37 9a f4\s+vfmsub132ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 11 f7 9a f4\s+vfmsub132ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 11 10 9a f4\s+vfmsub132ps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 11 37 9a f4\s+vfmsub132ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 11 f7 9a f4\s+vfmsub132ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 91 10 aa f4\s+vfmsub213pd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 91 37 aa f4\s+vfmsub213pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 91 f7 aa f4\s+vfmsub213pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 11 10 aa f4\s+vfmsub213ph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 11 37 aa f4\s+vfmsub213ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 11 f7 aa f4\s+vfmsub213ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
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+\s*[a-f0-9]+:\s*62 03 f9 9f 56 f5 7b\s+vreducepd \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 78 18 56 f5 7b\s+vreduceph \$0x7b,\{sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 03 78 1f 56 f5 7b\s+vreduceph \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 03 78 9f 56 f5 7b\s+vreduceph \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 79 18 56 f5 7b\s+vreduceps \$0x7b,\{sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 03 79 1f 56 f5 7b\s+vreduceps \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 03 79 9f 56 f5 7b\s+vreduceps \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 f9 18 09 f5 7b\s+vrndscalepd \$0x7b,\{sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 03 f9 1f 09 f5 7b\s+vrndscalepd \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 03 f9 9f 09 f5 7b\s+vrndscalepd \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 78 18 08 f5 7b\s+vrndscaleph \$0x7b,\{sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 03 78 1f 08 f5 7b\s+vrndscaleph \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 03 78 9f 08 f5 7b\s+vrndscaleph \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 79 18 08 f5 7b\s+vrndscaleps \$0x7b,\{sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 03 79 1f 08 f5 7b\s+vrndscaleps \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 03 79 9f 08 f5 7b\s+vrndscaleps \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 91 10 2c f4\s+vscalefpd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 91 37 2c f4\s+vscalefpd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 91 f7 2c f4\s+vscalefpd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 11 10 2c f4\s+vscalefph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 11 37 2c f4\s+vscalefph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 11 f7 2c f4\s+vscalefph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 11 10 2c f4\s+vscalefps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 11 37 2c f4\s+vscalefps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 11 f7 2c f4\s+vscalefps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 f9 18 51 f5\s+vsqrtpd \{rn-sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 f9 3f 51 f5\s+vsqrtpd \{rd-sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 f9 ff 51 f5\s+vsqrtpd \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 78 18 51 f5\s+vsqrtph \{rn-sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 78 3f 51 f5\s+vsqrtph \{rd-sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 78 ff 51 f5\s+vsqrtph \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 78 18 51 f5\s+vsqrtps \{rn-sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 78 3f 51 f5\s+vsqrtps \{rd-sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 78 ff 51 f5\s+vsqrtps \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 91 10 5c f4\s+vsubpd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 91 37 5c f4\s+vsubpd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 91 f7 5c f4\s+vsubpd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 10 10 5c f4\s+vsubph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 10 37 5c f4\s+vsubph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 10 f7 5c f4\s+vsubph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 10 10 5c f4\s+vsubps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 10 37 5c f4\s+vsubps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 10 f7 5c f4\s+vsubps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-rounding.s b/gas/testsuite/gas/i386/x86-64-avx10_2-rounding.s
new file mode 100644
index 00000000000..19f89c90cdb
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-rounding.s
@@ -0,0 +1,888 @@ 
+# Check 64bit AVX10.2 instructions
+
+	.text
+_start:
+	vaddpd	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vaddpd	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vaddpd	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vaddph	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vaddph	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vaddph	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vaddps	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vaddps	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vaddps	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vcmppd	$123, {sae}, %ymm28, %ymm29, %k5
+	vcmppd	$123, {sae}, %ymm28, %ymm29, %k5{%k7}
+	vcmpph	$123, {sae}, %ymm28, %ymm29, %k5
+	vcmpph	$123, {sae}, %ymm28, %ymm29, %k5{%k7}
+	vcmpps	$123, {sae}, %ymm28, %ymm29, %k5
+	vcmpps	$123, {sae}, %ymm28, %ymm29, %k5{%k7}
+	vcvtdq2ph	{rn-sae}, %ymm29, %xmm30
+	vcvtdq2ph	{rd-sae}, %ymm29, %xmm30{%k7}
+	vcvtdq2ph	{rz-sae}, %ymm29, %xmm30{%k7}{z}
+	vcvtdq2ps	{rn-sae}, %ymm29, %ymm30
+	vcvtdq2ps	{rd-sae}, %ymm29, %ymm30{%k7}
+	vcvtdq2ps	{rz-sae}, %ymm29, %ymm30{%k7}{z}
+	vcvtpd2dq	{rn-sae}, %ymm29, %xmm30
+	vcvtpd2dq	{rd-sae}, %ymm29, %xmm30{%k7}
+	vcvtpd2dq	{rz-sae}, %ymm29, %xmm30{%k7}{z}
+	vcvtpd2ph	{rn-sae}, %ymm29, %xmm30
+	vcvtpd2ph	{rd-sae}, %ymm29, %xmm30{%k7}
+	vcvtpd2ph	{rz-sae}, %ymm29, %xmm30{%k7}{z}
+	vcvtpd2ps	{rn-sae}, %ymm29, %xmm30
+	vcvtpd2ps	{rd-sae}, %ymm29, %xmm30{%k7}
+	vcvtpd2ps	{rz-sae}, %ymm29, %xmm30{%k7}{z}
+	vcvtpd2qq	{rn-sae}, %ymm29, %ymm30
+	vcvtpd2qq	{rd-sae}, %ymm29, %ymm30{%k7}
+	vcvtpd2qq	{rz-sae}, %ymm29, %ymm30{%k7}{z}
+	vcvtpd2udq	{rn-sae}, %ymm29, %xmm30
+	vcvtpd2udq	{rd-sae}, %ymm29, %xmm30{%k7}
+	vcvtpd2udq	{rz-sae}, %ymm29, %xmm30{%k7}{z}
+	vcvtpd2uqq	{rn-sae}, %ymm29, %ymm30
+	vcvtpd2uqq	{rd-sae}, %ymm29, %ymm30{%k7}
+	vcvtpd2uqq	{rz-sae}, %ymm29, %ymm30{%k7}{z}
+	vcvtph2dq	{rn-sae}, %xmm29, %ymm30
+	vcvtph2dq	{rd-sae}, %xmm29, %ymm30{%k7}
+	vcvtph2dq	{rz-sae}, %xmm29, %ymm30{%k7}{z}
+	vcvtph2pd	{sae}, %xmm29, %ymm30
+	vcvtph2pd	{sae}, %xmm29, %ymm30{%k7}
+	vcvtph2pd	{sae}, %xmm29, %ymm30{%k7}{z}
+	vcvtph2ps	{sae}, %xmm29, %ymm30
+	vcvtph2ps	{sae}, %xmm29, %ymm30{%k7}
+	vcvtph2ps	{sae}, %xmm29, %ymm30{%k7}{z}
+	vcvtph2psx	{sae}, %xmm29, %ymm30
+	vcvtph2psx	{sae}, %xmm29, %ymm30{%k7}
+	vcvtph2psx	{sae}, %xmm29, %ymm30{%k7}{z}
+	vcvtph2qq	{rn-sae}, %xmm29, %ymm30
+	vcvtph2qq	{rd-sae}, %xmm29, %ymm30{%k7}
+	vcvtph2qq	{rz-sae}, %xmm29, %ymm30{%k7}{z}
+	vcvtph2udq	{rn-sae}, %xmm29, %ymm30
+	vcvtph2udq	{rd-sae}, %xmm29, %ymm30{%k7}
+	vcvtph2udq	{rz-sae}, %xmm29, %ymm30{%k7}{z}
+	vcvtph2uqq	{rn-sae}, %xmm29, %ymm30
+	vcvtph2uqq	{rd-sae}, %xmm29, %ymm30{%k7}
+	vcvtph2uqq	{rz-sae}, %xmm29, %ymm30{%k7}{z}
+	vcvtph2uw	{rn-sae}, %ymm29, %ymm30
+	vcvtph2uw	{rd-sae}, %ymm29, %ymm30{%k7}
+	vcvtph2uw	{rz-sae}, %ymm29, %ymm30{%k7}{z}
+	vcvtph2w	{rn-sae}, %ymm29, %ymm30
+	vcvtph2w	{rd-sae}, %ymm29, %ymm30{%k7}
+	vcvtph2w	{rz-sae}, %ymm29, %ymm30{%k7}{z}
+	vcvtps2dq	{rn-sae}, %ymm29, %ymm30
+	vcvtps2dq	{rd-sae}, %ymm29, %ymm30{%k7}
+	vcvtps2dq	{rz-sae}, %ymm29, %ymm30{%k7}{z}
+	vcvtps2pd	{sae}, %xmm29, %ymm30
+	vcvtps2pd	{sae}, %xmm29, %ymm30{%k7}
+	vcvtps2pd	{sae}, %xmm29, %ymm30{%k7}{z}
+	vcvtps2phx	{rn-sae}, %ymm29, %xmm30
+	vcvtps2phx	{rd-sae}, %ymm29, %xmm30{%k7}
+	vcvtps2phx	{rz-sae}, %ymm29, %xmm30{%k7}{z}
+	vcvtps2qq	{rn-sae}, %xmm29, %ymm30
+	vcvtps2qq	{rd-sae}, %xmm29, %ymm30{%k7}
+	vcvtps2qq	{rz-sae}, %xmm29, %ymm30{%k7}{z}
+	vcvtps2udq	{rn-sae}, %ymm29, %ymm30
+	vcvtps2udq	{rd-sae}, %ymm29, %ymm30{%k7}
+	vcvtps2udq	{rz-sae}, %ymm29, %ymm30{%k7}{z}
+	vcvtps2uqq	{rn-sae}, %xmm29, %ymm30
+	vcvtps2uqq	{rd-sae}, %xmm29, %ymm30{%k7}
+	vcvtps2uqq	{rz-sae}, %xmm29, %ymm30{%k7}{z}
+	vcvtqq2pd	{rn-sae}, %ymm29, %ymm30
+	vcvtqq2pd	{rd-sae}, %ymm29, %ymm30{%k7}
+	vcvtqq2pd	{rz-sae}, %ymm29, %ymm30{%k7}{z}
+	vcvtqq2ph	{rn-sae}, %ymm29, %xmm30
+	vcvtqq2ph	{rd-sae}, %ymm29, %xmm30{%k7}
+	vcvtqq2ph	{rz-sae}, %ymm29, %xmm30{%k7}{z}
+	vcvtqq2ps	{rn-sae}, %ymm29, %xmm30
+	vcvtqq2ps	{rd-sae}, %ymm29, %xmm30{%k7}
+	vcvtqq2ps	{rz-sae}, %ymm29, %xmm30{%k7}{z}
+	vcvttpd2dq	{sae}, %ymm29, %xmm30
+	vcvttpd2dq	{sae}, %ymm29, %xmm30{%k7}
+	vcvttpd2dq	{sae}, %ymm29, %xmm30{%k7}{z}
+	vcvttpd2qq	{sae}, %ymm29, %ymm30
+	vcvttpd2qq	{sae}, %ymm29, %ymm30{%k7}
+	vcvttpd2qq	{sae}, %ymm29, %ymm30{%k7}{z}
+	vcvttpd2udq	{sae}, %ymm29, %xmm30
+	vcvttpd2udq	{sae}, %ymm29, %xmm30{%k7}
+	vcvttpd2udq	{sae}, %ymm29, %xmm30{%k7}{z}
+	vcvttpd2uqq	{sae}, %ymm29, %ymm30
+	vcvttpd2uqq	{sae}, %ymm29, %ymm30{%k7}
+	vcvttpd2uqq	{sae}, %ymm29, %ymm30{%k7}{z}
+	vcvttph2dq	{sae}, %xmm29, %ymm30
+	vcvttph2dq	{sae}, %xmm29, %ymm30{%k7}
+	vcvttph2dq	{sae}, %xmm29, %ymm30{%k7}{z}
+	vcvttph2qq	{sae}, %xmm29, %ymm30
+	vcvttph2qq	{sae}, %xmm29, %ymm30{%k7}
+	vcvttph2qq	{sae}, %xmm29, %ymm30{%k7}{z}
+	vcvttph2udq	{sae}, %xmm29, %ymm30
+	vcvttph2udq	{sae}, %xmm29, %ymm30{%k7}
+	vcvttph2udq	{sae}, %xmm29, %ymm30{%k7}{z}
+	vcvttph2uqq	{sae}, %xmm29, %ymm30
+	vcvttph2uqq	{sae}, %xmm29, %ymm30{%k7}
+	vcvttph2uqq	{sae}, %xmm29, %ymm30{%k7}{z}
+	vcvttph2uw	{sae}, %ymm29, %ymm30
+	vcvttph2uw	{sae}, %ymm29, %ymm30{%k7}
+	vcvttph2uw	{sae}, %ymm29, %ymm30{%k7}{z}
+	vcvttph2w	{sae}, %ymm29, %ymm30
+	vcvttph2w	{sae}, %ymm29, %ymm30{%k7}
+	vcvttph2w	{sae}, %ymm29, %ymm30{%k7}{z}
+	vcvttps2dq	{sae}, %ymm29, %ymm30
+	vcvttps2dq	{sae}, %ymm29, %ymm30{%k7}
+	vcvttps2dq	{sae}, %ymm29, %ymm30{%k7}{z}
+	vcvttps2qq	{sae}, %xmm29, %ymm30
+	vcvttps2qq	{sae}, %xmm29, %ymm30{%k7}
+	vcvttps2qq	{sae}, %xmm29, %ymm30{%k7}{z}
+	vcvttps2udq	{sae}, %ymm29, %ymm30
+	vcvttps2udq	{sae}, %ymm29, %ymm30{%k7}
+	vcvttps2udq	{sae}, %ymm29, %ymm30{%k7}{z}
+	vcvttps2uqq	{sae}, %xmm29, %ymm30
+	vcvttps2uqq	{sae}, %xmm29, %ymm30{%k7}
+	vcvttps2uqq	{sae}, %xmm29, %ymm30{%k7}{z}
+	vcvtudq2ph	{rn-sae}, %ymm29, %xmm30
+	vcvtudq2ph	{rd-sae}, %ymm29, %xmm30{%k7}
+	vcvtudq2ph	{rz-sae}, %ymm29, %xmm30{%k7}{z}
+	vcvtudq2ps	{rn-sae}, %ymm29, %ymm30
+	vcvtudq2ps	{rd-sae}, %ymm29, %ymm30{%k7}
+	vcvtudq2ps	{rz-sae}, %ymm29, %ymm30{%k7}{z}
+	vcvtuqq2pd	{rn-sae}, %ymm29, %ymm30
+	vcvtuqq2pd	{rd-sae}, %ymm29, %ymm30{%k7}
+	vcvtuqq2pd	{rz-sae}, %ymm29, %ymm30{%k7}{z}
+	vcvtuqq2ph	{rn-sae}, %ymm29, %xmm30
+	vcvtuqq2ph	{rd-sae}, %ymm29, %xmm30{%k7}
+	vcvtuqq2ph	{rz-sae}, %ymm29, %xmm30{%k7}{z}
+	vcvtuqq2ps	{rn-sae}, %ymm29, %xmm30
+	vcvtuqq2ps	{rd-sae}, %ymm29, %xmm30{%k7}
+	vcvtuqq2ps	{rz-sae}, %ymm29, %xmm30{%k7}{z}
+	vcvtuw2ph	{rn-sae}, %ymm29, %ymm30
+	vcvtuw2ph	{rd-sae}, %ymm29, %ymm30{%k7}
+	vcvtuw2ph	{rz-sae}, %ymm29, %ymm30{%k7}{z}
+	vcvtw2ph	{rn-sae}, %ymm29, %ymm30
+	vcvtw2ph	{rd-sae}, %ymm29, %ymm30{%k7}
+	vcvtw2ph	{rz-sae}, %ymm29, %ymm30{%k7}{z}
+	vdivpd	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vdivpd	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vdivpd	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vdivph	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vdivph	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vdivph	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vdivps	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vdivps	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vdivps	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfcmaddcph	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfcmaddcph	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfcmaddcph	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfcmulcph	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfcmulcph	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfcmulcph	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfixupimmpd	$123, {sae}, %ymm28, %ymm29, %ymm30
+	vfixupimmpd	$123, {sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfixupimmpd	$123, {sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfixupimmps	$123, {sae}, %ymm28, %ymm29, %ymm30
+	vfixupimmps	$123, {sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfixupimmps	$123, {sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmadd132pd	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmadd132pd	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmadd132pd	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmadd132ph	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmadd132ph	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmadd132ph	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmadd132ps	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmadd132ps	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmadd132ps	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmadd213pd	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmadd213pd	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmadd213pd	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmadd213ph	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmadd213ph	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmadd213ph	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmadd213ps	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmadd213ps	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmadd213ps	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmadd231pd	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmadd231pd	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmadd231pd	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmadd231ph	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmadd231ph	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmadd231ph	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmadd231ps	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmadd231ps	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmadd231ps	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmaddcph	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmaddcph	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmaddcph	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmaddsub132pd	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmaddsub132pd	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmaddsub132pd	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmaddsub132ph	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmaddsub132ph	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmaddsub132ph	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmaddsub132ps	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmaddsub132ps	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmaddsub132ps	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmaddsub213pd	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmaddsub213pd	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmaddsub213pd	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmaddsub213ph	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmaddsub213ph	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmaddsub213ph	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmaddsub213ps	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmaddsub213ps	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmaddsub213ps	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmaddsub231pd	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmaddsub231pd	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmaddsub231pd	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmaddsub231ph	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmaddsub231ph	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmaddsub231ph	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmaddsub231ps	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmaddsub231ps	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmaddsub231ps	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmsub132pd	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmsub132pd	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmsub132pd	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmsub132ph	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmsub132ph	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmsub132ph	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmsub132ps	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmsub132ps	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmsub132ps	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmsub213pd	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmsub213pd	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmsub213pd	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmsub213ph	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmsub213ph	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmsub213ph	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmsub213ps	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmsub213ps	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmsub213ps	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmsub231pd	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmsub231pd	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmsub231pd	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmsub231ph	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmsub231ph	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmsub231ph	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmsub231ps	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmsub231ps	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmsub231ps	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmsubadd132pd	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmsubadd132pd	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmsubadd132pd	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmsubadd132ph	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmsubadd132ph	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmsubadd132ph	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmsubadd132ps	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmsubadd132ps	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmsubadd132ps	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmsubadd213pd	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmsubadd213pd	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmsubadd213pd	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmsubadd213ph	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmsubadd213ph	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmsubadd213ph	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmsubadd213ps	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmsubadd213ps	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmsubadd213ps	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmsubadd231pd	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmsubadd231pd	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmsubadd231pd	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmsubadd231ph	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmsubadd231ph	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmsubadd231ph	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmsubadd231ps	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmsubadd231ps	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmsubadd231ps	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfmulcph	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfmulcph	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfmulcph	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfnmadd132pd	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfnmadd132pd	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfnmadd132pd	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfnmadd132ph	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfnmadd132ph	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfnmadd132ph	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfnmadd132ps	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfnmadd132ps	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfnmadd132ps	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfnmadd213pd	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfnmadd213pd	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfnmadd213pd	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfnmadd213ph	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfnmadd213ph	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfnmadd213ph	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfnmadd213ps	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfnmadd213ps	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfnmadd213ps	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfnmadd231pd	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfnmadd231pd	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfnmadd231pd	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfnmadd231ph	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfnmadd231ph	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfnmadd231ph	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfnmadd231ps	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfnmadd231ps	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfnmadd231ps	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfnmsub132pd	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfnmsub132pd	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfnmsub132pd	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfnmsub132ph	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfnmsub132ph	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfnmsub132ph	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfnmsub132ps	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfnmsub132ps	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfnmsub132ps	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfnmsub213pd	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfnmsub213pd	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfnmsub213pd	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfnmsub213ph	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfnmsub213ph	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfnmsub213ph	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfnmsub213ps	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfnmsub213ps	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfnmsub213ps	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfnmsub231pd	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfnmsub231pd	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfnmsub231pd	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfnmsub231ph	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfnmsub231ph	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfnmsub231ph	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vfnmsub231ps	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vfnmsub231ps	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vfnmsub231ps	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vgetexppd	{sae}, %ymm29, %ymm30
+	vgetexppd	{sae}, %ymm29, %ymm30{%k7}
+	vgetexppd	{sae}, %ymm29, %ymm30{%k7}{z}
+	vgetexpph	{sae}, %ymm29, %ymm30
+	vgetexpph	{sae}, %ymm29, %ymm30{%k7}
+	vgetexpph	{sae}, %ymm29, %ymm30{%k7}{z}
+	vgetexpps	{sae}, %ymm29, %ymm30
+	vgetexpps	{sae}, %ymm29, %ymm30{%k7}
+	vgetexpps	{sae}, %ymm29, %ymm30{%k7}{z}
+	vgetmantpd	$123, {sae}, %ymm29, %ymm30
+	vgetmantpd	$123, {sae}, %ymm29, %ymm30{%k7}
+	vgetmantpd	$123, {sae}, %ymm29, %ymm30{%k7}{z}
+	vgetmantph	$123, {sae}, %ymm29, %ymm30
+	vgetmantph	$123, {sae}, %ymm29, %ymm30{%k7}
+	vgetmantph	$123, {sae}, %ymm29, %ymm30{%k7}{z}
+	vgetmantps	$123, {sae}, %ymm29, %ymm30
+	vgetmantps	$123, {sae}, %ymm29, %ymm30{%k7}
+	vgetmantps	$123, {sae}, %ymm29, %ymm30{%k7}{z}
+	vmaxpd	{sae}, %ymm28, %ymm29, %ymm30
+	vmaxpd	{sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vmaxpd	{sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vmaxph	{sae}, %ymm28, %ymm29, %ymm30
+	vmaxph	{sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vmaxph	{sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vmaxps	{sae}, %ymm28, %ymm29, %ymm30
+	vmaxps	{sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vmaxps	{sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vminpd	{sae}, %ymm28, %ymm29, %ymm30
+	vminpd	{sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vminpd	{sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vminph	{sae}, %ymm28, %ymm29, %ymm30
+	vminph	{sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vminph	{sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vminps	{sae}, %ymm28, %ymm29, %ymm30
+	vminps	{sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vminps	{sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vmulpd	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vmulpd	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vmulpd	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vmulph	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vmulph	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vmulph	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vmulps	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vmulps	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vmulps	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vrangepd	$123, {sae}, %ymm28, %ymm29, %ymm30
+	vrangepd	$123, {sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vrangepd	$123, {sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vrangeps	$123, {sae}, %ymm28, %ymm29, %ymm30
+	vrangeps	$123, {sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vrangeps	$123, {sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vreducepd	$123, {sae}, %ymm29, %ymm30
+	vreducepd	$123, {sae}, %ymm29, %ymm30{%k7}
+	vreducepd	$123, {sae}, %ymm29, %ymm30{%k7}{z}
+	vreduceph	$123, {sae}, %ymm29, %ymm30
+	vreduceph	$123, {sae}, %ymm29, %ymm30{%k7}
+	vreduceph	$123, {sae}, %ymm29, %ymm30{%k7}{z}
+	vreduceps	$123, {sae}, %ymm29, %ymm30
+	vreduceps	$123, {sae}, %ymm29, %ymm30{%k7}
+	vreduceps	$123, {sae}, %ymm29, %ymm30{%k7}{z}
+	vrndscalepd	$123, {sae}, %ymm29, %ymm30
+	vrndscalepd	$123, {sae}, %ymm29, %ymm30{%k7}
+	vrndscalepd	$123, {sae}, %ymm29, %ymm30{%k7}{z}
+	vrndscaleph	$123, {sae}, %ymm29, %ymm30
+	vrndscaleph	$123, {sae}, %ymm29, %ymm30{%k7}
+	vrndscaleph	$123, {sae}, %ymm29, %ymm30{%k7}{z}
+	vrndscaleps	$123, {sae}, %ymm29, %ymm30
+	vrndscaleps	$123, {sae}, %ymm29, %ymm30{%k7}
+	vrndscaleps	$123, {sae}, %ymm29, %ymm30{%k7}{z}
+	vscalefpd	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vscalefpd	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vscalefpd	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vscalefph	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vscalefph	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vscalefph	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vscalefps	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vscalefps	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vscalefps	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vsqrtpd	{rn-sae}, %ymm29, %ymm30
+	vsqrtpd	{rd-sae}, %ymm29, %ymm30{%k7}
+	vsqrtpd	{rz-sae}, %ymm29, %ymm30{%k7}{z}
+	vsqrtph	{rn-sae}, %ymm29, %ymm30
+	vsqrtph	{rd-sae}, %ymm29, %ymm30{%k7}
+	vsqrtph	{rz-sae}, %ymm29, %ymm30{%k7}{z}
+	vsqrtps	{rn-sae}, %ymm29, %ymm30
+	vsqrtps	{rd-sae}, %ymm29, %ymm30{%k7}
+	vsqrtps	{rz-sae}, %ymm29, %ymm30{%k7}{z}
+	vsubpd	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vsubpd	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vsubpd	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vsubph	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vsubph	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vsubph	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	vsubps	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vsubps	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vsubps	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+
+	.intel_syntax noprefix
+	vaddpd	ymm30, ymm29, ymm28, {rn-sae}
+	vaddpd	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vaddpd	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vaddph	ymm30, ymm29, ymm28, {rn-sae}
+	vaddph	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vaddph	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vaddps	ymm30, ymm29, ymm28, {rn-sae}
+	vaddps	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vaddps	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vcmppd	k5, ymm29, ymm28, {sae}, 123
+	vcmppd	k5{k7}, ymm29, ymm28, {sae}, 123
+	vcmpph	k5, ymm29, ymm28, {sae}, 123
+	vcmpph	k5{k7}, ymm29, ymm28, {sae}, 123
+	vcmpps	k5, ymm29, ymm28, {sae}, 123
+	vcmpps	k5{k7}, ymm29, ymm28, {sae}, 123
+	vcvtdq2ph	xmm30, ymm29, {rn-sae}
+	vcvtdq2ph	xmm30{k7}, ymm29, {rd-sae}
+	vcvtdq2ph	xmm30{k7}{z}, ymm29, {rz-sae}
+	vcvtdq2ps	ymm30, ymm29, {rn-sae}
+	vcvtdq2ps	ymm30{k7}, ymm29, {rd-sae}
+	vcvtdq2ps	ymm30{k7}{z}, ymm29, {rz-sae}
+	vcvtpd2dq	xmm30, ymm29, {rn-sae}
+	vcvtpd2dq	xmm30{k7}, ymm29, {rd-sae}
+	vcvtpd2dq	xmm30{k7}{z}, ymm29, {rz-sae}
+	vcvtpd2ph	xmm30, ymm29, {rn-sae}
+	vcvtpd2ph	xmm30{k7}, ymm29, {rd-sae}
+	vcvtpd2ph	xmm30{k7}{z}, ymm29, {rz-sae}
+	vcvtpd2ps	xmm30, ymm29, {rn-sae}
+	vcvtpd2ps	xmm30{k7}, ymm29, {rd-sae}
+	vcvtpd2ps	xmm30{k7}{z}, ymm29, {rz-sae}
+	vcvtpd2qq	ymm30, ymm29, {rn-sae}
+	vcvtpd2qq	ymm30{k7}, ymm29, {rd-sae}
+	vcvtpd2qq	ymm30{k7}{z}, ymm29, {rz-sae}
+	vcvtpd2udq	xmm30, ymm29, {rn-sae}
+	vcvtpd2udq	xmm30{k7}, ymm29, {rd-sae}
+	vcvtpd2udq	xmm30{k7}{z}, ymm29, {rz-sae}
+	vcvtpd2uqq	ymm30, ymm29, {rn-sae}
+	vcvtpd2uqq	ymm30{k7}, ymm29, {rd-sae}
+	vcvtpd2uqq	ymm30{k7}{z}, ymm29, {rz-sae}
+	vcvtph2dq	ymm30, xmm29, {rn-sae}
+	vcvtph2dq	ymm30{k7}, xmm29, {rd-sae}
+	vcvtph2dq	ymm30{k7}{z}, xmm29, {rz-sae}
+	vcvtph2pd	ymm30, xmm29, {sae}
+	vcvtph2pd	ymm30{k7}, xmm29, {sae}
+	vcvtph2pd	ymm30{k7}{z}, xmm29, {sae}
+	vcvtph2ps	ymm30, xmm29, {sae}
+	vcvtph2ps	ymm30{k7}, xmm29, {sae}
+	vcvtph2ps	ymm30{k7}{z}, xmm29, {sae}
+	vcvtph2psx	ymm30, xmm29, {sae}
+	vcvtph2psx	ymm30{k7}, xmm29, {sae}
+	vcvtph2psx	ymm30{k7}{z}, xmm29, {sae}
+	vcvtph2qq	ymm30, xmm29, {rn-sae}
+	vcvtph2qq	ymm30{k7}, xmm29, {rd-sae}
+	vcvtph2qq	ymm30{k7}{z}, xmm29, {rz-sae}
+	vcvtph2udq	ymm30, xmm29, {rn-sae}
+	vcvtph2udq	ymm30{k7}, xmm29, {rd-sae}
+	vcvtph2udq	ymm30{k7}{z}, xmm29, {rz-sae}
+	vcvtph2uqq	ymm30, xmm29, {rn-sae}
+	vcvtph2uqq	ymm30{k7}, xmm29, {rd-sae}
+	vcvtph2uqq	ymm30{k7}{z}, xmm29, {rz-sae}
+	vcvtph2uw	ymm30, ymm29, {rn-sae}
+	vcvtph2uw	ymm30{k7}, ymm29, {rd-sae}
+	vcvtph2uw	ymm30{k7}{z}, ymm29, {rz-sae}
+	vcvtph2w	ymm30, ymm29, {rn-sae}
+	vcvtph2w	ymm30{k7}, ymm29, {rd-sae}
+	vcvtph2w	ymm30{k7}{z}, ymm29, {rz-sae}
+	vcvtps2dq	ymm30, ymm29, {rn-sae}
+	vcvtps2dq	ymm30{k7}, ymm29, {rd-sae}
+	vcvtps2dq	ymm30{k7}{z}, ymm29, {rz-sae}
+	vcvtps2pd	ymm30, xmm29, {sae}
+	vcvtps2pd	ymm30{k7}, xmm29, {sae}
+	vcvtps2pd	ymm30{k7}{z}, xmm29, {sae}
+	vcvtps2phx	xmm30, ymm29, {rn-sae}
+	vcvtps2phx	xmm30{k7}, ymm29, {rd-sae}
+	vcvtps2phx	xmm30{k7}{z}, ymm29, {rz-sae}
+	vcvtps2qq	ymm30, xmm29, {rn-sae}
+	vcvtps2qq	ymm30{k7}, xmm29, {rd-sae}
+	vcvtps2qq	ymm30{k7}{z}, xmm29, {rz-sae}
+	vcvtps2udq	ymm30, ymm29, {rn-sae}
+	vcvtps2udq	ymm30{k7}, ymm29, {rd-sae}
+	vcvtps2udq	ymm30{k7}{z}, ymm29, {rz-sae}
+	vcvtps2uqq	ymm30, xmm29, {rn-sae}
+	vcvtps2uqq	ymm30{k7}, xmm29, {rd-sae}
+	vcvtps2uqq	ymm30{k7}{z}, xmm29, {rz-sae}
+	vcvtqq2pd	ymm30, ymm29, {rn-sae}
+	vcvtqq2pd	ymm30{k7}, ymm29, {rd-sae}
+	vcvtqq2pd	ymm30{k7}{z}, ymm29, {rz-sae}
+	vcvtqq2ph	xmm30, ymm29, {rn-sae}
+	vcvtqq2ph	xmm30{k7}, ymm29, {rd-sae}
+	vcvtqq2ph	xmm30{k7}{z}, ymm29, {rz-sae}
+	vcvtqq2ps	xmm30, ymm29, {rn-sae}
+	vcvtqq2ps	xmm30{k7}, ymm29, {rd-sae}
+	vcvtqq2ps	xmm30{k7}{z}, ymm29, {rz-sae}
+	vcvttpd2dq	xmm30, ymm29, {sae}
+	vcvttpd2dq	xmm30{k7}, ymm29, {sae}
+	vcvttpd2dq	xmm30{k7}{z}, ymm29, {sae}
+	vcvttpd2qq	ymm30, ymm29, {sae}
+	vcvttpd2qq	ymm30{k7}, ymm29, {sae}
+	vcvttpd2qq	ymm30{k7}{z}, ymm29, {sae}
+	vcvttpd2udq	xmm30, ymm29, {sae}
+	vcvttpd2udq	xmm30{k7}, ymm29, {sae}
+	vcvttpd2udq	xmm30{k7}{z}, ymm29, {sae}
+	vcvttpd2uqq	ymm30, ymm29, {sae}
+	vcvttpd2uqq	ymm30{k7}, ymm29, {sae}
+	vcvttpd2uqq	ymm30{k7}{z}, ymm29, {sae}
+	vcvttph2dq	ymm30, xmm29, {sae}
+	vcvttph2dq	ymm30{k7}, xmm29, {sae}
+	vcvttph2dq	ymm30{k7}{z}, xmm29, {sae}
+	vcvttph2qq	ymm30, xmm29, {sae}
+	vcvttph2qq	ymm30{k7}, xmm29, {sae}
+	vcvttph2qq	ymm30{k7}{z}, xmm29, {sae}
+	vcvttph2udq	ymm30, xmm29, {sae}
+	vcvttph2udq	ymm30{k7}, xmm29, {sae}
+	vcvttph2udq	ymm30{k7}{z}, xmm29, {sae}
+	vcvttph2uqq	ymm30, xmm29, {sae}
+	vcvttph2uqq	ymm30{k7}, xmm29, {sae}
+	vcvttph2uqq	ymm30{k7}{z}, xmm29, {sae}
+	vcvttph2uw	ymm30, ymm29, {sae}
+	vcvttph2uw	ymm30{k7}, ymm29, {sae}
+	vcvttph2uw	ymm30{k7}{z}, ymm29, {sae}
+	vcvttph2w	ymm30, ymm29, {sae}
+	vcvttph2w	ymm30{k7}, ymm29, {sae}
+	vcvttph2w	ymm30{k7}{z}, ymm29, {sae}
+	vcvttps2dq	ymm30, ymm29, {sae}
+	vcvttps2dq	ymm30{k7}, ymm29, {sae}
+	vcvttps2dq	ymm30{k7}{z}, ymm29, {sae}
+	vcvttps2qq	ymm30, xmm29, {sae}
+	vcvttps2qq	ymm30{k7}, xmm29, {sae}
+	vcvttps2qq	ymm30{k7}{z}, xmm29, {sae}
+	vcvttps2udq	ymm30, ymm29, {sae}
+	vcvttps2udq	ymm30{k7}, ymm29, {sae}
+	vcvttps2udq	ymm30{k7}{z}, ymm29, {sae}
+	vcvttps2uqq	ymm30, xmm29, {sae}
+	vcvttps2uqq	ymm30{k7}, xmm29, {sae}
+	vcvttps2uqq	ymm30{k7}{z}, xmm29, {sae}
+	vcvtudq2ph	xmm30, ymm29, {rn-sae}
+	vcvtudq2ph	xmm30{k7}, ymm29, {rd-sae}
+	vcvtudq2ph	xmm30{k7}{z}, ymm29, {rz-sae}
+	vcvtudq2ps	ymm30, ymm29, {rn-sae}
+	vcvtudq2ps	ymm30{k7}, ymm29, {rd-sae}
+	vcvtudq2ps	ymm30{k7}{z}, ymm29, {rz-sae}
+	vcvtuqq2pd	ymm30, ymm29, {rn-sae}
+	vcvtuqq2pd	ymm30{k7}, ymm29, {rd-sae}
+	vcvtuqq2pd	ymm30{k7}{z}, ymm29, {rz-sae}
+	vcvtuqq2ph	xmm30, ymm29, {rn-sae}
+	vcvtuqq2ph	xmm30{k7}, ymm29, {rd-sae}
+	vcvtuqq2ph	xmm30{k7}{z}, ymm29, {rz-sae}
+	vcvtuqq2ps	xmm30, ymm29, {rn-sae}
+	vcvtuqq2ps	xmm30{k7}, ymm29, {rd-sae}
+	vcvtuqq2ps	xmm30{k7}{z}, ymm29, {rz-sae}
+	vcvtuw2ph	ymm30, ymm29, {rn-sae}
+	vcvtuw2ph	ymm30{k7}, ymm29, {rd-sae}
+	vcvtuw2ph	ymm30{k7}{z}, ymm29, {rz-sae}
+	vcvtw2ph	ymm30, ymm29, {rn-sae}
+	vcvtw2ph	ymm30{k7}, ymm29, {rd-sae}
+	vcvtw2ph	ymm30{k7}{z}, ymm29, {rz-sae}
+	vdivpd	ymm30, ymm29, ymm28, {rn-sae}
+	vdivpd	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vdivpd	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vdivph	ymm30, ymm29, ymm28, {rn-sae}
+	vdivph	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vdivph	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vdivps	ymm30, ymm29, ymm28, {rn-sae}
+	vdivps	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vdivps	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfcmaddcph	ymm30, ymm29, ymm28, {rn-sae}
+	vfcmaddcph	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfcmaddcph	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfcmulcph	ymm30, ymm29, ymm28, {rn-sae}
+	vfcmulcph	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfcmulcph	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfixupimmpd	ymm30, ymm29, ymm28, {sae}, 123
+	vfixupimmpd	ymm30{k7}, ymm29, ymm28, {sae}, 123
+	vfixupimmpd	ymm30{k7}{z}, ymm29, ymm28, {sae}, 123
+	vfixupimmps	ymm30, ymm29, ymm28, {sae}, 123
+	vfixupimmps	ymm30{k7}, ymm29, ymm28, {sae}, 123
+	vfixupimmps	ymm30{k7}{z}, ymm29, ymm28, {sae}, 123
+	vfmadd132pd	ymm30, ymm29, ymm28, {rn-sae}
+	vfmadd132pd	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmadd132pd	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmadd132ph	ymm30, ymm29, ymm28, {rn-sae}
+	vfmadd132ph	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmadd132ph	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmadd132ps	ymm30, ymm29, ymm28, {rn-sae}
+	vfmadd132ps	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmadd132ps	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmadd213pd	ymm30, ymm29, ymm28, {rn-sae}
+	vfmadd213pd	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmadd213pd	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmadd213ph	ymm30, ymm29, ymm28, {rn-sae}
+	vfmadd213ph	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmadd213ph	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmadd213ps	ymm30, ymm29, ymm28, {rn-sae}
+	vfmadd213ps	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmadd213ps	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmadd231pd	ymm30, ymm29, ymm28, {rn-sae}
+	vfmadd231pd	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmadd231pd	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmadd231ph	ymm30, ymm29, ymm28, {rn-sae}
+	vfmadd231ph	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmadd231ph	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmadd231ps	ymm30, ymm29, ymm28, {rn-sae}
+	vfmadd231ps	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmadd231ps	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmaddcph	ymm30, ymm29, ymm28, {rn-sae}
+	vfmaddcph	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmaddcph	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmaddsub132pd	ymm30, ymm29, ymm28, {rn-sae}
+	vfmaddsub132pd	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmaddsub132pd	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmaddsub132ph	ymm30, ymm29, ymm28, {rn-sae}
+	vfmaddsub132ph	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmaddsub132ph	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmaddsub132ps	ymm30, ymm29, ymm28, {rn-sae}
+	vfmaddsub132ps	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmaddsub132ps	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmaddsub213pd	ymm30, ymm29, ymm28, {rn-sae}
+	vfmaddsub213pd	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmaddsub213pd	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmaddsub213ph	ymm30, ymm29, ymm28, {rn-sae}
+	vfmaddsub213ph	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmaddsub213ph	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmaddsub213ps	ymm30, ymm29, ymm28, {rn-sae}
+	vfmaddsub213ps	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmaddsub213ps	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmaddsub231pd	ymm30, ymm29, ymm28, {rn-sae}
+	vfmaddsub231pd	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmaddsub231pd	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmaddsub231ph	ymm30, ymm29, ymm28, {rn-sae}
+	vfmaddsub231ph	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmaddsub231ph	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmaddsub231ps	ymm30, ymm29, ymm28, {rn-sae}
+	vfmaddsub231ps	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmaddsub231ps	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmsub132pd	ymm30, ymm29, ymm28, {rn-sae}
+	vfmsub132pd	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmsub132pd	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmsub132ph	ymm30, ymm29, ymm28, {rn-sae}
+	vfmsub132ph	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmsub132ph	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmsub132ps	ymm30, ymm29, ymm28, {rn-sae}
+	vfmsub132ps	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmsub132ps	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmsub213pd	ymm30, ymm29, ymm28, {rn-sae}
+	vfmsub213pd	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmsub213pd	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmsub213ph	ymm30, ymm29, ymm28, {rn-sae}
+	vfmsub213ph	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmsub213ph	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmsub213ps	ymm30, ymm29, ymm28, {rn-sae}
+	vfmsub213ps	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmsub213ps	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmsub231pd	ymm30, ymm29, ymm28, {rn-sae}
+	vfmsub231pd	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmsub231pd	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmsub231ph	ymm30, ymm29, ymm28, {rn-sae}
+	vfmsub231ph	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmsub231ph	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmsub231ps	ymm30, ymm29, ymm28, {rn-sae}
+	vfmsub231ps	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmsub231ps	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmsubadd132pd	ymm30, ymm29, ymm28, {rn-sae}
+	vfmsubadd132pd	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmsubadd132pd	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmsubadd132ph	ymm30, ymm29, ymm28, {rn-sae}
+	vfmsubadd132ph	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmsubadd132ph	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmsubadd132ps	ymm30, ymm29, ymm28, {rn-sae}
+	vfmsubadd132ps	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmsubadd132ps	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmsubadd213pd	ymm30, ymm29, ymm28, {rn-sae}
+	vfmsubadd213pd	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmsubadd213pd	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmsubadd213ph	ymm30, ymm29, ymm28, {rn-sae}
+	vfmsubadd213ph	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmsubadd213ph	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmsubadd213ps	ymm30, ymm29, ymm28, {rn-sae}
+	vfmsubadd213ps	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmsubadd213ps	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmsubadd231pd	ymm30, ymm29, ymm28, {rn-sae}
+	vfmsubadd231pd	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmsubadd231pd	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmsubadd231ph	ymm30, ymm29, ymm28, {rn-sae}
+	vfmsubadd231ph	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmsubadd231ph	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmsubadd231ps	ymm30, ymm29, ymm28, {rn-sae}
+	vfmsubadd231ps	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmsubadd231ps	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfmulcph	ymm30, ymm29, ymm28, {rn-sae}
+	vfmulcph	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfmulcph	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfnmadd132pd	ymm30, ymm29, ymm28, {rn-sae}
+	vfnmadd132pd	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfnmadd132pd	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfnmadd132ph	ymm30, ymm29, ymm28, {rn-sae}
+	vfnmadd132ph	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfnmadd132ph	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfnmadd132ps	ymm30, ymm29, ymm28, {rn-sae}
+	vfnmadd132ps	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfnmadd132ps	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfnmadd213pd	ymm30, ymm29, ymm28, {rn-sae}
+	vfnmadd213pd	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfnmadd213pd	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfnmadd213ph	ymm30, ymm29, ymm28, {rn-sae}
+	vfnmadd213ph	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfnmadd213ph	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfnmadd213ps	ymm30, ymm29, ymm28, {rn-sae}
+	vfnmadd213ps	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfnmadd213ps	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfnmadd231pd	ymm30, ymm29, ymm28, {rn-sae}
+	vfnmadd231pd	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfnmadd231pd	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfnmadd231ph	ymm30, ymm29, ymm28, {rn-sae}
+	vfnmadd231ph	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfnmadd231ph	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfnmadd231ps	ymm30, ymm29, ymm28, {rn-sae}
+	vfnmadd231ps	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfnmadd231ps	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfnmsub132pd	ymm30, ymm29, ymm28, {rn-sae}
+	vfnmsub132pd	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfnmsub132pd	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfnmsub132ph	ymm30, ymm29, ymm28, {rn-sae}
+	vfnmsub132ph	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfnmsub132ph	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfnmsub132ps	ymm30, ymm29, ymm28, {rn-sae}
+	vfnmsub132ps	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfnmsub132ps	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfnmsub213pd	ymm30, ymm29, ymm28, {rn-sae}
+	vfnmsub213pd	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfnmsub213pd	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfnmsub213ph	ymm30, ymm29, ymm28, {rn-sae}
+	vfnmsub213ph	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfnmsub213ph	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfnmsub213ps	ymm30, ymm29, ymm28, {rn-sae}
+	vfnmsub213ps	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfnmsub213ps	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfnmsub231pd	ymm30, ymm29, ymm28, {rn-sae}
+	vfnmsub231pd	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfnmsub231pd	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfnmsub231ph	ymm30, ymm29, ymm28, {rn-sae}
+	vfnmsub231ph	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfnmsub231ph	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vfnmsub231ps	ymm30, ymm29, ymm28, {rn-sae}
+	vfnmsub231ps	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vfnmsub231ps	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vgetexppd	ymm30, ymm29, {sae}
+	vgetexppd	ymm30{k7}, ymm29, {sae}
+	vgetexppd	ymm30{k7}{z}, ymm29, {sae}
+	vgetexpph	ymm30, ymm29, {sae}
+	vgetexpph	ymm30{k7}, ymm29, {sae}
+	vgetexpph	ymm30{k7}{z}, ymm29, {sae}
+	vgetexpps	ymm30, ymm29, {sae}
+	vgetexpps	ymm30{k7}, ymm29, {sae}
+	vgetexpps	ymm30{k7}{z}, ymm29, {sae}
+	vgetmantpd	ymm30, ymm29, {sae}, 123
+	vgetmantpd	ymm30{k7}, ymm29, {sae}, 123
+	vgetmantpd	ymm30{k7}{z}, ymm29, {sae}, 123
+	vgetmantph	ymm30, ymm29, {sae}, 123
+	vgetmantph	ymm30{k7}, ymm29, {sae}, 123
+	vgetmantph	ymm30{k7}{z}, ymm29, {sae}, 123
+	vgetmantps	ymm30, ymm29, {sae}, 123
+	vgetmantps	ymm30{k7}, ymm29, {sae}, 123
+	vgetmantps	ymm30{k7}{z}, ymm29, {sae}, 123
+	vmaxpd	ymm30, ymm29, ymm28, {sae}
+	vmaxpd	ymm30{k7}, ymm29, ymm28, {sae}
+	vmaxpd	ymm30{k7}{z}, ymm29, ymm28, {sae}
+	vmaxph	ymm30, ymm29, ymm28, {sae}
+	vmaxph	ymm30{k7}, ymm29, ymm28, {sae}
+	vmaxph	ymm30{k7}{z}, ymm29, ymm28, {sae}
+	vmaxps	ymm30, ymm29, ymm28, {sae}
+	vmaxps	ymm30{k7}, ymm29, ymm28, {sae}
+	vmaxps	ymm30{k7}{z}, ymm29, ymm28, {sae}
+	vminpd	ymm30, ymm29, ymm28, {sae}
+	vminpd	ymm30{k7}, ymm29, ymm28, {sae}
+	vminpd	ymm30{k7}{z}, ymm29, ymm28, {sae}
+	vminph	ymm30, ymm29, ymm28, {sae}
+	vminph	ymm30{k7}, ymm29, ymm28, {sae}
+	vminph	ymm30{k7}{z}, ymm29, ymm28, {sae}
+	vminps	ymm30, ymm29, ymm28, {sae}
+	vminps	ymm30{k7}, ymm29, ymm28, {sae}
+	vminps	ymm30{k7}{z}, ymm29, ymm28, {sae}
+	vmulpd	ymm30, ymm29, ymm28, {rn-sae}
+	vmulpd	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vmulpd	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vmulph	ymm30, ymm29, ymm28, {rn-sae}
+	vmulph	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vmulph	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vmulps	ymm30, ymm29, ymm28, {rn-sae}
+	vmulps	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vmulps	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vrangepd	ymm30, ymm29, ymm28, {sae}, 123
+	vrangepd	ymm30{k7}, ymm29, ymm28, {sae}, 123
+	vrangepd	ymm30{k7}{z}, ymm29, ymm28, {sae}, 123
+	vrangeps	ymm30, ymm29, ymm28, {sae}, 123
+	vrangeps	ymm30{k7}, ymm29, ymm28, {sae}, 123
+	vrangeps	ymm30{k7}{z}, ymm29, ymm28, {sae}, 123
+	vreducepd	ymm30, ymm29, {sae}, 123
+	vreducepd	ymm30{k7}, ymm29, {sae}, 123
+	vreducepd	ymm30{k7}{z}, ymm29, {sae}, 123
+	vreduceph	ymm30, ymm29, {sae}, 123
+	vreduceph	ymm30{k7}, ymm29, {sae}, 123
+	vreduceph	ymm30{k7}{z}, ymm29, {sae}, 123
+	vreduceps	ymm30, ymm29, {sae}, 123
+	vreduceps	ymm30{k7}, ymm29, {sae}, 123
+	vreduceps	ymm30{k7}{z}, ymm29, {sae}, 123
+	vrndscalepd	ymm30, ymm29, {sae}, 123
+	vrndscalepd	ymm30{k7}, ymm29, {sae}, 123
+	vrndscalepd	ymm30{k7}{z}, ymm29, {sae}, 123
+	vrndscaleph	ymm30, ymm29, {sae}, 123
+	vrndscaleph	ymm30{k7}, ymm29, {sae}, 123
+	vrndscaleph	ymm30{k7}{z}, ymm29, {sae}, 123
+	vrndscaleps	ymm30, ymm29, {sae}, 123
+	vrndscaleps	ymm30{k7}, ymm29, {sae}, 123
+	vrndscaleps	ymm30{k7}{z}, ymm29, {sae}, 123
+	vscalefpd	ymm30, ymm29, ymm28, {rn-sae}
+	vscalefpd	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vscalefpd	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vscalefph	ymm30, ymm29, ymm28, {rn-sae}
+	vscalefph	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vscalefph	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vscalefps	ymm30, ymm29, ymm28, {rn-sae}
+	vscalefps	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vscalefps	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vsqrtpd	ymm30, ymm29, {rn-sae}
+	vsqrtpd	ymm30{k7}, ymm29, {rd-sae}
+	vsqrtpd	ymm30{k7}{z}, ymm29, {rz-sae}
+	vsqrtph	ymm30, ymm29, {rn-sae}
+	vsqrtph	ymm30{k7}, ymm29, {rd-sae}
+	vsqrtph	ymm30{k7}{z}, ymm29, {rz-sae}
+	vsqrtps	ymm30, ymm29, {rn-sae}
+	vsqrtps	ymm30{k7}, ymm29, {rd-sae}
+	vsqrtps	ymm30{k7}{z}, ymm29, {rz-sae}
+	vsubpd	ymm30, ymm29, ymm28, {rn-sae}
+	vsubpd	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vsubpd	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vsubph	ymm30, ymm29, ymm28, {rn-sae}
+	vsubph	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vsubph	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
+	vsubps	ymm30, ymm29, ymm28, {rn-sae}
+	vsubps	ymm30{k7}, ymm29, ymm28, {rd-sae}
+	vsubps	ymm30{k7}{z}, ymm29, ymm28, {rz-sae}
diff --git a/gas/testsuite/gas/i386/x86-64.exp b/gas/testsuite/gas/i386/x86-64.exp
index a14ed32727f..1d4acc66517 100644
--- a/gas/testsuite/gas/i386/x86-64.exp
+++ b/gas/testsuite/gas/i386/x86-64.exp
@@ -498,6 +498,8 @@  run_dump_test "x86-64-pbndkb-intel"
 run_dump_test "x86-64-user_msr"
 run_dump_test "x86-64-user_msr-intel"
 run_list_test "x86-64-user_msr-inval"
+run_dump_test "x86-64-avx10_2-rounding"
+run_dump_test "x86-64-avx10_2-rounding-intel"
 run_dump_test "x86-64-clzero"
 run_dump_test "x86-64-mwaitx-bdver4"
 run_list_test "x86-64-mwaitx-reg"
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 59ec771369a..57953d431bf 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -229,6 +229,7 @@  struct instr_info
     bool b;
     bool no_broadcast;
     bool nf;
+    bool u;
   }
   vex;
 
@@ -9030,6 +9031,8 @@  get_valid_dis386 (const struct dis386 *dp, instr_info *ins)
 
       if (!(*ins->codep & 0x4))
 	ins->rex2 |= REX_X;
+      
+      ins->vex.u = *ins->codep & 0x4;
 
       switch ((*ins->codep & 0x3))
 	{
@@ -9066,7 +9069,7 @@  get_valid_dis386 (const struct dis386 *dp, instr_info *ins)
 	  /* Report bad for !evex_default and when two fixed values of evex
 	     change..  */
 	  if (ins->evex_type != evex_default
-	      || (ins->rex2 & (REX_B | REX_X)))
+	      && (ins->rex2 & (REX_B | REX_X)))
 	    return &bad_opcode;
 	  /* In 16/32-bit mode silently ignore following bits.  */
 	  ins->rex &= ~REX_B;
@@ -9088,14 +9091,20 @@  get_valid_dis386 (const struct dis386 *dp, instr_info *ins)
       if (!fetch_modrm (ins))
 	return &err_opcode;
 
-      if (ins->modrm.mod == 3 && (ins->rex2 & REX_X))
+      /* When modrm.mod != 3, the U bit is used by APX for bit X4.
+	 When modrm.mod == 3, the U bit is used by AVX10.  The U bit and
+	 the b bit should not be zero at the same time.  */
+      if (ins->modrm.mod == 3 && !ins->vex.u && !ins->vex.b)
 	return &bad_opcode;
 
       /* Set vector length. For EVEX-promoted instructions, evex.ll == 0b00,
 	 which has the same encoding as vex.length == 128 and they can share
 	 the same processing with vex.length in OP_VEX.  */
       if (ins->modrm.mod == 3 && ins->vex.b && ins->evex_type != evex_from_legacy)
-	ins->vex.length = 512;
+	if (ins->vex.u)
+	  ins->vex.length = 512;
+	else
+	  ins->vex.length = 256;
       else
 	{
 	  switch (ins->vex.ll)
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index 7b740553c34..565aae722f8 100644
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -241,6 +241,8 @@  static const dependency isa_dependencies[] =
   { "AVX10_1",
     "AVX512VL|AVX512DQ|AVX512CD|AVX512VBMI|AVX512_VBMI2|AVX512IFMA"
     "|AVX512_VNNI|AVX512_BF16|AVX512_FP16|AVX512_VPOPCNTDQ|AVX512_BITALG" },
+  { "AVX10_2",
+    "AVX10_1" },
   { "SEV_ES",
     "SVME" },
   { "SNP",
@@ -402,6 +404,7 @@  static bitfield cpu_flags[] =
   BITFIELD (LKGS),
   BITFIELD (USER_MSR),
   BITFIELD (APX_F),
+  BITFIELD (AVX10_2),
   BITFIELD (MWAITX),
   BITFIELD (CLZERO),
   BITFIELD (OSPKE),
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index db5ca36b8e0..2785cc304a8 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -321,6 +321,8 @@  enum i386_cpu
   CpuAVX512VL,
   /* Intel APX_F Instructions support required.  */
   CpuAPX_F,
+  /* Intel AVX10.2 Instructions support required.  */
+  CpuAVX10_2,
   /* Not supported in the 64bit mode  */
   CpuNo64,
 
@@ -357,6 +359,7 @@  enum i386_cpu
 		   cpuavx512f:1, \
 		   cpuavx512vl:1, \
 		   cpuapx_f:1, \
+		   cpuavx10_2:1, \
       /* NOTE: This field needs to remain last. */ \
 		   cpuno64:1
 
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index 97978fe75e0..64d916f3369 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -2908,12 +2908,12 @@  vptestnm<bw>, 0xf326, AVX512BW, Modrm|Masking|Space0F38|Src1VVVV|<bw:vexw>|Disp8
 
 // AVX512DQ instructions.
 
-<xyz:vl:attr:sr:att:src, +
-    $i::Disp8ShiftVL|IntelSyntax:StaticRounding|SAE::RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, +
-    $a::Disp8ShiftVL|ATTSyntax:StaticRounding|SAE::RegXMM|RegYMM|RegZMM|BaseIndex, +
-    z::EVex512|Disp8MemShift=6:StaticRounding|SAE:ATTSyntax:RegZMM|Unspecified|BaseIndex, +
-    x:AVX512VL:EVex128|Disp8MemShift=4::ATTSyntax:RegXMM|Unspecified|BaseIndex, +
-    y:AVX512VL:EVex256|Disp8MemShift=5::ATTSyntax:RegYMM|Unspecified|BaseIndex>
+<xyz:vl:evex:attr:sr:att:src, +
+    $i:::Disp8ShiftVL|IntelSyntax:StaticRounding|SAE::RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, +
+    $a:::Disp8ShiftVL|ATTSyntax:StaticRounding|SAE::RegXMM|RegYMM|RegZMM|BaseIndex, +
+    z::EVex512:EVex512|Disp8MemShift=6:StaticRounding|SAE:ATTSyntax:RegZMM|Unspecified|BaseIndex, +
+    x:AVX512VL:EVex128:EVex128|Disp8MemShift=4::ATTSyntax:RegXMM|Unspecified|BaseIndex, +
+    y:AVX512VL:EVex256:EVex256|Disp8MemShift=5::ATTSyntax:RegYMM|Unspecified|BaseIndex>
 
 kadd<bw>, 0x<bw:kpfx>4A, AVX512DQ, Modrm|Vex256|Space0F|Src1VVVV|VexW0|NoSuf, { RegMask, RegMask, RegMask }
 ktest<bw>, 0x<bw:kpfx>99, AVX512DQ, Modrm|Vex128|Space0F|VexW0|NoSuf, { RegMask, RegMask }
@@ -3575,3 +3575,96 @@  pop2, 0x8f/0, APX_F, Modrm|VexW0|EVexMap4|DstVVVV|ImplicitStackOp|No_bSuf|No_wSu
 pop2p, 0x8f/0, APX_F, Modrm|VexW1|EVexMap4|DstVVVV|ImplicitStackOp|No_bSuf|No_wSuf|No_lSuf|No_sSuf, { Reg64, Reg64 }
 
 // APX Push2/Pop2 instructions end.
+
+// AVX10.2 instructions.
+
+<yr:att:sr:sae:src, +
+    $i:IntelSyntax:StaticRounding|SAE:SAE:RegYMM|Unspecified|BaseIndex, +
+    $a:ATTSyntax:StaticRounding|SAE:SAE:RegYMM|BaseIndex, +
+    y:ATTSyntax:StaticRounding|SAE:SAE:RegYMM|Unspecified|BaseIndex>
+
+vaddp<sdh>, 0x<sdh:ppfx>58, AVX10_2, Modrm|EVex256|Masking|<sdh:spc1>|Src1VVVV|<sdh:vexw>|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|<sdh:elem>|Unspecified|BaseIndex, RegYMM, RegYMM }
+vdivp<sdh>, 0x<sdh:ppfx>5e, AVX10_2, Modrm|EVex256|Masking|<sdh:spc1>|Src1VVVV|<sdh:vexw>|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|<sdh:elem>|Unspecified|BaseIndex, RegYMM, RegYMM }
+vmulp<sdh>, 0x<sdh:ppfx>59, AVX10_2, Modrm|EVex256|Masking|<sdh:spc1>|Src1VVVV|<sdh:vexw>|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|<sdh:elem>|Unspecified|BaseIndex, RegYMM, RegYMM }
+vsqrtp<sdh>, 0x<sdh:ppfx>51, AVX10_2, Modrm|EVex256|Masking|<sdh:spc1>|<sdh:vexw>|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|<sdh:elem>|Unspecified|BaseIndex, RegYMM }
+vsubp<sdh>, 0x<sdh:ppfx>5c, AVX10_2, Modrm|EVex256|Masking|<sdh:spc1>|Src1VVVV|<sdh:vexw>|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|<sdh:elem>|Unspecified|BaseIndex, RegYMM, RegYMM }
+vmaxp<sdh>, 0x<sdh:ppfx>5f, AVX10_2, Modrm|EVex256|Masking|<sdh:spc1>|Src1VVVV|<sdh:vexw>|Broadcast|Disp8MemShift=5|NoSuf|SAE, { RegYMM|<sdh:elem>|Unspecified|BaseIndex, RegYMM, RegYMM }
+vminp<sdh>, 0x<sdh:ppfx>5d, AVX10_2, Modrm|EVex256|Masking|<sdh:spc1>|Src1VVVV|<sdh:vexw>|Broadcast|Disp8MemShift=5|NoSuf|SAE, { RegYMM|<sdh:elem>|Unspecified|BaseIndex, RegYMM, RegYMM }
+
+vcmp<frel>p<sd>, 0x<sd:ppfx>C2/0x<frel:imm>, AVX10_2, Modrm|EVex256|Masking|Space0F|Src1VVVV|<sd:vexw>|Broadcast|Disp8MemShift=5|NoSuf|ImmExt|SAE, { RegYMM|<sd:elem>|Unspecified|BaseIndex, RegYMM, RegMask }
+vcmp<frel>ph, 0xc2/0x<frel:imm>, AVX10_2, Modrm|EVex256|Masking|Space0F3A|Src1VVVV|VexW0|Broadcast|Disp8MemShift=5|NoSuf|ImmExt|SAE, { RegYMM|Word|Unspecified|BaseIndex, RegYMM, RegMask }
+vcmpp<sd>, 0x<sd:ppfx>C2, AVX10_2, Modrm|EVex256|Masking|Space0F|Src1VVVV|<sd:vexw>|Broadcast|Disp8MemShift=5|NoSuf|SAE, { Imm8, RegYMM|<sd:elem>|Unspecified|BaseIndex, RegYMM, RegMask }
+vcmpph, 0xc2, AVX10_2, Modrm|EVex256|Masking|Space0F3A|Src1VVVV|VexW0|Broadcast|Disp8MemShift=5|NoSuf|SAE, { Imm8, RegYMM|Word|Unspecified|BaseIndex, RegYMM, RegMask }
+
+vcvtps2pd, 0x5A, AVX10_2, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=4|NoSuf|SAE, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
+vcvtps2phx<yr>, 0x661d, AVX10_2, Modrm|EVex256|Disp8MemShift=5|Masking|EVexMap5|VexW0|Broadcast|NoSuf|<yr:sr>|<yr:att>, { <yr:src>|Dword, RegXMM }
+vcvtps2dq, 0x665B, AVX10_2, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|Dword|Unspecified|BaseIndex, RegYMM }
+vcvtps2udq, 0x79, AVX10_2, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|Dword|Unspecified|BaseIndex, RegYMM }
+vcvtps2qq, 0x667B, AVX10_2, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=4|NoSuf|StaticRounding|SAE, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
+vcvtps2uqq, 0x6679, AVX10_2, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=4|NoSuf|StaticRounding|SAE, { RegXMM|RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
+vcvtpd2qq, 0x667B, AVX10_2, Modrm|EVex256|Masking|Space0F|VexW1|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|Qword|Unspecified|BaseIndex, RegYMM }
+vcvtpd2uqq, 0x6679, AVX10_2, Modrm|EVex256|Masking|Space0F|VexW1|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|Qword|Unspecified|BaseIndex, RegYMM }
+vcvtpd2ps<yr>, 0x665a, AVX10_2, Modrm|EVex256|Disp8MemShift=5|Masking|Space0F|VexW1|Broadcast|NoSuf|<yr:sr>|<yr:att>, { <yr:src>|Qword, RegXMM }
+vcvtpd2ph<yr>, 0x665a, AVX10_2, Modrm|EVex256|Disp8MemShift=5|Masking|EVexMap5|VexW1|Broadcast|NoSuf|<yr:sr>|<yr:att>, { <yr:src>|Qword, RegXMM }
+vcvtpd2dq<yr>, 0xf2e6, AVX10_2, Modrm|EVex256|Disp8MemShift=5|Masking|Space0F|VexW1|Broadcast|NoSuf|<yr:sr>|<yr:att>, { <yr:src>|Qword, RegXMM }
+vcvtpd2udq<yr>, 0x79, AVX10_2, Modrm|EVex256|Disp8MemShift=5|Masking|Space0F|VexW1|Broadcast|NoSuf|<yr:sr>|<yr:att>, { <yr:src>|Qword, RegXMM }
+vcvtph2ps, 0x6613, AVX10_2, Modrm|EVex256|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf|SAE, { RegXMM|Unspecified|BaseIndex, RegYMM }
+vcvtph2psx, 0x6613, AVX10_2, Modrm|EVex256|Masking|EVexMap6|VexW0|Broadcast|Disp8MemShift=4|NoSuf|SAE, { RegXMM|Word|Unspecified|BaseIndex, RegYMM }
+vcvtph2pd, 0x5a, AVX10_2, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf|SAE, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegYMM }
+vcvtph2dq, 0x665b, AVX10_2, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|NoSuf|StaticRounding|SAE, { RegXMM|Word|Unspecified|BaseIndex, RegYMM }
+vcvtph2udq, 0x79, AVX10_2, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|NoSuf|StaticRounding|SAE, { RegXMM|Word|Unspecified|BaseIndex, RegYMM }
+vcvtph2qq, 0x667b, AVX10_2, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf|StaticRounding|SAE, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegYMM }
+vcvtph2uqq, 0x6679, AVX10_2, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf|StaticRounding|SAE, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegYMM }
+vcvtph2w, 0x667d, AVX10_2, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|Word|Unspecified|BaseIndex, RegYMM }
+vcvtph2uw, 0x7d, AVX10_2, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|Word|Unspecified|BaseIndex, RegYMM }
+
+vcvtdq2ps, 0x5B, AVX10_2, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|Dword|Unspecified|BaseIndex, RegYMM }
+vcvtdq2ph<yr>, 0x5b, AVX10_2, Modrm|EVex256|Disp8MemShift=5|Masking|EVexMap5|VexW0|Broadcast|NoSuf|<yr:sr>|<yr:att>, { <yr:src>|Dword, RegXMM }
+vcvtudq2ps, 0xF27A, AVX10_2, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|Dword|Unspecified|BaseIndex, RegYMM }
+vcvtqq2ps<yr>, 0x5b, AVX10_2, Modrm|EVex256|Disp8MemShift=5|Masking|Space0F|VexW1|Broadcast|NoSuf|<yr:sr>|<yr:att>, { <yr:src>|Qword, RegXMM }
+vcvtqq2pd, 0xF3E6, AVX10_2, Modrm|EVex256|Masking|Space0F|VexW1|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|Qword|Unspecified|BaseIndex, RegYMM }
+vcvtqq2ph<yr>, 0x5b, AVX10_2, Modrm|EVex256|Disp8MemShift=5|Masking|EVexMap5|VexW1|Broadcast|NoSuf|<yr:sr>|<yr:att>, { <yr:src>|Qword, RegXMM }
+vcvtuqq2pd, 0xF37A, AVX10_2, Modrm|EVex256|Masking|Space0F|VexW1|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|Qword|Unspecified|BaseIndex, RegYMM }
+vcvtw2ph, 0xf37d, AVX10_2, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|Word|Unspecified|BaseIndex, RegYMM }
+vcvtuw2ph, 0xf27d, AVX10_2, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|Word|Unspecified|BaseIndex, RegYMM }
+
+vcvttps2dq, 0xF35B, AVX10_2, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=5|NoSuf|SAE, { RegYMM|Dword|Unspecified|BaseIndex, RegYMM }
+vcvttps2udq, 0x78, AVX10_2, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=5|NoSuf|SAE, { RegYMM|Dword|Unspecified|BaseIndex, RegYMM }
+vcvttps2qq, 0x667A, AVX10_2, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=4|NoSuf|SAE, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
+vcvttps2uqq, 0x6678, AVX10_2, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=4|NoSuf|SAE, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
+vcvttpd2dq<yr>, 0x66e6, AVX10_2, Modrm|EVex256|Disp8MemShift=5|Masking|Space0F|VexW1|Broadcast|NoSuf|<yr:sae>|<yr:att>, { <yr:src>|Qword, RegXMM }
+vcvttpd2udq<yr>, 0x78, AVX10_2, Modrm|EVex256|Disp8MemShift=5|Masking|Space0F|VexW1|Broadcast|NoSuf|<yr:sae>|<yr:att>, { <yr:src>|Qword, RegXMM }
+vcvttpd2qq, 0x667A, AVX10_2, Modrm|EVex256|Masking|Space0F|VexW1|Broadcast|Disp8MemShift=5|NoSuf|SAE, { RegYMM|Qword|Unspecified|BaseIndex, RegYMM }
+vcvttpd2uqq, 0x6678, AVX10_2, Modrm|EVex256|Masking|Space0F|VexW1|Broadcast|Disp8MemShift=5|NoSuf|SAE, { RegYMM|Qword|Unspecified|BaseIndex, RegYMM }
+vcvttph2dq, 0xf35b, AVX10_2, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|NoSuf|SAE, { RegXMM|Word|Unspecified|BaseIndex, RegYMM }
+vcvttph2udq, 0x78, AVX10_2, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|NoSuf|SAE, { RegXMM|Word|Unspecified|BaseIndex, RegYMM }
+vcvttph2qq, 0x667a, AVX10_2, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf|SAE, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegYMM }
+vcvttph2uqq, 0x6678, AVX10_2, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf|SAE, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegYMM }
+vcvttph2w, 0x667c, AVX10_2, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=5|NoSuf|SAE, { RegYMM|Word|Unspecified|BaseIndex, RegYMM }
+vcvttph2uw, 0x7c, AVX10_2, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=5|NoSuf|SAE, { RegYMM|Word|Unspecified|BaseIndex, RegYMM }
+
+vcvtudq2ph<yr>, 0xf27a, AVX10_2, Modrm|EVex256|Disp8MemShift=5|Masking|EVexMap5|VexW0|Broadcast|NoSuf|<yr:sr>|<yr:att>, { <yr:src>|Dword, RegXMM }
+vcvtuqq2ps<yr>, 0xf27a, AVX10_2, Modrm|EVex256|Disp8MemShift=5|Masking|Space0F|VexW1|Broadcast|NoSuf|<yr:sr>|<yr:att>, { <yr:src>|Qword, RegXMM }
+vcvtuqq2ph<yr>, 0xf27a, AVX10_2, Modrm|EVex256|Disp8MemShift=5|Masking|EVexMap5|VexW1|Broadcast|NoSuf|<yr:sr>|<yr:att>, { <yr:src>|Qword, RegXMM }
+
+vfmadd<fma>p<sdh>, 0x6688 | 0x<fma:opc>, AVX10_2, Modrm|EVex256|Masking|<sdh:spc2>|Src1VVVV|<sdh:vexw>|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|<sdh:elem>|Unspecified|BaseIndex, RegYMM, RegYMM }
+vfmaddsub<fma>p<sdh>, 0x6686 | 0x<fma:opc>, AVX10_2, Modrm|EVex256|Masking|<sdh:spc2>|Src1VVVV|<sdh:vexw>|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|<sdh:elem>|Unspecified|BaseIndex, RegYMM, RegYMM }
+vfmsub<fma>p<sdh>, 0x668a | 0x<fma:opc>, AVX10_2, Modrm|EVex256|Masking|<sdh:spc2>|Src1VVVV|<sdh:vexw>|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|<sdh:elem>|Unspecified|BaseIndex, RegYMM, RegYMM }
+vfmsubadd<fma>p<sdh>, 0x6687 | 0x<fma:opc>, AVX10_2, Modrm|EVex256|Masking|<sdh:spc2>|Src1VVVV|<sdh:vexw>|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|<sdh:elem>|Unspecified|BaseIndex, RegYMM, RegYMM }
+vfnmadd<fma>p<sdh>, 0x668c | 0x<fma:opc>, AVX10_2, Modrm|EVex256|Masking|<sdh:spc2>|Src1VVVV|<sdh:vexw>|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|<sdh:elem>|Unspecified|BaseIndex, RegYMM, RegYMM }
+vfnmsub<fma>p<sdh>, 0x668e | 0x<fma:opc>, AVX10_2, Modrm|EVex256|Masking|<sdh:spc2>|Src1VVVV|<sdh:vexw>|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|<sdh:elem>|Unspecified|BaseIndex, RegYMM, RegYMM }
+
+vfcmaddcph, 0xf256, AVX10_2, Modrm|EVex256|Src1VVVV|Masking|EVexMap6|VexW0|Broadcast|Disp8MemShift=5|DistinctDest|NoSuf|StaticRounding|SAE, { RegYMM|Dword|Unspecified|BaseIndex, RegYMM, RegYMM }
+vfmaddcph, 0xf356, AVX10_2, Modrm|EVex256|Src1VVVV|Masking|EVexMap6|VexW0|Broadcast|Disp8MemShift=5|DistinctDest|NoSuf|StaticRounding|SAE, { RegYMM|Dword|Unspecified|BaseIndex, RegYMM, RegYMM }
+vfcmulcph, 0xf2d6, AVX10_2, Modrm|EVex256|Src1VVVV|Masking|EVexMap6|VexW0|Broadcast|Disp8MemShift=5|DistinctDest|NoSuf|StaticRounding|SAE, { RegYMM|Dword|Unspecified|BaseIndex, RegYMM, RegYMM }
+vfmulcph, 0xf3d6, AVX10_2, Modrm|EVex256|Src1VVVV|Masking|EVexMap6|VexW0|Broadcast|Disp8MemShift=5|DistinctDest|NoSuf|StaticRounding|SAE, { RegYMM|Dword|Unspecified|BaseIndex, RegYMM, RegYMM }
+
+vfixupimmp<sd>, 0x6654, AVX10_2, Modrm|EVex256|Masking|Space0F3A|Src1VVVV|<sd:vexw>|Broadcast|Disp8MemShift=5|NoSuf|SAE, { Imm8|Imm8S, RegYMM|<sd:elem>|Unspecified|BaseIndex, RegYMM, RegYMM }
+vgetmantp<sdh>, 0x<sdh:pfx>26, AVX10_2, Modrm|EVex256|Masking|Space0F3A|<sdh:vexw>|Broadcast|Disp8MemShift=5|NoSuf|SAE, { Imm8, RegYMM|<sdh:elem>|Unspecified|BaseIndex, RegYMM }
+vrndscalep<sdh>, 0x<sdh:pfx>08 | <sdh:opc>, AVX10_2, Modrm|EVex256|Masking|Space0F3A|<sdh:vexw>|Broadcast|Disp8MemShift=5|NoSuf|SAE, { Imm8, RegYMM|<sdh:elem>|Unspecified|BaseIndex, RegYMM }
+vscalefp<sdh>, 0x662c, AVX10_2, Modrm|EVex256|Masking|<sdh:spc2>|Src1VVVV|<sdh:vexw>|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|<sdh:elem>|Unspecified|BaseIndex, RegYMM, RegYMM }
+vgetexpp<sdh>, 0x6642, AVX10_2, Modrm|EVex256|Masking|<sdh:spc2>|<sdh:vexw>|Broadcast|Disp8MemShift=5|NoSuf|SAE, { RegYMM|<sdh:elem>|Unspecified|BaseIndex, RegYMM }
+vrangep<sd>, 0x6650, AVX10_2, Modrm|EVex256|Masking|Space0F3A|Src1VVVV|<sd:vexw>|Broadcast|Disp8MemShift=5|NoSuf|SAE, { Imm8, RegYMM|<sd:elem>|Unspecified|BaseIndex, RegYMM, RegYMM }
+vreducep<sdh>, 0x<sdh:pfx>56, AVX10_2, Modrm|EVex256|Masking|Space0F3A|<sdh:vexw>|Broadcast|Disp8MemShift=5|NoSuf|SAE, { Imm8, RegYMM|<sdh:elem>|Unspecified|BaseIndex, RegYMM }
+
+// AVX10.2 instructions end.