diff mbox series

[v0,09/13] aarch64: add pauth-lr feature option for Armv9.5-A PAC enhancements

Message ID 20240708123452.1883314-10-matthieu.longo@arm.com
State Superseded
Headers
Series aarch64: add instructions for Armv9.5-A PAC enhancement |

Checks

Context Check Description
linaro-tcwg-bot/tcwg_binutils_build--master-arm success Build passed
linaro-tcwg-bot/tcwg_binutils_build--master-aarch64 success Build passed
linaro-tcwg-bot/tcwg_binutils_check--master-arm success Test passed

Commit Message

Matthieu Longo July 8, 2024, 12:34 p.m. UTC 
  ---
 gas/config/tc-aarch64.c  | 1 +
 include/opcode/aarch64.h | 2 ++
 opcodes/aarch64-tbl.h    | 5 +++++
 3 files changed, 8 insertions(+)
diff mbox series

Patch

diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index d5ce1421a69..0887d9a0736 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -10668,6 +10668,7 @@  static const struct aarch64_option_cpu_value_table aarch64_features[] = {
   {"flagm",		AARCH64_FEATURE (FLAGM), AARCH64_NO_FEATURES},
   {"flagm2",		AARCH64_FEATURE (FLAGMANIP), AARCH64_FEATURE (FLAGM)},
   {"pauth",		AARCH64_FEATURE (PAUTH), AARCH64_NO_FEATURES},
+  {"pauth-lr",		AARCH64_FEATURE (PAUTH_LR), AARCH64_FEATURE (PAUTH)},
   {"xs",		AARCH64_FEATURE (XS), AARCH64_NO_FEATURES},
   {"wfxt",		AARCH64_FEATURE (WFXT), AARCH64_NO_FEATURES},
   {"mops",		AARCH64_FEATURE (MOPS), AARCH64_NO_FEATURES},
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index 292d9c968d3..2710730e72e 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -72,6 +72,8 @@  enum aarch64_feature_bit {
   AARCH64_FEATURE_LS64,
   /* v8.3 Pointer Authentication.  */
   AARCH64_FEATURE_PAUTH,
+  /* v9.5 Pointer Authentication. */
+  AARCH64_FEATURE_PAUTH_LR,
   /* FP instructions.  */
   AARCH64_FEATURE_FP,
   /* SIMD instructions.  */
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index dd9f2b6c6cd..3ba2c088be8 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -2684,6 +2684,8 @@  static const aarch64_feature_set aarch64_feature_sve =
   AARCH64_FEATURE (SVE);
 static const aarch64_feature_set aarch64_feature_pauth =
   AARCH64_FEATURE (PAUTH);
+static const aarch64_feature_set aarch64_feature_pauth_lr =
+  AARCH64_FEATURES (2, PAUTH, PAUTH_LR);
 static const aarch64_feature_set aarch64_feature_compnum =
   AARCH64_FEATURE (COMPNUM);
 static const aarch64_feature_set aarch64_feature_jscvt =
@@ -2845,6 +2847,7 @@  static const aarch64_feature_set aarch64_feature_sme_f16f16_f8f16 =
 #define SIMD_F16	&aarch64_feature_simd_f16
 #define SVE		&aarch64_feature_sve
 #define PAUTH		&aarch64_feature_pauth
+#define PAUTH_LR	&aarch64_feature_pauth_lr
 #define COMPNUM		&aarch64_feature_compnum
 #define JSCVT		&aarch64_feature_jscvt
 #define RCPC		&aarch64_feature_rcpc
@@ -2950,6 +2953,8 @@  static const aarch64_feature_set aarch64_feature_sme_f16f16_f8f16 =
     FLAGS | F_STRICT, CONSTRAINTS, TIED, NULL }
 #define PAUTH_INSN(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS) \
   { NAME, OPCODE, MASK, CLASS, 0, PAUTH, OPS, QUALS, FLAGS, 0, 0, NULL }
+#define PAUTH_LR_INSN(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS) \
+  { NAME, OPCODE, MASK, CLASS, 0, PAUTH_LR, OPS, QUALS, FLAGS, 0, 0, NULL }
 #define CNUM_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS) \
   { NAME, OPCODE, MASK, CLASS, OP, COMPNUM, OPS, QUALS, FLAGS, 0, 0, NULL }
 #define JSCVT_INSN(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS) \