diff mbox series

RISC-V: Support Smcdeleg and Ssccfg extensions.

Message ID 20240620045359.47513-1-nelson@rivosinc.com
State New
Headers
Series RISC-V: Support Smcdeleg and Ssccfg extensions. |

Checks

Context Check Description
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linaro-tcwg-bot/tcwg_binutils_check--master-arm success Test passed

Commit Message

Nelson Chu June 20, 2024, 4:53 a.m. UTC 
  https://github.com/riscv/riscv-smcdeleg-ssccfg/blob/v1.0.0/readme.adoc

Added a new CSR, scountinhibit (0x120), for supervisor counter setup, should
be controlled by Ssccfg.

Simialr to Smcsrind imply Sscsrind, all added CSRs should be avaiable for
machine-level environment, Smcdeleg seems should imply Ssccfg.

Besides, spec said - These extensions depend on the Zicntr and/or Zihpm
extensions, and on the Sscsrind extension.  Since Zicntr and Zihpm are
enabled by i-ext for now, that means they are always enabled, Smcsrind and
Ssccfg only imply Sscsrind should be enough.

bfd/
	* elfxx-riscv.c (riscv_implicit_subsets): Added smcdeleg imply ssccfg,
	and ssccfg imply sscsrind.
	(riscv_supported_std_z_ext): Added smcdeleg and ssccfg with v1.0.
gas/
	* config/tc-riscv.c (riscv_csr_address): Handle CSR_CLASS_SSCCFG.
	* testsuite/gas/riscv/csr-version-1p10.d: Updated.
	* testsuite/gas/riscv/csr-version-1p10.l: Updated.
	* testsuite/gas/riscv/csr-version-1p11.d: Updated.
	* testsuite/gas/riscv/csr-version-1p11.l: Updated.
	* testsuite/gas/riscv/csr-version-1p12.d: Updated.
	* testsuite/gas/riscv/csr-version-1p12.l: Updated.
	* testsuite/gas/riscv/csr.s: Updated.
	* testsuite/gas/riscv/march-help.l: Updated.
include/
	* opcode/riscv-opc.h: Added support for scountinhibit CSR.
---
 bfd/elfxx-riscv.c                          | 4 ++++
 gas/config/tc-riscv.c                      | 4 ++++
 gas/testsuite/gas/riscv/csr-version-1p10.d | 2 ++
 gas/testsuite/gas/riscv/csr-version-1p10.l | 4 ++++
 gas/testsuite/gas/riscv/csr-version-1p11.d | 2 ++
 gas/testsuite/gas/riscv/csr-version-1p11.l | 4 ++++
 gas/testsuite/gas/riscv/csr-version-1p12.d | 2 ++
 gas/testsuite/gas/riscv/csr-version-1p12.l | 4 ++++
 gas/testsuite/gas/riscv/csr.s              | 3 +++
 gas/testsuite/gas/riscv/march-help.l       | 2 ++
 include/opcode/riscv-opc.h                 | 4 ++++
 11 files changed, 35 insertions(+)
diff mbox series

Patch

diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
index 918bfc1aac5..dc90109d901 100644
--- a/bfd/elfxx-riscv.c
+++ b/bfd/elfxx-riscv.c
@@ -1274,6 +1274,8 @@  static struct riscv_implicit_subset riscv_implicit_subsets[] =
   {"zcb", "zca",	check_implicit_always},
   {"zcmp", "zca",	check_implicit_always},
   {"smaia", "ssaia",		check_implicit_always},
+  {"smcdeleg", "ssccfg",	check_implicit_always},
+  {"ssccfg", "sscsrind",	check_implicit_always},
   {"smcsrind", "sscsrind",	check_implicit_always},
   {"smcntrpmf", "zicsr",	check_implicit_always},
   {"smstateen", "ssstateen",	check_implicit_always},
@@ -1442,11 +1444,13 @@  static struct riscv_supported_ext riscv_supported_std_z_ext[] =
 static struct riscv_supported_ext riscv_supported_std_s_ext[] =
 {
   {"smaia",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
+  {"smcdeleg",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"smcsrind",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"smcntrpmf",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"smepmp",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"smstateen",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"ssaia",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
+  {"ssccfg",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"sscsrind",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"sscofpmf",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"ssstateen",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
index e0083702fbd..2af7bd9eecb 100644
--- a/gas/config/tc-riscv.c
+++ b/gas/config/tc-riscv.c
@@ -89,6 +89,7 @@  enum riscv_csr_class
   CSR_CLASS_SSAIA_AND_H_32,	/* Ssaia with H, rv32 only */
   CSR_CLASS_SSAIA_OR_SSCSRIND,		/* Ssaia/Smcsrind */
   CSR_CLASS_SSAIA_OR_SSCSRIND_AND_H,	/* Ssaia/Smcsrind with H */
+  CSR_CLASS_SSCCFG,		/* Ssccfg */
   CSR_CLASS_SSCSRIND,		/* Sscsrind */
   CSR_CLASS_SSCSRIND_AND_H,	/* Sscsrind with H */
   CSR_CLASS_SSSTATEEN,		/* S[ms]stateen only */
@@ -1099,6 +1100,9 @@  riscv_csr_address (const char *csr_name,
       is_h_required = (csr_class == CSR_CLASS_SSAIA_OR_SSCSRIND_AND_H);
       extension = "ssaia or sscsrind";
       break;
+    case CSR_CLASS_SSCCFG:
+      extension = "ssccfg";
+      break;
     case CSR_CLASS_SSCSRIND:
     case CSR_CLASS_SSCSRIND_AND_H:
       is_h_required = (csr_class == CSR_CLASS_SSCSRIND_AND_H);
diff --git a/gas/testsuite/gas/riscv/csr-version-1p10.d b/gas/testsuite/gas/riscv/csr-version-1p10.d
index 5165f4bea0d..5acf59d68ef 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p10.d
+++ b/gas/testsuite/gas/riscv/csr-version-1p10.d
@@ -727,6 +727,8 @@  Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+21459073[ 	]+csrw[ 	]+vsieh,a1
 [ 	]+[0-9a-f]+:[ 	]+25402573[ 	]+csrr[ 	]+a0,vsiph
 [ 	]+[0-9a-f]+:[ 	]+25459073[ 	]+csrw[ 	]+vsiph,a1
+[ 	]+[0-9a-f]+:[ 	]+12002573[ 	]+csrr[ 	]+a0,scountinhibit
+[ 	]+[0-9a-f]+:[ 	]+12059073[ 	]+csrw[ 	]+scountinhibit,a1
 [ 	]+[0-9a-f]+:[ 	]+15002573[ 	]+csrr[ 	]+a0,siselect
 [ 	]+[0-9a-f]+:[ 	]+15059073[ 	]+csrw[ 	]+siselect,a1
 [ 	]+[0-9a-f]+:[ 	]+15102573[ 	]+csrr[ 	]+a0,sireg
diff --git a/gas/testsuite/gas/riscv/csr-version-1p10.l b/gas/testsuite/gas/riscv/csr-version-1p10.l
index 17a8bb638e8..67a109069ca 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p10.l
+++ b/gas/testsuite/gas/riscv/csr-version-1p10.l
@@ -1269,6 +1269,10 @@ 
 .*Info: macro .*
 .*Warning: invalid CSR `vsiph', needs `ssaia' extension
 .*Info: macro .*
+.*Warning: invalid CSR `scountinhibit', needs `ssccfg' extension
+.*Info: macro .*
+.*Warning: invalid CSR `scountinhibit', needs `ssccfg' extension
+.*Info: macro .*
 .*Warning: invalid CSR `siselect', needs `ssaia or sscsrind' extension
 .*Info: macro .*
 .*Warning: invalid CSR `siselect', needs `ssaia or sscsrind' extension
diff --git a/gas/testsuite/gas/riscv/csr-version-1p11.d b/gas/testsuite/gas/riscv/csr-version-1p11.d
index 1cb5a917f1a..ac66a45f83c 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p11.d
+++ b/gas/testsuite/gas/riscv/csr-version-1p11.d
@@ -727,6 +727,8 @@  Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+21459073[ 	]+csrw[ 	]+vsieh,a1
 [ 	]+[0-9a-f]+:[ 	]+25402573[ 	]+csrr[ 	]+a0,vsiph
 [ 	]+[0-9a-f]+:[ 	]+25459073[ 	]+csrw[ 	]+vsiph,a1
+[ 	]+[0-9a-f]+:[ 	]+12002573[ 	]+csrr[ 	]+a0,scountinhibit
+[ 	]+[0-9a-f]+:[ 	]+12059073[ 	]+csrw[ 	]+scountinhibit,a1
 [ 	]+[0-9a-f]+:[ 	]+15002573[ 	]+csrr[ 	]+a0,siselect
 [ 	]+[0-9a-f]+:[ 	]+15059073[ 	]+csrw[ 	]+siselect,a1
 [ 	]+[0-9a-f]+:[ 	]+15102573[ 	]+csrr[ 	]+a0,sireg
diff --git a/gas/testsuite/gas/riscv/csr-version-1p11.l b/gas/testsuite/gas/riscv/csr-version-1p11.l
index 8b797e8893e..e2184636639 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p11.l
+++ b/gas/testsuite/gas/riscv/csr-version-1p11.l
@@ -1265,6 +1265,10 @@ 
 .*Info: macro .*
 .*Warning: invalid CSR `vsiph', needs `ssaia' extension
 .*Info: macro .*
+.*Warning: invalid CSR `scountinhibit', needs `ssccfg' extension
+.*Info: macro .*
+.*Warning: invalid CSR `scountinhibit', needs `ssccfg' extension
+.*Info: macro .*
 .*Warning: invalid CSR `siselect', needs `ssaia or sscsrind' extension
 .*Info: macro .*
 .*Warning: invalid CSR `siselect', needs `ssaia or sscsrind' extension
diff --git a/gas/testsuite/gas/riscv/csr-version-1p12.d b/gas/testsuite/gas/riscv/csr-version-1p12.d
index ac88d9370f8..9ed1fa7c137 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p12.d
+++ b/gas/testsuite/gas/riscv/csr-version-1p12.d
@@ -727,6 +727,8 @@  Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+21459073[ 	]+csrw[ 	]+vsieh,a1
 [ 	]+[0-9a-f]+:[ 	]+25402573[ 	]+csrr[ 	]+a0,vsiph
 [ 	]+[0-9a-f]+:[ 	]+25459073[ 	]+csrw[ 	]+vsiph,a1
+[ 	]+[0-9a-f]+:[ 	]+12002573[ 	]+csrr[ 	]+a0,scountinhibit
+[ 	]+[0-9a-f]+:[ 	]+12059073[ 	]+csrw[ 	]+scountinhibit,a1
 [ 	]+[0-9a-f]+:[ 	]+15002573[ 	]+csrr[ 	]+a0,siselect
 [ 	]+[0-9a-f]+:[ 	]+15059073[ 	]+csrw[ 	]+siselect,a1
 [ 	]+[0-9a-f]+:[ 	]+15102573[ 	]+csrr[ 	]+a0,sireg
diff --git a/gas/testsuite/gas/riscv/csr-version-1p12.l b/gas/testsuite/gas/riscv/csr-version-1p12.l
index 81a7aba25c8..18476337237 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p12.l
+++ b/gas/testsuite/gas/riscv/csr-version-1p12.l
@@ -989,6 +989,10 @@ 
 .*Info: macro .*
 .*Warning: invalid CSR `vsiph', needs `ssaia' extension
 .*Info: macro .*
+.*Warning: invalid CSR `scountinhibit', needs `ssccfg' extension
+.*Info: macro .*
+.*Warning: invalid CSR `scountinhibit', needs `ssccfg' extension
+.*Info: macro .*
 .*Warning: invalid CSR `siselect', needs `ssaia or sscsrind' extension
 .*Info: macro .*
 .*Warning: invalid CSR `siselect', needs `ssaia or sscsrind' extension
diff --git a/gas/testsuite/gas/riscv/csr.s b/gas/testsuite/gas/riscv/csr.s
index 378caef35b0..8fd94fa6d6e 100644
--- a/gas/testsuite/gas/riscv/csr.s
+++ b/gas/testsuite/gas/riscv/csr.s
@@ -410,6 +410,9 @@ 
 	csr vsieh
 	csr vsiph
 
+	# Ssccfg
+	csr scountinhibit
+
 	# Sscsrind
 	csr siselect
 	csr sireg
diff --git a/gas/testsuite/gas/riscv/march-help.l b/gas/testsuite/gas/riscv/march-help.l
index c33d856686b..494559bd59f 100644
--- a/gas/testsuite/gas/riscv/march-help.l
+++ b/gas/testsuite/gas/riscv/march-help.l
@@ -96,11 +96,13 @@  All available -march extensions for RISC-V:
 	zcd                                     1.0
 	zcmp                                    1.0
 	smaia                                   1.0
+	smcdeleg                                1.0
 	smcsrind                                1.0
 	smcntrpmf                               1.0
 	smepmp                                  1.0
 	smstateen                               1.0
 	ssaia                                   1.0
+	ssccfg                                  1.0
 	sscsrind                                1.0
 	sscofpmf                                1.0
 	ssstateen                               1.0
diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
index 8763cdf3543..a67772d23e5 100644
--- a/include/opcode/riscv-opc.h
+++ b/include/opcode/riscv-opc.h
@@ -3535,6 +3535,8 @@ 
 #define CSR_HVIPRIO2H 0x657
 #define CSR_VSIEH     0x214
 #define CSR_VSIPH     0x254
+/* Ssccfg CSR address.  */
+#define CSR_SCOUNTINHIBIT 0x120
 /* Sscsrind extension */
 #define CSR_SIREG2    0x152
 #define CSR_SIREG3    0x153
@@ -4579,6 +4581,8 @@  DECLARE_CSR(hviprio1h, CSR_HVIPRIO1H, CSR_CLASS_SSAIA_AND_H_32, PRIV_SPEC_CLASS_
 DECLARE_CSR(hviprio2h, CSR_HVIPRIO2H, CSR_CLASS_SSAIA_AND_H_32, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
 DECLARE_CSR(vsieh, CSR_VSIEH, CSR_CLASS_SSAIA_AND_H_32, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
 DECLARE_CSR(vsiph, CSR_VSIPH, CSR_CLASS_SSAIA_AND_H_32, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+/* Ssccfg CSR.  */
+DECLARE_CSR(scountinhibit, CSR_SCOUNTINHIBIT, CSR_CLASS_SSCCFG, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
 /* Sscsrind extension */
 DECLARE_CSR(sireg2, CSR_SIREG2, CSR_CLASS_SSCSRIND, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
 DECLARE_CSR(sireg3, CSR_SIREG3, CSR_CLASS_SSCSRIND, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)