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Thu, 30 May 2024 08:38:34 +0000 From: To: CC: , , Saurabh Jha Subject: [PATCH] gas, aarch64: Fixes in texi and tests following faminmax and lut changes Date: Thu, 30 May 2024 09:38:24 +0100 Message-ID: <20240530083824.3134999-1-saurabh.jha@arm.com> X-Mailer: git-send-email 2.43.2 MIME-Version: 1.0 X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: DU2PEPF00028D10:EE_|AS8PR08MB8734:EE_|DU6PEPF0000B61B:EE_|DBBPR08MB6156:EE_ X-MS-Office365-Filtering-Correlation-Id: cc578ce8-2f7a-4a99-ac27-08dc8083eb9d x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; ARA:13230031|1800799015|376005|82310400017|36860700004; X-Microsoft-Antispam-Message-Info-Original: 713P3FFqUivisN7l83WYUaw8E6FAAI/pHsJE+DCPLWh1nup0b1RgOZ9355FMSPrQcu7IiEGc/NxL9ZV0hZL1xv+SLSHHIgmm1dGdG51QmGdtoCReWgv/VJJ33y5I9NHkXt7YOQ+AojN8Dyil6wCYWaHWsZ8f0WgvJH+MwjzOxqGmnSVxq71LCo6UvPifvLNGmqqkfP50we1EY8KX8FdVdyvapB5WDDUcmJFSMxH+vM2daEsbQPHpTH/RdCverRhfCJsG/H2wtQ5FGc69tR4KI5bEvA6SjlVLT526G9bXvgp5+Xt6GBN/nMZ77nl2XhIMAGSQydm2W/z1SXUNsOS+wIg+Oo05sAHNUUIcRKnDBFgvk+KV0tK2RyuncmKZ2bcy6dwPhMNLrd3RJeXnGMgy/tscqb6M1lfszqgIvDADDnFLcVC0Ey1u2Ev6apHNPecApZMO3hz0o1rM6dRvP/+964Bl75xci/vDeWFADgIZDk6myP91zIPVD+GVTjptiCVahE3IUWObuZBa614+Y3D2WpM3Vj9XlCLL0ov/ynzYhCNGXtdLewAVrlQMkSGAK4NH/okeerq6HqPz2geupOH1/y3HLIkeYjNnRNI/lsgjtri7YFPvdTWEAdrYSl+DT0uTfaKGS8yrVz8jB1rQrEfCTJy8rEZDt3ijoyXxbovSV5xvoHZEC79fsmKxIhFnMbd6xEBeZOyPOO9frq77pVflTbkb8FOGrfmHncbOg/kYjGSuqJgw5CvXVWGsikgSNIZSkBU/PtGuCV16VIreSt0vXzb/PS5Q5CqFI6PKb4h2lmiBV5oj9KxuKyg/fgQYRUJqBAlIQsvPv2oNoFCD/pp8sb6aBY7q/BzJOJpzieXGlcjGAAzJjraOcAFwhv16b2ulTrwEMDgT3kds4qViS0Om1ig0uty7j4ZeW9rynwWsXvz3LF/lStjjJuMWJO9FvKJxppTO7R9t4aIkk/Nwl3UZzCXK6UUcvGnsolDQcra5XRcT5ZutkadTJKU8qhOfP9tcjDhAyWSx6fRorG96heuR5QV5MDSTdlGL+RI+xxrear+bcVCx3VDFiE24+m3PxXpuTMZPTPoOPIZF4M7EP5K9lA5PMhG0RO4nfOmGTnkitEygHNtJvqPgJ8VvU4UQRVYskCJzjVoc3EOKlnXbAZ9Alxy2cUdSxMmcN6TfJa4rqP27evEDfmRPe4H+DfPdeiEH6q/u+qrwkmYuU3pRXzqRgxpmI+8bTusGAScXmoZjZGFK6qb7aVUAJhtZiYfrosSQ9DOGnkvHquFjhAAD5yPrxLBMuDC+cj7Y3r+j2tHg5WBlhBGyjox/g0vy1teLYYnXtNlnuWp/pN82DBf6ZRBH8YuFxpFeufUQQ68ZbzlhVXG8SfguSJvfMM2ZMn9E6U+A X-Forefront-Antispam-Report-Untrusted: CIP:40.67.248.234; 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CTRY:IE; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:64aa7808-outbound-1.mta.getcheckrecipient.com; PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com; CAT:NONE; SFS:(13230031)(35042699013)(82310400017)(1800799015)(376005)(36860700004); DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 May 2024 08:38:46.1817 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cc578ce8-2f7a-4a99-ac27-08dc8083eb9d X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DU6PEPF0000B61B.eurprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBBPR08MB6156 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FORGED_SPF_HELO, GIT_PATCH_0, SPF_HELO_PASS, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE, UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces+patchwork=sourceware.org@sourceware.org Making two cleanups that came out of the comments from my previous patches: 1. Fixing `c-aarch64.texi` file so that the AArch64 architecture extensions are ordered alphabetically. 2. Fixing faminmax test cases so that they follow the existing test conventions. --- Hi, Regression tested for aarch64-none-elf and found no regressions. I kept these two unrelated cleanups in the same patch as they are small and can be reviewed and merged together. Let me know if anyone thinks differently about it. Ok for binutils-master? I don't have commit access so can someone please commit on my behalf? Regards, Saurabh --- gas/doc/c-aarch64.texi | 16 +-- .../gas/aarch64/advsimd-faminmax-illegal.s | 92 +++++++------- gas/testsuite/gas/aarch64/advsimd-faminmax.d | 104 ++++++++-------- gas/testsuite/gas/aarch64/advsimd-faminmax.s | 112 +++++++++--------- 4 files changed, 162 insertions(+), 162 deletions(-) diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi index bdfb504a5c5..b622f30b146 100644 --- a/gas/doc/c-aarch64.texi +++ b/gas/doc/c-aarch64.texi @@ -169,6 +169,8 @@ automatically cause those extensions to be disabled. @tab Enable the Check Feature Status Extension. @item @code{compnum} @tab @code{simd} @tab Enable the complex number SIMD extensions. An alias of @code{fcma}. +@item @code{cpa} @tab + @tab Enable the Checked Pointer Arithmetic extension. @item @code{crc} @tab @tab Enable CRC instructions. @item @code{crypto} @tab @code{simd} @@ -189,12 +191,14 @@ automatically cause those extensions to be disabled. @tab Enable Flag Manipulation instructions. @item @code{flagm2} @tab @code{flagm} @tab Enable FlagM2 flag conversion instructions. +@item @code{fp} @tab + @tab Enable floating-point extensions. +@item @code{fp8} @tab + @tab Enable the Floating Point 8 (FP8) extension. @item @code{fp16fml} @tab @code{fp16} @tab Enable Armv8.2 16-bit floating-point multiplication variant support. @item @code{fp16} @tab @code{fp} @tab Enable Armv8.2 16-bit floating-point support. -@item @code{fp} @tab - @tab Enable floating-point extensions. @item @code{frintts} @tab @code{simd} @tab Enable floating-point round to integral value instructions. @item @code{gcs} @tab @@ -215,6 +219,8 @@ automatically cause those extensions to be disabled. @tab Enable Large System extensions. @item @code{lse128} @tab @code{lse} @tab Enable the 128-bit Atomic Instructions extension. +@item @code{lut} @tab + @tab Enable the Lookup Table (LUT) extension. @item @code{memtag} @tab @tab Enable Armv8.5-A Memory Tagging Extensions. @item @code{mops} @tab @@ -289,12 +295,6 @@ automatically cause those extensions to be disabled. @tab Enable @code{wfet} and @code{wfit} instructions. @item @code{xs} @tab @tab Enable the XS memory attribute extension. -@item @code{cpa} @tab - @tab Enable the Checked Pointer Arithmetic extension. -@item @code{fp8} @tab - @tab Enable the Floating Point 8 (FP8) extension. -@item @code{lut} @tab - @tab Enable the Lookup Table (LUT) extension. @end multitable @multitable @columnfractions .20 .80 diff --git a/gas/testsuite/gas/aarch64/advsimd-faminmax-illegal.s b/gas/testsuite/gas/aarch64/advsimd-faminmax-illegal.s index c52a469bda5..840691472a6 100644 --- a/gas/testsuite/gas/aarch64/advsimd-faminmax-illegal.s +++ b/gas/testsuite/gas/aarch64/advsimd-faminmax-illegal.s @@ -1,51 +1,51 @@ -// Operand mismatch -famax v0.4s, v1.4h, v2.4h -famax v31.8h, v30.8h, v29.2s -famax v15.2s, v16.2d, v17.2s -famin v0.4s, v1.4h, v2.4h -famin v31.8h, v30.8h, v29.2s -famin v15.2s, v16.2d, v17.2s + // Operand mismatch + famax v0.4s, v1.4h, v2.4h + famax v31.8h, v30.8h, v29.2s + famax v15.2s, v16.2d, v17.2s + famin v0.4s, v1.4h, v2.4h + famin v31.8h, v30.8h, v29.2s + famin v15.2s, v16.2d, v17.2s -// Disallowed types -famax v0.8b, v1.4b, v2.4b -famax v10.16b, v9.16b, v8.16b -famin v0.8b, v1.4b, v2.4b -famin v10.16b, v9.16b, v8.16b + // Disallowed types + famax v0.8b, v1.4b, v2.4b + famax v10.16b, v9.16b, v8.16b + famin v0.8b, v1.4b, v2.4b + famin v10.16b, v9.16b, v8.16b -// Incorrect number of arguments -famax v0.4h -famax v0.4h, v1.4h -famax v0.4h, v1.4h, v2.4h, v3.4h -famin v0.4h -famin v0.4h, v1.4h -famin v0.4h, v1.4h, v2.4h, v3.4h + // Incorrect number of arguments + famax v0.4h + famax v0.4h, v1.4h + famax v0.4h, v1.4h, v2.4h, v3.4h + famin v0.4h + famin v0.4h, v1.4h + famin v0.4h, v1.4h, v2.4h, v3.4h -// Spelling mistakes -famax v0.4h, v1.4h, v2.4x -famax v0.2h, v2.2a, v1.2h -famax v2.2t, v0.2d, v1.2d -famin v0.4h, v1.4h, v2.4x -famin v0.2h, v2.2a, v1.2h -famin v2.2t, v0.2d, v1.2d + // Spelling mistakes + famax v0.4h, v1.4h, v2.4x + famax v0.2h, v2.2a, v1.2h + famax v2.2t, v0.2d, v1.2d + famin v0.4h, v1.4h, v2.4x + famin v0.2h, v2.2a, v1.2h + famin v2.2t, v0.2d, v1.2d -// Missing qualifiers -famax v19.2d, 20.2d, v21.2d -famax 19.4d, v20.4d, v21.4d -famax v19.2s, v20.2s, 21.2s -famax v19, v20.2d, v21.2d -famax v19.2d, v20, v21.2d -famax v19.2d, v20.2d, v21 -famin v19.2d, 20.2d, v21.2d -famin 19.4d, v20.4d, v21.4d -famin v19.2s, v20.2s, 21.2s -famin v19, v20.2d, v21.2d -famin v19.2d, v20, v21.2d -famin v19.2d, v20.2d, v21 + // Missing qualifiers + famax v19.2d, 20.2d, v21.2d + famax 19.4d, v20.4d, v21.4d + famax v19.2s, v20.2s, 21.2s + famax v19, v20.2d, v21.2d + famax v19.2d, v20, v21.2d + famax v19.2d, v20.2d, v21 + famin v19.2d, 20.2d, v21.2d + famin 19.4d, v20.4d, v21.4d + famin v19.2s, v20.2s, 21.2s + famin v19, v20.2d, v21.2d + famin v19.2d, v20, v21.2d + famin v19.2d, v20.2d, v21 -// Out of range numbers -famax v35.4d, v30.4d, v29.4d -famax v30.2s, v35.2s, v29.2s -famax v30.4s, v29.4s, v35.4s -famin v35.4d, v30.4d, v29.4d -famin v30.2s, v35.2s, v29.2s -famin v30.4s, v29.4s, v35.4s + // Out of range numbers + famax v35.4d, v30.4d, v29.4d + famax v30.2s, v35.2s, v29.2s + famax v30.4s, v29.4s, v35.4s + famin v35.4d, v30.4d, v29.4d + famin v30.2s, v35.2s, v29.2s + famin v30.4s, v29.4s, v35.4s diff --git a/gas/testsuite/gas/aarch64/advsimd-faminmax.d b/gas/testsuite/gas/aarch64/advsimd-faminmax.d index 7be96b5ef25..96df2a7e2cf 100644 --- a/gas/testsuite/gas/aarch64/advsimd-faminmax.d +++ b/gas/testsuite/gas/aarch64/advsimd-faminmax.d @@ -6,55 +6,55 @@ Disassembly of section \.text: 0+ <.*>: - 0: 0ec01c00 famax v0.4h, v0.4h, v0.4h - 4: 0ec01c1f famax v31.4h, v0.4h, v0.4h - 8: 0ec01fe0 famax v0.4h, v31.4h, v0.4h - c: 0edf1c00 famax v0.4h, v0.4h, v31.4h - 10: 0edb1eb1 famax v17.4h, v21.4h, v27.4h - 14: 4ec01c00 famax v0.8h, v0.8h, v0.8h - 18: 4ec01c1f famax v31.8h, v0.8h, v0.8h - 1c: 4ec01fe0 famax v0.8h, v31.8h, v0.8h - 20: 4edf1c00 famax v0.8h, v0.8h, v31.8h - 24: 4ec41ce2 famax v2.8h, v7.8h, v4.8h - 28: 0ea0dc00 famax v0.2s, v0.2s, v0.2s - 2c: 0ea0dc1f famax v31.2s, v0.2s, v0.2s - 30: 0ea0dfe0 famax v0.2s, v31.2s, v0.2s - 34: 0ebfdc00 famax v0.2s, v0.2s, v31.2s - 38: 0eb3dc23 famax v3.2s, v1.2s, v19.2s - 3c: 4ea0dc00 famax v0.4s, v0.4s, v0.4s - 40: 4ea0dc1f famax v31.4s, v0.4s, v0.4s - 44: 4ea0dfe0 famax v0.4s, v31.4s, v0.4s - 48: 4ebfdc00 famax v0.4s, v0.4s, v31.4s - 4c: 4ea7dd09 famax v9.4s, v8.4s, v7.4s - 50: 4ee0dc00 famax v0.2d, v0.2d, v0.2d - 54: 4ee0dc1f famax v31.2d, v0.2d, v0.2d - 58: 4ee0dfe0 famax v0.2d, v31.2d, v0.2d - 5c: 4effdc00 famax v0.2d, v0.2d, v31.2d - 60: 4ef0ddd2 famax v18.2d, v14.2d, v16.2d - 64: 0ef3dc23 .inst 0x0ef3dc23 ; undefined - 68: 2ec01c00 famin v0.4h, v0.4h, v0.4h - 6c: 2ec01c1f famin v31.4h, v0.4h, v0.4h - 70: 2ec01fe0 famin v0.4h, v31.4h, v0.4h - 74: 2edf1c00 famin v0.4h, v0.4h, v31.4h - 78: 2edb1eb1 famin v17.4h, v21.4h, v27.4h - 7c: 6ec01c00 famin v0.8h, v0.8h, v0.8h - 80: 6ec01c1f famin v31.8h, v0.8h, v0.8h - 84: 6ec01fe0 famin v0.8h, v31.8h, v0.8h - 88: 6edf1c00 famin v0.8h, v0.8h, v31.8h - 8c: 6ec41ce2 famin v2.8h, v7.8h, v4.8h - 90: 2ea0dc00 famin v0.2s, v0.2s, v0.2s - 94: 2ea0dc1f famin v31.2s, v0.2s, v0.2s - 98: 2ea0dfe0 famin v0.2s, v31.2s, v0.2s - 9c: 2ebfdc00 famin v0.2s, v0.2s, v31.2s - a0: 2eb3dc23 famin v3.2s, v1.2s, v19.2s - a4: 6ea0dc00 famin v0.4s, v0.4s, v0.4s - a8: 6ea0dc1f famin v31.4s, v0.4s, v0.4s - ac: 6ea0dfe0 famin v0.4s, v31.4s, v0.4s - b0: 6ebfdc00 famin v0.4s, v0.4s, v31.4s - b4: 6ea7dd09 famin v9.4s, v8.4s, v7.4s - b8: 6ee0dc00 famin v0.2d, v0.2d, v0.2d - bc: 6ee0dc1f famin v31.2d, v0.2d, v0.2d - c0: 6ee0dfe0 famin v0.2d, v31.2d, v0.2d - c4: 6effdc00 famin v0.2d, v0.2d, v31.2d - c8: 6ef0ddd2 famin v18.2d, v14.2d, v16.2d - cc: 2ef3dc23 .inst 0x2ef3dc23 ; undefined \ No newline at end of file +[^:]+: 0ec01c00 famax v0.4h, v0.4h, v0.4h +[^:]+: 0ec01c1f famax v31.4h, v0.4h, v0.4h +[^:]+: 0ec01fe0 famax v0.4h, v31.4h, v0.4h +[^:]+: 0edf1c00 famax v0.4h, v0.4h, v31.4h +[^:]+: 0edb1eb1 famax v17.4h, v21.4h, v27.4h +[^:]+: 4ec01c00 famax v0.8h, v0.8h, v0.8h +[^:]+: 4ec01c1f famax v31.8h, v0.8h, v0.8h +[^:]+: 4ec01fe0 famax v0.8h, v31.8h, v0.8h +[^:]+: 4edf1c00 famax v0.8h, v0.8h, v31.8h +[^:]+: 4ec41ce2 famax v2.8h, v7.8h, v4.8h +[^:]+: 0ea0dc00 famax v0.2s, v0.2s, v0.2s +[^:]+: 0ea0dc1f famax v31.2s, v0.2s, v0.2s +[^:]+: 0ea0dfe0 famax v0.2s, v31.2s, v0.2s +[^:]+: 0ebfdc00 famax v0.2s, v0.2s, v31.2s +[^:]+: 0eb3dc23 famax v3.2s, v1.2s, v19.2s +[^:]+: 4ea0dc00 famax v0.4s, v0.4s, v0.4s +[^:]+: 4ea0dc1f famax v31.4s, v0.4s, v0.4s +[^:]+: 4ea0dfe0 famax v0.4s, v31.4s, v0.4s +[^:]+: 4ebfdc00 famax v0.4s, v0.4s, v31.4s +[^:]+: 4ea7dd09 famax v9.4s, v8.4s, v7.4s +[^:]+: 4ee0dc00 famax v0.2d, v0.2d, v0.2d +[^:]+: 4ee0dc1f famax v31.2d, v0.2d, v0.2d +[^:]+: 4ee0dfe0 famax v0.2d, v31.2d, v0.2d +[^:]+: 4effdc00 famax v0.2d, v0.2d, v31.2d +[^:]+: 4ef0ddd2 famax v18.2d, v14.2d, v16.2d +[^:]+: 0ef3dc23 .inst 0x0ef3dc23 ; undefined +[^:]+: 2ec01c00 famin v0.4h, v0.4h, v0.4h +[^:]+: 2ec01c1f famin v31.4h, v0.4h, v0.4h +[^:]+: 2ec01fe0 famin v0.4h, v31.4h, v0.4h +[^:]+: 2edf1c00 famin v0.4h, v0.4h, v31.4h +[^:]+: 2edb1eb1 famin v17.4h, v21.4h, v27.4h +[^:]+: 6ec01c00 famin v0.8h, v0.8h, v0.8h +[^:]+: 6ec01c1f famin v31.8h, v0.8h, v0.8h +[^:]+: 6ec01fe0 famin v0.8h, v31.8h, v0.8h +[^:]+: 6edf1c00 famin v0.8h, v0.8h, v31.8h +[^:]+: 6ec41ce2 famin v2.8h, v7.8h, v4.8h +[^:]+: 2ea0dc00 famin v0.2s, v0.2s, v0.2s +[^:]+: 2ea0dc1f famin v31.2s, v0.2s, v0.2s +[^:]+: 2ea0dfe0 famin v0.2s, v31.2s, v0.2s +[^:]+: 2ebfdc00 famin v0.2s, v0.2s, v31.2s +[^:]+: 2eb3dc23 famin v3.2s, v1.2s, v19.2s +[^:]+: 6ea0dc00 famin v0.4s, v0.4s, v0.4s +[^:]+: 6ea0dc1f famin v31.4s, v0.4s, v0.4s +[^:]+: 6ea0dfe0 famin v0.4s, v31.4s, v0.4s +[^:]+: 6ebfdc00 famin v0.4s, v0.4s, v31.4s +[^:]+: 6ea7dd09 famin v9.4s, v8.4s, v7.4s +[^:]+: 6ee0dc00 famin v0.2d, v0.2d, v0.2d +[^:]+: 6ee0dc1f famin v31.2d, v0.2d, v0.2d +[^:]+: 6ee0dfe0 famin v0.2d, v31.2d, v0.2d +[^:]+: 6effdc00 famin v0.2d, v0.2d, v31.2d +[^:]+: 6ef0ddd2 famin v18.2d, v14.2d, v16.2d +[^:]+: 2ef3dc23 .inst 0x2ef3dc23 ; undefined \ No newline at end of file diff --git a/gas/testsuite/gas/aarch64/advsimd-faminmax.s b/gas/testsuite/gas/aarch64/advsimd-faminmax.s index 91bc9b54d4c..d0bf8cfabf0 100644 --- a/gas/testsuite/gas/aarch64/advsimd-faminmax.s +++ b/gas/testsuite/gas/aarch64/advsimd-faminmax.s @@ -1,67 +1,67 @@ -// Valid instructions -famax v0.4h, v0.4h, v0.4h -famax v31.4h, v0.4h, v0.4h -famax v0.4h, v31.4h, v0.4h -famax v0.4h, v0.4h, v31.4h -famax v17.4h, v21.4h, v27.4h + // Valid instructions + famax v0.4h, v0.4h, v0.4h + famax v31.4h, v0.4h, v0.4h + famax v0.4h, v31.4h, v0.4h + famax v0.4h, v0.4h, v31.4h + famax v17.4h, v21.4h, v27.4h -famax v0.8h, v0.8h, v0.8h -famax v31.8h, v0.8h, v0.8h -famax v0.8h, v31.8h, v0.8h -famax v0.8h, v0.8h, v31.8h -famax v2.8h, v7.8h, v4.8h + famax v0.8h, v0.8h, v0.8h + famax v31.8h, v0.8h, v0.8h + famax v0.8h, v31.8h, v0.8h + famax v0.8h, v0.8h, v31.8h + famax v2.8h, v7.8h, v4.8h -famax v0.2s, v0.2s, v0.2s -famax v31.2s, v0.2s, v0.2s -famax v0.2s, v31.2s, v0.2s -famax v0.2s, v0.2s, v31.2s -famax v3.2s, v1.2s, v19.2s + famax v0.2s, v0.2s, v0.2s + famax v31.2s, v0.2s, v0.2s + famax v0.2s, v31.2s, v0.2s + famax v0.2s, v0.2s, v31.2s + famax v3.2s, v1.2s, v19.2s -famax v0.4s, v0.4s, v0.4s -famax v31.4s, v0.4s, v0.4s -famax v0.4s, v31.4s, v0.4s -famax v0.4s, v0.4s, v31.4s -famax v9.4s, v8.4s, v7.4s + famax v0.4s, v0.4s, v0.4s + famax v31.4s, v0.4s, v0.4s + famax v0.4s, v31.4s, v0.4s + famax v0.4s, v0.4s, v31.4s + famax v9.4s, v8.4s, v7.4s -famax v0.2d, v0.2d, v0.2d -famax v31.2d, v0.2d, v0.2d -famax v0.2d, v31.2d, v0.2d -famax v0.2d, v0.2d, v31.2d -famax v18.2d, v14.2d, v16.2d + famax v0.2d, v0.2d, v0.2d + famax v31.2d, v0.2d, v0.2d + famax v0.2d, v31.2d, v0.2d + famax v0.2d, v0.2d, v31.2d + famax v18.2d, v14.2d, v16.2d -// Invalid instruction because Q = 0 and sz = 1 which is reserved -.inst 0xef3dc23 + // Invalid instruction because Q = 0 and sz = 1 which is reserved + .inst 0xef3dc23 -// Valid instructions -famin v0.4h, v0.4h, v0.4h -famin v31.4h, v0.4h, v0.4h -famin v0.4h, v31.4h, v0.4h -famin v0.4h, v0.4h, v31.4h -famin v17.4h, v21.4h, v27.4h + // Valid instructions + famin v0.4h, v0.4h, v0.4h + famin v31.4h, v0.4h, v0.4h + famin v0.4h, v31.4h, v0.4h + famin v0.4h, v0.4h, v31.4h + famin v17.4h, v21.4h, v27.4h -famin v0.8h, v0.8h, v0.8h -famin v31.8h, v0.8h, v0.8h -famin v0.8h, v31.8h, v0.8h -famin v0.8h, v0.8h, v31.8h -famin v2.8h, v7.8h, v4.8h + famin v0.8h, v0.8h, v0.8h + famin v31.8h, v0.8h, v0.8h + famin v0.8h, v31.8h, v0.8h + famin v0.8h, v0.8h, v31.8h + famin v2.8h, v7.8h, v4.8h -famin v0.2s, v0.2s, v0.2s -famin v31.2s, v0.2s, v0.2s -famin v0.2s, v31.2s, v0.2s -famin v0.2s, v0.2s, v31.2s -famin v3.2s, v1.2s, v19.2s + famin v0.2s, v0.2s, v0.2s + famin v31.2s, v0.2s, v0.2s + famin v0.2s, v31.2s, v0.2s + famin v0.2s, v0.2s, v31.2s + famin v3.2s, v1.2s, v19.2s -famin v0.4s, v0.4s, v0.4s -famin v31.4s, v0.4s, v0.4s -famin v0.4s, v31.4s, v0.4s -famin v0.4s, v0.4s, v31.4s -famin v9.4s, v8.4s, v7.4s + famin v0.4s, v0.4s, v0.4s + famin v31.4s, v0.4s, v0.4s + famin v0.4s, v31.4s, v0.4s + famin v0.4s, v0.4s, v31.4s + famin v9.4s, v8.4s, v7.4s -famin v0.2d, v0.2d, v0.2d -famin v31.2d, v0.2d, v0.2d -famin v0.2d, v31.2d, v0.2d -famin v0.2d, v0.2d, v31.2d -famin v18.2d, v14.2d, v16.2d + famin v0.2d, v0.2d, v0.2d + famin v31.2d, v0.2d, v0.2d + famin v0.2d, v31.2d, v0.2d + famin v0.2d, v0.2d, v31.2d + famin v18.2d, v14.2d, v16.2d -// Invalid instruction because Q = 0 and sz = 1 which is reserved -.inst 0x2ef3dc23 + // Invalid instruction because Q = 0 and sz = 1 which is reserved + .inst 0x2ef3dc23