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Sun, 19 May 2024 23:22:05 -0700 (PDT) From: "Cui, Lili" To: binutils@sourceware.org Cc: hjl.tools@gmail.com, jbeulich@suse.com Subject: [PATCH 2/3] Add check for 8-bit old registers in EVEX format Date: Mon, 20 May 2024 14:22:01 +0800 Message-Id: <20240520062202.1297234-3-lili.cui@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240520062202.1297234-1-lili.cui@intel.com> References: <20240520062202.1297234-1-lili.cui@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-10.0 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces+patchwork=sourceware.org@sourceware.org Since APX supports EVEX from legacy instructions, we need to check the 8-bit old registers in EVEX format. and adjusted the test case results. gas/ChangeLog: * config/tc-i386.c (md_assemble): Add invalid check for old byte registers in EVEX/VEX format. * testsuite/gas/i386/x86-64-apx-inval.l: Add new test. * testsuite/gas/i386/x86-64-apx-inval.s: Ditto. --- gas/config/tc-i386.c | 6 +++--- gas/testsuite/gas/i386/rex-bad.l | 8 ++++---- gas/testsuite/gas/i386/x86-64-apx-inval.l | 3 +++ gas/testsuite/gas/i386/x86-64-apx-inval.s | 2 ++ 4 files changed, 12 insertions(+), 7 deletions(-) diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 2fbd90bedb8..5606049c054 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -4311,10 +4311,10 @@ static void establish_rex (void) && !is_apx_rex2_encoding () && !is_any_vex_encoding (&i.tm) && !i.rex) i.rex |= REX_OPCODE; - /* For REX/REX2 prefix instructions, we need to convert old registers + /* For REX/REX2/EVEX prefix instructions, we need to convert old registers (AL, CL, DL and BL) to new ones (AXL, CXL, DXL and BXL) and report bad for AH, CH, DH and BH. */ - if (i.rex || i.rex2) + if (i.rex || i.rex2 || i.tm.opcode_modifier.evex) { for (unsigned int x = first; x <= last; x++) { @@ -4326,7 +4326,7 @@ static void establish_rex (void) /* In case it is "hi" register, give up. */ if (i.op[x].regs->reg_num > 3) as_bad (_("can't encode register '%s%s' in an " - "instruction requiring REX/REX2 prefix"), + "instruction requiring REX/REX2/EVEX prefix"), register_prefix, i.op[x].regs->reg_name); /* Otherwise it is equivalent to the extended register. diff --git a/gas/testsuite/gas/i386/rex-bad.l b/gas/testsuite/gas/i386/rex-bad.l index abd4d3045d0..100eda558b7 100644 --- a/gas/testsuite/gas/i386/rex-bad.l +++ b/gas/testsuite/gas/i386/rex-bad.l @@ -3,8 +3,8 @@ .*:5: Error: same .* .*:6: Error: same .* .*:7: Error: same .* -.*:9: Error: .* REX/REX2 .* -.*:10: Error: .* REX/REX2 .* -.*:12: Error: .* REX/REX2 .* -.*:13: Error: .* REX/REX2 .* +.*:9: Error: .* REX/REX2/EVEX .* +.*:10: Error: .* REX/REX2/EVEX .* +.*:12: Error: .* REX/REX2/EVEX .* +.*:13: Error: .* REX/REX2/EVEX .* #pass diff --git a/gas/testsuite/gas/i386/x86-64-apx-inval.l b/gas/testsuite/gas/i386/x86-64-apx-inval.l index 7a870b27b72..4948c520481 100644 --- a/gas/testsuite/gas/i386/x86-64-apx-inval.l +++ b/gas/testsuite/gas/i386/x86-64-apx-inval.l @@ -12,3 +12,6 @@ .*:13: Error: \{nf\} unsupported for `mulx' .*:14: Error: \{nf\} cannot be combined with \{vex\}/\{vex3\} .*:15: Error: \{nf\} cannot be combined with \{vex\}/\{vex3\} +.*:16: Error: can't encode register '%ah' in an instruction requiring REX/REX2/EVEX prefix +.*:17: Error: can't encode register '%ah' in an instruction requiring REX/REX2/EVEX prefix +#pass diff --git a/gas/testsuite/gas/i386/x86-64-apx-inval.s b/gas/testsuite/gas/i386/x86-64-apx-inval.s index 0487b885ec8..3d69deabe4d 100644 --- a/gas/testsuite/gas/i386/x86-64-apx-inval.s +++ b/gas/testsuite/gas/i386/x86-64-apx-inval.s @@ -13,3 +13,5 @@ {nf} mulx %r15,%r15,%r11 {nf} {vex} bextr %ecx, %edx, %r10d {vex} {nf} bextr %ecx, %edx, %r10d + {nf} add %dl,%ah + {evex} adc %dl,%ah