[v1,2/7] LoongArch: Add gas testsuit for lbt/lvz instructions

Message ID 20240229114519.1552207-3-cailulu@loongson.cn
State New
Headers
Series Organize instructions and relocations test cases in gas |

Checks

Context Check Description
linaro-tcwg-bot/tcwg_binutils_build--master-arm success Testing passed
linaro-tcwg-bot/tcwg_binutils_build--master-aarch64 success Testing passed
linaro-tcwg-bot/tcwg_binutils_check--master-aarch64 success Testing passed
linaro-tcwg-bot/tcwg_binutils_check--master-arm success Testing passed

Commit Message

Lulu Cai Feb. 29, 2024, 11:45 a.m. UTC
  Test the LBT/LVZ instructions. Only LA64 supports
these instructions.
---
 gas/testsuite/gas/loongarch/insn_lbt.d | 186 +++++++++++++++++++++++++
 gas/testsuite/gas/loongarch/insn_lbt.s | 176 +++++++++++++++++++++++
 gas/testsuite/gas/loongarch/insn_lvz.d |  15 ++
 gas/testsuite/gas/loongarch/insn_lvz.s |   5 +
 4 files changed, 382 insertions(+)
 create mode 100644 gas/testsuite/gas/loongarch/insn_lbt.d
 create mode 100644 gas/testsuite/gas/loongarch/insn_lbt.s
 create mode 100644 gas/testsuite/gas/loongarch/insn_lvz.d
 create mode 100644 gas/testsuite/gas/loongarch/insn_lvz.s
  

Patch

diff --git a/gas/testsuite/gas/loongarch/insn_lbt.d b/gas/testsuite/gas/loongarch/insn_lbt.d
new file mode 100644
index 00000000000..7d80fb89070
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/insn_lbt.d
@@ -0,0 +1,186 @@ 
+#as:
+#objdump: -d
+#skip: loongarch32-*-*
+
+.*:     file format .*
+
+
+Disassembly of section .text:
+
+0+ <.*>:
+   0:	00000820 	movgr2scr   	\$scr0, \$ra
+   4:	00000c20 	movscr2gr   	\$zero, \$scr1
+   8:	48006600 	jiscr0      	100
+   c:	48006700 	jiscr1      	100
+  10:	00290420 	addu12i.w   	\$zero, \$ra, 1
+  14:	00298420 	addu12i.d   	\$zero, \$ra, 1
+  18:	00300820 	adc.b       	\$zero, \$ra, \$tp
+  1c:	00308820 	adc.h       	\$zero, \$ra, \$tp
+  20:	00310820 	adc.w       	\$zero, \$ra, \$tp
+  24:	00318820 	adc.d       	\$zero, \$ra, \$tp
+  28:	00320820 	sbc.b       	\$zero, \$ra, \$tp
+  2c:	00328820 	sbc.h       	\$zero, \$ra, \$tp
+  30:	00330820 	sbc.w       	\$zero, \$ra, \$tp
+  34:	00338820 	sbc.d       	\$zero, \$ra, \$tp
+  38:	001a0820 	rotr.b      	\$zero, \$ra, \$tp
+  3c:	001a8820 	rotr.h      	\$zero, \$ra, \$tp
+  40:	004c2420 	rotri.b     	\$zero, \$ra, 0x1
+  44:	004c4420 	rotri.h     	\$zero, \$ra, 0x1
+  48:	00340820 	rcr.b       	\$zero, \$ra, \$tp
+  4c:	00348820 	rcr.h       	\$zero, \$ra, \$tp
+  50:	00350820 	rcr.w       	\$zero, \$ra, \$tp
+  54:	00358820 	rcr.d       	\$zero, \$ra, \$tp
+  58:	00502420 	rcri.b      	\$zero, \$ra, 0x1
+  5c:	00504420 	rcri.h      	\$zero, \$ra, 0x1
+  60:	00508420 	rcri.w      	\$zero, \$ra, 0x1
+  64:	00510420 	rcri.d      	\$zero, \$ra, 0x1
+  68:	0114e420 	fcvt.ud.d   	\$fa0, \$fa1
+  6c:	0114e020 	fcvt.ld.d   	\$fa0, \$fa1
+  70:	01150820 	fcvt.d.ld   	\$fa0, \$fa1, \$fa2
+  74:	2e800420 	ldl.d       	\$zero, \$ra, 1
+  78:	2e000420 	ldl.w       	\$zero, \$ra, 1
+  7c:	2e400420 	ldr.w       	\$zero, \$ra, 1
+  80:	2ec00420 	ldr.d       	\$zero, \$ra, 1
+  84:	2f000420 	stl.w       	\$zero, \$ra, 1
+  88:	2f800420 	stl.d       	\$zero, \$ra, 1
+  8c:	2f400420 	str.w       	\$zero, \$ra, 1
+  90:	2fc00420 	str.d       	\$zero, \$ra, 1
+  94:	003f040c 	x86adc.b    	\$zero, \$ra
+  98:	003f040d 	x86adc.h    	\$zero, \$ra
+  9c:	003f040e 	x86adc.w    	\$zero, \$ra
+  a0:	003f040f 	x86adc.d    	\$zero, \$ra
+  a4:	003f0404 	x86add.b    	\$zero, \$ra
+  a8:	003f0405 	x86add.h    	\$zero, \$ra
+  ac:	003f0406 	x86add.w    	\$zero, \$ra
+  b0:	003f0407 	x86add.d    	\$zero, \$ra
+  b4:	003f0400 	x86add.wu   	\$zero, \$ra
+  b8:	003f0401 	x86add.du   	\$zero, \$ra
+  bc:	00008000 	x86inc.b    	\$zero
+  c0:	00008001 	x86inc.h    	\$zero
+  c4:	00008002 	x86inc.w    	\$zero
+  c8:	00008003 	x86inc.d    	\$zero
+  cc:	003f0410 	x86sbc.b    	\$zero, \$ra
+  d0:	003f0411 	x86sbc.h    	\$zero, \$ra
+  d4:	003f0412 	x86sbc.w    	\$zero, \$ra
+  d8:	003f0413 	x86sbc.d    	\$zero, \$ra
+  dc:	003f0408 	x86sub.b    	\$zero, \$ra
+  e0:	003f0409 	x86sub.h    	\$zero, \$ra
+  e4:	003f040a 	x86sub.w    	\$zero, \$ra
+  e8:	003f040b 	x86sub.d    	\$zero, \$ra
+  ec:	003f0402 	x86sub.wu   	\$zero, \$ra
+  f0:	003f0403 	x86sub.du   	\$zero, \$ra
+  f4:	00008004 	x86dec.b    	\$zero
+  f8:	00008005 	x86dec.h    	\$zero
+  fc:	00008006 	x86dec.w    	\$zero
+ 100:	00008007 	x86dec.d    	\$zero
+ 104:	003f8410 	x86and.b    	\$zero, \$ra
+ 108:	003f8411 	x86and.h    	\$zero, \$ra
+ 10c:	003f8412 	x86and.w    	\$zero, \$ra
+ 110:	003f8413 	x86and.d    	\$zero, \$ra
+ 114:	003f8414 	x86or.b     	\$zero, \$ra
+ 118:	003f8415 	x86or.h     	\$zero, \$ra
+ 11c:	003f8416 	x86or.w     	\$zero, \$ra
+ 120:	003f8417 	x86or.d     	\$zero, \$ra
+ 124:	003f8418 	x86xor.b    	\$zero, \$ra
+ 128:	003f8419 	x86xor.h    	\$zero, \$ra
+ 12c:	003f841a 	x86xor.w    	\$zero, \$ra
+ 130:	003f841b 	x86xor.d    	\$zero, \$ra
+ 134:	003e8400 	x86mul.b    	\$zero, \$ra
+ 138:	003e8401 	x86mul.h    	\$zero, \$ra
+ 13c:	003e8402 	x86mul.w    	\$zero, \$ra
+ 140:	003e8403 	x86mul.d    	\$zero, \$ra
+ 144:	003e8404 	x86mul.bu   	\$zero, \$ra
+ 148:	003e8405 	x86mul.hu   	\$zero, \$ra
+ 14c:	003e8406 	x86mul.wu   	\$zero, \$ra
+ 150:	003e8407 	x86mul.du   	\$zero, \$ra
+ 154:	003f840c 	x86rcl.b    	\$zero, \$ra
+ 158:	003f840d 	x86rcl.h    	\$zero, \$ra
+ 15c:	003f840e 	x86rcl.w    	\$zero, \$ra
+ 160:	003f840f 	x86rcl.d    	\$zero, \$ra
+ 164:	00542418 	x86rcli.b   	\$zero, 0x1
+ 168:	00544419 	x86rcli.h   	\$zero, 0x1
+ 16c:	0054841a 	x86rcli.w   	\$zero, 0x1
+ 170:	0055041b 	x86rcli.d   	\$zero, 0x1
+ 174:	003f8408 	x86rcr.b    	\$zero, \$ra
+ 178:	003f8409 	x86rcr.h    	\$zero, \$ra
+ 17c:	003f840a 	x86rcr.w    	\$zero, \$ra
+ 180:	003f840b 	x86rcr.d    	\$zero, \$ra
+ 184:	00542410 	x86rcri.b   	\$zero, 0x1
+ 188:	00544411 	x86rcri.h   	\$zero, 0x1
+ 18c:	00548412 	x86rcri.w   	\$zero, 0x1
+ 190:	00550413 	x86rcri.d   	\$zero, 0x1
+ 194:	003f8404 	x86rotl.b   	\$zero, \$ra
+ 198:	003f8405 	x86rotl.h   	\$zero, \$ra
+ 19c:	003f8406 	x86rotl.w   	\$zero, \$ra
+ 1a0:	003f8407 	x86rotl.d   	\$zero, \$ra
+ 1a4:	00542414 	x86rotli.b  	\$zero, 0x1
+ 1a8:	00544415 	x86rotli.h  	\$zero, 0x1
+ 1ac:	00548416 	x86rotli.w  	\$zero, 0x1
+ 1b0:	00550417 	x86rotli.d  	\$zero, 0x1
+ 1b4:	003f8400 	x86rotr.b   	\$zero, \$ra
+ 1b8:	003f8401 	x86rotr.h   	\$zero, \$ra
+ 1bc:	003f8402 	x86rotr.d   	\$zero, \$ra
+ 1c0:	003f8403 	x86rotr.w   	\$zero, \$ra
+ 1c4:	0054240c 	x86rotri.b  	\$zero, 0x1
+ 1c8:	0054440d 	x86rotri.h  	\$zero, 0x1
+ 1cc:	0054840e 	x86rotri.w  	\$zero, 0x1
+ 1d0:	0055040f 	x86rotri.d  	\$zero, 0x1
+ 1d4:	003f0414 	x86sll.b    	\$zero, \$ra
+ 1d8:	003f0415 	x86sll.h    	\$zero, \$ra
+ 1dc:	003f0416 	x86sll.w    	\$zero, \$ra
+ 1e0:	003f0417 	x86sll.d    	\$zero, \$ra
+ 1e4:	00542400 	x86slli.b   	\$zero, 0x1
+ 1e8:	00544401 	x86slli.h   	\$zero, 0x1
+ 1ec:	00548402 	x86slli.w   	\$zero, 0x1
+ 1f0:	00550403 	x86slli.d   	\$zero, 0x1
+ 1f4:	003f0418 	x86srl.b    	\$zero, \$ra
+ 1f8:	003f0419 	x86srl.h    	\$zero, \$ra
+ 1fc:	003f041a 	x86srl.w    	\$zero, \$ra
+ 200:	003f041b 	x86srl.d    	\$zero, \$ra
+ 204:	00542404 	x86srli.b   	\$zero, 0x1
+ 208:	00544405 	x86srli.h   	\$zero, 0x1
+ 20c:	00548406 	x86srli.w   	\$zero, 0x1
+ 210:	00550407 	x86srli.d   	\$zero, 0x1
+ 214:	003f041c 	x86sra.b    	\$zero, \$ra
+ 218:	003f041d 	x86sra.h    	\$zero, \$ra
+ 21c:	003f041e 	x86sra.w    	\$zero, \$ra
+ 220:	003f041f 	x86sra.d    	\$zero, \$ra
+ 224:	00542408 	x86srai.b   	\$zero, 0x1
+ 228:	00544409 	x86srai.h   	\$zero, 0x1
+ 22c:	0054840a 	x86srai.w   	\$zero, 0x1
+ 230:	0055040b 	x86srai.d   	\$zero, 0x1
+ 234:	00368400 	setx86j     	\$zero, 0x1
+ 238:	00007820 	setx86loope 	\$zero, \$ra
+ 23c:	00007c20 	setx86loopne	\$zero, \$ra
+ 240:	005c0400 	x86mfflag   	\$zero, 0x1
+ 244:	005c0420 	x86mtflag   	\$zero, 0x1
+ 248:	00007400 	x86mftop    	\$zero
+ 24c:	00007020 	x86mttop    	0x1
+ 250:	00008009 	x86inctop
+ 254:	00008029 	x86dectop
+ 258:	00008008 	x86settm
+ 25c:	00008028 	x86clrtm
+ 260:	00580420 	x86settag   	\$zero, 0x1, 0x1
+ 264:	00370411 	armadd.w    	\$zero, \$ra, 0x1
+ 268:	00378411 	armsub.w    	\$zero, \$ra, 0x1
+ 26c:	00380411 	armadc.w    	\$zero, \$ra, 0x1
+ 270:	00388411 	armsbc.w    	\$zero, \$ra, 0x1
+ 274:	00390411 	armand.w    	\$zero, \$ra, 0x1
+ 278:	00398411 	armor.w     	\$zero, \$ra, 0x1
+ 27c:	003a0411 	armxor.w    	\$zero, \$ra, 0x1
+ 280:	003fc41c 	armnot.w    	\$zero, 0x1
+ 284:	003a8411 	armsll.w    	\$zero, \$ra, 0x1
+ 288:	003b0411 	armsrl.w    	\$zero, \$ra, 0x1
+ 28c:	003b8411 	armsra.w    	\$zero, \$ra, 0x1
+ 290:	003c0411 	armrotr.w   	\$zero, \$ra, 0x1
+ 294:	003c8411 	armslli.w   	\$zero, 0x1, 0x1
+ 298:	003d0411 	armsrli.w   	\$zero, 0x1, 0x1
+ 29c:	003d8411 	armsrai.w   	\$zero, 0x1, 0x1
+ 2a0:	003e0411 	armrotri.w  	\$zero, 0x1, 0x1
+ 2a4:	003fc41f 	armrrx.w    	\$zero, 0x1
+ 2a8:	00364420 	armmove     	\$zero, \$ra, 0x1
+ 2ac:	003fc41d 	armmov.w    	\$zero, 0x1
+ 2b0:	003fc41e 	armmov.d    	\$zero, 0x1
+ 2b4:	005c0440 	armmfflag   	\$zero, 0x1
+ 2b8:	005c0460 	armmtflag   	\$zero, 0x1
+ 2bc:	0036c400 	setarmj     	\$zero, 0x1
diff --git a/gas/testsuite/gas/loongarch/insn_lbt.s b/gas/testsuite/gas/loongarch/insn_lbt.s
new file mode 100644
index 00000000000..e49453c0dfc
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/insn_lbt.s
@@ -0,0 +1,176 @@ 
+movgr2scr	$scr0, $r1
+movscr2gr	$r0, $scr1
+jiscr0	100
+jiscr1	100
+addu12i.w	$r0, $r1, 1
+addu12i.d	$r0, $r1, 1
+adc.b	$r0, $r1, $r2
+adc.h	$r0, $r1, $r2
+adc.w	$r0, $r1, $r2
+adc.d	$r0, $r1, $r2
+sbc.b	$r0, $r1, $r2
+sbc.h	$r0, $r1, $r2
+sbc.w	$r0, $r1, $r2
+sbc.d	$r0, $r1, $r2
+rotr.b	$r0, $r1, $r2
+rotr.h	$r0, $r1, $r2
+rotri.b	$r0, $r1, 1
+rotri.h	$r0, $r1, 1
+rcr.b	$r0, $r1, $r2
+rcr.h	$r0, $r1, $r2
+rcr.w	$r0, $r1, $r2
+rcr.d	$r0, $r1, $r2
+rcri.b	$r0, $r1, 1
+rcri.h	$r0, $r1, 1
+rcri.w	$r0, $r1, 1
+rcri.d	$r0, $r1, 1
+fcvt.ud.d	$f0, $f1
+fcvt.ld.d	$f0, $f1
+fcvt.d.ld	$f0, $f1, $f2
+ldl.d	$r0, $r1, 1
+ldl.w	$r0, $r1, 1
+ldr.w	$r0, $r1, 1
+ldr.d	$r0, $r1, 1
+stl.w	$r0, $r1, 1
+stl.d	$r0, $r1, 1
+str.w	$r0, $r1, 1
+str.d	$r0, $r1, 1
+x86adc.b	$r0, $r1
+x86adc.h	$r0, $r1
+x86adc.w	$r0, $r1
+x86adc.d	$r0, $r1
+x86add.b	$r0, $r1
+x86add.h	$r0, $r1
+x86add.w	$r0, $r1
+x86add.d	$r0, $r1
+x86add.wu	$r0, $r1
+x86add.du	$r0, $r1
+x86inc.b	$r0
+x86inc.h	$r0
+x86inc.w	$r0
+x86inc.d	$r0
+x86sbc.b	$r0, $r1
+x86sbc.h	$r0, $r1
+x86sbc.w	$r0, $r1
+x86sbc.d	$r0, $r1
+x86sub.b	$r0, $r1
+x86sub.h	$r0, $r1
+x86sub.w	$r0, $r1
+x86sub.d	$r0, $r1
+x86sub.wu	$r0, $r1
+x86sub.du	$r0, $r1
+x86dec.b	$r0
+x86dec.h	$r0
+x86dec.w	$r0
+x86dec.d	$r0
+x86and.b	$r0, $r1
+x86and.h	$r0, $r1
+x86and.w	$r0, $r1
+x86and.d	$r0, $r1
+x86or.b	$r0, $r1
+x86or.h	$r0, $r1
+x86or.w	$r0, $r1
+x86or.d	$r0, $r1
+x86xor.b	$r0, $r1
+x86xor.h	$r0, $r1
+x86xor.w	$r0, $r1
+x86xor.d	$r0, $r1
+x86mul.b	$r0, $r1
+x86mul.h	$r0, $r1
+x86mul.w	$r0, $r1
+x86mul.d	$r0, $r1
+x86mul.bu	$r0, $r1
+x86mul.hu	$r0, $r1
+x86mul.wu	$r0, $r1
+x86mul.du	$r0, $r1
+x86rcl.b	$r0, $r1
+x86rcl.h	$r0, $r1
+x86rcl.w	$r0, $r1
+x86rcl.d	$r0, $r1
+x86rcli.b	$r0, 1
+x86rcli.h	$r0, 1
+x86rcli.w	$r0, 1
+x86rcli.d	$r0, 1
+x86rcr.b	$r0, $r1
+x86rcr.h	$r0, $r1
+x86rcr.w	$r0, $r1
+x86rcr.d	$r0, $r1
+x86rcri.b	$r0, 1
+x86rcri.h	$r0, 1
+x86rcri.w	$r0, 1
+x86rcri.d	$r0, 1
+x86rotl.b	$r0, $r1
+x86rotl.h	$r0, $r1
+x86rotl.w	$r0, $r1
+x86rotl.d	$r0, $r1
+x86rotli.b	$r0, 1
+x86rotli.h	$r0, 1
+x86rotli.w	$r0, 1
+x86rotli.d	$r0, 1
+x86rotr.b	$r0, $r1
+x86rotr.h	$r0, $r1
+x86rotr.d	$r0, $r1
+x86rotr.w	$r0, $r1
+x86rotri.b	$r0, 1
+x86rotri.h	$r0, 1
+x86rotri.w	$r0, 1
+x86rotri.d	$r0, 1
+x86sll.b	$r0, $r1
+x86sll.h	$r0, $r1
+x86sll.w	$r0, $r1
+x86sll.d	$r0, $r1
+x86slli.b	$r0, 1
+x86slli.h	$r0, 1
+x86slli.w	$r0, 1
+x86slli.d	$r0, 1
+x86srl.b	$r0, $r1
+x86srl.h	$r0, $r1
+x86srl.w	$r0, $r1
+x86srl.d	$r0, $r1
+x86srli.b	$r0, 1
+x86srli.h	$r0, 1
+x86srli.w	$r0, 1
+x86srli.d	$r0, 1
+x86sra.b	$r0, $r1
+x86sra.h	$r0, $r1
+x86sra.w	$r0, $r1
+x86sra.d	$r0, $r1
+x86srai.b	$r0, 1
+x86srai.h	$r0, 1
+x86srai.w	$r0, 1
+x86srai.d	$r0, 1
+setx86j	$r0, 1
+setx86loope	$r0, $r1
+setx86loopne	$r0, $r1
+x86mfflag	$r0, 1
+x86mtflag	$r0, 1
+x86mftop	$r0
+x86mttop	1
+x86inctop
+x86dectop
+x86settm
+x86clrtm
+x86settag	$r0, 1, 1
+armadd.w	$r0, $r1, 1
+armsub.w	$r0, $r1, 1
+armadc.w	$r0, $r1, 1
+armsbc.w	$r0, $r1, 1
+armand.w	$r0, $r1, 1
+armor.w	$r0, $r1, 1
+armxor.w	$r0, $r1, 1
+armnot.w	$r0, 1
+armsll.w	$r0, $r1, 1
+armsrl.w	$r0, $r1, 1
+armsra.w	$r0, $r1, 1
+armrotr.w	$r0, $r1, 1
+armslli.w	$r0, 1, 1
+armsrli.w	$r0, 1, 1
+armsrai.w	$r0, 1, 1
+armrotri.w	$r0, 1, 1
+armrrx.w	$r0, 1
+armmove	$r0, $r1, 1
+armmov.w	$r0, 1
+armmov.d	$r0, 1
+armmfflag	$r0, 1
+armmtflag	$r0, 1
+setarmj	$r0, 1
diff --git a/gas/testsuite/gas/loongarch/insn_lvz.d b/gas/testsuite/gas/loongarch/insn_lvz.d
new file mode 100644
index 00000000000..547091ed3b3
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/insn_lvz.d
@@ -0,0 +1,15 @@ 
+#as:
+#objdump: -d
+#skip: loongarch32-*-*
+
+.*:     file format .*
+
+
+Disassembly of section .text:
+
+0+ <.*>:
+   0:	05000400 	gcsrrd      	\$zero, 0x1
+   4:	05000420 	gcsrwr      	\$zero, 0x1
+   8:	05000483 	gcsrxchg    	\$sp, \$a0, 0x1
+   c:	06482401 	gtlbflush
+  10:	002b8001 	hvcl        	0x1
diff --git a/gas/testsuite/gas/loongarch/insn_lvz.s b/gas/testsuite/gas/loongarch/insn_lvz.s
new file mode 100644
index 00000000000..1b1a594064d
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/insn_lvz.s
@@ -0,0 +1,5 @@ 
+gcsrrd	  $r0, 1
+gcsrwr	  $r0, 1
+gcsrxchg  $r3, $r4, 1
+gtlbflush
+hvcl	  1