diff mbox series

[v2] RISC-V: Support Zabha extension.

Message ID 20240228082717.2502128-1-jiawei@iscas.ac.cn
State New
Headers
Series [v2] RISC-V: Support Zabha extension. |

Checks

Context Check Description
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linaro-tcwg-bot/tcwg_binutils_build--master-aarch64 success Testing passed
linaro-tcwg-bot/tcwg_binutils_check--master-aarch64 success Testing passed
linaro-tcwg-bot/tcwg_binutils_check--master-arm success Testing passed

Commit Message

Jiawei Feb. 28, 2024, 8:27 a.m. UTC 
  The Zabha extension[1] supports for byte and halfword
atomic memory operations. This patch add all instructions
include in Zabha. Further work is waiting Zacas[2] merge.

[1] https://github.com/riscv/riscv-zabha/tags
[2] https://sourceware.org/pipermail/binutils/2023-May/127700.html

Version log:
Add new imply relation that Zabha extension implies A extension.

bfd/ChangeLog:

        * elfxx-riscv.c (riscv_implicit_subsets): New imply.
        (riscv_multi_subset_supports): New extension.
        (riscv_multi_subset_supports_ext): Ditto.

gas/ChangeLog:

        * testsuite/gas/riscv/zabha-32.d: New test.
        * testsuite/gas/riscv/zabha.d: New test.
        * testsuite/gas/riscv/zabha.s: New test.

include/ChangeLog:

        * opcode/riscv-opc.h (MATCH_AMOADD_B): New opcodes.
        (MASK_AMOADD_B): Ditto.
        (MATCH_AMOXOR_B): Ditto.
        (MASK_AMOXOR_B): Ditto.
        (MATCH_AMOOR_B): Ditto.
        (MASK_AMOOR_B): Ditto.
        (MATCH_AMOAND_B): Ditto.
        (MASK_AMOAND_B): Ditto.
        (MATCH_AMOMIN_B): Ditto.
        (MASK_AMOMIN_B): Ditto.
        (MATCH_AMOMAX_B): Ditto.
        (MASK_AMOMAX_B): Ditto.
        (MATCH_AMOMINU_B): Ditto.
        (MASK_AMOMINU_B): Ditto.
        (MATCH_AMOMAXU_B): Ditto.
        (MASK_AMOMAXU_B): Ditto.
        (MATCH_AMOSWAP_B): Ditto.
        (MASK_AMOSWAP_B): Ditto.
        (MATCH_AMOADD_H): Ditto.
        (MASK_AMOADD_H): Ditto.
        (MATCH_AMOXOR_H): Ditto.
        (MASK_AMOXOR_H): Ditto.
        (MATCH_AMOOR_H): Ditto.
        (MASK_AMOOR_H): Ditto.
        (MATCH_AMOAND_H): Ditto.
        (MASK_AMOAND_H): Ditto.
        (MATCH_AMOMIN_H): Ditto.
        (MASK_AMOMIN_H): Ditto.
        (MATCH_AMOMAX_H): Ditto.
        (MASK_AMOMAX_H): Ditto.
        (MATCH_AMOMINU_H): Ditto.
        (MASK_AMOMINU_H): Ditto.
        (MATCH_AMOMAXU_H): Ditto.
        (MASK_AMOMAXU_H): Ditto.
        (MATCH_AMOSWAP_H): Ditto.
        (MASK_AMOSWAP_H): Ditto.
        (DECLARE_INSN): New declare.
        * opcode/riscv.h (enum riscv_insn_class): New class.

opcodes/ChangeLog:

        * riscv-opc.c: New instructions.

---
 bfd/elfxx-riscv.c                  |  6 +++
 gas/testsuite/gas/riscv/zabha-32.d | 81 ++++++++++++++++++++++++++++++
 gas/testsuite/gas/riscv/zabha.d    | 81 ++++++++++++++++++++++++++++++
 gas/testsuite/gas/riscv/zabha.s    | 73 +++++++++++++++++++++++++++
 include/opcode/riscv-opc.h         | 54 ++++++++++++++++++++
 include/opcode/riscv.h             |  1 +
 opcodes/riscv-opc.c                | 74 +++++++++++++++++++++++++++
 7 files changed, 370 insertions(+)
 create mode 100644 gas/testsuite/gas/riscv/zabha-32.d
 create mode 100644 gas/testsuite/gas/riscv/zabha.d
 create mode 100644 gas/testsuite/gas/riscv/zabha.s

Comments

Nelson Chu March 7, 2024, 2:48 a.m. UTC | #1 
Looks good, thanks.  So should we commit this first?  or should wait until
zacas committed?

Thanks
Nelson

On Wed, Feb 28, 2024 at 4:28 PM Jiawei <jiawei@iscas.ac.cn> wrote:

> The Zabha extension[1] supports for byte and halfword
> atomic memory operations. This patch add all instructions
> include in Zabha. Further work is waiting Zacas[2] merge.
>
> [1] https://github.com/riscv/riscv-zabha/tags
> [2] https://sourceware.org/pipermail/binutils/2023-May/127700.html
>
> Version log:
> Add new imply relation that Zabha extension implies A extension.
>
> bfd/ChangeLog:
>
>         * elfxx-riscv.c (riscv_implicit_subsets): New imply.
>         (riscv_multi_subset_supports): New extension.
>         (riscv_multi_subset_supports_ext): Ditto.
>
> gas/ChangeLog:
>
>         * testsuite/gas/riscv/zabha-32.d: New test.
>         * testsuite/gas/riscv/zabha.d: New test.
>         * testsuite/gas/riscv/zabha.s: New test.
>
> include/ChangeLog:
>
>         * opcode/riscv-opc.h (MATCH_AMOADD_B): New opcodes.
>         (MASK_AMOADD_B): Ditto.
>         (MATCH_AMOXOR_B): Ditto.
>         (MASK_AMOXOR_B): Ditto.
>         (MATCH_AMOOR_B): Ditto.
>         (MASK_AMOOR_B): Ditto.
>         (MATCH_AMOAND_B): Ditto.
>         (MASK_AMOAND_B): Ditto.
>         (MATCH_AMOMIN_B): Ditto.
>         (MASK_AMOMIN_B): Ditto.
>         (MATCH_AMOMAX_B): Ditto.
>         (MASK_AMOMAX_B): Ditto.
>         (MATCH_AMOMINU_B): Ditto.
>         (MASK_AMOMINU_B): Ditto.
>         (MATCH_AMOMAXU_B): Ditto.
>         (MASK_AMOMAXU_B): Ditto.
>         (MATCH_AMOSWAP_B): Ditto.
>         (MASK_AMOSWAP_B): Ditto.
>         (MATCH_AMOADD_H): Ditto.
>         (MASK_AMOADD_H): Ditto.
>         (MATCH_AMOXOR_H): Ditto.
>         (MASK_AMOXOR_H): Ditto.
>         (MATCH_AMOOR_H): Ditto.
>         (MASK_AMOOR_H): Ditto.
>         (MATCH_AMOAND_H): Ditto.
>         (MASK_AMOAND_H): Ditto.
>         (MATCH_AMOMIN_H): Ditto.
>         (MASK_AMOMIN_H): Ditto.
>         (MATCH_AMOMAX_H): Ditto.
>         (MASK_AMOMAX_H): Ditto.
>         (MATCH_AMOMINU_H): Ditto.
>         (MASK_AMOMINU_H): Ditto.
>         (MATCH_AMOMAXU_H): Ditto.
>         (MASK_AMOMAXU_H): Ditto.
>         (MATCH_AMOSWAP_H): Ditto.
>         (MASK_AMOSWAP_H): Ditto.
>         (DECLARE_INSN): New declare.
>         * opcode/riscv.h (enum riscv_insn_class): New class.
>
> opcodes/ChangeLog:
>
>         * riscv-opc.c: New instructions.
>
> ---
>  bfd/elfxx-riscv.c                  |  6 +++
>  gas/testsuite/gas/riscv/zabha-32.d | 81 ++++++++++++++++++++++++++++++
>  gas/testsuite/gas/riscv/zabha.d    | 81 ++++++++++++++++++++++++++++++
>  gas/testsuite/gas/riscv/zabha.s    | 73 +++++++++++++++++++++++++++
>  include/opcode/riscv-opc.h         | 54 ++++++++++++++++++++
>  include/opcode/riscv.h             |  1 +
>  opcodes/riscv-opc.c                | 74 +++++++++++++++++++++++++++
>  7 files changed, 370 insertions(+)
>  create mode 100644 gas/testsuite/gas/riscv/zabha-32.d
>  create mode 100644 gas/testsuite/gas/riscv/zabha.d
>  create mode 100644 gas/testsuite/gas/riscv/zabha.s
>
> diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
> index 9a121b47121..47966f27565 100644
> --- a/bfd/elfxx-riscv.c
> +++ b/bfd/elfxx-riscv.c
> @@ -1118,6 +1118,7 @@ static struct riscv_implicit_subset
> riscv_implicit_subsets[] =
>    {"v", "d",           check_implicit_always},
>    {"v", "zve64d",      check_implicit_always},
>    {"v", "zvl128b",     check_implicit_always},
> +  {"zabha", "a",       check_implicit_always},
>    {"zvfh", "zvfhmin",  check_implicit_always},
>    {"zvfh", "zfhmin",   check_implicit_always},
>    {"zvfhmin", "zve32f",        check_implicit_always},
> @@ -1274,6 +1275,7 @@ static struct riscv_supported_ext
> riscv_supported_std_z_ext[] =
>    {"zihintpause",      ISA_SPEC_CLASS_DRAFT,           2, 0,  0 },
>    {"zihpm",            ISA_SPEC_CLASS_DRAFT,           2, 0,  0 },
>    {"zmmul",            ISA_SPEC_CLASS_DRAFT,           1, 0,  0 },
> +  {"zabha",            ISA_SPEC_CLASS_DRAFT,           1, 0,  0 },
>    {"zawrs",            ISA_SPEC_CLASS_DRAFT,           1, 0,  0 },
>    {"zfa",              ISA_SPEC_CLASS_DRAFT,           1, 0,  0 },
>    {"zfh",              ISA_SPEC_CLASS_DRAFT,           1, 0,  0 },
> @@ -2437,6 +2439,8 @@ riscv_multi_subset_supports (riscv_parse_subset_t
> *rps,
>        return riscv_subset_supports (rps, "zmmul");
>      case INSN_CLASS_A:
>        return riscv_subset_supports (rps, "a");
> +    case INSN_CLASS_ZABHA:
> +      return riscv_subset_supports (rps, "zabha");
>      case INSN_CLASS_ZAWRS:
>        return riscv_subset_supports (rps, "zawrs");
>      case INSN_CLASS_F:
> @@ -2659,6 +2663,8 @@ riscv_multi_subset_supports_ext
> (riscv_parse_subset_t *rps,
>        return _ ("m' or `zmmul");
>      case INSN_CLASS_A:
>        return "a";
> +    case INSN_CLASS_ZABHA:
> +      return "zabha";
>      case INSN_CLASS_ZAWRS:
>        return "zawrs";
>      case INSN_CLASS_F:
> diff --git a/gas/testsuite/gas/riscv/zabha-32.d
> b/gas/testsuite/gas/riscv/zabha-32.d
> new file mode 100644
> index 00000000000..1e6427ea752
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/zabha-32.d
> @@ -0,0 +1,81 @@
> +#as: -march=rv32i_zabha
> +#source: zabha.s
> +#objdump: -d -Mno-aliases
> +
> +.*:[   ]+file format .*
> +
> +Disassembly of section .text:
> +
> +0+000 <target>:
> +[      ]+[0-9a-f]+:[   ]+00a5052f[     ]+amoadd.b[     ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+08a5052f[     ]+amoswap.b[    ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+60a5052f[     ]+amoand.b[     ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+40a5052f[     ]+amoor.b[      ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+20a5052f[     ]+amoxor.b[     ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+a0a5052f[     ]+amomax.b[     ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+e0a5052f[     ]+amomaxu.b[    ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+80a5052f[     ]+amomin.b[     ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+c0a5052f[     ]+amominu.b[    ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+04a5052f[     ]+amoadd.b.aq[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+0ca5052f[     ]+amoswap.b.aq[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+64a5052f[     ]+amoand.b.aq[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+44a5052f[     ]+amoor.b.aq[   ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+24a5052f[     ]+amoxor.b.aq[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+a4a5052f[     ]+amomax.b.aq[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+e4a5052f[     ]+amomaxu.b.aq[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+84a5052f[     ]+amomin.b.aq[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+c4a5052f[     ]+amominu.b.aq[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+02a5052f[     ]+amoadd.b.rl[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+0aa5052f[     ]+amoswap.b.rl[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+62a5052f[     ]+amoand.b.rl[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+42a5052f[     ]+amoor.b.rl[   ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+22a5052f[     ]+amoxor.b.rl[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+a2a5052f[     ]+amomax.b.rl[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+e2a5052f[     ]+amomaxu.b.rl[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+82a5052f[     ]+amomin.b.rl[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+c2a5052f[     ]+amominu.b.rl[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+06a5052f[     ]+amoadd.b.aqrl[
> ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+0ea5052f[     ]+amoswap.b.aqrl[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+66a5052f[     ]+amoand.b.aqrl[
> ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+46a5052f[     ]+amoor.b.aqrl[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+26a5052f[     ]+amoxor.b.aqrl[
> ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+a6a5052f[     ]+amomax.b.aqrl[
> ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+e6a5052f[     ]+amomaxu.b.aqrl[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+86a5052f[     ]+amomin.b.aqrl[
> ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+c6a5052f[     ]+amominu.b.aqrl[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+00a5152f[     ]+amoadd.h[     ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+08a5152f[     ]+amoswap.h[    ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+60a5152f[     ]+amoand.h[     ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+40a5152f[     ]+amoor.h[      ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+20a5152f[     ]+amoxor.h[     ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+a0a5152f[     ]+amomax.h[     ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+e0a5152f[     ]+amomaxu.h[    ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+80a5152f[     ]+amomin.h[     ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+c0a5152f[     ]+amominu.h[    ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+04a5152f[     ]+amoadd.h.aq[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+0ca5152f[     ]+amoswap.h.aq[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+64a5152f[     ]+amoand.h.aq[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+44a5152f[     ]+amoor.h.aq[   ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+24a5152f[     ]+amoxor.h.aq[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+a4a5152f[     ]+amomax.h.aq[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+e4a5152f[     ]+amomaxu.h.aq[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+84a5152f[     ]+amomin.h.aq[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+c4a5152f[     ]+amominu.h.aq[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+02a5152f[     ]+amoadd.h.rl[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+0aa5152f[     ]+amoswap.h.rl[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+62a5152f[     ]+amoand.h.rl[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+42a5152f[     ]+amoor.h.rl[   ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+22a5152f[     ]+amoxor.h.rl[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+a2a5152f[     ]+amomax.h.rl[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+e2a5152f[     ]+amomaxu.h.rl[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+82a5152f[     ]+amomin.h.rl[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+c2a5152f[     ]+amominu.h.rl[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+06a5152f[     ]+amoadd.h.aqrl[
> ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+0ea5152f[     ]+amoswap.h.aqrl[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+66a5152f[     ]+amoand.h.aqrl[
> ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+46a5152f[     ]+amoor.h.aqrl[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+26a5152f[     ]+amoxor.h.aqrl[
> ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+a6a5152f[     ]+amomax.h.aqrl[
> ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+e6a5152f[     ]+amomaxu.h.aqrl[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+86a5152f[     ]+amomin.h.aqrl[
> ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+c6a5152f[     ]+amominu.h.aqrl[
>  ]+a0,a0,\(a0\)
> diff --git a/gas/testsuite/gas/riscv/zabha.d
> b/gas/testsuite/gas/riscv/zabha.d
> new file mode 100644
> index 00000000000..7000452b6d1
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/zabha.d
> @@ -0,0 +1,81 @@
> +#as: -march=rv64i_zabha
> +#source: zabha.s
> +#objdump: -d -Mno-aliases
> +
> +.*:[   ]+file format .*
> +
> +Disassembly of section .text:
> +
> +0+000 <target>:
> +[      ]+[0-9a-f]+:[   ]+00a5052f[     ]+amoadd.b[     ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+08a5052f[     ]+amoswap.b[    ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+60a5052f[     ]+amoand.b[     ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+40a5052f[     ]+amoor.b[      ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+20a5052f[     ]+amoxor.b[     ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+a0a5052f[     ]+amomax.b[     ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+e0a5052f[     ]+amomaxu.b[    ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+80a5052f[     ]+amomin.b[     ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+c0a5052f[     ]+amominu.b[    ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+04a5052f[     ]+amoadd.b.aq[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+0ca5052f[     ]+amoswap.b.aq[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+64a5052f[     ]+amoand.b.aq[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+44a5052f[     ]+amoor.b.aq[   ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+24a5052f[     ]+amoxor.b.aq[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+a4a5052f[     ]+amomax.b.aq[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+e4a5052f[     ]+amomaxu.b.aq[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+84a5052f[     ]+amomin.b.aq[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+c4a5052f[     ]+amominu.b.aq[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+02a5052f[     ]+amoadd.b.rl[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+0aa5052f[     ]+amoswap.b.rl[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+62a5052f[     ]+amoand.b.rl[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+42a5052f[     ]+amoor.b.rl[   ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+22a5052f[     ]+amoxor.b.rl[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+a2a5052f[     ]+amomax.b.rl[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+e2a5052f[     ]+amomaxu.b.rl[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+82a5052f[     ]+amomin.b.rl[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+c2a5052f[     ]+amominu.b.rl[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+06a5052f[     ]+amoadd.b.aqrl[
> ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+0ea5052f[     ]+amoswap.b.aqrl[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+66a5052f[     ]+amoand.b.aqrl[
> ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+46a5052f[     ]+amoor.b.aqrl[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+26a5052f[     ]+amoxor.b.aqrl[
> ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+a6a5052f[     ]+amomax.b.aqrl[
> ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+e6a5052f[     ]+amomaxu.b.aqrl[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+86a5052f[     ]+amomin.b.aqrl[
> ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+c6a5052f[     ]+amominu.b.aqrl[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+00a5152f[     ]+amoadd.h[     ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+08a5152f[     ]+amoswap.h[    ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+60a5152f[     ]+amoand.h[     ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+40a5152f[     ]+amoor.h[      ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+20a5152f[     ]+amoxor.h[     ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+a0a5152f[     ]+amomax.h[     ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+e0a5152f[     ]+amomaxu.h[    ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+80a5152f[     ]+amomin.h[     ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+c0a5152f[     ]+amominu.h[    ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+04a5152f[     ]+amoadd.h.aq[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+0ca5152f[     ]+amoswap.h.aq[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+64a5152f[     ]+amoand.h.aq[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+44a5152f[     ]+amoor.h.aq[   ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+24a5152f[     ]+amoxor.h.aq[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+a4a5152f[     ]+amomax.h.aq[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+e4a5152f[     ]+amomaxu.h.aq[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+84a5152f[     ]+amomin.h.aq[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+c4a5152f[     ]+amominu.h.aq[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+02a5152f[     ]+amoadd.h.rl[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+0aa5152f[     ]+amoswap.h.rl[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+62a5152f[     ]+amoand.h.rl[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+42a5152f[     ]+amoor.h.rl[   ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+22a5152f[     ]+amoxor.h.rl[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+a2a5152f[     ]+amomax.h.rl[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+e2a5152f[     ]+amomaxu.h.rl[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+82a5152f[     ]+amomin.h.rl[  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+c2a5152f[     ]+amominu.h.rl[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+06a5152f[     ]+amoadd.h.aqrl[
> ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+0ea5152f[     ]+amoswap.h.aqrl[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+66a5152f[     ]+amoand.h.aqrl[
> ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+46a5152f[     ]+amoor.h.aqrl[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+26a5152f[     ]+amoxor.h.aqrl[
> ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+a6a5152f[     ]+amomax.h.aqrl[
> ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+e6a5152f[     ]+amomaxu.h.aqrl[
>  ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+86a5152f[     ]+amomin.h.aqrl[
> ]+a0,a0,\(a0\)
> +[      ]+[0-9a-f]+:[   ]+c6a5152f[     ]+amominu.h.aqrl[
>  ]+a0,a0,\(a0\)
> diff --git a/gas/testsuite/gas/riscv/zabha.s
> b/gas/testsuite/gas/riscv/zabha.s
> new file mode 100644
> index 00000000000..77ecee8efba
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/zabha.s
> @@ -0,0 +1,73 @@
> +target:
> +       amoadd.b        a0, a0, 0(a0)
> +       amoswap.b       a0, a0, 0(a0)
> +       amoand.b        a0, a0, 0(a0)
> +       amoor.b a0, a0, 0(a0)
> +       amoxor.b        a0, a0, 0(a0)
> +       amomax.b        a0, a0, 0(a0)
> +       amomaxu.b       a0, a0, 0(a0)
> +       amomin.b        a0, a0, 0(a0)
> +       amominu.b       a0, a0, 0(a0)
> +       amoadd.b.aq     a0, a0, 0(a0)
> +       amoswap.b.aq    a0, a0, 0(a0)
> +       amoand.b.aq     a0, a0, 0(a0)
> +       amoor.b.aq      a0, a0, 0(a0)
> +       amoxor.b.aq     a0, a0, 0(a0)
> +       amomax.b.aq     a0, a0, 0(a0)
> +       amomaxu.b.aq    a0, a0, 0(a0)
> +       amomin.b.aq     a0, a0, 0(a0)
> +       amominu.b.aq    a0, a0, 0(a0)
> +       amoadd.b.rl     a0, a0, 0(a0)
> +       amoswap.b.rl    a0, a0, 0(a0)
> +       amoand.b.rl     a0, a0, 0(a0)
> +       amoor.b.rl      a0, a0, 0(a0)
> +       amoxor.b.rl     a0, a0, 0(a0)
> +       amomax.b.rl     a0, a0, 0(a0)
> +       amomaxu.b.rl    a0, a0, 0(a0)
> +       amomin.b.rl     a0, a0, 0(a0)
> +       amominu.b.rl    a0, a0, 0(a0)
> +       amoadd.b.aqrl   a0, a0, 0(a0)
> +       amoswap.b.aqrl  a0, a0, 0(a0)
> +       amoand.b.aqrl   a0, a0, 0(a0)
> +       amoor.b.aqrl    a0, a0, 0(a0)
> +       amoxor.b.aqrl   a0, a0, 0(a0)
> +       amomax.b.aqrl   a0, a0, 0(a0)
> +       amomaxu.b.aqrl  a0, a0, 0(a0)
> +       amomin.b.aqrl   a0, a0, 0(a0)
> +       amominu.b.aqrl  a0, a0, 0(a0)
> +       amoadd.h        a0, a0, 0(a0)
> +       amoswap.h       a0, a0, 0(a0)
> +       amoand.h        a0, a0, 0(a0)
> +       amoor.h a0, a0, 0(a0)
> +       amoxor.h        a0, a0, 0(a0)
> +       amomax.h        a0, a0, 0(a0)
> +       amomaxu.h       a0, a0, 0(a0)
> +       amomin.h        a0, a0, 0(a0)
> +       amominu.h       a0, a0, 0(a0)
> +       amoadd.h.aq     a0, a0, 0(a0)
> +       amoswap.h.aq    a0, a0, 0(a0)
> +       amoand.h.aq     a0, a0, 0(a0)
> +       amoor.h.aq      a0, a0, 0(a0)
> +       amoxor.h.aq     a0, a0, 0(a0)
> +       amomax.h.aq     a0, a0, 0(a0)
> +       amomaxu.h.aq    a0, a0, 0(a0)
> +       amomin.h.aq     a0, a0, 0(a0)
> +       amominu.h.aq    a0, a0, 0(a0)
> +       amoadd.h.rl     a0, a0, 0(a0)
> +       amoswap.h.rl    a0, a0, 0(a0)
> +       amoand.h.rl     a0, a0, 0(a0)
> +       amoor.h.rl      a0, a0, 0(a0)
> +       amoxor.h.rl     a0, a0, 0(a0)
> +       amomax.h.rl     a0, a0, 0(a0)
> +       amomaxu.h.rl    a0, a0, 0(a0)
> +       amomin.h.rl     a0, a0, 0(a0)
> +       amominu.h.rl    a0, a0, 0(a0)
> +       amoadd.h.aqrl   a0, a0, 0(a0)
> +       amoswap.h.aqrl  a0, a0, 0(a0)
> +       amoand.h.aqrl   a0, a0, 0(a0)
> +       amoor.h.aqrl    a0, a0, 0(a0)
> +       amoxor.h.aqrl   a0, a0, 0(a0)
> +       amomax.h.aqrl   a0, a0, 0(a0)
> +       amomaxu.h.aqrl  a0, a0, 0(a0)
> +       amomin.h.aqrl   a0, a0, 0(a0)
> +       amominu.h.aqrl  a0, a0, 0(a0)
> diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
> index e77b49a6298..587d81b5e3c 100644
> --- a/include/opcode/riscv-opc.h
> +++ b/include/opcode/riscv-opc.h
> @@ -235,6 +235,42 @@
>  #define MASK_LR_D  0xf9f0707f
>  #define MATCH_SC_D 0x1800302f
>  #define MASK_SC_D  0xf800707f
> +#define MATCH_AMOADD_B 0x02f
> +#define MASK_AMOADD_B  0xf800707f
> +#define MATCH_AMOXOR_B 0x2000002f
> +#define MASK_AMOXOR_B  0xf800707f
> +#define MATCH_AMOOR_B 0x4000002f
> +#define MASK_AMOOR_B  0xf800707f
> +#define MATCH_AMOAND_B 0x6000002f
> +#define MASK_AMOAND_B  0xf800707f
> +#define MATCH_AMOMIN_B 0x8000002f
> +#define MASK_AMOMIN_B  0xf800707f
> +#define MATCH_AMOMAX_B 0xa000002f
> +#define MASK_AMOMAX_B  0xf800707f
> +#define MATCH_AMOMINU_B 0xc000002f
> +#define MASK_AMOMINU_B  0xf800707f
> +#define MATCH_AMOMAXU_B 0xe000002f
> +#define MASK_AMOMAXU_B  0xf800707f
> +#define MATCH_AMOSWAP_B 0x800002f
> +#define MASK_AMOSWAP_B  0xf800707f
> +#define MATCH_AMOADD_H 0x102f
> +#define MASK_AMOADD_H  0xf800707f
> +#define MATCH_AMOXOR_H 0x2000102f
> +#define MASK_AMOXOR_H  0xf800707f
> +#define MATCH_AMOOR_H 0x4000102f
> +#define MASK_AMOOR_H  0xf800707f
> +#define MATCH_AMOAND_H 0x6000102f
> +#define MASK_AMOAND_H  0xf800707f
> +#define MATCH_AMOMIN_H 0x8000102f
> +#define MASK_AMOMIN_H  0xf800707f
> +#define MATCH_AMOMAX_H 0xa000102f
> +#define MASK_AMOMAX_H  0xf800707f
> +#define MATCH_AMOMINU_H 0xc000102f
> +#define MASK_AMOMINU_H  0xf800707f
> +#define MATCH_AMOMAXU_H 0xe000102f
> +#define MASK_AMOMAXU_H  0xf800707f
> +#define MATCH_AMOSWAP_H 0x800102f
> +#define MASK_AMOSWAP_H  0xf800707f
>  #define MATCH_ECALL 0x73
>  #define MASK_ECALL  0xffffffff
>  #define MATCH_EBREAK 0x100073
> @@ -3581,6 +3617,24 @@ DECLARE_INSN(amomaxu_d, MATCH_AMOMAXU_D,
> MASK_AMOMAXU_D)
>  DECLARE_INSN(amoswap_d, MATCH_AMOSWAP_D, MASK_AMOSWAP_D)
>  DECLARE_INSN(lr_d, MATCH_LR_D, MASK_LR_D)
>  DECLARE_INSN(sc_d, MATCH_SC_D, MASK_SC_D)
> +DECLARE_INSN(amoadd_b, MATCH_AMOADD_B, MASK_AMOADD_B)
> +DECLARE_INSN(amoxor_b, MATCH_AMOXOR_B, MASK_AMOXOR_B)
> +DECLARE_INSN(amoor_b, MATCH_AMOOR_B, MASK_AMOOR_B)
> +DECLARE_INSN(amoand_b, MATCH_AMOAND_B, MASK_AMOAND_B)
> +DECLARE_INSN(amomin_b, MATCH_AMOMIN_B, MASK_AMOMIN_B)
> +DECLARE_INSN(amomax_b, MATCH_AMOMAX_B, MASK_AMOMAX_B)
> +DECLARE_INSN(amominu_b, MATCH_AMOMINU_B, MASK_AMOMINU_B)
> +DECLARE_INSN(amomaxu_b, MATCH_AMOMAXU_B, MASK_AMOMAXU_B)
> +DECLARE_INSN(amoswap_b, MATCH_AMOSWAP_B, MASK_AMOSWAP_B)
> +DECLARE_INSN(amoadd_h, MATCH_AMOADD_H, MASK_AMOADD_H)
> +DECLARE_INSN(amoxor_h, MATCH_AMOXOR_H, MASK_AMOXOR_H)
> +DECLARE_INSN(amoor_h, MATCH_AMOOR_H, MASK_AMOOR_H)
> +DECLARE_INSN(amoand_h, MATCH_AMOAND_H, MASK_AMOAND_H)
> +DECLARE_INSN(amomin_h, MATCH_AMOMIN_H, MASK_AMOMIN_H)
> +DECLARE_INSN(amomax_h, MATCH_AMOMAX_H, MASK_AMOMAX_H)
> +DECLARE_INSN(amominu_h, MATCH_AMOMINU_H, MASK_AMOMINU_H)
> +DECLARE_INSN(amomaxu_h, MATCH_AMOMAXU_H, MASK_AMOMAXU_H)
> +DECLARE_INSN(amoswap_h, MATCH_AMOSWAP_H, MASK_AMOSWAP_H)
>  DECLARE_INSN(ecall, MATCH_ECALL, MASK_ECALL)
>  DECLARE_INSN(ebreak, MATCH_EBREAK, MASK_EBREAK)
>  DECLARE_INSN(uret, MATCH_URET, MASK_URET)
> diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h
> index adea7dbc794..3245873aa6d 100644
> --- a/include/opcode/riscv.h
> +++ b/include/opcode/riscv.h
> @@ -468,6 +468,7 @@ enum riscv_insn_class
>    INSN_CLASS_ZICBOM,
>    INSN_CLASS_ZICBOP,
>    INSN_CLASS_ZICBOZ,
> +  INSN_CLASS_ZABHA,
>    INSN_CLASS_H,
>    INSN_CLASS_XCVMAC,
>    INSN_CLASS_XCVALU,
> diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c
> index fdd05ac75dc..edb8f59249e 100644
> --- a/opcodes/riscv-opc.c
> +++ b/opcodes/riscv-opc.c
> @@ -659,6 +659,80 @@ const struct riscv_opcode riscv_opcodes[] =
>  {"amomin.d.aqrl",  64, INSN_CLASS_A, "d,t,0(s)",
> MATCH_AMOMIN_D|MASK_AQRL, MASK_AMOMIN_D|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_8_BYTE },
>  {"amominu.d.aqrl", 64, INSN_CLASS_A, "d,t,0(s)",
> MATCH_AMOMINU_D|MASK_AQRL, MASK_AMOMINU_D|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_8_BYTE },
>
> +/* Byte and Halfword Atomic Memory Operations instruction subset.  */
> +{"amoadd.b",        0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOADD_B,
> MASK_AMOADD_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
> +{"amoswap.b",       0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOSWAP_B,
> MASK_AMOSWAP_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
> +{"amoand.b",        0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOAND_B,
> MASK_AMOAND_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
> +{"amoor.b",         0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOOR_B,
> MASK_AMOOR_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
> +{"amoxor.b",        0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOXOR_B,
> MASK_AMOXOR_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
> +{"amomax.b",        0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAX_B,
> MASK_AMOMAX_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
> +{"amomaxu.b",       0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAXU_B,
> MASK_AMOMAXU_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
> +{"amomin.b",        0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMIN_B,
> MASK_AMOMIN_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
> +{"amominu.b",       0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMINU_B,
> MASK_AMOMINU_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
> +{"amoadd.b.aq",     0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOADD_B|MASK_AQ, MASK_AMOADD_B|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_1_BYTE },
> +{"amoswap.b.aq",    0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOSWAP_B|MASK_AQ, MASK_AMOSWAP_B|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_1_BYTE },
> +{"amoand.b.aq",     0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOAND_B|MASK_AQ, MASK_AMOAND_B|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_1_BYTE },
> +{"amoor.b.aq",      0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOOR_B|MASK_AQ, MASK_AMOOR_B|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_1_BYTE },
> +{"amoxor.b.aq",     0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOXOR_B|MASK_AQ, MASK_AMOXOR_B|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_1_BYTE },
> +{"amomax.b.aq",     0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOMAX_B|MASK_AQ, MASK_AMOMAX_B|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_1_BYTE },
> +{"amomaxu.b.aq",    0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOMAXU_B|MASK_AQ, MASK_AMOMAXU_B|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_1_BYTE },
> +{"amomin.b.aq",     0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOMIN_B|MASK_AQ, MASK_AMOMIN_B|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_1_BYTE },
> +{"amominu.b.aq",    0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOMINU_B|MASK_AQ, MASK_AMOMINU_B|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_1_BYTE },
> +{"amoadd.b.rl",     0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOADD_B|MASK_RL, MASK_AMOADD_B|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_1_BYTE },
> +{"amoswap.b.rl",    0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOSWAP_B|MASK_RL, MASK_AMOSWAP_B|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_1_BYTE },
> +{"amoand.b.rl",     0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOAND_B|MASK_RL, MASK_AMOAND_B|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_1_BYTE },
> +{"amoor.b.rl",      0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOOR_B|MASK_RL, MASK_AMOOR_B|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_1_BYTE },
> +{"amoxor.b.rl",     0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOXOR_B|MASK_RL, MASK_AMOXOR_B|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_1_BYTE },
> +{"amomax.b.rl",     0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOMAX_B|MASK_RL, MASK_AMOMAX_B|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_1_BYTE },
> +{"amomaxu.b.rl",    0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOMAXU_B|MASK_RL, MASK_AMOMAXU_B|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_1_BYTE },
> +{"amomin.b.rl",     0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOMIN_B|MASK_RL, MASK_AMOMIN_B|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_1_BYTE },
> +{"amominu.b.rl",    0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOMINU_B|MASK_RL, MASK_AMOMINU_B|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_1_BYTE },
> +{"amoadd.b.aqrl",   0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOADD_B|MASK_AQRL, MASK_AMOADD_B|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_1_BYTE },
> +{"amoswap.b.aqrl",  0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOSWAP_B|MASK_AQRL, MASK_AMOSWAP_B|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_1_BYTE },
> +{"amoand.b.aqrl",   0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOAND_B|MASK_AQRL, MASK_AMOAND_B|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_1_BYTE },
> +{"amoor.b.aqrl",    0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOOR_B|MASK_AQRL, MASK_AMOOR_B|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_1_BYTE },
> +{"amoxor.b.aqrl",   0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOXOR_B|MASK_AQRL, MASK_AMOXOR_B|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_1_BYTE },
> +{"amomax.b.aqrl",   0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOMAX_B|MASK_AQRL, MASK_AMOMAX_B|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_1_BYTE },
> +{"amomaxu.b.aqrl",  0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOMAXU_B|MASK_AQRL, MASK_AMOMAXU_B|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_1_BYTE },
> +{"amomin.b.aqrl",   0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOMIN_B|MASK_AQRL, MASK_AMOMIN_B|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_1_BYTE },
> +{"amominu.b.aqrl",  0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOMINU_B|MASK_AQRL, MASK_AMOMINU_B|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_1_BYTE },
> +{"amoadd.h",        0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOADD_H,
> MASK_AMOADD_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
> +{"amoswap.h",       0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOSWAP_H,
> MASK_AMOSWAP_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
> +{"amoand.h",        0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOAND_H,
> MASK_AMOAND_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
> +{"amoor.h",         0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOOR_H,
> MASK_AMOOR_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
> +{"amoxor.h",        0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOXOR_H,
> MASK_AMOXOR_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
> +{"amomax.h",        0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAX_H,
> MASK_AMOMAX_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
> +{"amomaxu.h",       0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAXU_H,
> MASK_AMOMAXU_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
> +{"amomin.h",        0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMIN_H,
> MASK_AMOMIN_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
> +{"amominu.h",       0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMINU_H,
> MASK_AMOMINU_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
> +{"amoadd.h.aq",     0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOADD_H|MASK_AQ, MASK_AMOADD_H|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_2_BYTE },
> +{"amoswap.h.aq",    0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOSWAP_H|MASK_AQ, MASK_AMOSWAP_H|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_2_BYTE },
> +{"amoand.h.aq",     0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOAND_H|MASK_AQ, MASK_AMOAND_H|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_2_BYTE },
> +{"amoor.h.aq",      0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOOR_H|MASK_AQ, MASK_AMOOR_H|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_2_BYTE },
> +{"amoxor.h.aq",     0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOXOR_H|MASK_AQ, MASK_AMOXOR_H|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_2_BYTE },
> +{"amomax.h.aq",     0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOMAX_H|MASK_AQ, MASK_AMOMAX_H|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_2_BYTE },
> +{"amomaxu.h.aq",    0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOMAXU_H|MASK_AQ, MASK_AMOMAXU_H|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_2_BYTE },
> +{"amomin.h.aq",     0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOMIN_H|MASK_AQ, MASK_AMOMIN_H|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_2_BYTE },
> +{"amominu.h.aq",    0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOMINU_H|MASK_AQ, MASK_AMOMINU_H|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_2_BYTE },
> +{"amoadd.h.rl",     0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOADD_H|MASK_RL, MASK_AMOADD_H|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_2_BYTE },
> +{"amoswap.h.rl",    0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOSWAP_H|MASK_RL, MASK_AMOSWAP_H|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_2_BYTE },
> +{"amoand.h.rl",     0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOAND_H|MASK_RL, MASK_AMOAND_H|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_2_BYTE },
> +{"amoor.h.rl",      0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOOR_H|MASK_RL, MASK_AMOOR_H|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_2_BYTE },
> +{"amoxor.h.rl",     0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOXOR_H|MASK_RL, MASK_AMOXOR_H|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_2_BYTE },
> +{"amomax.h.rl",     0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOMAX_H|MASK_RL, MASK_AMOMAX_H|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_2_BYTE },
> +{"amomaxu.h.rl",    0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOMAXU_H|MASK_RL, MASK_AMOMAXU_H|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_2_BYTE },
> +{"amomin.h.rl",     0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOMIN_H|MASK_RL, MASK_AMOMIN_H|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_2_BYTE },
> +{"amominu.h.rl",    0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOMINU_H|MASK_RL, MASK_AMOMINU_H|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_2_BYTE },
> +{"amoadd.h.aqrl",   0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOADD_H|MASK_AQRL, MASK_AMOADD_H|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_2_BYTE },
> +{"amoswap.h.aqrl",  0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOSWAP_H|MASK_AQRL, MASK_AMOSWAP_H|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_2_BYTE },
> +{"amoand.h.aqrl",   0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOAND_H|MASK_AQRL, MASK_AMOAND_H|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_2_BYTE },
> +{"amoor.h.aqrl",    0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOOR_H|MASK_AQRL, MASK_AMOOR_H|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_2_BYTE },
> +{"amoxor.h.aqrl",   0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOXOR_H|MASK_AQRL, MASK_AMOXOR_H|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_2_BYTE },
> +{"amomax.h.aqrl",   0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOMAX_H|MASK_AQRL, MASK_AMOMAX_H|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_2_BYTE },
> +{"amomaxu.h.aqrl",  0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOMAXU_H|MASK_AQRL, MASK_AMOMAXU_H|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_2_BYTE },
> +{"amomin.h.aqrl",   0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOMIN_H|MASK_AQRL, MASK_AMOMIN_H|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_2_BYTE },
> +{"amominu.h.aqrl",  0, INSN_CLASS_ZABHA, "d,t,0(s)",
> MATCH_AMOMINU_H|MASK_AQRL, MASK_AMOMINU_H|MASK_AQRL, match_opcode,
> INSN_DREF|INSN_2_BYTE },
> +
>  /* Multiply/Divide instruction subset.  */
>  {"mul",        0, INSN_CLASS_ZCB_AND_ZMMUL, "Cs,Cw,Ct",  MATCH_C_MUL,
> MASK_C_MUL, match_opcode, INSN_ALIAS },
>  {"mul",        0, INSN_CLASS_ZMMUL, "d,s,t",     MATCH_MUL, MASK_MUL,
> match_opcode, 0 },
> --
> 2.25.1
>
>
Jiawei March 7, 2024, 4:33 p.m. UTC | #2 
I think we can commit it first, since this patch does not include the CAS instructions part. I will send those part after Zacas commited. Regards Jiawei



----- Original Message -----
From: "Nelson Chu" <nelson@rivosinc.com>
To: Jiawei <jiawei@iscas.ac.cn>
Cc: binutils@sourceware.org, kito.cheng@sifive.com, palmer@dabbelt.com, jbeulich@suse.com, research_trasio@irq.a4lg.com, christoph.muellner@vrull.eu, jeremy.bennett@embecosm.com, wuwei2016@iscas.ac.cn, shihua@iscas.ac.cn, shiyulong@iscas.ac.cn, chenyixuan@iscas.ac.cn
Sent: Thu, 7 Mar 2024 10:48:12 +0800
Subject: Re: [PATCH v2] RISC-V: Support Zabha extension.


Looks good, thanks.  So should we commit this first?  or should wait until zacas committed?


Thanks
Nelson


On Wed, Feb 28, 2024 at 4:28 PM Jiawei <jiawei@iscas.ac.cn> wrote:

The Zabha extension[1] supports for byte and halfword
atomic memory operations. This patch add all instructions
include in Zabha. Further work is waiting Zacas[2] merge.

[1] https://github.com/riscv/riscv-zabha/tags
[2] https://sourceware.org/pipermail/binutils/2023-May/127700.html

Version log:
Add new imply relation that Zabha extension implies A extension.

bfd/ChangeLog:

        * elfxx-riscv.c (riscv_implicit_subsets): New imply.
        (riscv_multi_subset_supports): New extension.
        (riscv_multi_subset_supports_ext): Ditto.

gas/ChangeLog:

        * testsuite/gas/riscv/zabha-32.d: New test.
        * testsuite/gas/riscv/zabha.d: New test.
        * testsuite/gas/riscv/zabha.s: New test.

include/ChangeLog:

        * opcode/riscv-opc.h (MATCH_AMOADD_B): New opcodes.
        (MASK_AMOADD_B): Ditto.
        (MATCH_AMOXOR_B): Ditto.
        (MASK_AMOXOR_B): Ditto.
        (MATCH_AMOOR_B): Ditto.
        (MASK_AMOOR_B): Ditto.
        (MATCH_AMOAND_B): Ditto.
        (MASK_AMOAND_B): Ditto.
        (MATCH_AMOMIN_B): Ditto.
        (MASK_AMOMIN_B): Ditto.
        (MATCH_AMOMAX_B): Ditto.
        (MASK_AMOMAX_B): Ditto.
        (MATCH_AMOMINU_B): Ditto.
        (MASK_AMOMINU_B): Ditto.
        (MATCH_AMOMAXU_B): Ditto.
        (MASK_AMOMAXU_B): Ditto.
        (MATCH_AMOSWAP_B): Ditto.
        (MASK_AMOSWAP_B): Ditto.
        (MATCH_AMOADD_H): Ditto.
        (MASK_AMOADD_H): Ditto.
        (MATCH_AMOXOR_H): Ditto.
        (MASK_AMOXOR_H): Ditto.
        (MATCH_AMOOR_H): Ditto.
        (MASK_AMOOR_H): Ditto.
        (MATCH_AMOAND_H): Ditto.
        (MASK_AMOAND_H): Ditto.
        (MATCH_AMOMIN_H): Ditto.
        (MASK_AMOMIN_H): Ditto.
        (MATCH_AMOMAX_H): Ditto.
        (MASK_AMOMAX_H): Ditto.
        (MATCH_AMOMINU_H): Ditto.
        (MASK_AMOMINU_H): Ditto.
        (MATCH_AMOMAXU_H): Ditto.
        (MASK_AMOMAXU_H): Ditto.
        (MATCH_AMOSWAP_H): Ditto.
        (MASK_AMOSWAP_H): Ditto.
        (DECLARE_INSN): New declare.
        * opcode/riscv.h (enum riscv_insn_class): New class.

opcodes/ChangeLog:

        * riscv-opc.c: New instructions.

---
 bfd/elfxx-riscv.c                  |  6 +++
 gas/testsuite/gas/riscv/zabha-32.d | 81 ++++++++++++++++++++++++++++++
 gas/testsuite/gas/riscv/zabha.d    | 81 ++++++++++++++++++++++++++++++
 gas/testsuite/gas/riscv/zabha.s    | 73 +++++++++++++++++++++++++++
 include/opcode/riscv-opc.h         | 54 ++++++++++++++++++++
 include/opcode/riscv.h             |  1 +
 opcodes/riscv-opc.c                | 74 +++++++++++++++++++++++++++
 7 files changed, 370 insertions(+)
 create mode 100644 gas/testsuite/gas/riscv/zabha-32.d
 create mode 100644 gas/testsuite/gas/riscv/zabha.d
 create mode 100644 gas/testsuite/gas/riscv/zabha.s

diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
index 9a121b47121..47966f27565 100644
--- a/bfd/elfxx-riscv.c
+++ b/bfd/elfxx-riscv.c
@@ -1118,6 +1118,7 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] =
   {"v", "d",           check_implicit_always},
   {"v", "zve64d",      check_implicit_always},
   {"v", "zvl128b",     check_implicit_always},
+  {"zabha", "a",       check_implicit_always},
   {"zvfh", "zvfhmin",  check_implicit_always},
   {"zvfh", "zfhmin",   check_implicit_always},
   {"zvfhmin", "zve32f",        check_implicit_always},
@@ -1274,6 +1275,7 @@ static struct riscv_supported_ext riscv_supported_std_z_ext[] =
   {"zihintpause",      ISA_SPEC_CLASS_DRAFT,           2, 0,  0 },
   {"zihpm",            ISA_SPEC_CLASS_DRAFT,           2, 0,  0 },
   {"zmmul",            ISA_SPEC_CLASS_DRAFT,           1, 0,  0 },
+  {"zabha",            ISA_SPEC_CLASS_DRAFT,           1, 0,  0 },
   {"zawrs",            ISA_SPEC_CLASS_DRAFT,           1, 0,  0 },
   {"zfa",              ISA_SPEC_CLASS_DRAFT,           1, 0,  0 },
   {"zfh",              ISA_SPEC_CLASS_DRAFT,           1, 0,  0 },
@@ -2437,6 +2439,8 @@ riscv_multi_subset_supports (riscv_parse_subset_t *rps,
       return riscv_subset_supports (rps, "zmmul");
     case INSN_CLASS_A:
       return riscv_subset_supports (rps, "a");
+    case INSN_CLASS_ZABHA:
+      return riscv_subset_supports (rps, "zabha");
     case INSN_CLASS_ZAWRS:
       return riscv_subset_supports (rps, "zawrs");
     case INSN_CLASS_F:
@@ -2659,6 +2663,8 @@ riscv_multi_subset_supports_ext (riscv_parse_subset_t *rps,
       return _ ("m' or `zmmul");
     case INSN_CLASS_A:
       return "a";
+    case INSN_CLASS_ZABHA:
+      return "zabha";
     case INSN_CLASS_ZAWRS:
       return "zawrs";
     case INSN_CLASS_F:
diff --git a/gas/testsuite/gas/riscv/zabha-32.d b/gas/testsuite/gas/riscv/zabha-32.d
new file mode 100644
index 00000000000..1e6427ea752
--- /dev/null
+++ b/gas/testsuite/gas/riscv/zabha-32.d
@@ -0,0 +1,81 @@
+#as: -march=rv32i_zabha
+#source: zabha.s
+#objdump: -d -Mno-aliases
+
+.*:[   ]+file format .*
+
+Disassembly of section .text:
+
+0+000 <target>:
+[      ]+[0-9a-f]+:[   ]+00a5052f[     ]+amoadd.b[     ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+08a5052f[     ]+amoswap.b[    ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+60a5052f[     ]+amoand.b[     ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+40a5052f[     ]+amoor.b[      ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+20a5052f[     ]+amoxor.b[     ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+a0a5052f[     ]+amomax.b[     ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+e0a5052f[     ]+amomaxu.b[    ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+80a5052f[     ]+amomin.b[     ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+c0a5052f[     ]+amominu.b[    ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+04a5052f[     ]+amoadd.b.aq[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+0ca5052f[     ]+amoswap.b.aq[         ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+64a5052f[     ]+amoand.b.aq[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+44a5052f[     ]+amoor.b.aq[   ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+24a5052f[     ]+amoxor.b.aq[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+a4a5052f[     ]+amomax.b.aq[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+e4a5052f[     ]+amomaxu.b.aq[         ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+84a5052f[     ]+amomin.b.aq[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+c4a5052f[     ]+amominu.b.aq[         ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+02a5052f[     ]+amoadd.b.rl[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+0aa5052f[     ]+amoswap.b.rl[         ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+62a5052f[     ]+amoand.b.rl[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+42a5052f[     ]+amoor.b.rl[   ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+22a5052f[     ]+amoxor.b.rl[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+a2a5052f[     ]+amomax.b.rl[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+e2a5052f[     ]+amomaxu.b.rl[         ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+82a5052f[     ]+amomin.b.rl[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+c2a5052f[     ]+amominu.b.rl[         ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+06a5052f[     ]+amoadd.b.aqrl[        ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+0ea5052f[     ]+amoswap.b.aqrl[       ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+66a5052f[     ]+amoand.b.aqrl[        ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+46a5052f[     ]+amoor.b.aqrl[         ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+26a5052f[     ]+amoxor.b.aqrl[        ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+a6a5052f[     ]+amomax.b.aqrl[        ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+e6a5052f[     ]+amomaxu.b.aqrl[       ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+86a5052f[     ]+amomin.b.aqrl[        ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+c6a5052f[     ]+amominu.b.aqrl[       ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+00a5152f[     ]+amoadd.h[     ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+08a5152f[     ]+amoswap.h[    ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+60a5152f[     ]+amoand.h[     ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+40a5152f[     ]+amoor.h[      ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+20a5152f[     ]+amoxor.h[     ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+a0a5152f[     ]+amomax.h[     ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+e0a5152f[     ]+amomaxu.h[    ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+80a5152f[     ]+amomin.h[     ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+c0a5152f[     ]+amominu.h[    ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+04a5152f[     ]+amoadd.h.aq[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+0ca5152f[     ]+amoswap.h.aq[         ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+64a5152f[     ]+amoand.h.aq[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+44a5152f[     ]+amoor.h.aq[   ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+24a5152f[     ]+amoxor.h.aq[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+a4a5152f[     ]+amomax.h.aq[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+e4a5152f[     ]+amomaxu.h.aq[         ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+84a5152f[     ]+amomin.h.aq[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+c4a5152f[     ]+amominu.h.aq[         ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+02a5152f[     ]+amoadd.h.rl[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+0aa5152f[     ]+amoswap.h.rl[         ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+62a5152f[     ]+amoand.h.rl[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+42a5152f[     ]+amoor.h.rl[   ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+22a5152f[     ]+amoxor.h.rl[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+a2a5152f[     ]+amomax.h.rl[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+e2a5152f[     ]+amomaxu.h.rl[         ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+82a5152f[     ]+amomin.h.rl[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+c2a5152f[     ]+amominu.h.rl[         ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+06a5152f[     ]+amoadd.h.aqrl[        ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+0ea5152f[     ]+amoswap.h.aqrl[       ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+66a5152f[     ]+amoand.h.aqrl[        ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+46a5152f[     ]+amoor.h.aqrl[         ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+26a5152f[     ]+amoxor.h.aqrl[        ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+a6a5152f[     ]+amomax.h.aqrl[        ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+e6a5152f[     ]+amomaxu.h.aqrl[       ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+86a5152f[     ]+amomin.h.aqrl[        ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+c6a5152f[     ]+amominu.h.aqrl[       ]+a0,a0,\(a0\)
diff --git a/gas/testsuite/gas/riscv/zabha.d b/gas/testsuite/gas/riscv/zabha.d
new file mode 100644
index 00000000000..7000452b6d1
--- /dev/null
+++ b/gas/testsuite/gas/riscv/zabha.d
@@ -0,0 +1,81 @@
+#as: -march=rv64i_zabha
+#source: zabha.s
+#objdump: -d -Mno-aliases
+
+.*:[   ]+file format .*
+
+Disassembly of section .text:
+
+0+000 <target>:
+[      ]+[0-9a-f]+:[   ]+00a5052f[     ]+amoadd.b[     ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+08a5052f[     ]+amoswap.b[    ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+60a5052f[     ]+amoand.b[     ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+40a5052f[     ]+amoor.b[      ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+20a5052f[     ]+amoxor.b[     ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+a0a5052f[     ]+amomax.b[     ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+e0a5052f[     ]+amomaxu.b[    ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+80a5052f[     ]+amomin.b[     ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+c0a5052f[     ]+amominu.b[    ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+04a5052f[     ]+amoadd.b.aq[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+0ca5052f[     ]+amoswap.b.aq[         ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+64a5052f[     ]+amoand.b.aq[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+44a5052f[     ]+amoor.b.aq[   ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+24a5052f[     ]+amoxor.b.aq[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+a4a5052f[     ]+amomax.b.aq[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+e4a5052f[     ]+amomaxu.b.aq[         ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+84a5052f[     ]+amomin.b.aq[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+c4a5052f[     ]+amominu.b.aq[         ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+02a5052f[     ]+amoadd.b.rl[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+0aa5052f[     ]+amoswap.b.rl[         ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+62a5052f[     ]+amoand.b.rl[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+42a5052f[     ]+amoor.b.rl[   ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+22a5052f[     ]+amoxor.b.rl[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+a2a5052f[     ]+amomax.b.rl[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+e2a5052f[     ]+amomaxu.b.rl[         ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+82a5052f[     ]+amomin.b.rl[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+c2a5052f[     ]+amominu.b.rl[         ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+06a5052f[     ]+amoadd.b.aqrl[        ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+0ea5052f[     ]+amoswap.b.aqrl[       ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+66a5052f[     ]+amoand.b.aqrl[        ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+46a5052f[     ]+amoor.b.aqrl[         ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+26a5052f[     ]+amoxor.b.aqrl[        ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+a6a5052f[     ]+amomax.b.aqrl[        ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+e6a5052f[     ]+amomaxu.b.aqrl[       ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+86a5052f[     ]+amomin.b.aqrl[        ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+c6a5052f[     ]+amominu.b.aqrl[       ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+00a5152f[     ]+amoadd.h[     ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+08a5152f[     ]+amoswap.h[    ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+60a5152f[     ]+amoand.h[     ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+40a5152f[     ]+amoor.h[      ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+20a5152f[     ]+amoxor.h[     ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+a0a5152f[     ]+amomax.h[     ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+e0a5152f[     ]+amomaxu.h[    ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+80a5152f[     ]+amomin.h[     ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+c0a5152f[     ]+amominu.h[    ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+04a5152f[     ]+amoadd.h.aq[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+0ca5152f[     ]+amoswap.h.aq[         ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+64a5152f[     ]+amoand.h.aq[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+44a5152f[     ]+amoor.h.aq[   ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+24a5152f[     ]+amoxor.h.aq[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+a4a5152f[     ]+amomax.h.aq[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+e4a5152f[     ]+amomaxu.h.aq[         ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+84a5152f[     ]+amomin.h.aq[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+c4a5152f[     ]+amominu.h.aq[         ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+02a5152f[     ]+amoadd.h.rl[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+0aa5152f[     ]+amoswap.h.rl[         ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+62a5152f[     ]+amoand.h.rl[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+42a5152f[     ]+amoor.h.rl[   ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+22a5152f[     ]+amoxor.h.rl[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+a2a5152f[     ]+amomax.h.rl[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+e2a5152f[     ]+amomaxu.h.rl[         ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+82a5152f[     ]+amomin.h.rl[  ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+c2a5152f[     ]+amominu.h.rl[         ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+06a5152f[     ]+amoadd.h.aqrl[        ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+0ea5152f[     ]+amoswap.h.aqrl[       ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+66a5152f[     ]+amoand.h.aqrl[        ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+46a5152f[     ]+amoor.h.aqrl[         ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+26a5152f[     ]+amoxor.h.aqrl[        ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+a6a5152f[     ]+amomax.h.aqrl[        ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+e6a5152f[     ]+amomaxu.h.aqrl[       ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+86a5152f[     ]+amomin.h.aqrl[        ]+a0,a0,\(a0\)
+[      ]+[0-9a-f]+:[   ]+c6a5152f[     ]+amominu.h.aqrl[       ]+a0,a0,\(a0\)
diff --git a/gas/testsuite/gas/riscv/zabha.s b/gas/testsuite/gas/riscv/zabha.s
new file mode 100644
index 00000000000..77ecee8efba
--- /dev/null
+++ b/gas/testsuite/gas/riscv/zabha.s
@@ -0,0 +1,73 @@
+target:
+       amoadd.b        a0, a0, 0(a0)
+       amoswap.b       a0, a0, 0(a0)
+       amoand.b        a0, a0, 0(a0)
+       amoor.b a0, a0, 0(a0)
+       amoxor.b        a0, a0, 0(a0)
+       amomax.b        a0, a0, 0(a0)
+       amomaxu.b       a0, a0, 0(a0)
+       amomin.b        a0, a0, 0(a0)
+       amominu.b       a0, a0, 0(a0)
+       amoadd.b.aq     a0, a0, 0(a0)
+       amoswap.b.aq    a0, a0, 0(a0)
+       amoand.b.aq     a0, a0, 0(a0)
+       amoor.b.aq      a0, a0, 0(a0)
+       amoxor.b.aq     a0, a0, 0(a0)
+       amomax.b.aq     a0, a0, 0(a0)
+       amomaxu.b.aq    a0, a0, 0(a0)
+       amomin.b.aq     a0, a0, 0(a0)
+       amominu.b.aq    a0, a0, 0(a0)
+       amoadd.b.rl     a0, a0, 0(a0)
+       amoswap.b.rl    a0, a0, 0(a0)
+       amoand.b.rl     a0, a0, 0(a0)
+       amoor.b.rl      a0, a0, 0(a0)
+       amoxor.b.rl     a0, a0, 0(a0)
+       amomax.b.rl     a0, a0, 0(a0)
+       amomaxu.b.rl    a0, a0, 0(a0)
+       amomin.b.rl     a0, a0, 0(a0)
+       amominu.b.rl    a0, a0, 0(a0)
+       amoadd.b.aqrl   a0, a0, 0(a0)
+       amoswap.b.aqrl  a0, a0, 0(a0)
+       amoand.b.aqrl   a0, a0, 0(a0)
+       amoor.b.aqrl    a0, a0, 0(a0)
+       amoxor.b.aqrl   a0, a0, 0(a0)
+       amomax.b.aqrl   a0, a0, 0(a0)
+       amomaxu.b.aqrl  a0, a0, 0(a0)
+       amomin.b.aqrl   a0, a0, 0(a0)
+       amominu.b.aqrl  a0, a0, 0(a0)
+       amoadd.h        a0, a0, 0(a0)
+       amoswap.h       a0, a0, 0(a0)
+       amoand.h        a0, a0, 0(a0)
+       amoor.h a0, a0, 0(a0)
+       amoxor.h        a0, a0, 0(a0)
+       amomax.h        a0, a0, 0(a0)
+       amomaxu.h       a0, a0, 0(a0)
+       amomin.h        a0, a0, 0(a0)
+       amominu.h       a0, a0, 0(a0)
+       amoadd.h.aq     a0, a0, 0(a0)
+       amoswap.h.aq    a0, a0, 0(a0)
+       amoand.h.aq     a0, a0, 0(a0)
+       amoor.h.aq      a0, a0, 0(a0)
+       amoxor.h.aq     a0, a0, 0(a0)
+       amomax.h.aq     a0, a0, 0(a0)
+       amomaxu.h.aq    a0, a0, 0(a0)
+       amomin.h.aq     a0, a0, 0(a0)
+       amominu.h.aq    a0, a0, 0(a0)
+       amoadd.h.rl     a0, a0, 0(a0)
+       amoswap.h.rl    a0, a0, 0(a0)
+       amoand.h.rl     a0, a0, 0(a0)
+       amoor.h.rl      a0, a0, 0(a0)
+       amoxor.h.rl     a0, a0, 0(a0)
+       amomax.h.rl     a0, a0, 0(a0)
+       amomaxu.h.rl    a0, a0, 0(a0)
+       amomin.h.rl     a0, a0, 0(a0)
+       amominu.h.rl    a0, a0, 0(a0)
+       amoadd.h.aqrl   a0, a0, 0(a0)
+       amoswap.h.aqrl  a0, a0, 0(a0)
+       amoand.h.aqrl   a0, a0, 0(a0)
+       amoor.h.aqrl    a0, a0, 0(a0)
+       amoxor.h.aqrl   a0, a0, 0(a0)
+       amomax.h.aqrl   a0, a0, 0(a0)
+       amomaxu.h.aqrl  a0, a0, 0(a0)
+       amomin.h.aqrl   a0, a0, 0(a0)
+       amominu.h.aqrl  a0, a0, 0(a0)
diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
index e77b49a6298..587d81b5e3c 100644
--- a/include/opcode/riscv-opc.h
+++ b/include/opcode/riscv-opc.h
@@ -235,6 +235,42 @@
 #define MASK_LR_D  0xf9f0707f
 #define MATCH_SC_D 0x1800302f
 #define MASK_SC_D  0xf800707f
+#define MATCH_AMOADD_B 0x02f
+#define MASK_AMOADD_B  0xf800707f
+#define MATCH_AMOXOR_B 0x2000002f
+#define MASK_AMOXOR_B  0xf800707f
+#define MATCH_AMOOR_B 0x4000002f
+#define MASK_AMOOR_B  0xf800707f
+#define MATCH_AMOAND_B 0x6000002f
+#define MASK_AMOAND_B  0xf800707f
+#define MATCH_AMOMIN_B 0x8000002f
+#define MASK_AMOMIN_B  0xf800707f
+#define MATCH_AMOMAX_B 0xa000002f
+#define MASK_AMOMAX_B  0xf800707f
+#define MATCH_AMOMINU_B 0xc000002f
+#define MASK_AMOMINU_B  0xf800707f
+#define MATCH_AMOMAXU_B 0xe000002f
+#define MASK_AMOMAXU_B  0xf800707f
+#define MATCH_AMOSWAP_B 0x800002f
+#define MASK_AMOSWAP_B  0xf800707f
+#define MATCH_AMOADD_H 0x102f
+#define MASK_AMOADD_H  0xf800707f
+#define MATCH_AMOXOR_H 0x2000102f
+#define MASK_AMOXOR_H  0xf800707f
+#define MATCH_AMOOR_H 0x4000102f
+#define MASK_AMOOR_H  0xf800707f
+#define MATCH_AMOAND_H 0x6000102f
+#define MASK_AMOAND_H  0xf800707f
+#define MATCH_AMOMIN_H 0x8000102f
+#define MASK_AMOMIN_H  0xf800707f
+#define MATCH_AMOMAX_H 0xa000102f
+#define MASK_AMOMAX_H  0xf800707f
+#define MATCH_AMOMINU_H 0xc000102f
+#define MASK_AMOMINU_H  0xf800707f
+#define MATCH_AMOMAXU_H 0xe000102f
+#define MASK_AMOMAXU_H  0xf800707f
+#define MATCH_AMOSWAP_H 0x800102f
+#define MASK_AMOSWAP_H  0xf800707f
 #define MATCH_ECALL 0x73
 #define MASK_ECALL  0xffffffff
 #define MATCH_EBREAK 0x100073
@@ -3581,6 +3617,24 @@ DECLARE_INSN(amomaxu_d, MATCH_AMOMAXU_D, MASK_AMOMAXU_D)
 DECLARE_INSN(amoswap_d, MATCH_AMOSWAP_D, MASK_AMOSWAP_D)
 DECLARE_INSN(lr_d, MATCH_LR_D, MASK_LR_D)
 DECLARE_INSN(sc_d, MATCH_SC_D, MASK_SC_D)
+DECLARE_INSN(amoadd_b, MATCH_AMOADD_B, MASK_AMOADD_B)
+DECLARE_INSN(amoxor_b, MATCH_AMOXOR_B, MASK_AMOXOR_B)
+DECLARE_INSN(amoor_b, MATCH_AMOOR_B, MASK_AMOOR_B)
+DECLARE_INSN(amoand_b, MATCH_AMOAND_B, MASK_AMOAND_B)
+DECLARE_INSN(amomin_b, MATCH_AMOMIN_B, MASK_AMOMIN_B)
+DECLARE_INSN(amomax_b, MATCH_AMOMAX_B, MASK_AMOMAX_B)
+DECLARE_INSN(amominu_b, MATCH_AMOMINU_B, MASK_AMOMINU_B)
+DECLARE_INSN(amomaxu_b, MATCH_AMOMAXU_B, MASK_AMOMAXU_B)
+DECLARE_INSN(amoswap_b, MATCH_AMOSWAP_B, MASK_AMOSWAP_B)
+DECLARE_INSN(amoadd_h, MATCH_AMOADD_H, MASK_AMOADD_H)
+DECLARE_INSN(amoxor_h, MATCH_AMOXOR_H, MASK_AMOXOR_H)
+DECLARE_INSN(amoor_h, MATCH_AMOOR_H, MASK_AMOOR_H)
+DECLARE_INSN(amoand_h, MATCH_AMOAND_H, MASK_AMOAND_H)
+DECLARE_INSN(amomin_h, MATCH_AMOMIN_H, MASK_AMOMIN_H)
+DECLARE_INSN(amomax_h, MATCH_AMOMAX_H, MASK_AMOMAX_H)
+DECLARE_INSN(amominu_h, MATCH_AMOMINU_H, MASK_AMOMINU_H)
+DECLARE_INSN(amomaxu_h, MATCH_AMOMAXU_H, MASK_AMOMAXU_H)
+DECLARE_INSN(amoswap_h, MATCH_AMOSWAP_H, MASK_AMOSWAP_H)
 DECLARE_INSN(ecall, MATCH_ECALL, MASK_ECALL)
 DECLARE_INSN(ebreak, MATCH_EBREAK, MASK_EBREAK)
 DECLARE_INSN(uret, MATCH_URET, MASK_URET)
diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h
index adea7dbc794..3245873aa6d 100644
--- a/include/opcode/riscv.h
+++ b/include/opcode/riscv.h
@@ -468,6 +468,7 @@ enum riscv_insn_class
   INSN_CLASS_ZICBOM,
   INSN_CLASS_ZICBOP,
   INSN_CLASS_ZICBOZ,
+  INSN_CLASS_ZABHA,
   INSN_CLASS_H,
   INSN_CLASS_XCVMAC,
   INSN_CLASS_XCVALU,
diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c
index fdd05ac75dc..edb8f59249e 100644
--- a/opcodes/riscv-opc.c
+++ b/opcodes/riscv-opc.c
@@ -659,6 +659,80 @@ const struct riscv_opcode riscv_opcodes[] =
 {"amomin.d.aqrl",  64, INSN_CLASS_A, "d,t,0(s)", MATCH_AMOMIN_D|MASK_AQRL, MASK_AMOMIN_D|MASK_AQRL, match_opcode, INSN_DREF|INSN_8_BYTE },
 {"amominu.d.aqrl", 64, INSN_CLASS_A, "d,t,0(s)", MATCH_AMOMINU_D|MASK_AQRL, MASK_AMOMINU_D|MASK_AQRL, match_opcode, INSN_DREF|INSN_8_BYTE },

+/* Byte and Halfword Atomic Memory Operations instruction subset.  */
+{"amoadd.b",        0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOADD_B, MASK_AMOADD_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoswap.b",       0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOSWAP_B, MASK_AMOSWAP_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoand.b",        0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOAND_B, MASK_AMOAND_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoor.b",         0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOOR_B, MASK_AMOOR_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoxor.b",        0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOXOR_B, MASK_AMOXOR_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amomax.b",        0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAX_B, MASK_AMOMAX_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amomaxu.b",       0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAXU_B, MASK_AMOMAXU_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amomin.b",        0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMIN_B, MASK_AMOMIN_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amominu.b",       0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMINU_B, MASK_AMOMINU_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoadd.b.aq",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOADD_B|MASK_AQ, MASK_AMOADD_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoswap.b.aq",    0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOSWAP_B|MASK_AQ, MASK_AMOSWAP_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoand.b.aq",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOAND_B|MASK_AQ, MASK_AMOAND_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoor.b.aq",      0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOOR_B|MASK_AQ, MASK_AMOOR_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoxor.b.aq",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOXOR_B|MASK_AQ, MASK_AMOXOR_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amomax.b.aq",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAX_B|MASK_AQ, MASK_AMOMAX_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amomaxu.b.aq",    0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAXU_B|MASK_AQ, MASK_AMOMAXU_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amomin.b.aq",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMIN_B|MASK_AQ, MASK_AMOMIN_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amominu.b.aq",    0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMINU_B|MASK_AQ, MASK_AMOMINU_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoadd.b.rl",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOADD_B|MASK_RL, MASK_AMOADD_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoswap.b.rl",    0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOSWAP_B|MASK_RL, MASK_AMOSWAP_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoand.b.rl",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOAND_B|MASK_RL, MASK_AMOAND_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoor.b.rl",      0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOOR_B|MASK_RL, MASK_AMOOR_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoxor.b.rl",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOXOR_B|MASK_RL, MASK_AMOXOR_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amomax.b.rl",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAX_B|MASK_RL, MASK_AMOMAX_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amomaxu.b.rl",    0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAXU_B|MASK_RL, MASK_AMOMAXU_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amomin.b.rl",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMIN_B|MASK_RL, MASK_AMOMIN_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amominu.b.rl",    0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMINU_B|MASK_RL, MASK_AMOMINU_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoadd.b.aqrl",   0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOADD_B|MASK_AQRL, MASK_AMOADD_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoswap.b.aqrl",  0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOSWAP_B|MASK_AQRL, MASK_AMOSWAP_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoand.b.aqrl",   0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOAND_B|MASK_AQRL, MASK_AMOAND_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoor.b.aqrl",    0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOOR_B|MASK_AQRL, MASK_AMOOR_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoxor.b.aqrl",   0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOXOR_B|MASK_AQRL, MASK_AMOXOR_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amomax.b.aqrl",   0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAX_B|MASK_AQRL, MASK_AMOMAX_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amomaxu.b.aqrl",  0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAXU_B|MASK_AQRL, MASK_AMOMAXU_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amomin.b.aqrl",   0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMIN_B|MASK_AQRL, MASK_AMOMIN_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amominu.b.aqrl",  0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMINU_B|MASK_AQRL, MASK_AMOMINU_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoadd.h",        0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOADD_H, MASK_AMOADD_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoswap.h",       0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOSWAP_H, MASK_AMOSWAP_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoand.h",        0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOAND_H, MASK_AMOAND_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoor.h",         0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOOR_H, MASK_AMOOR_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoxor.h",        0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOXOR_H, MASK_AMOXOR_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amomax.h",        0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAX_H, MASK_AMOMAX_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amomaxu.h",       0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAXU_H, MASK_AMOMAXU_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amomin.h",        0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMIN_H, MASK_AMOMIN_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amominu.h",       0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMINU_H, MASK_AMOMINU_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoadd.h.aq",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOADD_H|MASK_AQ, MASK_AMOADD_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoswap.h.aq",    0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOSWAP_H|MASK_AQ, MASK_AMOSWAP_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoand.h.aq",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOAND_H|MASK_AQ, MASK_AMOAND_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoor.h.aq",      0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOOR_H|MASK_AQ, MASK_AMOOR_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoxor.h.aq",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOXOR_H|MASK_AQ, MASK_AMOXOR_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amomax.h.aq",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAX_H|MASK_AQ, MASK_AMOMAX_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amomaxu.h.aq",    0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAXU_H|MASK_AQ, MASK_AMOMAXU_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amomin.h.aq",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMIN_H|MASK_AQ, MASK_AMOMIN_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amominu.h.aq",    0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMINU_H|MASK_AQ, MASK_AMOMINU_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoadd.h.rl",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOADD_H|MASK_RL, MASK_AMOADD_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoswap.h.rl",    0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOSWAP_H|MASK_RL, MASK_AMOSWAP_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoand.h.rl",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOAND_H|MASK_RL, MASK_AMOAND_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoor.h.rl",      0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOOR_H|MASK_RL, MASK_AMOOR_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoxor.h.rl",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOXOR_H|MASK_RL, MASK_AMOXOR_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amomax.h.rl",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAX_H|MASK_RL, MASK_AMOMAX_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amomaxu.h.rl",    0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAXU_H|MASK_RL, MASK_AMOMAXU_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amomin.h.rl",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMIN_H|MASK_RL, MASK_AMOMIN_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amominu.h.rl",    0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMINU_H|MASK_RL, MASK_AMOMINU_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoadd.h.aqrl",   0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOADD_H|MASK_AQRL, MASK_AMOADD_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoswap.h.aqrl",  0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOSWAP_H|MASK_AQRL, MASK_AMOSWAP_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoand.h.aqrl",   0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOAND_H|MASK_AQRL, MASK_AMOAND_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoor.h.aqrl",    0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOOR_H|MASK_AQRL, MASK_AMOOR_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoxor.h.aqrl",   0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOXOR_H|MASK_AQRL, MASK_AMOXOR_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amomax.h.aqrl",   0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAX_H|MASK_AQRL, MASK_AMOMAX_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amomaxu.h.aqrl",  0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAXU_H|MASK_AQRL, MASK_AMOMAXU_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amomin.h.aqrl",   0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMIN_H|MASK_AQRL, MASK_AMOMIN_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amominu.h.aqrl",  0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMINU_H|MASK_AQRL, MASK_AMOMINU_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+
 /* Multiply/Divide instruction subset.  */
 {"mul",        0, INSN_CLASS_ZCB_AND_ZMMUL, "Cs,Cw,Ct",  MATCH_C_MUL, MASK_C_MUL, match_opcode, INSN_ALIAS },
 {"mul",        0, INSN_CLASS_ZMMUL, "d,s,t",     MATCH_MUL, MASK_MUL, match_opcode, 0 },
--
2.25.1
Nelson Chu March 8, 2024, 2:27 a.m. UTC | #3 
Thanks, committed :-)

Nelson

On Fri, Mar 8, 2024 at 12:33 AM <jiawei@iscas.ac.cn> wrote:

> I think we can commit it first, since this patch does not include the CAS
> instructions part. I will send those part after Zacas commited. Regards
> Jiawei
>
>
>
> ----- Original Message -----
> *From*: "Nelson Chu" <nelson@rivosinc.com>
> *To*: Jiawei <jiawei@iscas.ac.cn>
> *Cc*: binutils@sourceware.org, kito.cheng@sifive.com, palmer@dabbelt.com,
> jbeulich@suse.com, research_trasio@irq.a4lg.com,
> christoph.muellner@vrull.eu, jeremy.bennett@embecosm.com,
> wuwei2016@iscas.ac.cn, shihua@iscas.ac.cn, shiyulong@iscas.ac.cn,
> chenyixuan@iscas.ac.cn
> *Sent*: Thu, 7 Mar 2024 10:48:12 +0800
> *Subject*: Re: [PATCH v2] RISC-V: Support Zabha extension.
>
> Looks good, thanks.  So should we commit this first?  or should wait until
> zacas committed?
>
> Thanks
> Nelson
>
> On Wed, Feb 28, 2024 at 4:28 PM Jiawei <jiawei@iscas.ac.cn> wrote:
>
>> The Zabha extension[1] supports for byte and halfword
>> atomic memory operations. This patch add all instructions
>> include in Zabha. Further work is waiting Zacas[2] merge.
>>
>> [1] https://github.com/riscv/riscv-zabha/tags
>> [2] https://sourceware.org/pipermail/binutils/2023-May/127700.html
>>
>> Version log:
>> Add new imply relation that Zabha extension implies A extension.
>>
>
diff mbox series

Patch

diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
index 9a121b47121..47966f27565 100644
--- a/bfd/elfxx-riscv.c
+++ b/bfd/elfxx-riscv.c
@@ -1118,6 +1118,7 @@  static struct riscv_implicit_subset riscv_implicit_subsets[] =
   {"v", "d",		check_implicit_always},
   {"v", "zve64d",	check_implicit_always},
   {"v", "zvl128b",	check_implicit_always},
+  {"zabha", "a",	check_implicit_always},
   {"zvfh", "zvfhmin",	check_implicit_always},
   {"zvfh", "zfhmin",	check_implicit_always},
   {"zvfhmin", "zve32f",	check_implicit_always},
@@ -1274,6 +1275,7 @@  static struct riscv_supported_ext riscv_supported_std_z_ext[] =
   {"zihintpause",	ISA_SPEC_CLASS_DRAFT,		2, 0,  0 },
   {"zihpm",		ISA_SPEC_CLASS_DRAFT,		2, 0,  0 },
   {"zmmul",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
+  {"zabha",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
   {"zawrs",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
   {"zfa",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
   {"zfh",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
@@ -2437,6 +2439,8 @@  riscv_multi_subset_supports (riscv_parse_subset_t *rps,
       return riscv_subset_supports (rps, "zmmul");
     case INSN_CLASS_A:
       return riscv_subset_supports (rps, "a");
+    case INSN_CLASS_ZABHA:
+      return riscv_subset_supports (rps, "zabha");
     case INSN_CLASS_ZAWRS:
       return riscv_subset_supports (rps, "zawrs");
     case INSN_CLASS_F:
@@ -2659,6 +2663,8 @@  riscv_multi_subset_supports_ext (riscv_parse_subset_t *rps,
       return _ ("m' or `zmmul");
     case INSN_CLASS_A:
       return "a";
+    case INSN_CLASS_ZABHA:
+      return "zabha";
     case INSN_CLASS_ZAWRS:
       return "zawrs";
     case INSN_CLASS_F:
diff --git a/gas/testsuite/gas/riscv/zabha-32.d b/gas/testsuite/gas/riscv/zabha-32.d
new file mode 100644
index 00000000000..1e6427ea752
--- /dev/null
+++ b/gas/testsuite/gas/riscv/zabha-32.d
@@ -0,0 +1,81 @@ 
+#as: -march=rv32i_zabha
+#source: zabha.s
+#objdump: -d -Mno-aliases
+
+.*:[ 	]+file format .*
+
+Disassembly of section .text:
+
+0+000 <target>:
+[ 	]+[0-9a-f]+:[ 	]+00a5052f[ 	]+amoadd.b[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+08a5052f[ 	]+amoswap.b[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+60a5052f[ 	]+amoand.b[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+40a5052f[ 	]+amoor.b[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+20a5052f[ 	]+amoxor.b[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+a0a5052f[ 	]+amomax.b[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+e0a5052f[ 	]+amomaxu.b[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+80a5052f[ 	]+amomin.b[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+c0a5052f[ 	]+amominu.b[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+04a5052f[ 	]+amoadd.b.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+0ca5052f[ 	]+amoswap.b.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+64a5052f[ 	]+amoand.b.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+44a5052f[ 	]+amoor.b.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+24a5052f[ 	]+amoxor.b.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+a4a5052f[ 	]+amomax.b.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+e4a5052f[ 	]+amomaxu.b.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+84a5052f[ 	]+amomin.b.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+c4a5052f[ 	]+amominu.b.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+02a5052f[ 	]+amoadd.b.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+0aa5052f[ 	]+amoswap.b.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+62a5052f[ 	]+amoand.b.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+42a5052f[ 	]+amoor.b.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+22a5052f[ 	]+amoxor.b.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+a2a5052f[ 	]+amomax.b.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+e2a5052f[ 	]+amomaxu.b.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+82a5052f[ 	]+amomin.b.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+c2a5052f[ 	]+amominu.b.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+06a5052f[ 	]+amoadd.b.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+0ea5052f[ 	]+amoswap.b.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+66a5052f[ 	]+amoand.b.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+46a5052f[ 	]+amoor.b.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+26a5052f[ 	]+amoxor.b.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+a6a5052f[ 	]+amomax.b.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+e6a5052f[ 	]+amomaxu.b.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+86a5052f[ 	]+amomin.b.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+c6a5052f[ 	]+amominu.b.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+00a5152f[ 	]+amoadd.h[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+08a5152f[ 	]+amoswap.h[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+60a5152f[ 	]+amoand.h[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+40a5152f[ 	]+amoor.h[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+20a5152f[ 	]+amoxor.h[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+a0a5152f[ 	]+amomax.h[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+e0a5152f[ 	]+amomaxu.h[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+80a5152f[ 	]+amomin.h[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+c0a5152f[ 	]+amominu.h[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+04a5152f[ 	]+amoadd.h.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+0ca5152f[ 	]+amoswap.h.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+64a5152f[ 	]+amoand.h.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+44a5152f[ 	]+amoor.h.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+24a5152f[ 	]+amoxor.h.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+a4a5152f[ 	]+amomax.h.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+e4a5152f[ 	]+amomaxu.h.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+84a5152f[ 	]+amomin.h.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+c4a5152f[ 	]+amominu.h.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+02a5152f[ 	]+amoadd.h.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+0aa5152f[ 	]+amoswap.h.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+62a5152f[ 	]+amoand.h.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+42a5152f[ 	]+amoor.h.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+22a5152f[ 	]+amoxor.h.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+a2a5152f[ 	]+amomax.h.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+e2a5152f[ 	]+amomaxu.h.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+82a5152f[ 	]+amomin.h.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+c2a5152f[ 	]+amominu.h.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+06a5152f[ 	]+amoadd.h.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+0ea5152f[ 	]+amoswap.h.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+66a5152f[ 	]+amoand.h.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+46a5152f[ 	]+amoor.h.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+26a5152f[ 	]+amoxor.h.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+a6a5152f[ 	]+amomax.h.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+e6a5152f[ 	]+amomaxu.h.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+86a5152f[ 	]+amomin.h.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+c6a5152f[ 	]+amominu.h.aqrl[ 	]+a0,a0,\(a0\)
diff --git a/gas/testsuite/gas/riscv/zabha.d b/gas/testsuite/gas/riscv/zabha.d
new file mode 100644
index 00000000000..7000452b6d1
--- /dev/null
+++ b/gas/testsuite/gas/riscv/zabha.d
@@ -0,0 +1,81 @@ 
+#as: -march=rv64i_zabha
+#source: zabha.s
+#objdump: -d -Mno-aliases
+
+.*:[ 	]+file format .*
+
+Disassembly of section .text:
+
+0+000 <target>:
+[ 	]+[0-9a-f]+:[ 	]+00a5052f[ 	]+amoadd.b[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+08a5052f[ 	]+amoswap.b[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+60a5052f[ 	]+amoand.b[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+40a5052f[ 	]+amoor.b[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+20a5052f[ 	]+amoxor.b[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+a0a5052f[ 	]+amomax.b[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+e0a5052f[ 	]+amomaxu.b[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+80a5052f[ 	]+amomin.b[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+c0a5052f[ 	]+amominu.b[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+04a5052f[ 	]+amoadd.b.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+0ca5052f[ 	]+amoswap.b.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+64a5052f[ 	]+amoand.b.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+44a5052f[ 	]+amoor.b.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+24a5052f[ 	]+amoxor.b.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+a4a5052f[ 	]+amomax.b.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+e4a5052f[ 	]+amomaxu.b.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+84a5052f[ 	]+amomin.b.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+c4a5052f[ 	]+amominu.b.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+02a5052f[ 	]+amoadd.b.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+0aa5052f[ 	]+amoswap.b.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+62a5052f[ 	]+amoand.b.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+42a5052f[ 	]+amoor.b.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+22a5052f[ 	]+amoxor.b.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+a2a5052f[ 	]+amomax.b.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+e2a5052f[ 	]+amomaxu.b.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+82a5052f[ 	]+amomin.b.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+c2a5052f[ 	]+amominu.b.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+06a5052f[ 	]+amoadd.b.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+0ea5052f[ 	]+amoswap.b.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+66a5052f[ 	]+amoand.b.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+46a5052f[ 	]+amoor.b.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+26a5052f[ 	]+amoxor.b.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+a6a5052f[ 	]+amomax.b.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+e6a5052f[ 	]+amomaxu.b.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+86a5052f[ 	]+amomin.b.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+c6a5052f[ 	]+amominu.b.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+00a5152f[ 	]+amoadd.h[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+08a5152f[ 	]+amoswap.h[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+60a5152f[ 	]+amoand.h[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+40a5152f[ 	]+amoor.h[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+20a5152f[ 	]+amoxor.h[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+a0a5152f[ 	]+amomax.h[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+e0a5152f[ 	]+amomaxu.h[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+80a5152f[ 	]+amomin.h[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+c0a5152f[ 	]+amominu.h[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+04a5152f[ 	]+amoadd.h.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+0ca5152f[ 	]+amoswap.h.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+64a5152f[ 	]+amoand.h.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+44a5152f[ 	]+amoor.h.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+24a5152f[ 	]+amoxor.h.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+a4a5152f[ 	]+amomax.h.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+e4a5152f[ 	]+amomaxu.h.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+84a5152f[ 	]+amomin.h.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+c4a5152f[ 	]+amominu.h.aq[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+02a5152f[ 	]+amoadd.h.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+0aa5152f[ 	]+amoswap.h.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+62a5152f[ 	]+amoand.h.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+42a5152f[ 	]+amoor.h.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+22a5152f[ 	]+amoxor.h.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+a2a5152f[ 	]+amomax.h.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+e2a5152f[ 	]+amomaxu.h.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+82a5152f[ 	]+amomin.h.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+c2a5152f[ 	]+amominu.h.rl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+06a5152f[ 	]+amoadd.h.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+0ea5152f[ 	]+amoswap.h.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+66a5152f[ 	]+amoand.h.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+46a5152f[ 	]+amoor.h.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+26a5152f[ 	]+amoxor.h.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+a6a5152f[ 	]+amomax.h.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+e6a5152f[ 	]+amomaxu.h.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+86a5152f[ 	]+amomin.h.aqrl[ 	]+a0,a0,\(a0\)
+[ 	]+[0-9a-f]+:[ 	]+c6a5152f[ 	]+amominu.h.aqrl[ 	]+a0,a0,\(a0\)
diff --git a/gas/testsuite/gas/riscv/zabha.s b/gas/testsuite/gas/riscv/zabha.s
new file mode 100644
index 00000000000..77ecee8efba
--- /dev/null
+++ b/gas/testsuite/gas/riscv/zabha.s
@@ -0,0 +1,73 @@ 
+target:
+	amoadd.b	a0, a0, 0(a0)
+	amoswap.b	a0, a0, 0(a0)
+	amoand.b	a0, a0, 0(a0)
+	amoor.b	a0, a0, 0(a0)
+	amoxor.b	a0, a0, 0(a0)
+	amomax.b	a0, a0, 0(a0)
+	amomaxu.b	a0, a0, 0(a0)
+	amomin.b	a0, a0, 0(a0)
+	amominu.b	a0, a0, 0(a0)
+	amoadd.b.aq	a0, a0, 0(a0)
+	amoswap.b.aq	a0, a0, 0(a0)
+	amoand.b.aq	a0, a0, 0(a0)
+	amoor.b.aq	a0, a0, 0(a0) 
+	amoxor.b.aq	a0, a0, 0(a0)
+	amomax.b.aq	a0, a0, 0(a0)
+	amomaxu.b.aq	a0, a0, 0(a0)
+	amomin.b.aq	a0, a0, 0(a0)
+	amominu.b.aq	a0, a0, 0(a0)
+	amoadd.b.rl	a0, a0, 0(a0)
+	amoswap.b.rl	a0, a0, 0(a0)
+	amoand.b.rl	a0, a0, 0(a0)
+	amoor.b.rl	a0, a0, 0(a0) 
+	amoxor.b.rl	a0, a0, 0(a0)
+	amomax.b.rl	a0, a0, 0(a0)
+	amomaxu.b.rl	a0, a0, 0(a0)
+	amomin.b.rl	a0, a0, 0(a0)
+	amominu.b.rl	a0, a0, 0(a0)
+	amoadd.b.aqrl	a0, a0, 0(a0)
+	amoswap.b.aqrl	a0, a0, 0(a0)
+	amoand.b.aqrl	a0, a0, 0(a0)
+	amoor.b.aqrl	a0, a0, 0(a0)
+	amoxor.b.aqrl	a0, a0, 0(a0)
+	amomax.b.aqrl	a0, a0, 0(a0)
+	amomaxu.b.aqrl	a0, a0, 0(a0)
+	amomin.b.aqrl	a0, a0, 0(a0)
+	amominu.b.aqrl	a0, a0, 0(a0)
+	amoadd.h	a0, a0, 0(a0)
+	amoswap.h	a0, a0, 0(a0)
+	amoand.h	a0, a0, 0(a0)
+	amoor.h	a0, a0, 0(a0)
+	amoxor.h	a0, a0, 0(a0)
+	amomax.h	a0, a0, 0(a0)
+	amomaxu.h	a0, a0, 0(a0)
+	amomin.h	a0, a0, 0(a0)
+	amominu.h	a0, a0, 0(a0)
+	amoadd.h.aq	a0, a0, 0(a0)
+	amoswap.h.aq	a0, a0, 0(a0)
+	amoand.h.aq	a0, a0, 0(a0)
+	amoor.h.aq	a0, a0, 0(a0) 
+	amoxor.h.aq	a0, a0, 0(a0)
+	amomax.h.aq	a0, a0, 0(a0)
+	amomaxu.h.aq	a0, a0, 0(a0)
+	amomin.h.aq	a0, a0, 0(a0)
+	amominu.h.aq	a0, a0, 0(a0)
+	amoadd.h.rl	a0, a0, 0(a0)
+	amoswap.h.rl	a0, a0, 0(a0)
+	amoand.h.rl	a0, a0, 0(a0)
+	amoor.h.rl	a0, a0, 0(a0) 
+	amoxor.h.rl	a0, a0, 0(a0)
+	amomax.h.rl	a0, a0, 0(a0)
+	amomaxu.h.rl	a0, a0, 0(a0)
+	amomin.h.rl	a0, a0, 0(a0)
+	amominu.h.rl	a0, a0, 0(a0)
+	amoadd.h.aqrl	a0, a0, 0(a0)
+	amoswap.h.aqrl	a0, a0, 0(a0)
+	amoand.h.aqrl	a0, a0, 0(a0)
+	amoor.h.aqrl	a0, a0, 0(a0)
+	amoxor.h.aqrl	a0, a0, 0(a0)
+	amomax.h.aqrl	a0, a0, 0(a0)
+	amomaxu.h.aqrl	a0, a0, 0(a0)
+	amomin.h.aqrl	a0, a0, 0(a0)
+	amominu.h.aqrl	a0, a0, 0(a0)
diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
index e77b49a6298..587d81b5e3c 100644
--- a/include/opcode/riscv-opc.h
+++ b/include/opcode/riscv-opc.h
@@ -235,6 +235,42 @@ 
 #define MASK_LR_D  0xf9f0707f
 #define MATCH_SC_D 0x1800302f
 #define MASK_SC_D  0xf800707f
+#define MATCH_AMOADD_B 0x02f
+#define MASK_AMOADD_B  0xf800707f
+#define MATCH_AMOXOR_B 0x2000002f
+#define MASK_AMOXOR_B  0xf800707f
+#define MATCH_AMOOR_B 0x4000002f
+#define MASK_AMOOR_B  0xf800707f
+#define MATCH_AMOAND_B 0x6000002f
+#define MASK_AMOAND_B  0xf800707f
+#define MATCH_AMOMIN_B 0x8000002f
+#define MASK_AMOMIN_B  0xf800707f
+#define MATCH_AMOMAX_B 0xa000002f
+#define MASK_AMOMAX_B  0xf800707f
+#define MATCH_AMOMINU_B 0xc000002f
+#define MASK_AMOMINU_B  0xf800707f
+#define MATCH_AMOMAXU_B 0xe000002f
+#define MASK_AMOMAXU_B  0xf800707f
+#define MATCH_AMOSWAP_B 0x800002f
+#define MASK_AMOSWAP_B  0xf800707f
+#define MATCH_AMOADD_H 0x102f
+#define MASK_AMOADD_H  0xf800707f
+#define MATCH_AMOXOR_H 0x2000102f
+#define MASK_AMOXOR_H  0xf800707f
+#define MATCH_AMOOR_H 0x4000102f
+#define MASK_AMOOR_H  0xf800707f
+#define MATCH_AMOAND_H 0x6000102f
+#define MASK_AMOAND_H  0xf800707f
+#define MATCH_AMOMIN_H 0x8000102f
+#define MASK_AMOMIN_H  0xf800707f
+#define MATCH_AMOMAX_H 0xa000102f
+#define MASK_AMOMAX_H  0xf800707f
+#define MATCH_AMOMINU_H 0xc000102f
+#define MASK_AMOMINU_H  0xf800707f
+#define MATCH_AMOMAXU_H 0xe000102f
+#define MASK_AMOMAXU_H  0xf800707f
+#define MATCH_AMOSWAP_H 0x800102f
+#define MASK_AMOSWAP_H  0xf800707f
 #define MATCH_ECALL 0x73
 #define MASK_ECALL  0xffffffff
 #define MATCH_EBREAK 0x100073
@@ -3581,6 +3617,24 @@  DECLARE_INSN(amomaxu_d, MATCH_AMOMAXU_D, MASK_AMOMAXU_D)
 DECLARE_INSN(amoswap_d, MATCH_AMOSWAP_D, MASK_AMOSWAP_D)
 DECLARE_INSN(lr_d, MATCH_LR_D, MASK_LR_D)
 DECLARE_INSN(sc_d, MATCH_SC_D, MASK_SC_D)
+DECLARE_INSN(amoadd_b, MATCH_AMOADD_B, MASK_AMOADD_B)
+DECLARE_INSN(amoxor_b, MATCH_AMOXOR_B, MASK_AMOXOR_B)
+DECLARE_INSN(amoor_b, MATCH_AMOOR_B, MASK_AMOOR_B)
+DECLARE_INSN(amoand_b, MATCH_AMOAND_B, MASK_AMOAND_B)
+DECLARE_INSN(amomin_b, MATCH_AMOMIN_B, MASK_AMOMIN_B)
+DECLARE_INSN(amomax_b, MATCH_AMOMAX_B, MASK_AMOMAX_B)
+DECLARE_INSN(amominu_b, MATCH_AMOMINU_B, MASK_AMOMINU_B)
+DECLARE_INSN(amomaxu_b, MATCH_AMOMAXU_B, MASK_AMOMAXU_B)
+DECLARE_INSN(amoswap_b, MATCH_AMOSWAP_B, MASK_AMOSWAP_B)
+DECLARE_INSN(amoadd_h, MATCH_AMOADD_H, MASK_AMOADD_H)
+DECLARE_INSN(amoxor_h, MATCH_AMOXOR_H, MASK_AMOXOR_H)
+DECLARE_INSN(amoor_h, MATCH_AMOOR_H, MASK_AMOOR_H)
+DECLARE_INSN(amoand_h, MATCH_AMOAND_H, MASK_AMOAND_H)
+DECLARE_INSN(amomin_h, MATCH_AMOMIN_H, MASK_AMOMIN_H)
+DECLARE_INSN(amomax_h, MATCH_AMOMAX_H, MASK_AMOMAX_H)
+DECLARE_INSN(amominu_h, MATCH_AMOMINU_H, MASK_AMOMINU_H)
+DECLARE_INSN(amomaxu_h, MATCH_AMOMAXU_H, MASK_AMOMAXU_H)
+DECLARE_INSN(amoswap_h, MATCH_AMOSWAP_H, MASK_AMOSWAP_H)
 DECLARE_INSN(ecall, MATCH_ECALL, MASK_ECALL)
 DECLARE_INSN(ebreak, MATCH_EBREAK, MASK_EBREAK)
 DECLARE_INSN(uret, MATCH_URET, MASK_URET)
diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h
index adea7dbc794..3245873aa6d 100644
--- a/include/opcode/riscv.h
+++ b/include/opcode/riscv.h
@@ -468,6 +468,7 @@  enum riscv_insn_class
   INSN_CLASS_ZICBOM,
   INSN_CLASS_ZICBOP,
   INSN_CLASS_ZICBOZ,
+  INSN_CLASS_ZABHA,
   INSN_CLASS_H,
   INSN_CLASS_XCVMAC,
   INSN_CLASS_XCVALU,
diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c
index fdd05ac75dc..edb8f59249e 100644
--- a/opcodes/riscv-opc.c
+++ b/opcodes/riscv-opc.c
@@ -659,6 +659,80 @@  const struct riscv_opcode riscv_opcodes[] =
 {"amomin.d.aqrl",  64, INSN_CLASS_A, "d,t,0(s)", MATCH_AMOMIN_D|MASK_AQRL, MASK_AMOMIN_D|MASK_AQRL, match_opcode, INSN_DREF|INSN_8_BYTE },
 {"amominu.d.aqrl", 64, INSN_CLASS_A, "d,t,0(s)", MATCH_AMOMINU_D|MASK_AQRL, MASK_AMOMINU_D|MASK_AQRL, match_opcode, INSN_DREF|INSN_8_BYTE },
 
+/* Byte and Halfword Atomic Memory Operations instruction subset.  */
+{"amoadd.b",        0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOADD_B, MASK_AMOADD_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoswap.b",       0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOSWAP_B, MASK_AMOSWAP_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoand.b",        0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOAND_B, MASK_AMOAND_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoor.b",         0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOOR_B, MASK_AMOOR_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoxor.b",        0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOXOR_B, MASK_AMOXOR_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amomax.b",        0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAX_B, MASK_AMOMAX_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amomaxu.b",       0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAXU_B, MASK_AMOMAXU_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amomin.b",        0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMIN_B, MASK_AMOMIN_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amominu.b",       0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMINU_B, MASK_AMOMINU_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoadd.b.aq",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOADD_B|MASK_AQ, MASK_AMOADD_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoswap.b.aq",    0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOSWAP_B|MASK_AQ, MASK_AMOSWAP_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoand.b.aq",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOAND_B|MASK_AQ, MASK_AMOAND_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoor.b.aq",      0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOOR_B|MASK_AQ, MASK_AMOOR_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoxor.b.aq",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOXOR_B|MASK_AQ, MASK_AMOXOR_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amomax.b.aq",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAX_B|MASK_AQ, MASK_AMOMAX_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amomaxu.b.aq",    0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAXU_B|MASK_AQ, MASK_AMOMAXU_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amomin.b.aq",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMIN_B|MASK_AQ, MASK_AMOMIN_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amominu.b.aq",    0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMINU_B|MASK_AQ, MASK_AMOMINU_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoadd.b.rl",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOADD_B|MASK_RL, MASK_AMOADD_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoswap.b.rl",    0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOSWAP_B|MASK_RL, MASK_AMOSWAP_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoand.b.rl",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOAND_B|MASK_RL, MASK_AMOAND_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoor.b.rl",      0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOOR_B|MASK_RL, MASK_AMOOR_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoxor.b.rl",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOXOR_B|MASK_RL, MASK_AMOXOR_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amomax.b.rl",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAX_B|MASK_RL, MASK_AMOMAX_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amomaxu.b.rl",    0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAXU_B|MASK_RL, MASK_AMOMAXU_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amomin.b.rl",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMIN_B|MASK_RL, MASK_AMOMIN_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amominu.b.rl",    0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMINU_B|MASK_RL, MASK_AMOMINU_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoadd.b.aqrl",   0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOADD_B|MASK_AQRL, MASK_AMOADD_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoswap.b.aqrl",  0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOSWAP_B|MASK_AQRL, MASK_AMOSWAP_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoand.b.aqrl",   0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOAND_B|MASK_AQRL, MASK_AMOAND_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoor.b.aqrl",    0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOOR_B|MASK_AQRL, MASK_AMOOR_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoxor.b.aqrl",   0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOXOR_B|MASK_AQRL, MASK_AMOXOR_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amomax.b.aqrl",   0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAX_B|MASK_AQRL, MASK_AMOMAX_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amomaxu.b.aqrl",  0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAXU_B|MASK_AQRL, MASK_AMOMAXU_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amomin.b.aqrl",   0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMIN_B|MASK_AQRL, MASK_AMOMIN_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amominu.b.aqrl",  0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMINU_B|MASK_AQRL, MASK_AMOMINU_B|MASK_AQRL, match_opcode, INSN_DREF|INSN_1_BYTE },
+{"amoadd.h",        0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOADD_H, MASK_AMOADD_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoswap.h",       0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOSWAP_H, MASK_AMOSWAP_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoand.h",        0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOAND_H, MASK_AMOAND_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoor.h",         0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOOR_H, MASK_AMOOR_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoxor.h",        0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOXOR_H, MASK_AMOXOR_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amomax.h",        0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAX_H, MASK_AMOMAX_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amomaxu.h",       0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAXU_H, MASK_AMOMAXU_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amomin.h",        0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMIN_H, MASK_AMOMIN_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amominu.h",       0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMINU_H, MASK_AMOMINU_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoadd.h.aq",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOADD_H|MASK_AQ, MASK_AMOADD_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoswap.h.aq",    0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOSWAP_H|MASK_AQ, MASK_AMOSWAP_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoand.h.aq",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOAND_H|MASK_AQ, MASK_AMOAND_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoor.h.aq",      0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOOR_H|MASK_AQ, MASK_AMOOR_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoxor.h.aq",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOXOR_H|MASK_AQ, MASK_AMOXOR_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amomax.h.aq",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAX_H|MASK_AQ, MASK_AMOMAX_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amomaxu.h.aq",    0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAXU_H|MASK_AQ, MASK_AMOMAXU_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amomin.h.aq",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMIN_H|MASK_AQ, MASK_AMOMIN_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amominu.h.aq",    0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMINU_H|MASK_AQ, MASK_AMOMINU_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoadd.h.rl",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOADD_H|MASK_RL, MASK_AMOADD_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoswap.h.rl",    0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOSWAP_H|MASK_RL, MASK_AMOSWAP_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoand.h.rl",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOAND_H|MASK_RL, MASK_AMOAND_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoor.h.rl",      0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOOR_H|MASK_RL, MASK_AMOOR_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoxor.h.rl",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOXOR_H|MASK_RL, MASK_AMOXOR_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amomax.h.rl",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAX_H|MASK_RL, MASK_AMOMAX_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amomaxu.h.rl",    0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAXU_H|MASK_RL, MASK_AMOMAXU_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amomin.h.rl",     0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMIN_H|MASK_RL, MASK_AMOMIN_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amominu.h.rl",    0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMINU_H|MASK_RL, MASK_AMOMINU_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoadd.h.aqrl",   0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOADD_H|MASK_AQRL, MASK_AMOADD_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoswap.h.aqrl",  0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOSWAP_H|MASK_AQRL, MASK_AMOSWAP_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoand.h.aqrl",   0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOAND_H|MASK_AQRL, MASK_AMOAND_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoor.h.aqrl",    0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOOR_H|MASK_AQRL, MASK_AMOOR_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amoxor.h.aqrl",   0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOXOR_H|MASK_AQRL, MASK_AMOXOR_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amomax.h.aqrl",   0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAX_H|MASK_AQRL, MASK_AMOMAX_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amomaxu.h.aqrl",  0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMAXU_H|MASK_AQRL, MASK_AMOMAXU_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amomin.h.aqrl",   0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMIN_H|MASK_AQRL, MASK_AMOMIN_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+{"amominu.h.aqrl",  0, INSN_CLASS_ZABHA, "d,t,0(s)", MATCH_AMOMINU_H|MASK_AQRL, MASK_AMOMINU_H|MASK_AQRL, match_opcode, INSN_DREF|INSN_2_BYTE },
+
 /* Multiply/Divide instruction subset.  */
 {"mul",        0, INSN_CLASS_ZCB_AND_ZMMUL, "Cs,Cw,Ct",  MATCH_C_MUL, MASK_C_MUL, match_opcode, INSN_ALIAS },
 {"mul",        0, INSN_CLASS_ZMMUL, "d,s,t",     MATCH_MUL, MASK_MUL, match_opcode, 0 },