From patchwork Wed Jan 3 07:43:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Indu Bhagat X-Patchwork-Id: 83218 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 2457138582BF for ; Wed, 3 Jan 2024 07:44:40 +0000 (GMT) X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mx0a-00069f02.pphosted.com (mx0a-00069f02.pphosted.com [205.220.165.32]) by sourceware.org (Postfix) with ESMTPS id 057AE3858D28 for ; Wed, 3 Jan 2024 07:44:00 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 057AE3858D28 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=oracle.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=oracle.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 057AE3858D28 Authentication-Results: server2.sourceware.org; arc=pass smtp.remote-ip=205.220.165.32 ARC-Seal: i=2; a=rsa-sha256; d=sourceware.org; s=key; t=1704267844; cv=pass; b=FLJrCC5328rC6FZwiJrfhq+4h4LWA91dTojiLkA38deahWaOFv9HbqzKtPF5TIQuU+KtXZxrwLz0LZzWAmAkIf16qeztNyS2+czfaDfIoQyRPfw16aMDNHl/R8X9EGpzS+32bQ1ppuCIiEu3lru+Q9+O/AeNphe5RlCoE6nxo5U= ARC-Message-Signature: i=2; a=rsa-sha256; d=sourceware.org; s=key; t=1704267844; c=relaxed/simple; bh=xYh5XDPf061bGg23TPqet8OXFfUvw0pN82B06aCfsy0=; h=DKIM-Signature:DKIM-Signature:From:To:Subject:Date:Message-ID: MIME-Version; b=spw84NfSlV0YGTzJ9Vljbaauhwoiwp7rkFkeqqaM78Tm+ojwdn6PSp2JkTZkAzFFbPzr2n23lCg64eC/B6gF2FjUE23Sbd6KNzU/UmTWPzYf8vjwqsQkmVmyk3uMJMarqbwvL6usV7j14VxBhvL1SxSx9lDGAx67/FKj+bVJ+yc= ARC-Authentication-Results: i=2; server2.sourceware.org Received: from pps.filterd (m0333521.ppops.net [127.0.0.1]) by mx0b-00069f02.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 4030iq03000853 for ; Wed, 3 Jan 2024 07:43:59 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : content-transfer-encoding : content-type : mime-version; s=corp-2023-11-20; bh=Scs2qjIRNlBGE4d335bhFj5701cgTGlq0eh+aIzZhEc=; b=BOmaKhYdS+oLBCNaOhhUcK54QWutorM4uxJpcu8kxmGdWql6xE3NIKGJWE1pacskL57G FzvV6kG0I+VqHme6Eiin+crANBIT6c8qCD7CFvdaMng+VtMlA4KDEEOtnFE/FmnJ06VH h0TdQgzZ4TQYSAjmkxkL5zZtTJDHkm9baEcQ+XY+JRF6gjFxOX3VjiC+WIPalk+RXza4 V/JlCFJOWeDusZyzqhBP2VmPUjX45YuchwFjNJAauwPEwdku3WkcTLQv0aR2CkZvC0g3 yvTKJmXA8iNAP00Bied1Bb7Z3aDxDZQR4S7wdIFb6kvt5OnPKZV+KIEWIRwTdSvUz2k9 ZQ== Received: from phxpaimrmta02.imrmtpd1.prodappphxaev1.oraclevcn.com (phxpaimrmta02.appoci.oracle.com [147.154.114.232]) by mx0b-00069f02.pphosted.com (PPS) with ESMTPS id 3vaa4cch92-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Wed, 03 Jan 2024 07:43:59 +0000 Received: from pps.filterd (phxpaimrmta02.imrmtpd1.prodappphxaev1.oraclevcn.com [127.0.0.1]) by phxpaimrmta02.imrmtpd1.prodappphxaev1.oraclevcn.com (8.17.1.19/8.17.1.19) with ESMTP id 4037UHDu035959 for ; Wed, 3 Jan 2024 07:43:46 GMT Received: from nam04-mw2-obe.outbound.protection.outlook.com (mail-mw2nam04lp2169.outbound.protection.outlook.com [104.47.73.169]) by phxpaimrmta02.imrmtpd1.prodappphxaev1.oraclevcn.com (PPS) with ESMTPS id 3va9n8yvd1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Wed, 03 Jan 2024 07:43:46 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=KLpHFGZ5kSqKqSEX7vze6FFV3ovaCnv84r6HuZu4NOcpIAHKjo2JBHhdrKEPbvMoQoxIAuaL8NNghogqValHfHksIjcIPtSrqr95V1K02ZUbPbSyFCmjXeX26SlVMA4DnHtINpsZ+2vaOq0HH0U/KmUdrk+38Md6zVBXWn4nY55GCND0uFQjThjImXzvyZOeIWLv9SzIgk0BGYQ2qqe6nPv0SM9QViE2HxY/h1AtF24yW9j4CD883bOQmaphNs6ntdlTCtlbMjQtcFGKqdsNvCKW370VTTLjqwY7jPsVKtYEho6/uxOxbsLryhleddf08eIgowdbBQzodtEIyKapmA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=Scs2qjIRNlBGE4d335bhFj5701cgTGlq0eh+aIzZhEc=; b=EwpWoVQ8STUL7vtB8YoXqd9u4s7xk8qxdHJpvksx/9Ezm5WYXgAflif5QMSRk8hGXiSWOGK75Y6g3ThQ9KVfgVnRzPru0R1/HprBTTtKT6oCh3n1tr9qr9eD32rr247bWpPUKLcYKcET8LBkmTk3FnbW4vDItUf0rHV7BIOtdv7RyyUcXq4cp0uJI9jWHvALRq4UEtArh2BPig0nwYyw62SSY3zCnZW0LJKEV2TurmPdB2JGiSL097GbCXMIRwGlXECPFMSb2tY9/0noGvX3Wo5mHSVm2dRiiosgCjtG2f3wGZg5K6D+kJHvJ+dm/o6mRBnQgyL40Kgr575IMGDWVA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=oracle.com; dmarc=pass action=none header.from=oracle.com; dkim=pass header.d=oracle.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.onmicrosoft.com; s=selector2-oracle-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Scs2qjIRNlBGE4d335bhFj5701cgTGlq0eh+aIzZhEc=; b=qBITmpy02lrEtnEtf7sAwXHfB8SNDJdmu2ERVz4nTnBDsrRfxeHuWfC7i8P3jCcRMvuW1VQc5NyLdSX2K92bOeYQmN1Dh6xtoLKXwSWJ79TGRXzd5/2Ef/w63J0VjNM2q4COnzq691VY6p6oX/YgswmC5CzcnRdCbqQxtexUYWw= Received: from MWHPR1001MB2158.namprd10.prod.outlook.com (2603:10b6:301:2d::17) by SJ2PR10MB7828.namprd10.prod.outlook.com (2603:10b6:a03:56c::6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7135.25; Wed, 3 Jan 2024 07:43:44 +0000 Received: from MWHPR1001MB2158.namprd10.prod.outlook.com ([fe80::fde7:fb92:8ea1:a5ac]) by MWHPR1001MB2158.namprd10.prod.outlook.com ([fe80::fde7:fb92:8ea1:a5ac%4]) with mapi id 15.20.7159.013; Wed, 3 Jan 2024 07:43:44 +0000 From: Indu Bhagat To: binutils@sourceware.org Cc: Indu Bhagat Subject: [PATCH, V4 09/14] opcodes: i386: new marker for insns that implicitly update stack pointer Date: Tue, 2 Jan 2024 23:43:41 -0800 Message-ID: <20240103074341.3858511-1-indu.bhagat@oracle.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240103071526.3846985-1-indu.bhagat@oracle.com> References: <20240103071526.3846985-1-indu.bhagat@oracle.com> X-ClientProxiedBy: MW4PR03CA0088.namprd03.prod.outlook.com (2603:10b6:303:b6::33) To MWHPR1001MB2158.namprd10.prod.outlook.com (2603:10b6:301:2d::17) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWHPR1001MB2158:EE_|SJ2PR10MB7828:EE_ X-MS-Office365-Filtering-Correlation-Id: 87b3961d-48cb-4de6-d21c-08dc0c2fb659 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 3LAO6atNB/tvyL43DLNKwnoZ/OL8/TD7aH6VOHUwdzxPZQQCq3QEfTJ0VNz8YPDMsrqN8+bOqD0B3GNaP66ioAxgzqCFiAzMniRK27Zb+lZFNMH/Sa6NXpEtp/pXvCgxRDObESsyKaAEhobZHwnNIwG6pja7593fH8dWGEDPNLQ9lXSNhvi7wZuGYcUjJuMEYA1hHXhK63FoYCQyEBlMTdPNJEZEU+MDuBWSaMwYpTd0VsQQOUw7qvVe6xhKx83TNDf6PrdPFrEQIF4IzZS9RvYPQOv5UYZQJinODBPYfh+LFBE+/pRybZsLcbOxysc61OHqBY7LXJYnU18B7fIfI/24Y5dpiQ8JVigmdiPzzf0jb3tq5GAnHASv5W0tQvZFeRIr37BJhyWHDEwBFJa66tEQJ6B07Ew2fCEsnueHs7tSWbnw2iqjV0AqLs+toA9s2W5MHqn0n4kP8O0ewjQ50KJlV2XvtEUTMfp/K9jRuVmLm4la1Px3HpbIHN//fs4qaFMab4elVpARsFi69ab7rYzZGdQXTFAlLHCH8a/f8xET66Cr/26qTwpLJYfgGsqg X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:MWHPR1001MB2158.namprd10.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230031)(396003)(346002)(376002)(136003)(39860400002)(366004)(230922051799003)(451199024)(64100799003)(186009)(1800799012)(6666004)(6506007)(6512007)(6486002)(107886003)(83380400001)(2616005)(1076003)(44832011)(30864003)(2906002)(41300700001)(4326008)(316002)(66476007)(15650500001)(8936002)(8676002)(66556008)(66946007)(5660300002)(6916009)(478600001)(38100700002)(86362001)(36756003); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: vQktpE7xTK+bjD18uT52CKqMV7VG6SYx1ZSICKN8XoRYq8i4wCrz+d6gO4qJyGMXh1f2UIsOmRDRIT4/FRQSLVRHQ7rrldlVedrxxEQFhv/vfZQe7yMV6f6oFHkVNflz4yBwb8oZp6tI8xjk6N+mkss1dQ2FnMq5R16qW3HDYVX+r4ED7bsfq+bC2qm0Q06nhgEnNdJg+3vMqvSAZFmcX/nU6MtrR2tZiPza+Gl//4o4USgoeGu52xCCxpirA6UkvCPurrs+MrcdpM8tf8KSAu6UD0A02GCw6V8qbDV0kyE50oSy5k4l2lHl0cEJfxqpj4ehx8ySOsX5gfiPlNyB/yWouAcm1AU4OV3wOqM2iIIovv2KlwBWcRz9g45/1C4PPZsY00RfquIjaVaJSjTBPhq9P3cPnl+rZxRhcAlLtkGE9YuzSUO1ecKTMYlE4JK2TsDCImNgYXbrCtVMDZafxXo3zgkmrKnitYfDU6dctO8d9lfsHl6sEtVjPDL0aym4m3OAUrvGHRbjWVjn4/wqEAgmcs2/nCO2HjpETkKmVY4R+mwly/eeimQqHpV4HzO1NdTnkEJrM6t9LqQJsjFyCCrKwhYUDirUqxYQ5I1+Uop0COKdQhPeETj9l9T+ky45ilf8FhyJ63tBwWrFkLCQDYJiINawnZ57k27ranIt1gdC3rQlHMT/1lHGpkQaw0MGjQU/2k9R/4dNcziPB7xqb9uTVQ5fFqtc8fS5I+42AmqxriGeUcxPo5sJphXu6jf1DvdgppaIrFHBCYImqlsxR51yUojLpcCkKW3oh7yUHOF8XTKSpggOAhhiuS5zAMWyac8sABKtHGVwiEPvtu3LdLPEC/mO6jBrUOjMnms3irUfxwFPFaSBc/ltMptVJH58yDqB44EsWAJ/7O1DfPwHMjw9LRKpE5YrOYX0g0LoMSiO+bbtwSrSndtvDnmy+d39ewhMsE8GNXBXxzy+brKSaMj/LeevRAwM790KSlIpGEgYGkXUf4VCqtUtGmIXVgfcfL4O4SeO5o/UwdNVTrH0pYz323l6F0uE7JZcLRxwxXUivGCc193rFgQQTZuR1DjFLT0PxQpCGKzxx+YvDeXkQHwPnardDRW3gee7H+cQT6t81aYwBEvASCdbRkPLQNQsQBlShy1/ADHPI0NCqTjY23hes3PwySKTDuBCrsg35QAk8dg9ARTPIEztwFpmD9SJGSTIC0iK17a4VKRXyArfFFknkDUGptY2JdDS8dCsYO1wLyb/pwUfSKMA8CpxdzD+zT19RxVAjbv7cTUFRGEVwrlHi3YZ9ytEWjR9RRce0eMVGlaLmPvCnWpXGBfvTkXhfZVaxY47GH2OSsIXwQUiGSTRi/K1qIjN8tMx5CccEB4whbXhOZy3yOS6JNTZzEw44k5B07uJkLlrn2rFsD0QoHz42Bonl0Ok54B2K+5biEdWmeh9BF92HVVsdPfDEFm9U7lTz6sVLIxQ/5klAf0xUhcU6PuEHlEdwhCC5EyjNUMf2AB20Pjfzx6PSv2gMo6tMFTEjlRbfo0YlyD6vhFoCsjlTLRSot+rHiO5Thb6m+XT7iEGtbXQqEOApOvgpkD/E3/V2rWJ0uYEM1neQ7g60zliAZTGAeKLqeKfzvUwQTk= X-MS-Exchange-AntiSpam-ExternalHop-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-ExternalHop-MessageData-0: kSFXp2FnGF4CByK7k7NccW/XmZFeUk+izFYWSipGsEuHpDuCrpazQNM1Pu1agPeb+wkB4z53TwmPhV+fMq0/4iEXpTxzqMDVYSYssWxenR1MhAEcgHHkWXqD2++iaqfjAZZpt+0AG5+s2pe3gY79P8+gbtRMgfq+oZIkySPBFE7ZrKB0ZpIADENu57sceRSXkxFCxkFVvSHl+u241th+cx05t/v/sQff3d6P27Wmrcc0xgFIdYp6s2PoaxYR0CiBJzUzpK6g9ZW+a5Xp7spYFQDleO840ZsBOCM54ija6BLdU2Ybs/7hZpaAGwk8f1zr71sAOvciGhXqeLTVPHL21ZH7jERjZphaEK/cmoOaLHrrcvWbQZiEc8QpLVM4Be/ylWzA1TsPbDPB8vuo0G4VpNUGxkgJ4nSmopCsQtB/sQ8ncN9NWUPdSj1oBe6CIpfa70TNCppI+3W65TyC40ZmDzi8cM5I+KouIGSsyKveIfxqkTohk6eV052/u2Enemn1vkxnVede/SnkIzaX3e3uFqcmpbhDS+pEo3HNocUpFTqrvkCEDsXbFbJ/rCt0Yg1jdHAXDVphoDBlo7BUNDnO783lWlubjdcZZzloAT5Ydc4= X-OriginatorOrg: oracle.com X-MS-Exchange-CrossTenant-Network-Message-Id: 87b3961d-48cb-4de6-d21c-08dc0c2fb659 X-MS-Exchange-CrossTenant-AuthSource: MWHPR1001MB2158.namprd10.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Jan 2024 07:43:44.3385 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 4e2c6054-71cb-48f1-bd6c-3a9705aca71b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: kQrxGYAJWvwaG3Bj4a5FewwjJttPrlD327XLcA0jg/r8PehO2PNOWbfGxyonZ6xNuI3SEzFmp96c8eA8aPRqdQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR10MB7828 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-03_02,2024-01-02_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 phishscore=0 suspectscore=0 bulkscore=0 spamscore=0 adultscore=0 mlxscore=0 mlxlogscore=680 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2401030063 X-Proofpoint-GUID: Lf26iRaSvqOnOkzKieEAhg-E4L5AzgEq X-Proofpoint-ORIG-GUID: Lf26iRaSvqOnOkzKieEAhg-E4L5AzgEq X-Spam-Status: No, score=-13.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H5, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces+patchwork=sourceware.org@sourceware.org [New in V4] Some x86 instructions affect the stack pointer implicitly. Add a new marker in the instruction specification for the same. This will be useful for SCFI implmentation to ensure its correctness. Mark all push, pop, call, ret, enter, leave, INT, iret instructions. PS: Removed i386-tbl.h diffs from the patch to keep the message size below 400 KB. opcodes/ * i386-gen.c: Update opcode_modifiers. * i386-opc.h: Add a new marker ImplicitStackOp. * i386-opc.tbl: Update the affected instructions. * i386-tbl.h: Regenerated. --- opcodes/i386-gen.c | 1 + opcodes/i386-opc.h | 4 + opcodes/i386-opc.tbl | 104 +- opcodes/i386-tbl.h | 11655 +++++++++++++++++++++++++++-------------- 4 files changed, 7827 insertions(+), 3937 deletions(-) diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 508b441a343..f6610952c63 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -488,6 +488,7 @@ static bitfield opcode_modifiers[] = BITFIELD (ISA64), BITFIELD (NoEgpr), BITFIELD (NF), + BITFIELD (ImplicitStackOp), }; #define CLASS(n) #n, n diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index 8db6c51538a..8389832e18f 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -750,6 +750,9 @@ enum /* No CSPAZO flags update indication. */ NF, + /* Instruction updates stack pointer implicitly. */ + ImplicitStackOp, + /* The last bitfield in i386_opcode_modifier. */ Opcode_Modifier_Num }; @@ -796,6 +799,7 @@ typedef struct i386_opcode_modifier unsigned int isa64:2; unsigned int noegpr:1; unsigned int nf:1; + unsigned int implicitstackop:1; } i386_opcode_modifier; /* Operand classes. */ diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index edd9f73ae22..5895957aad3 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -223,32 +223,32 @@ movzw, 0xfb7, i386, Modrm|No_bSuf|No_wSuf|No_sSuf, { Reg16|Unspecified|BaseIndex movzx, 0xfb6, i386, W|Modrm|No_lSuf|No_sSuf|No_qSuf, { Reg8|Reg16|Unspecified|BaseIndex, Reg16|Reg32|Reg64 } // Push instructions. -push, 0x50, No64, No_bSuf|No_sSuf|No_qSuf, { Reg16|Reg32 } -push, 0xff/6, No64, Modrm|DefaultSize|No_bSuf|No_sSuf|No_qSuf, { Reg16|Reg32|Unspecified|BaseIndex } -push, 0x6a, i186&No64, DefaultSize|No_bSuf|No_sSuf|No_qSuf, { Imm8S } -push, 0x68, i186&No64, DefaultSize|No_bSuf|No_sSuf|No_qSuf, { Imm16|Imm32 } -push, 0x6, No64, DefaultSize|No_bSuf|No_sSuf|No_qSuf, { SReg } +push, 0x50, No64, ImplicitStackOp|No_bSuf|No_sSuf|No_qSuf, { Reg16|Reg32 } +push, 0xff/6, No64, Modrm|ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf, { Reg16|Reg32|Unspecified|BaseIndex } +push, 0x6a, i186&No64, ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf, { Imm8S } +push, 0x68, i186&No64, ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf, { Imm16|Imm32 } +push, 0x6, No64, ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf, { SReg } // In 64bit mode, the operand size is implicitly 64bit. -push, 0x50, x64, No_bSuf|No_lSuf|No_sSuf|NoRex64, { Reg16|Reg64 } -pushp, 0x50, APX_F, No_bSuf|No_wSuf|No_lSuf|No_sSuf|Rex2, { Reg64 } -push, 0xff/6, x64, Modrm|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, { Reg16|Reg64|Unspecified|BaseIndex } -push, 0x6a, x64, DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, { Imm8S } -push, 0x68, x64, DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, { Imm16|Imm32S } -push, 0xfa0, x64, DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, { SReg } +push, 0x50, x64, ImplicitStackOp|No_bSuf|No_lSuf|No_sSuf|NoRex64, { Reg16|Reg64 } +pushp, 0x50, APX_F, ImplicitStackOp|No_bSuf|No_wSuf|No_lSuf|No_sSuf|Rex2, { Reg64 } +push, 0xff/6, x64, Modrm|ImplicitStackOp|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, { Reg16|Reg64|Unspecified|BaseIndex } +push, 0x6a, x64, ImplicitStackOp|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, { Imm8S } +push, 0x68, x64, ImplicitStackOp|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, { Imm16|Imm32S } +push, 0xfa0, x64, ImplicitStackOp|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, { SReg } -pusha, 0x60, i186&No64, DefaultSize|No_bSuf|No_sSuf|No_qSuf, {} +pusha, 0x60, i186&No64, ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf, {} // Pop instructions. -pop, 0x58, No64, No_bSuf|No_sSuf|No_qSuf, { Reg16|Reg32 } -pop, 0x8f/0, No64, Modrm|DefaultSize|No_bSuf|No_sSuf|No_qSuf, { Reg16|Reg32|Unspecified|BaseIndex } -pop, 0x7, No64, DefaultSize|No_bSuf|No_sSuf|No_qSuf, { SReg } +pop, 0x58, No64, ImplicitStackOp|No_bSuf|No_sSuf|No_qSuf, { Reg16|Reg32 } +pop, 0x8f/0, No64, Modrm|ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf, { Reg16|Reg32|Unspecified|BaseIndex } +pop, 0x7, No64, ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf, { SReg } // In 64bit mode, the operand size is implicitly 64bit. -pop, 0x58, x64, No_bSuf|No_lSuf|No_sSuf|NoRex64, { Reg16|Reg64 } -popp, 0x58, APX_F, No_bSuf|No_wSuf|No_lSuf|No_sSuf|Rex2, { Reg64 } -pop, 0x8f/0, x64, Modrm|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, { Reg16|Reg64|Unspecified|BaseIndex } -pop, 0xfa1, x64, DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, { SReg } +pop, 0x58, x64, ImplicitStackOp|No_bSuf|No_lSuf|No_sSuf|NoRex64, { Reg16|Reg64 } +popp, 0x58, APX_F, ImplicitStackOp|No_bSuf|No_wSuf|No_lSuf|No_sSuf|Rex2, { Reg64 } +pop, 0x8f/0, x64, Modrm|ImplicitStackOp|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, { Reg16|Reg64|Unspecified|BaseIndex } +pop, 0xfa1, x64, ImplicitStackOp|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, { SReg } -popa, 0x61, i186&No64, DefaultSize|No_bSuf|No_sSuf|No_qSuf, {} +popa, 0x61, i186&No64, ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf, {} // Exchange instructions. // xchg commutes: we allow both operand orders. @@ -290,10 +290,10 @@ lahf, 0x9f, No64, NoSuf, {} lahf, 0x9f, LAHF_SAHF, NoSuf, {} sahf, 0x9e, No64, NoSuf, {} sahf, 0x9e, LAHF_SAHF, NoSuf, {} -pushf, 0x9c, No64, DefaultSize|No_bSuf|No_sSuf|No_qSuf, {} -pushf, 0x9c, x64, DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, {} -popf, 0x9d, No64, DefaultSize|No_bSuf|No_sSuf|No_qSuf, {} -popf, 0x9d, x64, DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, {} +pushf, 0x9c, No64, ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf, {} +pushf, 0x9c, x64, ImplicitStackOp|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, {} +popf, 0x9d, No64, ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf, {} +popf, 0x9d, x64, ImplicitStackOp|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, {} stc, 0xf9, 0, NoSuf, {} std, 0xfd, 0, NoSuf, {} sti, 0xfb, 0, NoSuf, {} @@ -515,16 +515,16 @@ shrd, 0xad, APX_F, Modrm|CheckOperandSize|No_bSuf|No_sSuf|DstVVVV|EVexMap4|NF, { shrd, 0xfad, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Reg16|Reg32|Reg64, Reg16|Reg32|Reg64|Unspecified|BaseIndex } // Control transfer instructions. -call, 0xe8, No64, JumpDword|DefaultSize|No_bSuf|No_sSuf|No_qSuf|BNDPrefixOk, { Disp16|Disp32 } -call, 0xe8, x64, Amd64|JumpDword|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64|BNDPrefixOk, { Disp16|Disp32 } -call, 0xe8, x64, Intel64|JumpDword|No_bSuf|No_wSuf|No_lSuf|No_sSuf|NoRex64|BNDPrefixOk, { Disp32 } -call, 0xff/2, No64, Modrm|JumpAbsolute|DefaultSize|No_bSuf|No_sSuf|No_qSuf|BNDPrefixOk|NoTrackPrefixOk, { Reg16|Reg32|Unspecified|BaseIndex } -call, 0xff/2, x64, Amd64|Modrm|JumpAbsolute|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64|BNDPrefixOk|NoTrackPrefixOk, { Reg16|Reg64|Unspecified|BaseIndex } -call, 0xff/2, x64, Intel64|Modrm|JumpAbsolute|No_bSuf|No_wSuf|No_lSuf|No_sSuf|NoRex64|BNDPrefixOk|NoTrackPrefixOk, { Reg64|Unspecified|BaseIndex } +call, 0xe8, No64, JumpDword|ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf|BNDPrefixOk, { Disp16|Disp32 } +call, 0xe8, x64, Amd64|JumpDword|ImplicitStackOp|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64|BNDPrefixOk, { Disp16|Disp32 } +call, 0xe8, x64, Intel64|JumpDword|ImplicitStackOp|No_bSuf|No_wSuf|No_lSuf|No_sSuf|NoRex64|BNDPrefixOk, { Disp32 } +call, 0xff/2, No64, Modrm|JumpAbsolute|ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf|BNDPrefixOk|NoTrackPrefixOk, { Reg16|Reg32|Unspecified|BaseIndex } +call, 0xff/2, x64, Amd64|Modrm|JumpAbsolute|ImplicitStackOp|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64|BNDPrefixOk|NoTrackPrefixOk, { Reg16|Reg64|Unspecified|BaseIndex } +call, 0xff/2, x64, Intel64|Modrm|JumpAbsolute|ImplicitStackOp|No_bSuf|No_wSuf|No_lSuf|No_sSuf|NoRex64|BNDPrefixOk|NoTrackPrefixOk, { Reg64|Unspecified|BaseIndex } // Intel Syntax remaining call instances. -call, 0x9a, No64, JumpInterSegment|DefaultSize|No_bSuf|No_sSuf|No_qSuf, { Imm16, Imm16|Imm32 } -call, 0xff/3, 0, Amd64|Modrm|JumpAbsolute|DefaultSize|NoSuf, { Dword|Fword|BaseIndex } -call, 0xff/3, x64, Intel64|Modrm|JumpAbsolute|NoSuf, { Dword|Fword|Tbyte|BaseIndex } +call, 0x9a, No64, JumpInterSegment|ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf, { Imm16, Imm16|Imm32 } +call, 0xff/3, 0, Amd64|Modrm|JumpAbsolute|ImplicitStackOp|DefaultSize|NoSuf, { Dword|Fword|BaseIndex } +call, 0xff/3, x64, Intel64|Modrm|JumpAbsolute|ImplicitStackOp|NoSuf, { Dword|Fword|Tbyte|BaseIndex } lcall, 0x9a, No64, JumpInterSegment|DefaultSize|No_bSuf|No_sSuf|No_qSuf, { Imm16, Imm16|Imm32 } lcall, 0xff/3, 0, Amd64|Modrm|JumpAbsolute|DefaultSize|No_bSuf|No_sSuf|No_qSuf, { Unspecified|BaseIndex } lcall, 0xff/3, x64, Intel64|Modrm|JumpAbsolute|No_bSuf|No_sSuf, { Unspecified|BaseIndex } @@ -542,22 +542,22 @@ ljmp, 0xea, No64, JumpInterSegment|No_bSuf|No_sSuf|No_qSuf, { Imm16, Imm16|Imm32 ljmp, 0xff/5, 0, Amd64|Modrm|JumpAbsolute|No_bSuf|No_sSuf|No_qSuf, { Unspecified|BaseIndex } ljmp, 0xff/5, x64, Intel64|Modrm|JumpAbsolute|No_bSuf|No_sSuf, { Unspecified|BaseIndex } -ret, 0xc3, No64, DefaultSize|No_bSuf|No_sSuf|No_qSuf|RepPrefixOk|BNDPrefixOk, {} -ret, 0xc2, No64, DefaultSize|No_bSuf|No_sSuf|No_qSuf|RepPrefixOk|BNDPrefixOk, { Imm16 } -ret, 0xc3, x64, Amd64|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64|RepPrefixOk|BNDPrefixOk, {} -ret, 0xc2, x64, Amd64|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64|RepPrefixOk|BNDPrefixOk, { Imm16 } -ret, 0xc3, x64, Intel64|Size64|No_bSuf|No_wSuf|No_lSuf|No_sSuf|NoRex64|RepPrefixOk|BNDPrefixOk, {} -ret, 0xc2, x64, Intel64|Size64|No_bSuf|No_wSuf|No_lSuf|No_sSuf|NoRex64|RepPrefixOk|BNDPrefixOk, { Imm16 } +ret, 0xc3, No64, ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf|RepPrefixOk|BNDPrefixOk, {} +ret, 0xc2, No64, ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf|RepPrefixOk|BNDPrefixOk, { Imm16 } +ret, 0xc3, x64, Amd64|ImplicitStackOp|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64|RepPrefixOk|BNDPrefixOk, {} +ret, 0xc2, x64, Amd64|ImplicitStackOp|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64|RepPrefixOk|BNDPrefixOk, { Imm16 } +ret, 0xc3, x64, Intel64|ImplicitStackOp|Size64|No_bSuf|No_wSuf|No_lSuf|No_sSuf|NoRex64|RepPrefixOk|BNDPrefixOk, {} +ret, 0xc2, x64, Intel64|ImplicitStackOp|Size64|No_bSuf|No_wSuf|No_lSuf|No_sSuf|NoRex64|RepPrefixOk|BNDPrefixOk, { Imm16 } lret, 0xcb, 0, DefaultSize|No_bSuf|No_sSuf, {} lret, 0xca, 0, DefaultSize|No_bSuf|No_sSuf, { Imm16 } // Intel Syntax. retf, 0xcb, 0, DefaultSize|No_bSuf|No_sSuf, {} retf, 0xca, 0, DefaultSize|No_bSuf|No_sSuf, { Imm16 } -enter, 0xc8, i186&No64, DefaultSize|No_bSuf|No_sSuf|No_qSuf, { Imm16, Imm8 } -enter, 0xc8, x64, DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, { Imm16, Imm8 } -leave, 0xc9, i186&No64, DefaultSize|No_bSuf|No_sSuf|No_qSuf, {} -leave, 0xc9, x64, DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, {} +enter, 0xc8, i186&No64, ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf, { Imm16, Imm8 } +enter, 0xc8, x64, ImplicitStackOp|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, { Imm16, Imm8 } +leave, 0xc9, i186&No64, ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf, {} +leave, 0xc9, x64, ImplicitStackOp|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, {} @@ -637,11 +637,11 @@ bts, 0xfba/5, i386, Modrm|No_bSuf|No_sSuf|Optimize|HLEPrefixLock, { Imm8, Reg16| // Interrupts & op. sys insns. // See gas/config/tc-i386.c for conversion of 'int $3' into the special // int 3 insn. -int, 0xcd, 0, NoSuf, { Imm8 } -int1, 0xf1, 0, NoSuf, {} -int3, 0xcc, 0, NoSuf, {} -into, 0xce, No64, NoSuf, {} -iret, 0xcf, 0, DefaultSize|No_bSuf|No_sSuf, {} +int, 0xcd, 0, ImplicitStackOp|NoSuf, { Imm8 } +int1, 0xf1, 0, ImplicitStackOp|NoSuf, {} +int3, 0xcc, 0, ImplicitStackOp|NoSuf, {} +into, 0xce, No64, ImplicitStackOp|NoSuf, {} +iret, 0xcf, 0, ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf, {} // i386sl, i486sl, later 486, and Pentium. rsm, 0xfaa, i386, NoSuf, {} @@ -3486,9 +3486,9 @@ uwrmsr, 0xf3f8/0, USER_MSR, Modrm|Vex128|VexMap7|VexW0|NoSuf, { Imm32, Reg64 } // APX Push2/Pop2 instructions. -push2, 0xff/6, APX_F, Modrm|VexW0|EVex128|EVexMap4|VexVVVV|No_bSuf|No_wSuf|No_lSuf|No_sSuf, { Reg64, Reg64 } -push2p, 0xff/6, APX_F, Modrm|VexW1|EVex128|EVexMap4|VexVVVV|No_bSuf|No_wSuf|No_lSuf|No_sSuf, { Reg64, Reg64 } -pop2, 0x8f/0, APX_F, Modrm|VexW0|EVex128|EVexMap4|VexVVVV|No_bSuf|No_wSuf|No_lSuf|No_sSuf, { Reg64, Reg64 } -pop2p, 0x8f/0, APX_F, Modrm|VexW1|EVex128|EVexMap4|VexVVVV|No_bSuf|No_wSuf|No_lSuf|No_sSuf, { Reg64, Reg64 } +push2, 0xff/6, APX_F, Modrm|VexW0|EVex128|EVexMap4|VexVVVV|ImplicitStackOp|No_bSuf|No_wSuf|No_lSuf|No_sSuf, { Reg64, Reg64 } +push2p, 0xff/6, APX_F, Modrm|VexW1|EVex128|EVexMap4|VexVVVV|ImplicitStackOp|No_bSuf|No_wSuf|No_lSuf|No_sSuf, { Reg64, Reg64 } +pop2, 0x8f/0, APX_F, Modrm|VexW0|EVex128|EVexMap4|VexVVVV|ImplicitStackOp|No_bSuf|No_wSuf|No_lSuf|No_sSuf, { Reg64, Reg64 } +pop2p, 0x8f/0, APX_F, Modrm|VexW1|EVex128|EVexMap4|VexVVVV|ImplicitStackOp|No_bSuf|No_wSuf|No_lSuf|No_sSuf, { Reg64, Reg64 } // APX Push2/Pop2 instructions end.