From patchwork Wed Oct 4 22:09:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeff Law X-Patchwork-Id: 77133 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 8A2FC3857724 for ; Wed, 4 Oct 2023 22:10:06 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 8A2FC3857724 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1696457406; bh=aW+RXPC53kTzJ6FOi2RlUyB+JmMxxcwF5xZqWAgUX+k=; h=Date:To:Subject:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=YXqVF6Dg5JdQgwBKfQxP/Zoa3VgJ9KRvJasPO2daQWylu5o+QTYWRh+QT3Zh2VEK+ vUvdy5isEpyTrf/WE3zCMpuqxmGHWP9cMacDIwi+tqeFkYu4ZNzQhxZDNNQ73BDiTs qQtxgHdvLf3egBwxmHUsTNgM8eURWvsravQ2FkeU= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail-il1-x134.google.com (mail-il1-x134.google.com [IPv6:2607:f8b0:4864:20::134]) by sourceware.org (Postfix) with ESMTPS id 17F383858D3C for ; Wed, 4 Oct 2023 22:09:39 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 17F383858D3C Received: by mail-il1-x134.google.com with SMTP id e9e14a558f8ab-3515aad4a87so1525655ab.3 for ; Wed, 04 Oct 2023 15:09:39 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1696457377; x=1697062177; h=subject:from:to:content-language:user-agent:mime-version:date :message-id:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=aW+RXPC53kTzJ6FOi2RlUyB+JmMxxcwF5xZqWAgUX+k=; b=qBAf33NrMe8XyLfS39v5qVAu35o4lA399FCD8XA5yNuT8aOP5B8m0UgSQpXLUMX9/T i0LIVtcxp1pNopD/zQs8tAVBi1ctpKPvtO4yGVVzef2ca9bRlnXOYyQecV8q6NZUzLSo bth0oEZflKWQwqpyINW7yK9rlv3YyFhfHUY+/j9cO0Os3zaTW5w+ZRXyazyzaoStlNt3 gn0fT2ySlX/yBX6+tbA1Lb/jAMEPfCO0EI3SgHSwZfiUjNYnIMMvkffVeQBDYOE+eC4e z7lSB5vldO/p8BwQVUgeJBBLOkzQ2TxG7rOC9vco3ZZyb12l9UgMzWjN9hej7J5QUnoS QaEA== X-Gm-Message-State: AOJu0Yxp56BQ8w0qCkVCcPQj/gfdicqi6YgpaE7cA6xzqDWkTUfe+VAm WybCYKpQLSwSMXKaeKUYeBhtAYbJlxU= X-Google-Smtp-Source: AGHT+IHk16TUT6p410PyPtWb6b40rH/DvqRk6x+r5+2kIPOJZIReLyjMs1k1Y8AgWe2ixg/CPgfoPQ== X-Received: by 2002:a05:6e02:1527:b0:348:8b42:47d with SMTP id i7-20020a056e02152700b003488b42047dmr4345684ilu.28.1696457377392; Wed, 04 Oct 2023 15:09:37 -0700 (PDT) Received: from [172.31.0.109] ([136.36.130.248]) by smtp.gmail.com with ESMTPSA id k1-20020a02ccc1000000b0042b05586c52sm65982jaq.25.2023.10.04.15.09.36 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 04 Oct 2023 15:09:36 -0700 (PDT) Message-ID: <1d854df9-b28c-41eb-af7c-e3a423885558@gmail.com> Date: Wed, 4 Oct 2023 16:09:35 -0600 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: Binutils Subject: [RFA] Fix for mcore simulator X-Spam-Status: No, score=-8.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Jeff Law via Binutils From: Jeff Law Reply-To: Jeff Law Errors-To: binutils-bounces+patchwork=sourceware.org@sourceware.org Sender: "Binutils" I was looking for cases where a GCC patch under evaluation would cause test results to change. Quite surprisingly the mcore-elf port showed test differences. After a fair amount of digging my conclusion was the sequences before/after the patch should have been semantically the same. Of course if the code is supposed to behave the same, then that points to problems elsewhere (assembler, linker, simulator). Sure enough the mcore simulator was mis-handling the sign extension instructions. The simulator implementation of sextb is via paired shift-by-24 operations. Similarly the simulator implements sexth via paired shift-by-16 operations. The temporary holding the value was declared as a "long" thus this approach worked fine for hosts with a 32 bit wide long and failed miserably for hosts with a 64 bit wide long. This patch makes the shift count automatically adjust based on the size of the temporary. It includes a simple test for sextb and sexth. I have _not_ done a full audit of the mcore simulator for more 32->64 bit issues. This also fixes 443 execution tests in the GCC testsuite ;-) OK for the trunk? Thanks, Jeff diff --git a/sim/mcore/interp.c b/sim/mcore/interp.c index 53cfdad050b..48d9ff8645a 100644 --- a/sim/mcore/interp.c +++ b/sim/mcore/interp.c @@ -641,8 +641,8 @@ step_once (SIM_DESC sd, SIM_CPU *cpu) { long tmp; tmp = gr[RD]; - tmp <<= 24; - tmp >>= 24; + tmp <<= (sizeof (tmp) * 8) - 8; + tmp >>= (sizeof (tmp) * 8) - 8; gr[RD] = tmp; } break; @@ -653,8 +653,8 @@ step_once (SIM_DESC sd, SIM_CPU *cpu) { long tmp; tmp = gr[RD]; - tmp <<= 16; - tmp >>= 16; + tmp <<= (sizeof (tmp) * 8) - 16; + tmp >>= (sizeof (tmp) * 8) - 16; gr[RD] = tmp; } break; diff --git a/sim/testsuite/mcore/sextb.s b/sim/testsuite/mcore/sextb.s new file mode 100644 index 00000000000..5500f7abe67 --- /dev/null +++ b/sim/testsuite/mcore/sextb.s @@ -0,0 +1,25 @@ +# check that sext.b/sext.h work correctly +# mach: mcore + +.include "testutils.inc" + + start + # Construct -120 using bgeni+addi+sext + bgeni r2, 7 + addi r2,8 + sextb r2 + + # Construct -120 using movi+not + movi r7,119 + not r7 + + # Compare them, they should be equal + cmpne r2,r7 + jbt .L1 + pass +.L1: + fail + + + + diff --git a/sim/testsuite/mcore/sexth.s b/sim/testsuite/mcore/sexth.s new file mode 100644 index 00000000000..97279c49ed4 --- /dev/null +++ b/sim/testsuite/mcore/sexth.s @@ -0,0 +1,27 @@ +# check that sext.b/sext.h work correctly +# mach: mcore + +.include "testutils.inc" + + start + # Construct -32760 using bgeni+addi+sext + bgeni r2, 15 + addi r2,8 + sexth r2 + + # Construct -32760 using bmask+subi+not + bmaski r7,15 + subi r7,8 // 32759 0x7ff7 + not r7 + + + # Compare them, they should be equal + cmpne r2,r7 + jbt .L1 + pass +.L1: + fail + + + +