x86-64: fix ZMM register state tracking

Message ID 580ba4ea-93ae-ffd0-7bce-bd1f75cf9ff9@ericsson.com
State New, archived
Headers

Commit Message

Simon Marchi Oct. 2, 2018, 7:20 p.m. UTC
  On 2018-09-25 11:04 AM, Jan Beulich wrote:
>>>> On 25.09.18 at 05:28, <simon.marchi@ericsson.com> wrote:
>> On 2018-09-18 09:37 AM, Jan Beulich wrote:
>> Thanks for the instructions.  There is already a test covering AVX512
>> instructions, so I figured I would add it there.  However, I don't
>> have a processor that supports AVX512, so I'm unable to run the test.
>>
>> Here's a patch, can you try to confirm that the test fails without the
>> fix and passes with the fix?  I probably screwed up somewhere, but it
>> should be pretty close.
> 
> There are two issues here: First of all, unrelated to this patch, the
> construct around line 95 in i386-avx512.exp should look like
> 
> if [is_amd64_regs_target] {
>     set nr_regs 32
> } else {
>     set nr_regs 8
> }
> 
> Of course this also affects other tests in here, but without this correction
> the loop you add does nothing at all.

Thanks, this has now been fixed in master.

> And then that very loop and the i386-avx512.c addition are not in sync,
> and I'm not sure which way you meant it to be: Either in the C file all 16
> upper ZMM registers need to be set identically (not just ZMM16), or
> there should be no loop.

Woops.  Testing only zmm0 and zmm16 will be enough I think.

> Furthermore I think the C code addition and hence the test will need to
> be x86-64-specific, as registers ZMM8 and higher are inaccessible in
> 32-bit mode.

Good point.

Here's the revised version with this fixed.  I am not sure about the output
for zmm0 though.


From cd9f3e298a3a516298d3fea15ba80b3eaa33cc7c Mon Sep 17 00:00:00 2001
From: Simon Marchi <simon.marchi@ericsson.com>
Date: Mon, 24 Sep 2018 23:28:28 -0400
Subject: [PATCH] AVX512 test

---
 gdb/testsuite/gdb.arch/i386-avx512.c   |  7 +++++++
 gdb/testsuite/gdb.arch/i386-avx512.exp | 10 ++++++++++
 2 files changed, 17 insertions(+)

-- 
2.19.0
  

Comments

Jan Beulich Oct. 3, 2018, 2:30 p.m. UTC | #1
>>> Simon Marchi <simon.marchi@ericsson.com> 10/02/18 9:20 PM >>>
>On 2018-09-25 11:04 AM, Jan Beulich wrote:
>>>>> On 25.09.18 at 05:28, <simon.marchi@ericsson.com> wrote:
>>> On 2018-09-18 09:37 AM, Jan Beulich wrote:
>>> Thanks for the instructions.  There is already a test covering AVX512
>>> instructions, so I figured I would add it there.  However, I don't
>>> have a processor that supports AVX512, so I'm unable to run the test.
>>>
>>> Here's a patch, can you try to confirm that the test fails without the
>>> fix and passes with the fix?  I probably screwed up somewhere, but it
>>> should be pretty close.
>> 
>> There are two issues here: First of all, unrelated to this patch, the
>> construct around line 95 in i386-avx512.exp should look like
>> 
>> if [is_amd64_regs_target] {
>>     set nr_regs 32
>> } else {
>>     set nr_regs 8
>> }
>> 
>> Of course this also affects other tests in here, but without this correction
>> the loop you add does nothing at all.
>
>Thanks, this has now been fixed in master.

Ah, good to know.


>Here's the revised version with this fixed.  I am not sure about the output
>for zmm0 though.

I'll give this a go and adjust if need be, but it'll likely take me a couple of
days to get to it. I take it that ...


>--- a/gdb/testsuite/gdb.arch/i386-avx512.c
>+++ b/gdb/testsuite/gdb.arch/i386-avx512.c
>@@ -249,6 +249,13 @@ main (int argc, char **argv)
>move back to array and check values.  */
>move_zmm_data_to_memory ();
>asm ("nop"); /* sixth breakpoint here  */
>+
>+      asm ("vpternlogd $0xff, %zmm0, %zmm0, %zmm0");
>+#ifdef __x86_64__s

... the trailing s here simply is a typo.

Jan
  
Simon Marchi Oct. 3, 2018, 2:41 p.m. UTC | #2
On 2018-10-03 10:30, Jan Beulich wrote:
>> Here's the revised version with this fixed.  I am not sure about the 
>> output
>> for zmm0 though.
> 
> I'll give this a go and adjust if need be, but it'll likely take me a 
> couple of
> days to get to it. I take it that ...

There's no rush, thanks for helping.

>> --- a/gdb/testsuite/gdb.arch/i386-avx512.c
>> +++ b/gdb/testsuite/gdb.arch/i386-avx512.c
>> @@ -249,6 +249,13 @@ main (int argc, char **argv)
>> move back to array and check values.  */
>> move_zmm_data_to_memory ();
>> asm ("nop"); /* sixth breakpoint here  */
>> +
>> +      asm ("vpternlogd $0xff, %zmm0, %zmm0, %zmm0");
>> +#ifdef __x86_64__s
> 
> ... the trailing s here simply is a typo.

Arrrg, indeed.

Simon
  

Patch

diff --git a/gdb/testsuite/gdb.arch/i386-avx512.c b/gdb/testsuite/gdb.arch/i386-avx512.c
index 9349f09d62e..7d088ed0343 100644
--- a/gdb/testsuite/gdb.arch/i386-avx512.c
+++ b/gdb/testsuite/gdb.arch/i386-avx512.c
@@ -249,6 +249,13 @@  main (int argc, char **argv)
 	 move back to array and check values.  */
       move_zmm_data_to_memory ();
       asm ("nop"); /* sixth breakpoint here  */
+
+      asm ("vpternlogd $0xff, %zmm0, %zmm0, %zmm0");
+#ifdef __x86_64__s
+      asm ("vpternlogd $0xff, %zmm0, %zmm0, %zmm16");
+#endif
+      asm ("vzeroupper");
+      asm ("nop"); /* seventh breakpoint here  */
     }

   return 0;
diff --git a/gdb/testsuite/gdb.arch/i386-avx512.exp b/gdb/testsuite/gdb.arch/i386-avx512.exp
index cd15e05fd03..43fde12f257 100644
--- a/gdb/testsuite/gdb.arch/i386-avx512.exp
+++ b/gdb/testsuite/gdb.arch/i386-avx512.exp
@@ -174,3 +174,13 @@  for { set r 0 } { $r < $nr_regs } { incr r } {
         ".. = \\{f = \\{[expr $r + 30], [expr $r.125 + 30], [expr $r.25 + 20], [expr $r.375 + 20], [expr $r.5 + 10], [expr $r.625 + 10], [expr $r.75 + 10], [expr $r.875 + 10]\\}\\}.*" \
         "check contents of zmm_data\[$r\] after writing XMM regs"
 }
+
+gdb_test "break [gdb_get_line_number "seventh breakpoint here"]" \
+    "Breakpoint .* at .*i386-avx512.c.*" \
+    "set seventh breakpoint in main"
+gdb_continue_to_breakpoint "continue to seventh breakpoint in main"
+gdb_test "print \$zmm0.v16_int32" "= {-1, -1, -1, -1, 0 <repeats 12 times>}"
+
+if { $nr_regs >= 16 } {
+    gdb_test "print \$zmm16.v16_int32" "= {-1 <repeats 16 times>}"
+}