[x86] Fix unrecognizable insn due to illegal immediate_operand (const_int 255) of QImode.
Message ID | 20221128130539.2124727-1-hongtao.liu@intel.com |
---|---|
State | Committed |
Commit | cda29c540037fbcf00a377196050953aab1d3d5b |
Headers |
Return-Path: <gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org> X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 888DF3858C62 for <patchwork@sourceware.org>; Mon, 28 Nov 2022 13:07:14 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 888DF3858C62 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1669640834; bh=5md9A/xV9aCSQwHe8oLwk5q50X115vEGHEyHCe7ISo4=; h=To:Cc:Subject:Date:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From:Reply-To:From; b=h287vOu9OP9LH3Orqsmhnrb55pBl7r9J+dGiCCRMJXkik3ZfLceaYVBBxPddpSNsz 6Q4Hv60gtWZWMgb5FhloBFQ89O7zShb3VN7AoFuDzJ/H2J/+NQtZn0j3bdekVUXQWR RIyULfIkZp/AUv+ZAusqkbXcBjGPXnE/6glTdH9o= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by sourceware.org (Postfix) with ESMTPS id B20A8385B19A for <gcc-patches@gcc.gnu.org>; Mon, 28 Nov 2022 13:05:56 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org B20A8385B19A X-IronPort-AV: E=McAfee;i="6500,9779,10544"; a="298182006" X-IronPort-AV: E=Sophos;i="5.96,200,1665471600"; d="scan'208";a="298182006" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Nov 2022 05:05:42 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10544"; a="674217502" X-IronPort-AV: E=Sophos;i="5.96,200,1665471600"; d="scan'208";a="674217502" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by orsmga008.jf.intel.com with ESMTP; 28 Nov 2022 05:05:40 -0800 Received: from shliclel4051.sh.intel.com (shliclel4051.sh.intel.com [10.239.240.51]) by shvmail03.sh.intel.com (Postfix) with ESMTP id E3AA11005612; Mon, 28 Nov 2022 21:05:39 +0800 (CST) To: gcc-patches@gcc.gnu.org Cc: crazylht@gmail.com, hjl.tools@gmail.com, ubizjak@gmail.com Subject: [PATCH] [x86] Fix unrecognizable insn due to illegal immediate_operand (const_int 255) of QImode. Date: Mon, 28 Nov 2022 21:05:39 +0800 Message-Id: <20221128130539.2124727-1-hongtao.liu@intel.com> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list <gcc-patches.gcc.gnu.org> List-Unsubscribe: <https://gcc.gnu.org/mailman/options/gcc-patches>, <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe> List-Archive: <https://gcc.gnu.org/pipermail/gcc-patches/> List-Post: <mailto:gcc-patches@gcc.gnu.org> List-Help: <mailto:gcc-patches-request@gcc.gnu.org?subject=help> List-Subscribe: <https://gcc.gnu.org/mailman/listinfo/gcc-patches>, <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe> From: liuhongt via Gcc-patches <gcc-patches@gcc.gnu.org> Reply-To: liuhongt <hongtao.liu@intel.com> Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" <gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org> |
Series |
[x86] Fix unrecognizable insn due to illegal immediate_operand (const_int 255) of QImode.
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Commit Message
Liu, Hongtao
Nov. 28, 2022, 1:05 p.m. UTC
For __builtin_ia32_vec_set_v16qi (a, -1, 2) with !flag_signed_char. it's transformed to __builtin_ia32_vec_set_v16qi (_4, 255, 2) in the gimple, and expanded to (const_int 255) in the rtl. But for immediate_operand, it expects (const_int 255) to be signed extended to (const_int -1). The mismatch caused an unrecognizable insn error. expand_expr_real_1 generates (const_int 255) without considering the target mode. I guess it's on purpose, so I'll leave that alone and only change the expander in the backend. After applying convert_modes to (const_int 255), it's transformed to (const_int -1) which fix the issue. Bootstrapped and regtested x86_64-pc-linux-gnu{-m32,}. Ok for trunk(and backport to GCC-10/11/12 release branches)? gcc/ChangeLog: PR target/107863 * config/i386/i386-expand.cc (ix86_expand_vec_set_builtin): Convert op1 to target mode whenever mode mismatch. gcc/testsuite/ChangeLog: * gcc.target/i386/pr107863.c: New test. --- gcc/config/i386/i386-expand.cc | 2 +- gcc/testsuite/gcc.target/i386/pr107863.c | 8 ++++++++ 2 files changed, 9 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr107863.c
Comments
On Mon, Nov 28, 2022 at 9:06 PM liuhongt <hongtao.liu@intel.com> wrote: > > For __builtin_ia32_vec_set_v16qi (a, -1, 2) with > !flag_signed_char. it's transformed to > __builtin_ia32_vec_set_v16qi (_4, 255, 2) in the gimple, > and expanded to (const_int 255) in the rtl. But for immediate_operand, > it expects (const_int 255) to be signed extended to > (const_int -1). The mismatch caused an unrecognizable insn error. > > expand_expr_real_1 generates (const_int 255) without considering the target mode. > I guess it's on purpose, so I'll leave that alone and only change the expander > in the backend. After applying convert_modes to (const_int 255), > it's transformed to (const_int -1) which fix the issue. > > Bootstrapped and regtested x86_64-pc-linux-gnu{-m32,}. > Ok for trunk(and backport to GCC-10/11/12 release branches)? Drop this patch since it's not a complete solution, there're also other QI builtins which is not handled. > > gcc/ChangeLog: > > PR target/107863 > * config/i386/i386-expand.cc (ix86_expand_vec_set_builtin): > Convert op1 to target mode whenever mode mismatch. > > gcc/testsuite/ChangeLog: > > * gcc.target/i386/pr107863.c: New test. > --- > gcc/config/i386/i386-expand.cc | 2 +- > gcc/testsuite/gcc.target/i386/pr107863.c | 8 ++++++++ > 2 files changed, 9 insertions(+), 1 deletion(-) > create mode 100644 gcc/testsuite/gcc.target/i386/pr107863.c > > diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc > index 0373c3614a4..c639ee3a9f7 100644 > --- a/gcc/config/i386/i386-expand.cc > +++ b/gcc/config/i386/i386-expand.cc > @@ -12475,7 +12475,7 @@ ix86_expand_vec_set_builtin (tree exp) > op1 = expand_expr (arg1, NULL_RTX, mode1, EXPAND_NORMAL); > elt = get_element_number (TREE_TYPE (arg0), arg2); > > - if (GET_MODE (op1) != mode1 && GET_MODE (op1) != VOIDmode) > + if (GET_MODE (op1) != mode1) > op1 = convert_modes (mode1, GET_MODE (op1), op1, true); > > op0 = force_reg (tmode, op0); > diff --git a/gcc/testsuite/gcc.target/i386/pr107863.c b/gcc/testsuite/gcc.target/i386/pr107863.c > new file mode 100644 > index 00000000000..99fd85d9765 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/i386/pr107863.c > @@ -0,0 +1,8 @@ > +/* { dg-do compile } */ > +/* { dg-options "-mavx2 -O" } */ > + > +typedef char v16qi __attribute__((vector_size(16))); > + > +v16qi foo(v16qi a){ > + return __builtin_ia32_vec_set_v16qi (a, -1, 2); > +} > -- > 2.27.0 >
On Mon, Nov 28, 2022 at 11:04 PM Hongtao Liu <crazylht@gmail.com> wrote: > > On Mon, Nov 28, 2022 at 9:06 PM liuhongt <hongtao.liu@intel.com> wrote: > > > > For __builtin_ia32_vec_set_v16qi (a, -1, 2) with > > !flag_signed_char. it's transformed to > > __builtin_ia32_vec_set_v16qi (_4, 255, 2) in the gimple, > > and expanded to (const_int 255) in the rtl. But for immediate_operand, > > it expects (const_int 255) to be signed extended to > > (const_int -1). The mismatch caused an unrecognizable insn error. > > > > expand_expr_real_1 generates (const_int 255) without considering the target mode. > > I guess it's on purpose, so I'll leave that alone and only change the expander > > in the backend. After applying convert_modes to (const_int 255), > > it's transformed to (const_int -1) which fix the issue. > > > > Bootstrapped and regtested x86_64-pc-linux-gnu{-m32,}. > > Ok for trunk(and backport to GCC-10/11/12 release branches)? > Drop this patch since it's not a complete solution, there're also > other QI builtins which is not handled. I checked the x86 backend. __builtin_ia32_vec_set_v16qi is the only intrinsic with this issue. > > > > gcc/ChangeLog: > > > > PR target/107863 > > * config/i386/i386-expand.cc (ix86_expand_vec_set_builtin): > > Convert op1 to target mode whenever mode mismatch. > > > > gcc/testsuite/ChangeLog: > > > > * gcc.target/i386/pr107863.c: New test. > > --- > > gcc/config/i386/i386-expand.cc | 2 +- > > gcc/testsuite/gcc.target/i386/pr107863.c | 8 ++++++++ > > 2 files changed, 9 insertions(+), 1 deletion(-) > > create mode 100644 gcc/testsuite/gcc.target/i386/pr107863.c > > > > diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc > > index 0373c3614a4..c639ee3a9f7 100644 > > --- a/gcc/config/i386/i386-expand.cc > > +++ b/gcc/config/i386/i386-expand.cc > > @@ -12475,7 +12475,7 @@ ix86_expand_vec_set_builtin (tree exp) > > op1 = expand_expr (arg1, NULL_RTX, mode1, EXPAND_NORMAL); > > elt = get_element_number (TREE_TYPE (arg0), arg2); > > > > - if (GET_MODE (op1) != mode1 && GET_MODE (op1) != VOIDmode) > > + if (GET_MODE (op1) != mode1) > > op1 = convert_modes (mode1, GET_MODE (op1), op1, true); > > > > op0 = force_reg (tmode, op0); > > diff --git a/gcc/testsuite/gcc.target/i386/pr107863.c b/gcc/testsuite/gcc.target/i386/pr107863.c > > new file mode 100644 > > index 00000000000..99fd85d9765 > > --- /dev/null > > +++ b/gcc/testsuite/gcc.target/i386/pr107863.c > > @@ -0,0 +1,8 @@ > > +/* { dg-do compile } */ > > +/* { dg-options "-mavx2 -O" } */ > > + > > +typedef char v16qi __attribute__((vector_size(16))); > > + > > +v16qi foo(v16qi a){ > > + return __builtin_ia32_vec_set_v16qi (a, -1, 2); > > +} > > -- > > 2.27.0 > > > > > -- > BR, > Hongtao
On Wed, Nov 30, 2022 at 3:12 AM H.J. Lu <hjl.tools@gmail.com> wrote: > > On Mon, Nov 28, 2022 at 11:04 PM Hongtao Liu <crazylht@gmail.com> wrote: > > > > On Mon, Nov 28, 2022 at 9:06 PM liuhongt <hongtao.liu@intel.com> wrote: > > > > > > For __builtin_ia32_vec_set_v16qi (a, -1, 2) with > > > !flag_signed_char. it's transformed to > > > __builtin_ia32_vec_set_v16qi (_4, 255, 2) in the gimple, > > > and expanded to (const_int 255) in the rtl. But for immediate_operand, > > > it expects (const_int 255) to be signed extended to > > > (const_int -1). The mismatch caused an unrecognizable insn error. > > > > > > expand_expr_real_1 generates (const_int 255) without considering the target mode. > > > I guess it's on purpose, so I'll leave that alone and only change the expander > > > in the backend. After applying convert_modes to (const_int 255), > > > it's transformed to (const_int -1) which fix the issue. > > > > > > Bootstrapped and regtested x86_64-pc-linux-gnu{-m32,}. > > > Ok for trunk(and backport to GCC-10/11/12 release branches)? > > Drop this patch since it's not a complete solution, there're also > > other QI builtins which is not handled. > > I checked the x86 backend. __builtin_ia32_vec_set_v16qi is the > only intrinsic with this issue. Ok, I'll commit the patch. > > > > > > > gcc/ChangeLog: > > > > > > PR target/107863 > > > * config/i386/i386-expand.cc (ix86_expand_vec_set_builtin): > > > Convert op1 to target mode whenever mode mismatch. > > > > > > gcc/testsuite/ChangeLog: > > > > > > * gcc.target/i386/pr107863.c: New test. > > > --- > > > gcc/config/i386/i386-expand.cc | 2 +- > > > gcc/testsuite/gcc.target/i386/pr107863.c | 8 ++++++++ > > > 2 files changed, 9 insertions(+), 1 deletion(-) > > > create mode 100644 gcc/testsuite/gcc.target/i386/pr107863.c > > > > > > diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc > > > index 0373c3614a4..c639ee3a9f7 100644 > > > --- a/gcc/config/i386/i386-expand.cc > > > +++ b/gcc/config/i386/i386-expand.cc > > > @@ -12475,7 +12475,7 @@ ix86_expand_vec_set_builtin (tree exp) > > > op1 = expand_expr (arg1, NULL_RTX, mode1, EXPAND_NORMAL); > > > elt = get_element_number (TREE_TYPE (arg0), arg2); > > > > > > - if (GET_MODE (op1) != mode1 && GET_MODE (op1) != VOIDmode) > > > + if (GET_MODE (op1) != mode1) > > > op1 = convert_modes (mode1, GET_MODE (op1), op1, true); > > > > > > op0 = force_reg (tmode, op0); > > > diff --git a/gcc/testsuite/gcc.target/i386/pr107863.c b/gcc/testsuite/gcc.target/i386/pr107863.c > > > new file mode 100644 > > > index 00000000000..99fd85d9765 > > > --- /dev/null > > > +++ b/gcc/testsuite/gcc.target/i386/pr107863.c > > > @@ -0,0 +1,8 @@ > > > +/* { dg-do compile } */ > > > +/* { dg-options "-mavx2 -O" } */ > > > + > > > +typedef char v16qi __attribute__((vector_size(16))); > > > + > > > +v16qi foo(v16qi a){ > > > + return __builtin_ia32_vec_set_v16qi (a, -1, 2); > > > +} > > > -- > > > 2.27.0 > > > > > > > > > -- > > BR, > > Hongtao > > > > -- > H.J.
diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc index 0373c3614a4..c639ee3a9f7 100644 --- a/gcc/config/i386/i386-expand.cc +++ b/gcc/config/i386/i386-expand.cc @@ -12475,7 +12475,7 @@ ix86_expand_vec_set_builtin (tree exp) op1 = expand_expr (arg1, NULL_RTX, mode1, EXPAND_NORMAL); elt = get_element_number (TREE_TYPE (arg0), arg2); - if (GET_MODE (op1) != mode1 && GET_MODE (op1) != VOIDmode) + if (GET_MODE (op1) != mode1) op1 = convert_modes (mode1, GET_MODE (op1), op1, true); op0 = force_reg (tmode, op0); diff --git a/gcc/testsuite/gcc.target/i386/pr107863.c b/gcc/testsuite/gcc.target/i386/pr107863.c new file mode 100644 index 00000000000..99fd85d9765 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr107863.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx2 -O" } */ + +typedef char v16qi __attribute__((vector_size(16))); + +v16qi foo(v16qi a){ + return __builtin_ia32_vec_set_v16qi (a, -1, 2); +}