[03/35] arm: improve tests and fix vddupq*

Message ID 20221117163809.1009526-4-andrea.corallo@arm.com
State Committed
Headers
Series arm: rework MVE testsuite and rework backend where necessary (1st chunk) |

Commit Message

Andrea Corallo Nov. 17, 2022, 4:37 p.m. UTC
  gcc/ChangeLog:

	* config/arm/mve.md (mve_vddupq_u<mode>_insn): Fix 'vddup.u'
	spacing.
	(mve_vddupq_m_wb_u<mode>_insn): Likewise.

gcc/testsuite/ChangeLog:

	* gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c: Improve test.
	* gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c : Likewise.
	* gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c : Likewise.
	* gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c : Likewise.
	* gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c : Likewise.
	* gcc.target/arm/mve/intrinsics/vddupq_n_u16.c : Likewise.
	* gcc.target/arm/mve/intrinsics/vddupq_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vddupq_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c : Likewise.
	* gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c : Likewise.
	* gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c : Likewise.
	* gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c : Likewise.
	* gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c : Likewise.
	* gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c : Likewise.
---
 gcc/config/arm/mve.md                         |  4 +-
 .../arm/mve/intrinsics/vddupq_m_n_u16.c       | 42 +++++++++++++--
 .../arm/mve/intrinsics/vddupq_m_n_u32.c       | 46 +++++++++++++---
 .../arm/mve/intrinsics/vddupq_m_n_u8.c        | 46 +++++++++++++---
 .../arm/mve/intrinsics/vddupq_m_wb_u16.c      | 42 +++++++++++++--
 .../arm/mve/intrinsics/vddupq_m_wb_u32.c      | 46 +++++++++++++---
 .../arm/mve/intrinsics/vddupq_m_wb_u8.c       | 46 +++++++++++++---
 .../arm/mve/intrinsics/vddupq_n_u16.c         | 32 ++++++++++--
 .../arm/mve/intrinsics/vddupq_n_u32.c         | 28 +++++++++-
 .../arm/mve/intrinsics/vddupq_n_u8.c          | 28 +++++++++-
 .../arm/mve/intrinsics/vddupq_wb_u16.c        | 32 ++++++++++--
 .../arm/mve/intrinsics/vddupq_wb_u32.c        | 28 +++++++++-
 .../arm/mve/intrinsics/vddupq_wb_u8.c         | 28 +++++++++-
 .../arm/mve/intrinsics/vddupq_x_n_u16.c       | 42 +++++++++++++--
 .../arm/mve/intrinsics/vddupq_x_n_u32.c       | 46 +++++++++++++---
 .../arm/mve/intrinsics/vddupq_x_n_u8.c        | 46 +++++++++++++---
 .../arm/mve/intrinsics/vddupq_x_wb_u16.c      | 52 +++++++++++++++----
 .../arm/mve/intrinsics/vddupq_x_wb_u32.c      | 52 +++++++++++++++----
 .../arm/mve/intrinsics/vddupq_x_wb_u8.c       | 52 +++++++++++++++----
 19 files changed, 642 insertions(+), 96 deletions(-)
  

Comments

Kyrylo Tkachov Nov. 18, 2022, 4:34 p.m. UTC | #1
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Thursday, November 17, 2022 4:38 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 03/35] arm: improve tests and fix vddupq*
> 
> gcc/ChangeLog:
> 
> 	* config/arm/mve.md (mve_vddupq_u<mode>_insn): Fix 'vddup.u'
> 	spacing.
> 	(mve_vddupq_m_wb_u<mode>_insn): Likewise.
> 
> gcc/testsuite/ChangeLog:
> 
> 	* gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c: Improve test.
> 	* gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c : Likewise.
> 	* gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c : Likewise.
> 	* gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c: Likewise.
> 	* gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c : Likewise.
> 	* gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c : Likewise.
> 	* gcc.target/arm/mve/intrinsics/vddupq_n_u16.c : Likewise.
> 	* gcc.target/arm/mve/intrinsics/vddupq_n_u32.c: Likewise.
> 	* gcc.target/arm/mve/intrinsics/vddupq_n_u8.c: Likewise.
> 	* gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c : Likewise.
> 	* gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c: Likewise.
> 	* gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c: Likewise.
> 	* gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c: Likewise.
> 	* gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c : Likewise.
> 	* gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c : Likewise.
> 	* gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c : Likewise.
> 	* gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c : Likewise.
> 	* gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c : Likewise.

Ok.
Thanks,
Kyrill

> ---
>  gcc/config/arm/mve.md                         |  4 +-
>  .../arm/mve/intrinsics/vddupq_m_n_u16.c       | 42 +++++++++++++--
>  .../arm/mve/intrinsics/vddupq_m_n_u32.c       | 46 +++++++++++++---
>  .../arm/mve/intrinsics/vddupq_m_n_u8.c        | 46 +++++++++++++---
>  .../arm/mve/intrinsics/vddupq_m_wb_u16.c      | 42 +++++++++++++--
>  .../arm/mve/intrinsics/vddupq_m_wb_u32.c      | 46 +++++++++++++---
>  .../arm/mve/intrinsics/vddupq_m_wb_u8.c       | 46 +++++++++++++---
>  .../arm/mve/intrinsics/vddupq_n_u16.c         | 32 ++++++++++--
>  .../arm/mve/intrinsics/vddupq_n_u32.c         | 28 +++++++++-
>  .../arm/mve/intrinsics/vddupq_n_u8.c          | 28 +++++++++-
>  .../arm/mve/intrinsics/vddupq_wb_u16.c        | 32 ++++++++++--
>  .../arm/mve/intrinsics/vddupq_wb_u32.c        | 28 +++++++++-
>  .../arm/mve/intrinsics/vddupq_wb_u8.c         | 28 +++++++++-
>  .../arm/mve/intrinsics/vddupq_x_n_u16.c       | 42 +++++++++++++--
>  .../arm/mve/intrinsics/vddupq_x_n_u32.c       | 46 +++++++++++++---
>  .../arm/mve/intrinsics/vddupq_x_n_u8.c        | 46 +++++++++++++---
>  .../arm/mve/intrinsics/vddupq_x_wb_u16.c      | 52 +++++++++++++++----
>  .../arm/mve/intrinsics/vddupq_x_wb_u32.c      | 52 +++++++++++++++----
>  .../arm/mve/intrinsics/vddupq_x_wb_u8.c       | 52 +++++++++++++++----
>  19 files changed, 642 insertions(+), 96 deletions(-)
> 
> diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
> index 62186f124da..1215f845388 100644
> --- a/gcc/config/arm/mve.md
> +++ b/gcc/config/arm/mve.md
> @@ -9043,7 +9043,7 @@ (define_insn "mve_vddupq_u<mode>_insn"
>         (minus:SI (match_dup 2)
>  		 (match_operand:SI 4 "immediate_operand" "i")))]
>   "TARGET_HAVE_MVE"
> - "vddup.u%#<V_sz_elem>  %q0, %1, %3")
> + "vddup.u%#<V_sz_elem>\t%q0, %1, %3")
> 
>  ;;
>  ;; [vddupq_m_n_u])
> @@ -9079,7 +9079,7 @@ (define_insn
> "mve_vddupq_m_wb_u<mode>_insn"
>         (minus:SI (match_dup 3)
>  		 (match_operand:SI 6 "immediate_operand" "i")))]
>   "TARGET_HAVE_MVE"
> - "vpst\;\tvddupt.u%#<V_sz_elem>\t%q0, %2, %4"
> + "vpst\;vddupt.u%#<V_sz_elem>\t%q0, %2, %4"
>   [(set_attr "length""8")])
> 
>  ;;
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c
> index 7332711f6a7..7c8b0152763 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c
> @@ -1,23 +1,57 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
>  /* { dg-add-options arm_v8_1m_mve } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> +/*
> +**foo:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint16x8_t
>  foo (uint16x8_t inactive, uint32_t a, mve_pred16_t p)
>  {
>    return vddupq_m_n_u16 (inactive, a, 1, p);
>  }
> 
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u16"  }  } */
> 
> +/*
> +**foo1:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint16x8_t
>  foo1 (uint16x8_t inactive, uint32_t a, mve_pred16_t p)
>  {
>    return vddupq_m (inactive, a, 1, p);
>  }
> 
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u16"  }  } */
> +/*
> +**foo2:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
> +uint16x8_t
> +foo2 (uint16x8_t inactive, mve_pred16_t p)
> +{
> +  return vddupq_m (inactive, 1, 1, p);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c
> index 54ad91f2803..810a1a7e21b 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c
> @@ -1,23 +1,57 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
>  /* { dg-add-options arm_v8_1m_mve } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> +/*
> +**foo:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint32x4_t
>  foo (uint32x4_t inactive, uint32_t a, mve_pred16_t p)
>  {
> -  return vddupq_m_n_u32 (inactive, a, 4, p);
> +  return vddupq_m_n_u32 (inactive, a, 1, p);
>  }
> 
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u32"  }  } */
> 
> +/*
> +**foo1:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint32x4_t
>  foo1 (uint32x4_t inactive, uint32_t a, mve_pred16_t p)
>  {
> -  return vddupq_m (inactive, a, 4, p);
> +  return vddupq_m (inactive, a, 1, p);
>  }
> 
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u32"  }  } */
> +/*
> +**foo2:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
> +uint32x4_t
> +foo2 (uint32x4_t inactive, mve_pred16_t p)
> +{
> +  return vddupq_m (inactive, 1, 1, p);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c
> index 3746b5db6e5..6642b9f4b88 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c
> @@ -1,23 +1,57 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
>  /* { dg-add-options arm_v8_1m_mve } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> +/*
> +**foo:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint8x16_t
>  foo (uint8x16_t inactive, uint32_t a, mve_pred16_t p)
>  {
> -  return vddupq_m_n_u8 (inactive, a, 4, p);
> +  return vddupq_m_n_u8 (inactive, a, 1, p);
>  }
> 
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u8"  }  } */
> 
> +/*
> +**foo1:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint8x16_t
>  foo1 (uint8x16_t inactive, uint32_t a, mve_pred16_t p)
>  {
> -  return vddupq_m (inactive, a, 4, p);
> +  return vddupq_m (inactive, a, 1, p);
>  }
> 
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u8"  }  } */
> +/*
> +**foo2:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
> +uint8x16_t
> +foo2 (uint8x16_t inactive, mve_pred16_t p)
> +{
> +  return vddupq_m (inactive, 1, 1, p);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c
> index 8b5d9e86469..cc6a19516d9 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c
> @@ -1,23 +1,57 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
>  /* { dg-add-options arm_v8_1m_mve } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> +/*
> +**foo:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint16x8_t
>  foo (uint16x8_t inactive, uint32_t *a, mve_pred16_t p)
>  {
>    return vddupq_m_wb_u16 (inactive, a, 1, p);
>  }
> 
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u16"  }  } */
> 
> +/*
> +**foo1:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint16x8_t
>  foo1 (uint16x8_t inactive, uint32_t *a, mve_pred16_t p)
>  {
>    return vddupq_m (inactive, a, 1, p);
>  }
> 
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u16"  }  } */
> +/*
> +**foo2:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
> +uint16x8_t
> +foo2 (uint16x8_t inactive, mve_pred16_t p)
> +{
> +  return vddupq_m (inactive, 1, 1, p);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c
> index 7a8c363ac70..cd6c6f86eea 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c
> @@ -1,23 +1,57 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
>  /* { dg-add-options arm_v8_1m_mve } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> +/*
> +**foo:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint32x4_t
>  foo (uint32x4_t inactive, uint32_t *a, mve_pred16_t p)
>  {
> -  return vddupq_m_wb_u32 (inactive, a, 4, p);
> +  return vddupq_m_wb_u32 (inactive, a, 1, p);
>  }
> 
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u32"  }  } */
> 
> +/*
> +**foo1:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint32x4_t
>  foo1 (uint32x4_t inactive, uint32_t *a, mve_pred16_t p)
>  {
> -  return vddupq_m (inactive, a, 4, p);
> +  return vddupq_m (inactive, a, 1, p);
>  }
> 
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u32"  }  } */
> +/*
> +**foo2:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
> +uint32x4_t
> +foo2 (uint32x4_t inactive, mve_pred16_t p)
> +{
> +  return vddupq_m (inactive, 1, 1, p);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c
> index 45784a5c9cd..fe186e743da 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c
> @@ -1,23 +1,57 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
>  /* { dg-add-options arm_v8_1m_mve } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> +/*
> +**foo:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint8x16_t
>  foo (uint8x16_t inactive, uint32_t *a, mve_pred16_t p)
>  {
> -  return vddupq_m_wb_u8 (inactive, a, 4, p);
> +  return vddupq_m_wb_u8 (inactive, a, 1, p);
>  }
> 
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u8"  }  } */
> 
> +/*
> +**foo1:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint8x16_t
>  foo1 (uint8x16_t inactive, uint32_t *a, mve_pred16_t p)
>  {
> -  return vddupq_m (inactive, a, 4, p);
> +  return vddupq_m (inactive, a, 1, p);
>  }
> 
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u8"  }  } */
> +/*
> +**foo2:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
> +uint8x16_t
> +foo2 (uint8x16_t inactive, mve_pred16_t p)
> +{
> +  return vddupq_m (inactive, 1, 1, p);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u16.c
> index 4684e2af553..2dba2d74b61 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u16.c
> @@ -1,21 +1,45 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
>  /* { dg-add-options arm_v8_1m_mve } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> +/*
> +**foo:
> +**	...
> +**	vddup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint16x8_t
>  foo (uint32_t a)
>  {
> -  return vddupq_n_u16 (a, 4);
> +  return vddupq_n_u16 (a, 1);
>  }
> 
> -/* { dg-final { scan-assembler "vddup.u16"  }  } */
> 
> +/*
> +**foo1:
> +**	...
> +**	vddup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint16x8_t
>  foo1 (uint32_t a)
>  {
> -  return vddupq_u16 (a, 4);
> +  return vddupq_u16 (a, 1);
>  }
> 
> -/* { dg-final { scan-assembler "vddup.u16"  }  } */
> +/*
> +**foo2:
> +**	...
> +**	vddup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
> +uint16x8_t
> +foo2 ()
> +{
> +  return vddupq_u16 (1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u32.c
> index aeaa83eb6bc..6b5cf6c75b0 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u32.c
> @@ -1,21 +1,45 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
>  /* { dg-add-options arm_v8_1m_mve } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> +/*
> +**foo:
> +**	...
> +**	vddup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint32x4_t
>  foo (uint32_t a)
>  {
>    return vddupq_n_u32 (a, 1);
>  }
> 
> -/* { dg-final { scan-assembler "vddup.u32"  }  } */
> 
> +/*
> +**foo1:
> +**	...
> +**	vddup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint32x4_t
>  foo1 (uint32_t a)
>  {
>    return vddupq_u32 (a, 1);
>  }
> 
> -/* { dg-final { scan-assembler "vddup.u32"  }  } */
> +/*
> +**foo2:
> +**	...
> +**	vddup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
> +uint32x4_t
> +foo2 ()
> +{
> +  return vddupq_u32 (1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u8.c
> index 255a9f80b6b..174e422f4ef 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u8.c
> @@ -1,21 +1,45 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
>  /* { dg-add-options arm_v8_1m_mve } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> +/*
> +**foo:
> +**	...
> +**	vddup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint8x16_t
>  foo (uint32_t a)
>  {
>    return vddupq_n_u8 (a, 1);
>  }
> 
> -/* { dg-final { scan-assembler "vddup.u8"  }  } */
> 
> +/*
> +**foo1:
> +**	...
> +**	vddup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint8x16_t
>  foo1 (uint32_t a)
>  {
>    return vddupq_u8 (a, 1);
>  }
> 
> -/* { dg-final { scan-assembler "vddup.u8"  }  } */
> +/*
> +**foo2:
> +**	...
> +**	vddup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
> +uint8x16_t
> +foo2 ()
> +{
> +  return vddupq_u8 (1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c
> index 40fc6cf2197..6a471a7f72f 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c
> @@ -1,21 +1,45 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
>  /* { dg-add-options arm_v8_1m_mve } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> +/*
> +**foo:
> +**	...
> +**	vddup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint16x8_t
>  foo (uint32_t *a)
>  {
> -  return vddupq_wb_u16 (a, 4);
> +  return vddupq_wb_u16 (a, 1);
>  }
> 
> -/* { dg-final { scan-assembler "vddup.u16"  }  } */
> 
> +/*
> +**foo1:
> +**	...
> +**	vddup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint16x8_t
>  foo1 (uint32_t *a)
>  {
> -  return vddupq_u16 (a, 4);
> +  return vddupq_u16 (a, 1);
>  }
> 
> -/* { dg-final { scan-assembler "vddup.u16"  }  } */
> +/*
> +**foo2:
> +**	...
> +**	vddup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
> +uint16x8_t
> +foo2 ()
> +{
> +  return vddupq_u16 (1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c
> index 09b5b1f2f80..debf420d3e8 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c
> @@ -1,21 +1,45 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
>  /* { dg-add-options arm_v8_1m_mve } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> +/*
> +**foo:
> +**	...
> +**	vddup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint32x4_t
>  foo (uint32_t *a)
>  {
>    return vddupq_wb_u32 (a, 1);
>  }
> 
> -/* { dg-final { scan-assembler "vddup.u32"  }  } */
> 
> +/*
> +**foo1:
> +**	...
> +**	vddup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint32x4_t
>  foo1 (uint32_t *a)
>  {
>    return vddupq_u32 (a, 1);
>  }
> 
> -/* { dg-final { scan-assembler "vddup.u32"  }  } */
> +/*
> +**foo2:
> +**	...
> +**	vddup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
> +uint32x4_t
> +foo2 ()
> +{
> +  return vddupq_u32 (1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c
> index 00dfa906748..8e6ef8adccd 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c
> @@ -1,21 +1,45 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
>  /* { dg-add-options arm_v8_1m_mve } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> +/*
> +**foo:
> +**	...
> +**	vddup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint8x16_t
>  foo (uint32_t *a)
>  {
>    return vddupq_wb_u8 (a, 1);
>  }
> 
> -/* { dg-final { scan-assembler "vddup.u8"  }  } */
> 
> +/*
> +**foo1:
> +**	...
> +**	vddup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint8x16_t
>  foo1 (uint32_t *a)
>  {
>    return vddupq_u8 (a, 1);
>  }
> 
> -/* { dg-final { scan-assembler "vddup.u8"  }  } */
> +/*
> +**foo2:
> +**	...
> +**	vddup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
> +uint8x16_t
> +foo2 ()
> +{
> +  return vddupq_u8 (1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c
> index 5b0fc0b6340..1aafaf87b82 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c
> @@ -1,23 +1,57 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
>  /* { dg-add-options arm_v8_1m_mve } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> +/*
> +**foo:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint16x8_t
>  foo (uint32_t a, mve_pred16_t p)
>  {
>    return vddupq_x_n_u16 (a, 1, p);
>  }
> 
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u16"  }  } */
> 
> +/*
> +**foo1:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint16x8_t
>  foo1 (uint32_t a, mve_pred16_t p)
>  {
>    return vddupq_x_u16 (a, 1, p);
>  }
> 
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u16"  }  } */
> +/*
> +**foo2:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
> +uint16x8_t
> +foo2 (mve_pred16_t p)
> +{
> +  return vddupq_x_u16 (1, 1, p);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c
> index 66def991b65..2e3e268dbee 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c
> @@ -1,23 +1,57 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
>  /* { dg-add-options arm_v8_1m_mve } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> +/*
> +**foo:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint32x4_t
>  foo (uint32_t a, mve_pred16_t p)
>  {
> -  return vddupq_x_n_u32 (a, 4, p);
> +  return vddupq_x_n_u32 (a, 1, p);
>  }
> 
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u32"  }  } */
> 
> +/*
> +**foo1:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint32x4_t
>  foo1 (uint32_t a, mve_pred16_t p)
>  {
> -  return vddupq_x_u32 (a, 4, p);
> +  return vddupq_x_u32 (a, 1, p);
>  }
> 
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u32"  }  } */
> +/*
> +**foo2:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
> +uint32x4_t
> +foo2 (mve_pred16_t p)
> +{
> +  return vddupq_x_u32 (1, 1, p);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c
> index 8ac322ed52d..bdf563a8074 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c
> @@ -1,23 +1,57 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
>  /* { dg-add-options arm_v8_1m_mve } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> +/*
> +**foo:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint8x16_t
>  foo (uint32_t a, mve_pred16_t p)
>  {
> -  return vddupq_x_n_u8 (a, 4, p);
> +  return vddupq_x_n_u8 (a, 1, p);
>  }
> 
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u8"  }  } */
> 
> +/*
> +**foo1:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint8x16_t
>  foo1 (uint32_t a, mve_pred16_t p)
>  {
> -  return vddupq_x_u8 (a, 4, p);
> +  return vddupq_x_u8 (a, 1, p);
>  }
> 
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u8"  }  } */
> +/*
> +**foo2:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
> +uint8x16_t
> +foo2 (mve_pred16_t p)
> +{
> +  return vddupq_x_u8 (1, 1, p);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c
> index 030048f840a..713d8b731c8 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c
> @@ -1,25 +1,57 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
>  /* { dg-add-options arm_v8_1m_mve } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> -uint32_t *a;
> -
> +/*
> +**foo:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint16x8_t
> -foo (mve_pred16_t p)
> +foo (uint32_t *a, mve_pred16_t p)
>  {
> -  return vddupq_x_wb_u16 (a, 2, p);
> +  return vddupq_x_wb_u16 (a, 1, p);
>  }
> 
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u16"  }  } */
> 
> +/*
> +**foo1:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
> +uint16x8_t
> +foo1 (uint32_t *a, mve_pred16_t p)
> +{
> +  return vddupq_x_u16 (a, 1, p);
> +}
> +
> +/*
> +**foo2:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint16x8_t
> -foo1 (mve_pred16_t p)
> +foo2 (mve_pred16_t p)
>  {
> -  return vddupq_x_u16 (a, 2, p);
> +  return vddupq_x_u16 (1, 1, p);
>  }
> 
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u16"  }  } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c
> index 95bf28e4052..9f484b3b8fb 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c
> @@ -1,25 +1,57 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
>  /* { dg-add-options arm_v8_1m_mve } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> -uint32_t *a;
> -
> +/*
> +**foo:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint32x4_t
> -foo (mve_pred16_t p)
> +foo (uint32_t *a, mve_pred16_t p)
>  {
> -  return vddupq_x_wb_u32 (a, 8, p);
> +  return vddupq_x_wb_u32 (a, 1, p);
>  }
> 
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u32"  }  } */
> 
> +/*
> +**foo1:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
> +uint32x4_t
> +foo1 (uint32_t *a, mve_pred16_t p)
> +{
> +  return vddupq_x_u32 (a, 1, p);
> +}
> +
> +/*
> +**foo2:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint32x4_t
> -foo1 (mve_pred16_t p)
> +foo2 (mve_pred16_t p)
>  {
> -  return vddupq_x_u32 (a, 8, p);
> +  return vddupq_x_u32 (1, 1, p);
>  }
> 
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u32"  }  } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c
> index 2fe81dded55..aa83bfed125 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c
> @@ -1,25 +1,57 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
>  /* { dg-add-options arm_v8_1m_mve } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> -uint32_t *a;
> -
> +/*
> +**foo:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint8x16_t
> -foo (mve_pred16_t p)
> +foo (uint32_t *a, mve_pred16_t p)
>  {
> -  return vddupq_x_wb_u8 (a, 8, p);
> +  return vddupq_x_wb_u8 (a, 1, p);
>  }
> 
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u8"  }  } */
> 
> +/*
> +**foo1:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
> +uint8x16_t
> +foo1 (uint32_t *a, mve_pred16_t p)
> +{
> +  return vddupq_x_u8 (a, 1, p);
> +}
> +
> +/*
> +**foo2:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
> +**	...
> +*/
>  uint8x16_t
> -foo1 (mve_pred16_t p)
> +foo2 (mve_pred16_t p)
>  {
> -  return vddupq_x_u8 (a, 8, p);
> +  return vddupq_x_u8 (1, 1, p);
>  }
> 
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u8"  }  } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
  

Patch

diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
index 62186f124da..1215f845388 100644
--- a/gcc/config/arm/mve.md
+++ b/gcc/config/arm/mve.md
@@ -9043,7 +9043,7 @@  (define_insn "mve_vddupq_u<mode>_insn"
        (minus:SI (match_dup 2)
 		 (match_operand:SI 4 "immediate_operand" "i")))]
  "TARGET_HAVE_MVE"
- "vddup.u%#<V_sz_elem>  %q0, %1, %3")
+ "vddup.u%#<V_sz_elem>\t%q0, %1, %3")
 
 ;;
 ;; [vddupq_m_n_u])
@@ -9079,7 +9079,7 @@  (define_insn "mve_vddupq_m_wb_u<mode>_insn"
        (minus:SI (match_dup 3)
 		 (match_operand:SI 6 "immediate_operand" "i")))]
  "TARGET_HAVE_MVE"
- "vpst\;\tvddupt.u%#<V_sz_elem>\t%q0, %2, %4"
+ "vpst\;vddupt.u%#<V_sz_elem>\t%q0, %2, %4"
  [(set_attr "length""8")])
 
 ;;
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c
index 7332711f6a7..7c8b0152763 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c
@@ -1,23 +1,57 @@ 
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint16x8_t
 foo (uint16x8_t inactive, uint32_t a, mve_pred16_t p)
 {
   return vddupq_m_n_u16 (inactive, a, 1, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vddupt.u16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint16x8_t
 foo1 (uint16x8_t inactive, uint32_t a, mve_pred16_t p)
 {
   return vddupq_m (inactive, a, 1, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vddupt.u16"  }  } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
+uint16x8_t
+foo2 (uint16x8_t inactive, mve_pred16_t p)
+{
+  return vddupq_m (inactive, 1, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c
index 54ad91f2803..810a1a7e21b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c
@@ -1,23 +1,57 @@ 
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint32x4_t
 foo (uint32x4_t inactive, uint32_t a, mve_pred16_t p)
 {
-  return vddupq_m_n_u32 (inactive, a, 4, p);
+  return vddupq_m_n_u32 (inactive, a, 1, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vddupt.u32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint32x4_t
 foo1 (uint32x4_t inactive, uint32_t a, mve_pred16_t p)
 {
-  return vddupq_m (inactive, a, 4, p);
+  return vddupq_m (inactive, a, 1, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vddupt.u32"  }  } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
+uint32x4_t
+foo2 (uint32x4_t inactive, mve_pred16_t p)
+{
+  return vddupq_m (inactive, 1, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c
index 3746b5db6e5..6642b9f4b88 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c
@@ -1,23 +1,57 @@ 
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint8x16_t
 foo (uint8x16_t inactive, uint32_t a, mve_pred16_t p)
 {
-  return vddupq_m_n_u8 (inactive, a, 4, p);
+  return vddupq_m_n_u8 (inactive, a, 1, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vddupt.u8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint8x16_t
 foo1 (uint8x16_t inactive, uint32_t a, mve_pred16_t p)
 {
-  return vddupq_m (inactive, a, 4, p);
+  return vddupq_m (inactive, a, 1, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vddupt.u8"  }  } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
+uint8x16_t
+foo2 (uint8x16_t inactive, mve_pred16_t p)
+{
+  return vddupq_m (inactive, 1, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c
index 8b5d9e86469..cc6a19516d9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c
@@ -1,23 +1,57 @@ 
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint16x8_t
 foo (uint16x8_t inactive, uint32_t *a, mve_pred16_t p)
 {
   return vddupq_m_wb_u16 (inactive, a, 1, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vddupt.u16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint16x8_t
 foo1 (uint16x8_t inactive, uint32_t *a, mve_pred16_t p)
 {
   return vddupq_m (inactive, a, 1, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vddupt.u16"  }  } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
+uint16x8_t
+foo2 (uint16x8_t inactive, mve_pred16_t p)
+{
+  return vddupq_m (inactive, 1, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c
index 7a8c363ac70..cd6c6f86eea 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c
@@ -1,23 +1,57 @@ 
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint32x4_t
 foo (uint32x4_t inactive, uint32_t *a, mve_pred16_t p)
 {
-  return vddupq_m_wb_u32 (inactive, a, 4, p);
+  return vddupq_m_wb_u32 (inactive, a, 1, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vddupt.u32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint32x4_t
 foo1 (uint32x4_t inactive, uint32_t *a, mve_pred16_t p)
 {
-  return vddupq_m (inactive, a, 4, p);
+  return vddupq_m (inactive, a, 1, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vddupt.u32"  }  } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
+uint32x4_t
+foo2 (uint32x4_t inactive, mve_pred16_t p)
+{
+  return vddupq_m (inactive, 1, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c
index 45784a5c9cd..fe186e743da 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c
@@ -1,23 +1,57 @@ 
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint8x16_t
 foo (uint8x16_t inactive, uint32_t *a, mve_pred16_t p)
 {
-  return vddupq_m_wb_u8 (inactive, a, 4, p);
+  return vddupq_m_wb_u8 (inactive, a, 1, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vddupt.u8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint8x16_t
 foo1 (uint8x16_t inactive, uint32_t *a, mve_pred16_t p)
 {
-  return vddupq_m (inactive, a, 4, p);
+  return vddupq_m (inactive, a, 1, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vddupt.u8"  }  } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
+uint8x16_t
+foo2 (uint8x16_t inactive, mve_pred16_t p)
+{
+  return vddupq_m (inactive, 1, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u16.c
index 4684e2af553..2dba2d74b61 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u16.c
@@ -1,21 +1,45 @@ 
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vddup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint16x8_t
 foo (uint32_t a)
 {
-  return vddupq_n_u16 (a, 4);
+  return vddupq_n_u16 (a, 1);
 }
 
-/* { dg-final { scan-assembler "vddup.u16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vddup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint16x8_t
 foo1 (uint32_t a)
 {
-  return vddupq_u16 (a, 4);
+  return vddupq_u16 (a, 1);
 }
 
-/* { dg-final { scan-assembler "vddup.u16"  }  } */
+/*
+**foo2:
+**	...
+**	vddup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
+uint16x8_t
+foo2 ()
+{
+  return vddupq_u16 (1, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u32.c
index aeaa83eb6bc..6b5cf6c75b0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u32.c
@@ -1,21 +1,45 @@ 
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vddup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint32x4_t
 foo (uint32_t a)
 {
   return vddupq_n_u32 (a, 1);
 }
 
-/* { dg-final { scan-assembler "vddup.u32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vddup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint32x4_t
 foo1 (uint32_t a)
 {
   return vddupq_u32 (a, 1);
 }
 
-/* { dg-final { scan-assembler "vddup.u32"  }  } */
+/*
+**foo2:
+**	...
+**	vddup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
+uint32x4_t
+foo2 ()
+{
+  return vddupq_u32 (1, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u8.c
index 255a9f80b6b..174e422f4ef 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u8.c
@@ -1,21 +1,45 @@ 
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vddup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint8x16_t
 foo (uint32_t a)
 {
   return vddupq_n_u8 (a, 1);
 }
 
-/* { dg-final { scan-assembler "vddup.u8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vddup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint8x16_t
 foo1 (uint32_t a)
 {
   return vddupq_u8 (a, 1);
 }
 
-/* { dg-final { scan-assembler "vddup.u8"  }  } */
+/*
+**foo2:
+**	...
+**	vddup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
+uint8x16_t
+foo2 ()
+{
+  return vddupq_u8 (1, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c
index 40fc6cf2197..6a471a7f72f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c
@@ -1,21 +1,45 @@ 
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vddup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint16x8_t
 foo (uint32_t *a)
 {
-  return vddupq_wb_u16 (a, 4);
+  return vddupq_wb_u16 (a, 1);
 }
 
-/* { dg-final { scan-assembler "vddup.u16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vddup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint16x8_t
 foo1 (uint32_t *a)
 {
-  return vddupq_u16 (a, 4);
+  return vddupq_u16 (a, 1);
 }
 
-/* { dg-final { scan-assembler "vddup.u16"  }  } */
+/*
+**foo2:
+**	...
+**	vddup.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
+uint16x8_t
+foo2 ()
+{
+  return vddupq_u16 (1, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c
index 09b5b1f2f80..debf420d3e8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c
@@ -1,21 +1,45 @@ 
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vddup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint32x4_t
 foo (uint32_t *a)
 {
   return vddupq_wb_u32 (a, 1);
 }
 
-/* { dg-final { scan-assembler "vddup.u32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vddup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint32x4_t
 foo1 (uint32_t *a)
 {
   return vddupq_u32 (a, 1);
 }
 
-/* { dg-final { scan-assembler "vddup.u32"  }  } */
+/*
+**foo2:
+**	...
+**	vddup.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
+uint32x4_t
+foo2 ()
+{
+  return vddupq_u32 (1, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c
index 00dfa906748..8e6ef8adccd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c
@@ -1,21 +1,45 @@ 
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vddup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint8x16_t
 foo (uint32_t *a)
 {
   return vddupq_wb_u8 (a, 1);
 }
 
-/* { dg-final { scan-assembler "vddup.u8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vddup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint8x16_t
 foo1 (uint32_t *a)
 {
   return vddupq_u8 (a, 1);
 }
 
-/* { dg-final { scan-assembler "vddup.u8"  }  } */
+/*
+**foo2:
+**	...
+**	vddup.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
+uint8x16_t
+foo2 ()
+{
+  return vddupq_u8 (1, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c
index 5b0fc0b6340..1aafaf87b82 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c
@@ -1,23 +1,57 @@ 
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint16x8_t
 foo (uint32_t a, mve_pred16_t p)
 {
   return vddupq_x_n_u16 (a, 1, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vddupt.u16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint16x8_t
 foo1 (uint32_t a, mve_pred16_t p)
 {
   return vddupq_x_u16 (a, 1, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vddupt.u16"  }  } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
+uint16x8_t
+foo2 (mve_pred16_t p)
+{
+  return vddupq_x_u16 (1, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c
index 66def991b65..2e3e268dbee 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c
@@ -1,23 +1,57 @@ 
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint32x4_t
 foo (uint32_t a, mve_pred16_t p)
 {
-  return vddupq_x_n_u32 (a, 4, p);
+  return vddupq_x_n_u32 (a, 1, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vddupt.u32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint32x4_t
 foo1 (uint32_t a, mve_pred16_t p)
 {
-  return vddupq_x_u32 (a, 4, p);
+  return vddupq_x_u32 (a, 1, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vddupt.u32"  }  } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
+uint32x4_t
+foo2 (mve_pred16_t p)
+{
+  return vddupq_x_u32 (1, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c
index 8ac322ed52d..bdf563a8074 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c
@@ -1,23 +1,57 @@ 
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint8x16_t
 foo (uint32_t a, mve_pred16_t p)
 {
-  return vddupq_x_n_u8 (a, 4, p);
+  return vddupq_x_n_u8 (a, 1, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vddupt.u8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint8x16_t
 foo1 (uint32_t a, mve_pred16_t p)
 {
-  return vddupq_x_u8 (a, 4, p);
+  return vddupq_x_u8 (a, 1, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vddupt.u8"  }  } */
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
+uint8x16_t
+foo2 (mve_pred16_t p)
+{
+  return vddupq_x_u8 (1, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c
index 030048f840a..713d8b731c8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c
@@ -1,25 +1,57 @@ 
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
-uint32_t *a;
-
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint16x8_t
-foo (mve_pred16_t p)
+foo (uint32_t *a, mve_pred16_t p)
 {
-  return vddupq_x_wb_u16 (a, 2, p);
+  return vddupq_x_wb_u16 (a, 1, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vddupt.u16"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
+uint16x8_t
+foo1 (uint32_t *a, mve_pred16_t p)
+{
+  return vddupq_x_u16 (a, 1, p);
+}
+
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u16	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint16x8_t
-foo1 (mve_pred16_t p)
+foo2 (mve_pred16_t p)
 {
-  return vddupq_x_u16 (a, 2, p);
+  return vddupq_x_u16 (1, 1, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vddupt.u16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c
index 95bf28e4052..9f484b3b8fb 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c
@@ -1,25 +1,57 @@ 
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
-uint32_t *a;
-
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint32x4_t
-foo (mve_pred16_t p)
+foo (uint32_t *a, mve_pred16_t p)
 {
-  return vddupq_x_wb_u32 (a, 8, p);
+  return vddupq_x_wb_u32 (a, 1, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vddupt.u32"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
+uint32x4_t
+foo1 (uint32_t *a, mve_pred16_t p)
+{
+  return vddupq_x_u32 (a, 1, p);
+}
+
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u32	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint32x4_t
-foo1 (mve_pred16_t p)
+foo2 (mve_pred16_t p)
 {
-  return vddupq_x_u32 (a, 8, p);
+  return vddupq_x_u32 (1, 1, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vddupt.u32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c
index 2fe81dded55..aa83bfed125 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c
@@ -1,25 +1,57 @@ 
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
-uint32_t *a;
-
+/*
+**foo:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint8x16_t
-foo (mve_pred16_t p)
+foo (uint32_t *a, mve_pred16_t p)
 {
-  return vddupq_x_wb_u8 (a, 8, p);
+  return vddupq_x_wb_u8 (a, 1, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vddupt.u8"  }  } */
 
+/*
+**foo1:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
+uint8x16_t
+foo1 (uint32_t *a, mve_pred16_t p)
+{
+  return vddupq_x_u8 (a, 1, p);
+}
+
+/*
+**foo2:
+**	...
+**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
+**	...
+**	vpst(?:	@.*|)
+**	...
+**	vddupt.u8	q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?:	@.*|)
+**	...
+*/
 uint8x16_t
-foo1 (mve_pred16_t p)
+foo2 (mve_pred16_t p)
 {
-  return vddupq_x_u8 (a, 8, p);
+  return vddupq_x_u8 (1, 1, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vddupt.u8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file