[15/40] sim/h8300: Add "+ 0x0" to avoid self-assignments

Message ID 5ab303a5bdfc1da7832f8fa22f57678c9ef1a5fa.1666258361.git.research_trasio@irq.a4lg.com
State Committed
Headers
Series sim+gdb: Suppress warnings if built with Clang (big batch 1) |

Commit Message

Tsukasa OI Oct. 20, 2022, 9:32 a.m. UTC
  Clang generates a warning if there is a redundant self-assignment
("-Wself-assign").  On the default configuration, it causes a build failure
(unless "--disable-werror" is specified).

However, removing self-assignments in step_once function makes the code less
readable.  Instead, this commit inserts dummy addition to match the comments
"Value added == 0".  This is redundant but will suppress warnings and
matches with other branches better.  It will be also optimized away so we
can ignore performance impact on this.
---
 sim/h8300/compile.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
  

Comments

Mike Frysinger Oct. 23, 2022, 2:05 p.m. UTC | #1
On 20 Oct 2022 09:32, Tsukasa OI wrote:
> Clang generates a warning if there is a redundant self-assignment
> ("-Wself-assign").  On the default configuration, it causes a build failure
> (unless "--disable-werror" is specified).
> 
> However, removing self-assignments in step_once function makes the code less
> readable.  Instead, this commit inserts dummy addition to match the comments
> "Value added == 0".  This is redundant but will suppress warnings and
> matches with other branches better.  It will be also optimized away so we
> can ignore performance impact on this.
> ---
>  sim/h8300/compile.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> --- a/sim/h8300/compile.c
> +++ b/sim/h8300/compile.c
> @@ -4141,7 +4141,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
>  	  res = GET_B_REG (code->src.reg);	/* FIXME fetch? */
>  	  if (!c && (0 <= (res >>  4) && (res >>  4) <= 9) && 
>  	      !h && (0 <= (res & 0xf) && (res & 0xf) <= 9))
> -	    res = res;		/* Value added == 0.  */
> +	    res = res + 0x0;		/* Value added == 0.  */

Andrew posted a patch to just delete the assignment.  either is fine with me.
-mike
  
Tsukasa OI Oct. 24, 2022, 10:55 a.m. UTC | #2
On 2022/10/23 23:05, Mike Frysinger wrote:
> On 20 Oct 2022 09:32, Tsukasa OI wrote:
>> Clang generates a warning if there is a redundant self-assignment
>> ("-Wself-assign").  On the default configuration, it causes a build failure
>> (unless "--disable-werror" is specified).
>>
>> However, removing self-assignments in step_once function makes the code less
>> readable.  Instead, this commit inserts dummy addition to match the comments
>> "Value added == 0".  This is redundant but will suppress warnings and
>> matches with other branches better.  It will be also optimized away so we
>> can ignore performance impact on this.
>> ---
>>  sim/h8300/compile.c | 4 ++--
>>  1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> --- a/sim/h8300/compile.c
>> +++ b/sim/h8300/compile.c
>> @@ -4141,7 +4141,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
>>  	  res = GET_B_REG (code->src.reg);	/* FIXME fetch? */
>>  	  if (!c && (0 <= (res >>  4) && (res >>  4) <= 9) && 
>>  	      !h && (0 <= (res & 0xf) && (res & 0xf) <= 9))
>> -	    res = res;		/* Value added == 0.  */
>> +	    res = res + 0x0;		/* Value added == 0.  */
> 
> Andrew posted a patch to just delete the assignment.  either is fine with me.
> -mike

I'll leave it for Andrew and I will withdraw following patches from my
patchset:

-   PATCH 03/40
-   PATCH 15/40
-   PATCH 16/40 (wrote by Andrew)
-   PATCH 28/40
-   PATCH 30/40
-   PATCH 36/40

Because this patchset (intended to be a RFC PATCH) is a mere copy of my
working branch, I need to sync with Andrew's work.

Thanks,
Tsukasa
  

Patch

diff --git a/sim/h8300/compile.c b/sim/h8300/compile.c
index 9be7dd565a9..f7d8d590b69 100644
--- a/sim/h8300/compile.c
+++ b/sim/h8300/compile.c
@@ -4141,7 +4141,7 @@  step_once (SIM_DESC sd, SIM_CPU *cpu)
 	  res = GET_B_REG (code->src.reg);	/* FIXME fetch? */
 	  if (!c && (0 <= (res >>  4) && (res >>  4) <= 9) && 
 	      !h && (0 <= (res & 0xf) && (res & 0xf) <= 9))
-	    res = res;		/* Value added == 0.  */
+	    res = res + 0x0;		/* Value added == 0.  */
 	  else if (!c && (0  <= (res >>  4) && (res >>  4) <=  8) && 
 		   !h && (10 <= (res & 0xf) && (res & 0xf) <= 15))
 	    res = res + 0x6;		/* Value added == 6.  */
@@ -4174,7 +4174,7 @@  step_once (SIM_DESC sd, SIM_CPU *cpu)
 	  res = GET_B_REG (code->src.reg); /* FIXME fetch, fetch2... */
 	  if (!c && (0 <= (res >>  4) && (res >>  4) <= 9) && 
 	      !h && (0 <= (res & 0xf) && (res & 0xf) <= 9))
-	    res = res;		/* Value added == 0.  */
+	    res = res + 0x0;		/* Value added == 0.  */
 	  else if (!c && (0 <= (res >>  4) && (res >>  4) <=  8) && 
 		    h && (6 <= (res & 0xf) && (res & 0xf) <= 15))
 	    res = res + 0xfa;		/* Value added == 0xfa.  */