rs6000: Use known constant for GET_MODE_NUNITS and similar

Message ID b4b2341b-567e-fc53-4a54-deeff5e01cb0@linux.ibm.com
State New
Headers
Series rs6000: Use known constant for GET_MODE_NUNITS and similar |

Commit Message

Kewen.Lin Jan. 13, 2022, 1:56 a.m. UTC
  Hi,

This patch is to clean up some codes with GET_MODE_UNIT_SIZE or
GET_MODE_NUNITS, which can use known constant instead.

Bootstrapped and regtested on powerpc64le-linux-gnu P9 and
powerpc64-linux-gnu P8.

Is it ok for trunk?

BR,
Kewen
-----
gcc/ChangeLog:

	* config/rs6000/altivec.md (altivec_vreveti2): Use known constant
	values to simplify code.
	* config/rs6000/vsx.md (*vsx_extract_si, *vsx_extract_si_<uns>float_df,
	*vsx_extract_si_<uns>float_<mode>, *vsx_insert_extract_v4sf_p9):
	Likewise.
---
 gcc/config/rs6000/altivec.md | 11 +++--------
 gcc/config/rs6000/vsx.md     |  8 ++++----
 2 files changed, 7 insertions(+), 12 deletions(-)

--
2.27.0
  

Comments

David Edelsohn Jan. 13, 2022, 3:12 a.m. UTC | #1
On Wed, Jan 12, 2022 at 8:56 PM Kewen.Lin <linkw@linux.ibm.com> wrote:
>
> Hi,
>
> This patch is to clean up some codes with GET_MODE_UNIT_SIZE or
> GET_MODE_NUNITS, which can use known constant instead.

I'll let Segher decide, but often the additional code is useful
self-documentation instead of magic constants.  Or at least the change
requires comments documenting the derivation of the constants
currently described by the code itself.

Thanks, David

>
> Bootstrapped and regtested on powerpc64le-linux-gnu P9 and
> powerpc64-linux-gnu P8.
>
> Is it ok for trunk?
>
> BR,
> Kewen
> -----
> gcc/ChangeLog:
>
>         * config/rs6000/altivec.md (altivec_vreveti2): Use known constant
>         values to simplify code.
>         * config/rs6000/vsx.md (*vsx_extract_si, *vsx_extract_si_<uns>float_df,
>         *vsx_extract_si_<uns>float_<mode>, *vsx_insert_extract_v4sf_p9):
>         Likewise.
> ---
>  gcc/config/rs6000/altivec.md | 11 +++--------
>  gcc/config/rs6000/vsx.md     |  8 ++++----
>  2 files changed, 7 insertions(+), 12 deletions(-)
>
> diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
> index c2312cc1e0f..d5c4ecfa9b7 100644
> --- a/gcc/config/rs6000/altivec.md
> +++ b/gcc/config/rs6000/altivec.md
> @@ -3957,17 +3957,12 @@ (define_expand "altivec_vreveti2"
>                       UNSPEC_VREVEV))]
>    "TARGET_ALTIVEC"
>  {
> -  int i, j, size, num_elements;
> +  int i;
>    rtvec v = rtvec_alloc (16);
>    rtx mask = gen_reg_rtx (V16QImode);
>
> -  size = GET_MODE_UNIT_SIZE (TImode);
> -  num_elements = GET_MODE_NUNITS (TImode);
> -
> -  for (j = 0; j < num_elements; j++)
> -    for (i = 0; i < size; i++)
> -      RTVEC_ELT (v, i + j * size)
> -       = GEN_INT (i + (num_elements - 1 - j) * size);
> +  for (i = 0; i < 16; i++)
> +    RTVEC_ELT (v, i) = GEN_INT (i);
>
>    emit_insn (gen_vec_initv16qiqi (mask, gen_rtx_PARALLEL (V16QImode, v)));
>    emit_insn (gen_altivec_vperm_ti (operands[0], operands[1],
> diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
> index 802db0d112b..892b99c6d6b 100644
> --- a/gcc/config/rs6000/vsx.md
> +++ b/gcc/config/rs6000/vsx.md
> @@ -3855,7 +3855,7 @@ (define_insn_and_split  "*vsx_extract_si"
>    int value;
>
>    if (!BYTES_BIG_ENDIAN)
> -    element = GEN_INT (GET_MODE_NUNITS (V4SImode) - 1 - INTVAL (element));
> +    element = GEN_INT (3 - INTVAL (element));
>
>    /* If the value is in the correct position, we can avoid doing the VSPLT<x>
>       instruction.  */
> @@ -4231,7 +4231,7 @@ (define_insn_and_split "*vsx_extract_si_<uns>float_df"
>    int value;
>
>    if (!BYTES_BIG_ENDIAN)
> -    element = GEN_INT (GET_MODE_NUNITS (V4SImode) - 1 - INTVAL (element));
> +    element = GEN_INT (3 - INTVAL (element));
>
>    /* If the value is in the correct position, we can avoid doing the VSPLT<x>
>       instruction.  */
> @@ -4274,7 +4274,7 @@ (define_insn_and_split "*vsx_extract_si_<uns>float_<mode>"
>    int value;
>
>    if (!BYTES_BIG_ENDIAN)
> -    element = GEN_INT (GET_MODE_NUNITS (V4SImode) - 1 - INTVAL (element));
> +    element = GEN_INT (3 - INTVAL (element));
>
>    /* If the value is in the correct position, we can avoid doing the VSPLT<x>
>       instruction.  */
> @@ -4467,7 +4467,7 @@ (define_insn "*vsx_insert_extract_v4sf_p9"
>    int ele = INTVAL (operands[4]);
>
>    if (!BYTES_BIG_ENDIAN)
> -    ele = GET_MODE_NUNITS (V4SFmode) - 1 - ele;
> +    ele = 3 - ele;
>
>    operands[4] = GEN_INT (GET_MODE_SIZE (SFmode) * ele);
>    return "xxinsertw %x0,%x2,%4";
> --
> 2.27.0
>
  
Kewen.Lin Jan. 13, 2022, 12:40 p.m. UTC | #2
Hi David,

on 2022/1/13 上午11:12, David Edelsohn wrote:
> On Wed, Jan 12, 2022 at 8:56 PM Kewen.Lin <linkw@linux.ibm.com> wrote:
>>
>> Hi,
>>
>> This patch is to clean up some codes with GET_MODE_UNIT_SIZE or
>> GET_MODE_NUNITS, which can use known constant instead.
> 
> I'll let Segher decide, but often the additional code is useful
> self-documentation instead of magic constants.  Or at least the change
> requires comments documenting the derivation of the constants
> currently described by the code itself.
> 

Thanks for the comments, I added some comments as suggested, also removed
the whole "altivec_vreveti2" since I noticed it's useless, it's not used
by any built-in functions and even unused in the commit db042e1603db50573.

The updated version has been tested as before.

BR,
Kewen
-----
gcc/ChangeLog:

	* config/rs6000/altivec.md (altivec_vreveti2): Remove.
	* config/rs6000/vsx.md (*vsx_extract_si, *vsx_extract_si_<uns>float_df,
	*vsx_extract_si_<uns>float_<mode>, *vsx_insert_extract_v4sf_p9): Use
	known constant values to simplify code.
---
 gcc/config/rs6000/altivec.md | 25 -------------------------
 gcc/config/rs6000/vsx.md     | 12 ++++++++----
 2 files changed, 8 insertions(+), 29 deletions(-)

diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index c2312cc1e0f..b7f056f8c60 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -3950,31 +3950,6 @@ (define_expand "altivec_negv4sf2"
   DONE;
 })

-;; Vector reverse elements
-(define_expand "altivec_vreveti2"
-  [(set (match_operand:TI 0 "register_operand" "=v")
-	(unspec:TI [(match_operand:TI 1 "register_operand" "v")]
-		      UNSPEC_VREVEV))]
-  "TARGET_ALTIVEC"
-{
-  int i, j, size, num_elements;
-  rtvec v = rtvec_alloc (16);
-  rtx mask = gen_reg_rtx (V16QImode);
-
-  size = GET_MODE_UNIT_SIZE (TImode);
-  num_elements = GET_MODE_NUNITS (TImode);
-
-  for (j = 0; j < num_elements; j++)
-    for (i = 0; i < size; i++)
-      RTVEC_ELT (v, i + j * size)
-	= GEN_INT (i + (num_elements - 1 - j) * size);
-
-  emit_insn (gen_vec_initv16qiqi (mask, gen_rtx_PARALLEL (V16QImode, v)));
-  emit_insn (gen_altivec_vperm_ti (operands[0], operands[1],
-	     operands[1], mask));
-  DONE;
-})
-
 ;; Vector reverse elements for V16QI V8HI V4SI V4SF
 (define_expand "altivec_vreve<mode>2"
   [(set (match_operand:VEC_K 0 "register_operand" "=v")
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index 802db0d112b..d246410880d 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -3854,8 +3854,9 @@ (define_insn_and_split  "*vsx_extract_si"
   rtx vec_tmp = operands[3];
   int value;

+  /* Adjust index for LE element ordering.  */
   if (!BYTES_BIG_ENDIAN)
-    element = GEN_INT (GET_MODE_NUNITS (V4SImode) - 1 - INTVAL (element));
+    element = GEN_INT (3 - INTVAL (element));

   /* If the value is in the correct position, we can avoid doing the VSPLT<x>
      instruction.  */
@@ -4230,8 +4231,9 @@ (define_insn_and_split "*vsx_extract_si_<uns>float_df"
   rtx v4si_tmp = operands[3];
   int value;

+  /* Adjust index for LE element ordering.  */
   if (!BYTES_BIG_ENDIAN)
-    element = GEN_INT (GET_MODE_NUNITS (V4SImode) - 1 - INTVAL (element));
+    element = GEN_INT (3 - INTVAL (element));

   /* If the value is in the correct position, we can avoid doing the VSPLT<x>
      instruction.  */
@@ -4273,8 +4275,9 @@ (define_insn_and_split "*vsx_extract_si_<uns>float_<mode>"
   rtx df_tmp = operands[4];
   int value;

+  /* Adjust index for LE element ordering.  */
   if (!BYTES_BIG_ENDIAN)
-    element = GEN_INT (GET_MODE_NUNITS (V4SImode) - 1 - INTVAL (element));
+    element = GEN_INT (3 - INTVAL (element));

   /* If the value is in the correct position, we can avoid doing the VSPLT<x>
      instruction.  */
@@ -4466,8 +4469,9 @@ (define_insn "*vsx_insert_extract_v4sf_p9"
 {
   int ele = INTVAL (operands[4]);

+  /* Adjust index for LE element ordering.  */
   if (!BYTES_BIG_ENDIAN)
-    ele = GET_MODE_NUNITS (V4SFmode) - 1 - ele;
+    ele = 3 - ele;

   operands[4] = GEN_INT (GET_MODE_SIZE (SFmode) * ele);
   return "xxinsertw %x0,%x2,%4";
--
2.27.0
  
David Edelsohn Jan. 13, 2022, 3:15 p.m. UTC | #3
On Thu, Jan 13, 2022 at 7:40 AM Kewen.Lin <linkw@linux.ibm.com> wrote:
>
> Hi David,
>
> on 2022/1/13 上午11:12, David Edelsohn wrote:
> > On Wed, Jan 12, 2022 at 8:56 PM Kewen.Lin <linkw@linux.ibm.com> wrote:
> >>
> >> Hi,
> >>
> >> This patch is to clean up some codes with GET_MODE_UNIT_SIZE or
> >> GET_MODE_NUNITS, which can use known constant instead.
> >
> > I'll let Segher decide, but often the additional code is useful
> > self-documentation instead of magic constants.  Or at least the change
> > requires comments documenting the derivation of the constants
> > currently described by the code itself.
> >
>
> Thanks for the comments, I added some comments as suggested, also removed
> the whole "altivec_vreveti2" since I noticed it's useless, it's not used
> by any built-in functions and even unused in the commit db042e1603db50573.
>
> The updated version has been tested as before.

As we have discussed offline, the comments need to be clarified and expanded.

And the removal of altivec_vreveti2 should be confirmed with Carl
Love, who added the pattern less than a year ago. There may be another
patch planning to use it.

Thanks, David

>
> BR,
> Kewen
> -----
> gcc/ChangeLog:
>
>         * config/rs6000/altivec.md (altivec_vreveti2): Remove.
>         * config/rs6000/vsx.md (*vsx_extract_si, *vsx_extract_si_<uns>float_df,
>         *vsx_extract_si_<uns>float_<mode>, *vsx_insert_extract_v4sf_p9): Use
>         known constant values to simplify code.
> ---
>  gcc/config/rs6000/altivec.md | 25 -------------------------
>  gcc/config/rs6000/vsx.md     | 12 ++++++++----
>  2 files changed, 8 insertions(+), 29 deletions(-)
>
> diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
> index c2312cc1e0f..b7f056f8c60 100644
> --- a/gcc/config/rs6000/altivec.md
> +++ b/gcc/config/rs6000/altivec.md
> @@ -3950,31 +3950,6 @@ (define_expand "altivec_negv4sf2"
>    DONE;
>  })
>
> -;; Vector reverse elements
> -(define_expand "altivec_vreveti2"
> -  [(set (match_operand:TI 0 "register_operand" "=v")
> -       (unspec:TI [(match_operand:TI 1 "register_operand" "v")]
> -                     UNSPEC_VREVEV))]
> -  "TARGET_ALTIVEC"
> -{
> -  int i, j, size, num_elements;
> -  rtvec v = rtvec_alloc (16);
> -  rtx mask = gen_reg_rtx (V16QImode);
> -
> -  size = GET_MODE_UNIT_SIZE (TImode);
> -  num_elements = GET_MODE_NUNITS (TImode);
> -
> -  for (j = 0; j < num_elements; j++)
> -    for (i = 0; i < size; i++)
> -      RTVEC_ELT (v, i + j * size)
> -       = GEN_INT (i + (num_elements - 1 - j) * size);
> -
> -  emit_insn (gen_vec_initv16qiqi (mask, gen_rtx_PARALLEL (V16QImode, v)));
> -  emit_insn (gen_altivec_vperm_ti (operands[0], operands[1],
> -            operands[1], mask));
> -  DONE;
> -})
> -
>  ;; Vector reverse elements for V16QI V8HI V4SI V4SF
>  (define_expand "altivec_vreve<mode>2"
>    [(set (match_operand:VEC_K 0 "register_operand" "=v")
> diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
> index 802db0d112b..d246410880d 100644
> --- a/gcc/config/rs6000/vsx.md
> +++ b/gcc/config/rs6000/vsx.md
> @@ -3854,8 +3854,9 @@ (define_insn_and_split  "*vsx_extract_si"
>    rtx vec_tmp = operands[3];
>    int value;
>
> +  /* Adjust index for LE element ordering.  */
>    if (!BYTES_BIG_ENDIAN)
> -    element = GEN_INT (GET_MODE_NUNITS (V4SImode) - 1 - INTVAL (element));
> +    element = GEN_INT (3 - INTVAL (element));
>
>    /* If the value is in the correct position, we can avoid doing the VSPLT<x>
>       instruction.  */
> @@ -4230,8 +4231,9 @@ (define_insn_and_split "*vsx_extract_si_<uns>float_df"
>    rtx v4si_tmp = operands[3];
>    int value;
>
> +  /* Adjust index for LE element ordering.  */
>    if (!BYTES_BIG_ENDIAN)
> -    element = GEN_INT (GET_MODE_NUNITS (V4SImode) - 1 - INTVAL (element));
> +    element = GEN_INT (3 - INTVAL (element));
>
>    /* If the value is in the correct position, we can avoid doing the VSPLT<x>
>       instruction.  */
> @@ -4273,8 +4275,9 @@ (define_insn_and_split "*vsx_extract_si_<uns>float_<mode>"
>    rtx df_tmp = operands[4];
>    int value;
>
> +  /* Adjust index for LE element ordering.  */
>    if (!BYTES_BIG_ENDIAN)
> -    element = GEN_INT (GET_MODE_NUNITS (V4SImode) - 1 - INTVAL (element));
> +    element = GEN_INT (3 - INTVAL (element));
>
>    /* If the value is in the correct position, we can avoid doing the VSPLT<x>
>       instruction.  */
> @@ -4466,8 +4469,9 @@ (define_insn "*vsx_insert_extract_v4sf_p9"
>  {
>    int ele = INTVAL (operands[4]);
>
> +  /* Adjust index for LE element ordering.  */
>    if (!BYTES_BIG_ENDIAN)
> -    ele = GET_MODE_NUNITS (V4SFmode) - 1 - ele;
> +    ele = 3 - ele;
>
>    operands[4] = GEN_INT (GET_MODE_SIZE (SFmode) * ele);
>    return "xxinsertw %x0,%x2,%4";
> --
> 2.27.0
>
  
Kewen.Lin Jan. 14, 2022, 10:42 a.m. UTC | #4
on 2022/1/13 下午11:15, David Edelsohn wrote:
> On Thu, Jan 13, 2022 at 7:40 AM Kewen.Lin <linkw@linux.ibm.com> wrote:
>>
>> Hi David,
>>
>> on 2022/1/13 上午11:12, David Edelsohn wrote:
>>> On Wed, Jan 12, 2022 at 8:56 PM Kewen.Lin <linkw@linux.ibm.com> wrote:
>>>>
>>>> Hi,
>>>>
>>>> This patch is to clean up some codes with GET_MODE_UNIT_SIZE or
>>>> GET_MODE_NUNITS, which can use known constant instead.
>>>
>>> I'll let Segher decide, but often the additional code is useful
>>> self-documentation instead of magic constants.  Or at least the change
>>> requires comments documenting the derivation of the constants
>>> currently described by the code itself.
>>>
>>
>> Thanks for the comments, I added some comments as suggested, also removed
>> the whole "altivec_vreveti2" since I noticed it's useless, it's not used
>> by any built-in functions and even unused in the commit db042e1603db50573.
>>
>> The updated version has been tested as before.
> 
> As we have discussed offline, the comments need to be clarified and expanded.
> 
> And the removal of altivec_vreveti2 should be confirmed with Carl
> Love, who added the pattern less than a year ago. There may be another
> patch planning to use it.
> 

Thanks for the suggestions David!  The comments have been updated, and Carl
also helped to confirm the altivec_vreveti2 pattern is not planned for any
future work and looks reasonable to remove.

Does this updated version look good to you?

BR,
Kewen
-----
gcc/ChangeLog:

	* config/rs6000/altivec.md (altivec_vreveti2): Remove.
	* config/rs6000/vsx.md (*vsx_extract_si, *vsx_extract_si_<uns>float_df,
	*vsx_extract_si_<uns>float_<mode>, *vsx_insert_extract_v4sf_p9): Use
	known constant values to simplify code.
---
 gcc/config/rs6000/altivec.md | 25 -------------------------
 gcc/config/rs6000/vsx.md     | 16 ++++++++++++----
 2 files changed, 12 insertions(+), 29 deletions(-)

diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index 950b17862c4..4412175a0dc 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -3950,31 +3950,6 @@
   DONE;
 })

-;; Vector reverse elements
-(define_expand "altivec_vreveti2"
-  [(set (match_operand:TI 0 "register_operand" "=v")
-	(unspec:TI [(match_operand:TI 1 "register_operand" "v")]
-		      UNSPEC_VREVEV))]
-  "TARGET_ALTIVEC"
-{
-  int i, j, size, num_elements;
-  rtvec v = rtvec_alloc (16);
-  rtx mask = gen_reg_rtx (V16QImode);
-
-  size = GET_MODE_UNIT_SIZE (TImode);
-  num_elements = GET_MODE_NUNITS (TImode);
-
-  for (j = 0; j < num_elements; j++)
-    for (i = 0; i < size; i++)
-      RTVEC_ELT (v, i + j * size)
-	= GEN_INT (i + (num_elements - 1 - j) * size);
-
-  emit_insn (gen_vec_initv16qiqi (mask, gen_rtx_PARALLEL (V16QImode, v)));
-  emit_insn (gen_altivec_vperm_ti (operands[0], operands[1],
-	     operands[1], mask));
-  DONE;
-})
-
 ;; Vector reverse elements for V16QI V8HI V4SI V4SF
 (define_expand "altivec_vreve<mode>2"
   [(set (match_operand:VEC_K 0 "register_operand" "=v")
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index acd729d1687..ee748ff4ebd 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -3854,8 +3854,10 @@
   rtx vec_tmp = operands[3];
   int value;

+  /* Adjust index for LE element ordering, the below minuend 3 is computed by
+     GET_MODE_NUNITS (V4SImode) - 1.  */
   if (!BYTES_BIG_ENDIAN)
-    element = GEN_INT (GET_MODE_NUNITS (V4SImode) - 1 - INTVAL (element));
+    element = GEN_INT (3 - INTVAL (element));

   /* If the value is in the correct position, we can avoid doing the VSPLT<x>
      instruction.  */
@@ -4230,8 +4232,10 @@
   rtx v4si_tmp = operands[3];
   int value;

+  /* Adjust index for LE element ordering, the below minuend 3 is computed by
+     GET_MODE_NUNITS (V4SImode) - 1.  */
   if (!BYTES_BIG_ENDIAN)
-    element = GEN_INT (GET_MODE_NUNITS (V4SImode) - 1 - INTVAL (element));
+    element = GEN_INT (3 - INTVAL (element));

   /* If the value is in the correct position, we can avoid doing the VSPLT<x>
      instruction.  */
@@ -4273,8 +4277,10 @@
   rtx df_tmp = operands[4];
   int value;

+  /* Adjust index for LE element ordering, the below minuend 3 is computed by
+     GET_MODE_NUNITS (V4SImode) - 1.  */
   if (!BYTES_BIG_ENDIAN)
-    element = GEN_INT (GET_MODE_NUNITS (V4SImode) - 1 - INTVAL (element));
+    element = GEN_INT (3 - INTVAL (element));

   /* If the value is in the correct position, we can avoid doing the VSPLT<x>
      instruction.  */
@@ -4466,8 +4472,10 @@
 {
   int ele = INTVAL (operands[4]);

+  /* Adjust index for LE element ordering, the below minuend 3 is computed by
+     GET_MODE_NUNITS (V4SFmode) - 1.  */
   if (!BYTES_BIG_ENDIAN)
-    ele = GET_MODE_NUNITS (V4SFmode) - 1 - ele;
+    ele = 3 - ele;

   operands[4] = GEN_INT (GET_MODE_SIZE (SFmode) * ele);
   return "xxinsertw %x0,%x2,%4";
  
David Edelsohn Jan. 14, 2022, 1:53 p.m. UTC | #5
On Fri, Jan 14, 2022 at 5:42 AM Kewen.Lin <linkw@linux.ibm.com> wrote:
>
> on 2022/1/13 下午11:15, David Edelsohn wrote:
> > On Thu, Jan 13, 2022 at 7:40 AM Kewen.Lin <linkw@linux.ibm.com> wrote:
> >>
> >> Hi David,
> >>
> >> on 2022/1/13 上午11:12, David Edelsohn wrote:
> >>> On Wed, Jan 12, 2022 at 8:56 PM Kewen.Lin <linkw@linux.ibm.com> wrote:
> >>>>
> >>>> Hi,
> >>>>
> >>>> This patch is to clean up some codes with GET_MODE_UNIT_SIZE or
> >>>> GET_MODE_NUNITS, which can use known constant instead.
> >>>
> >>> I'll let Segher decide, but often the additional code is useful
> >>> self-documentation instead of magic constants.  Or at least the change
> >>> requires comments documenting the derivation of the constants
> >>> currently described by the code itself.
> >>>
> >>
> >> Thanks for the comments, I added some comments as suggested, also removed
> >> the whole "altivec_vreveti2" since I noticed it's useless, it's not used
> >> by any built-in functions and even unused in the commit db042e1603db50573.
> >>
> >> The updated version has been tested as before.
> >
> > As we have discussed offline, the comments need to be clarified and expanded.
> >
> > And the removal of altivec_vreveti2 should be confirmed with Carl
> > Love, who added the pattern less than a year ago. There may be another
> > patch planning to use it.
> >
>
> Thanks for the suggestions David!  The comments have been updated, and Carl
> also helped to confirm the altivec_vreveti2 pattern is not planned for any
> future work and looks reasonable to remove.
>
> Does this updated version look good to you?

The revised patch is okay.

Thanks, David

>
> BR,
> Kewen
> -----
> gcc/ChangeLog:
>
>         * config/rs6000/altivec.md (altivec_vreveti2): Remove.
>         * config/rs6000/vsx.md (*vsx_extract_si, *vsx_extract_si_<uns>float_df,
>         *vsx_extract_si_<uns>float_<mode>, *vsx_insert_extract_v4sf_p9): Use
>         known constant values to simplify code.
> ---
>  gcc/config/rs6000/altivec.md | 25 -------------------------
>  gcc/config/rs6000/vsx.md     | 16 ++++++++++++----
>  2 files changed, 12 insertions(+), 29 deletions(-)
>
> diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
> index 950b17862c4..4412175a0dc 100644
> --- a/gcc/config/rs6000/altivec.md
> +++ b/gcc/config/rs6000/altivec.md
> @@ -3950,31 +3950,6 @@
>    DONE;
>  })
>
> -;; Vector reverse elements
> -(define_expand "altivec_vreveti2"
> -  [(set (match_operand:TI 0 "register_operand" "=v")
> -       (unspec:TI [(match_operand:TI 1 "register_operand" "v")]
> -                     UNSPEC_VREVEV))]
> -  "TARGET_ALTIVEC"
> -{
> -  int i, j, size, num_elements;
> -  rtvec v = rtvec_alloc (16);
> -  rtx mask = gen_reg_rtx (V16QImode);
> -
> -  size = GET_MODE_UNIT_SIZE (TImode);
> -  num_elements = GET_MODE_NUNITS (TImode);
> -
> -  for (j = 0; j < num_elements; j++)
> -    for (i = 0; i < size; i++)
> -      RTVEC_ELT (v, i + j * size)
> -       = GEN_INT (i + (num_elements - 1 - j) * size);
> -
> -  emit_insn (gen_vec_initv16qiqi (mask, gen_rtx_PARALLEL (V16QImode, v)));
> -  emit_insn (gen_altivec_vperm_ti (operands[0], operands[1],
> -            operands[1], mask));
> -  DONE;
> -})
> -
>  ;; Vector reverse elements for V16QI V8HI V4SI V4SF
>  (define_expand "altivec_vreve<mode>2"
>    [(set (match_operand:VEC_K 0 "register_operand" "=v")
> diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
> index acd729d1687..ee748ff4ebd 100644
> --- a/gcc/config/rs6000/vsx.md
> +++ b/gcc/config/rs6000/vsx.md
> @@ -3854,8 +3854,10 @@
>    rtx vec_tmp = operands[3];
>    int value;
>
> +  /* Adjust index for LE element ordering, the below minuend 3 is computed by
> +     GET_MODE_NUNITS (V4SImode) - 1.  */
>    if (!BYTES_BIG_ENDIAN)
> -    element = GEN_INT (GET_MODE_NUNITS (V4SImode) - 1 - INTVAL (element));
> +    element = GEN_INT (3 - INTVAL (element));
>
>    /* If the value is in the correct position, we can avoid doing the VSPLT<x>
>       instruction.  */
> @@ -4230,8 +4232,10 @@
>    rtx v4si_tmp = operands[3];
>    int value;
>
> +  /* Adjust index for LE element ordering, the below minuend 3 is computed by
> +     GET_MODE_NUNITS (V4SImode) - 1.  */
>    if (!BYTES_BIG_ENDIAN)
> -    element = GEN_INT (GET_MODE_NUNITS (V4SImode) - 1 - INTVAL (element));
> +    element = GEN_INT (3 - INTVAL (element));
>
>    /* If the value is in the correct position, we can avoid doing the VSPLT<x>
>       instruction.  */
> @@ -4273,8 +4277,10 @@
>    rtx df_tmp = operands[4];
>    int value;
>
> +  /* Adjust index for LE element ordering, the below minuend 3 is computed by
> +     GET_MODE_NUNITS (V4SImode) - 1.  */
>    if (!BYTES_BIG_ENDIAN)
> -    element = GEN_INT (GET_MODE_NUNITS (V4SImode) - 1 - INTVAL (element));
> +    element = GEN_INT (3 - INTVAL (element));
>
>    /* If the value is in the correct position, we can avoid doing the VSPLT<x>
>       instruction.  */
> @@ -4466,8 +4472,10 @@
>  {
>    int ele = INTVAL (operands[4]);
>
> +  /* Adjust index for LE element ordering, the below minuend 3 is computed by
> +     GET_MODE_NUNITS (V4SFmode) - 1.  */
>    if (!BYTES_BIG_ENDIAN)
> -    ele = GET_MODE_NUNITS (V4SFmode) - 1 - ele;
> +    ele = 3 - ele;
>
>    operands[4] = GEN_INT (GET_MODE_SIZE (SFmode) * ele);
>    return "xxinsertw %x0,%x2,%4";
>
  
Kewen.Lin Jan. 17, 2022, 5:48 a.m. UTC | #6
on 2022/1/14 下午9:53, David Edelsohn wrote:
> On Fri, Jan 14, 2022 at 5:42 AM Kewen.Lin <linkw@linux.ibm.com> wrote:
>>
>> on 2022/1/13 下午11:15, David Edelsohn wrote:
>>> On Thu, Jan 13, 2022 at 7:40 AM Kewen.Lin <linkw@linux.ibm.com> wrote:
>>>>
>>>> Hi David,
>>>>
>>>> on 2022/1/13 上午11:12, David Edelsohn wrote:
>>>>> On Wed, Jan 12, 2022 at 8:56 PM Kewen.Lin <linkw@linux.ibm.com> wrote:
>>>>>>
>>>>>> Hi,
>>>>>>
>>>>>> This patch is to clean up some codes with GET_MODE_UNIT_SIZE or
>>>>>> GET_MODE_NUNITS, which can use known constant instead.
>>>>>
>>>>> I'll let Segher decide, but often the additional code is useful
>>>>> self-documentation instead of magic constants.  Or at least the change
>>>>> requires comments documenting the derivation of the constants
>>>>> currently described by the code itself.
>>>>>
>>>>
>>>> Thanks for the comments, I added some comments as suggested, also removed
>>>> the whole "altivec_vreveti2" since I noticed it's useless, it's not used
>>>> by any built-in functions and even unused in the commit db042e1603db50573.
>>>>
>>>> The updated version has been tested as before.
>>>
>>> As we have discussed offline, the comments need to be clarified and expanded.
>>>
>>> And the removal of altivec_vreveti2 should be confirmed with Carl
>>> Love, who added the pattern less than a year ago. There may be another
>>> patch planning to use it.
>>>
>>
>> Thanks for the suggestions David!  The comments have been updated, and Carl
>> also helped to confirm the altivec_vreveti2 pattern is not planned for any
>> future work and looks reasonable to remove.
>>
>> Does this updated version look good to you?
> 
> The revised patch is okay.

Thanks!  Committed as r12-6621.

BR,
Kewen
  

Patch

diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index c2312cc1e0f..d5c4ecfa9b7 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -3957,17 +3957,12 @@  (define_expand "altivec_vreveti2"
 		      UNSPEC_VREVEV))]
   "TARGET_ALTIVEC"
 {
-  int i, j, size, num_elements;
+  int i;
   rtvec v = rtvec_alloc (16);
   rtx mask = gen_reg_rtx (V16QImode);

-  size = GET_MODE_UNIT_SIZE (TImode);
-  num_elements = GET_MODE_NUNITS (TImode);
-
-  for (j = 0; j < num_elements; j++)
-    for (i = 0; i < size; i++)
-      RTVEC_ELT (v, i + j * size)
-	= GEN_INT (i + (num_elements - 1 - j) * size);
+  for (i = 0; i < 16; i++)
+    RTVEC_ELT (v, i) = GEN_INT (i);

   emit_insn (gen_vec_initv16qiqi (mask, gen_rtx_PARALLEL (V16QImode, v)));
   emit_insn (gen_altivec_vperm_ti (operands[0], operands[1],
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index 802db0d112b..892b99c6d6b 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -3855,7 +3855,7 @@  (define_insn_and_split  "*vsx_extract_si"
   int value;

   if (!BYTES_BIG_ENDIAN)
-    element = GEN_INT (GET_MODE_NUNITS (V4SImode) - 1 - INTVAL (element));
+    element = GEN_INT (3 - INTVAL (element));

   /* If the value is in the correct position, we can avoid doing the VSPLT<x>
      instruction.  */
@@ -4231,7 +4231,7 @@  (define_insn_and_split "*vsx_extract_si_<uns>float_df"
   int value;

   if (!BYTES_BIG_ENDIAN)
-    element = GEN_INT (GET_MODE_NUNITS (V4SImode) - 1 - INTVAL (element));
+    element = GEN_INT (3 - INTVAL (element));

   /* If the value is in the correct position, we can avoid doing the VSPLT<x>
      instruction.  */
@@ -4274,7 +4274,7 @@  (define_insn_and_split "*vsx_extract_si_<uns>float_<mode>"
   int value;

   if (!BYTES_BIG_ENDIAN)
-    element = GEN_INT (GET_MODE_NUNITS (V4SImode) - 1 - INTVAL (element));
+    element = GEN_INT (3 - INTVAL (element));

   /* If the value is in the correct position, we can avoid doing the VSPLT<x>
      instruction.  */
@@ -4467,7 +4467,7 @@  (define_insn "*vsx_insert_extract_v4sf_p9"
   int ele = INTVAL (operands[4]);

   if (!BYTES_BIG_ENDIAN)
-    ele = GET_MODE_NUNITS (V4SFmode) - 1 - ele;
+    ele = 3 - ele;

   operands[4] = GEN_INT (GET_MODE_SIZE (SFmode) * ele);
   return "xxinsertw %x0,%x2,%4";