[2/3] Set power10 fusion if -mtune=power10.

  Set power10 fusion if -mtune=power10.

In doing the patch for zero cycle moves for switch statements and indirect
jumps, I noticed the fusion support is only done if -mcpu=power10.  This option
enables power10 fusion if we use -mtune=power10.

I have built and run the testsuites on little endian power9 and power10 systems
with no regressions.  Can I install this patch?

2021-11-19  Michael Meissner  <meissner@the-meissners.org>

	* config/rs6000/rs6000.c (rs6000_option_override_internal): Enable
	power10 fusion if -mtune=power10.
	(rs6000_opt_masks): Add power10 fusion options.
---
 gcc/config/rs6000/rs6000.c | 25 +++++++++++++++++--------
 1 file changed, 17 insertions(+), 8 deletions(-)
  

Hi Mike,

On 11/19/21 8:55 AM, Michael Meissner wrote:
> Set power10 fusion if -mtune=power10.
>
> In doing the patch for zero cycle moves for switch statements and indirect
> jumps, I noticed the fusion support is only done if -mcpu=power10.  This option
> enables power10 fusion if we use -mtune=power10.
>
> I have built and run the testsuites on little endian power9 and power10 systems
> with no regressions.  Can I install this patch?

This all seems fine, but since we're planning on collapsing all those flags
anyway, maybe it would be better if we did that first.  This seems like work
that will mostly be removed soon.  But no concerns from me otherwise.

Thanks!
Bill

>
> 2021-11-19  Michael Meissner  <meissner@the-meissners.org>
>
> 	* config/rs6000/rs6000.c (rs6000_option_override_internal): Enable
> 	power10 fusion if -mtune=power10.
> 	(rs6000_opt_masks): Add power10 fusion options.
> ---
>  gcc/config/rs6000/rs6000.c | 25 +++++++++++++++++--------
>  1 file changed, 17 insertions(+), 8 deletions(-)
>
> diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
> index 6780304a5eb..8531cef0337 100644
> --- a/gcc/config/rs6000/rs6000.c
> +++ b/gcc/config/rs6000/rs6000.c
> @@ -4469,35 +4469,36 @@ rs6000_option_override_internal (bool global_init_p)
>    if (TARGET_POWER10 && (rs6000_isa_flags_explicit & OPTION_MASK_MMA) == 0)
>      rs6000_isa_flags |= OPTION_MASK_MMA;
>  
> -  if (TARGET_POWER10
> +  /* Enable power10 tuning if either -mcpu=power10 or -mtune=power10.  */
> +  if ((TARGET_POWER10 || rs6000_tune == PROCESSOR_POWER10)
>        && (rs6000_isa_flags_explicit & OPTION_MASK_P10_FUSION) == 0)
>      rs6000_isa_flags |= OPTION_MASK_P10_FUSION;
>  
> -  if (TARGET_POWER10 &&
> +  if (TARGET_P10_FUSION &&
>        (rs6000_isa_flags_explicit & OPTION_MASK_P10_FUSION_LD_CMPI) == 0)
>      rs6000_isa_flags |= OPTION_MASK_P10_FUSION_LD_CMPI;
>  
> -  if (TARGET_POWER10
> +  if (TARGET_P10_FUSION
>        && (rs6000_isa_flags_explicit & OPTION_MASK_P10_FUSION_2LOGICAL) == 0)
>      rs6000_isa_flags |= OPTION_MASK_P10_FUSION_2LOGICAL;
>  
> -  if (TARGET_POWER10
> +  if (TARGET_P10_FUSION
>        && (rs6000_isa_flags_explicit & OPTION_MASK_P10_FUSION_LOGADD) == 0)
>      rs6000_isa_flags |= OPTION_MASK_P10_FUSION_LOGADD;
>  
> -  if (TARGET_POWER10
> +  if (TARGET_P10_FUSION
>        && (rs6000_isa_flags_explicit & OPTION_MASK_P10_FUSION_ADDLOG) == 0)
>      rs6000_isa_flags |= OPTION_MASK_P10_FUSION_ADDLOG;
>  
> -  if (TARGET_POWER10
> +  if (TARGET_P10_FUSION
>        && (rs6000_isa_flags_explicit & OPTION_MASK_P10_FUSION_2ADD) == 0)
>      rs6000_isa_flags |= OPTION_MASK_P10_FUSION_2ADD;
>  
> -  if (TARGET_POWER10
> +  if (TARGET_P10_FUSION
>        && (rs6000_isa_flags_explicit & OPTION_MASK_P10_FUSION_2STORE) == 0)
>      rs6000_isa_flags |= OPTION_MASK_P10_FUSION_2STORE;
>  
> -  if (TARGET_POWER10
> +  if (TARGET_P10_FUSION
>        && (rs6000_isa_flags_explicit & OPTION_MASK_P10_FUSION_ZERO_CYCLE) == 0)
>      rs6000_isa_flags |= OPTION_MASK_P10_FUSION_ZERO_CYCLE;
>  
> @@ -24292,6 +24293,14 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =
>    { "power9-misc",		OPTION_MASK_P9_MISC,		false, true  },
>    { "power9-vector",		OPTION_MASK_P9_VECTOR,		false, true  },
>    { "power10-fusion",		OPTION_MASK_P10_FUSION,		false, true  },
> +  { "power10-fusion-ld-cmpi",	OPTION_MASK_P10_FUSION_LD_CMPI,	false, true  },
> +  { "power10-fusion-2logical",	OPTION_MASK_P10_FUSION_2LOGICAL,false, true  },
> +  { "power10-fusion-logical-add", OPTION_MASK_P10_FUSION_LOGADD,false, true  },
> +  { "power10-fusion-add-logical", OPTION_MASK_P10_FUSION_ADDLOG,false, true  },
> +  { "power10-fusion-2add",	OPTION_MASK_P10_FUSION_2ADD,	false, true  },
> +  { "power10-fusion-2store",	OPTION_MASK_P10_FUSION_2STORE,	false, true  },
> +  { "power10-fusion-zero-cycle", OPTION_MASK_P10_FUSION_ZERO_CYCLE,
> +								false, true  },
>    { "powerpc-gfxopt",		OPTION_MASK_PPC_GFXOPT,		false, true  },
>    { "powerpc-gpopt",		OPTION_MASK_PPC_GPOPT,		false, true  },
>    { "prefixed",			OPTION_MASK_PREFIXED,		false, true  },
  

On Mon, Nov 22, 2021 at 10:06:17AM -0600, Bill Schmidt wrote:
> Hi Mike,
> 
> On 11/19/21 8:55 AM, Michael Meissner wrote:
> > Set power10 fusion if -mtune=power10.
> >
> > In doing the patch for zero cycle moves for switch statements and indirect
> > jumps, I noticed the fusion support is only done if -mcpu=power10.  This option
> > enables power10 fusion if we use -mtune=power10.
> >
> > I have built and run the testsuites on little endian power9 and power10 systems
> > with no regressions.  Can I install this patch?
> 
> This all seems fine, but since we're planning on collapsing all those flags
> anyway, maybe it would be better if we did that first.  This seems like work
> that will mostly be removed soon.  But no concerns from me otherwise.
> 
> Thanks!
> Bill

It sitll is useful early on to do builds with/without to see what the bubbles
are.  But yeah, we could eliminate it.
  

Ping patch.

| Date: Fri, 19 Nov 2021 09:55:50 -0500
| From: Michael Meissner <meissner@linux.ibm.com>
| Subject: [PATCH 2/3] Set power10 fusion if -mtune=power10.
| Message-ID: <YZe69s2sbkTzNxL5@toto.the-meissners.org>

https://gcc.gnu.org/pipermail/gcc-patches/2021-November/585006.html

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