From patchwork Sat Mar 5 00:46:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil Pandey X-Patchwork-Id: 51594 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 1586B3858010 for ; Sat, 5 Mar 2022 00:47:10 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 1586B3858010 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1646441230; bh=7KYU+LmYh9wfTWNtmkCJn4agF2EBIthacfY553uMUn4=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=W6mpcdfmmxCUtrv18Sq333d5RyOj5bTSz4wDXcX2PAzGv9JTQ/cqvRgg2TtgOsvDD /RjBWEQj6Z7FMuTe/O5anKhUINb8nkO21YJ3UPZbkdCrX74yjOjyEHHT3ztVE7PI9k +/ouBblYXNG3eDRnG+C8Y/gD9Ut9IXMu2T37LU3s= X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by sourceware.org (Postfix) with ESMTPS id CDD753858D1E for ; Sat, 5 Mar 2022 00:46:46 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org CDD753858D1E X-IronPort-AV: E=McAfee;i="6200,9189,10276"; a="234053006" X-IronPort-AV: E=Sophos;i="5.90,156,1643702400"; d="scan'208";a="234053006" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Mar 2022 16:46:45 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,156,1643702400"; d="scan'208";a="512044084" Received: from scymds01.sc.intel.com ([10.148.94.138]) by orsmga006.jf.intel.com with ESMTP; 04 Mar 2022 16:46:45 -0800 Received: from gskx-1.sc.intel.com (gskx-1.sc.intel.com [172.25.149.211]) by scymds01.sc.intel.com with ESMTP id 2250kjH4012020; Fri, 4 Mar 2022 16:46:45 -0800 To: libc-alpha@sourceware.org Subject: [PATCH v2] x86_64: Fix svml_s_acosf16_core_avx512.S code formatting Date: Fri, 4 Mar 2022 16:46:44 -0800 Message-Id: <20220305004644.1651361-1-skpgkp2@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, FORGED_GMAIL_RCVD, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM, GIT_PATCH_0, HK_RANDOM_ENVFROM, HK_RANDOM_FROM, KAM_DMARC_NONE, KAM_DMARC_STATUS, NML_ADSP_CUSTOM_MED, SPF_HELO_PASS, SPF_SOFTFAIL, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Sunil K Pandey via Libc-alpha From: Sunil Pandey Reply-To: Sunil K Pandey Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Sender: "Libc-alpha" This commit contains following formatting changes 1. Instructions proceeded by a tab. 2. Instruction less than 8 characters in length have a tab between it and the first operand. 3. Instruction greater than 7 characters in length have a space between it and the first operand. 4. Tabs after `#define`d names and their value. 5. 8 space at the beginning of line replaced by tab. 6. Indent comments with code. 7. Remove redundent .text section. --- .../multiarch/svml_s_acosf16_core_avx512.S | 423 +++++++++--------- 1 file changed, 211 insertions(+), 212 deletions(-) diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_acosf16_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_s_acosf16_core_avx512.S index 7708073975..f08d4304fa 100644 --- a/sysdeps/x86_64/fpu/multiarch/svml_s_acosf16_core_avx512.S +++ b/sysdeps/x86_64/fpu/multiarch/svml_s_acosf16_core_avx512.S @@ -29,243 +29,242 @@ /* Offsets for data table __svml_sacos_data_internal */ -#define SgnBit 0 -#define OneHalf 64 -#define SmallNorm 128 -#define MOne 192 -#define Two 256 -#define sqrt_coeff_1 320 -#define sqrt_coeff_2 384 -#define poly_coeff_1 448 -#define poly_coeff_2 512 -#define poly_coeff_3 576 -#define poly_coeff_4 640 -#define poly_coeff_5 704 -#define Pi2H 768 -#define PiH 832 +#define SgnBit 0 +#define OneHalf 64 +#define SmallNorm 128 +#define MOne 192 +#define Two 256 +#define sqrt_coeff_1 320 +#define sqrt_coeff_2 384 +#define poly_coeff_1 448 +#define poly_coeff_2 512 +#define poly_coeff_3 576 +#define poly_coeff_4 640 +#define poly_coeff_5 704 +#define Pi2H 768 +#define PiH 832 #include - .text .section .text.exex512,"ax",@progbits ENTRY(_ZGVeN16v_acosf_skx) - pushq %rbp - cfi_def_cfa_offset(16) - movq %rsp, %rbp - cfi_def_cfa(6, 16) - cfi_offset(6, -16) - andq $-64, %rsp - subq $192, %rsp - vmovups __svml_sacos_data_internal(%rip), %zmm5 - vmovups OneHalf+__svml_sacos_data_internal(%rip), %zmm6 - -/* SQ ~ 2*sqrt(Y) */ - vmovups SmallNorm+__svml_sacos_data_internal(%rip), %zmm9 - vmovups MOne+__svml_sacos_data_internal(%rip), %zmm8 - vmovups Two+__svml_sacos_data_internal(%rip), %zmm12 - vmovups sqrt_coeff_1+__svml_sacos_data_internal(%rip), %zmm13 - vmovaps %zmm0, %zmm4 - -/* x = -|arg| */ - vorps %zmm4, %zmm5, %zmm3 - vandps %zmm4, %zmm5, %zmm2 - vmovups sqrt_coeff_2+__svml_sacos_data_internal(%rip), %zmm0 - -/* Y = 0.5 + 0.5*(-x) */ - vfmadd231ps {rn-sae}, %zmm3, %zmm6, %zmm6 - -/* x^2 */ - vmulps {rn-sae}, %zmm3, %zmm3, %zmm7 - vrsqrt14ps %zmm6, %zmm10 - vcmpps $17, {sae}, %zmm9, %zmm6, %k1 - vcmpps $22, {sae}, %zmm3, %zmm8, %k0 - vmovups poly_coeff_4+__svml_sacos_data_internal(%rip), %zmm9 - vminps {sae}, %zmm6, %zmm7, %zmm1 - vmovups poly_coeff_3+__svml_sacos_data_internal(%rip), %zmm7 - vxorps %zmm10, %zmm10, %zmm10{%k1} - vaddps {rn-sae}, %zmm6, %zmm6, %zmm14 - vmulps {rn-sae}, %zmm1, %zmm1, %zmm8 - vmulps {rn-sae}, %zmm10, %zmm10, %zmm11 - vmulps {rn-sae}, %zmm10, %zmm14, %zmm5 - vcmpps $21, {sae}, %zmm6, %zmm1, %k4 - -/* X