From patchwork Tue Oct 19 15:14:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Paul A. Clarke" X-Patchwork-Id: 46402 X-Patchwork-Delegate: tuliom@linux.vnet.ibm.com Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 69F6B3858032 for ; Tue, 19 Oct 2021 15:14:44 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 69F6B3858032 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1634656484; bh=gxDVt/Kyl1lLhcSfgGWwvlf2Z5fP3bCUoZD4lYN74Uw=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=vTV0CW66yEFKbbdUVYin8xSEcU6B2KyckxLVIvnDjoH4pqhG+Y0xOutlhQqKJ7qrp 1T8QtJQpezU7EuIXG10HG6iQ6GMIoyZc5t91kzybw8JdF77xCipAIeTpYuExHYhwqI tmYiiVW7BfxOIhl80vRSrN2bGHi+g4y3BoblBPx4= X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by sourceware.org (Postfix) with ESMTPS id 307C63858D39 for ; Tue, 19 Oct 2021 15:14:23 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 307C63858D39 Received: from pps.filterd (m0098399.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 19JFAcvm010281; Tue, 19 Oct 2021 11:14:18 -0400 Received: from ppma04dal.us.ibm.com (7a.29.35a9.ip4.static.sl-reverse.com [169.53.41.122]) by mx0a-001b2d01.pphosted.com with ESMTP id 3bsxs9aw76-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 Oct 2021 11:14:17 -0400 Received: from pps.filterd (ppma04dal.us.ibm.com [127.0.0.1]) by ppma04dal.us.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 19JF7T9U008591; Tue, 19 Oct 2021 15:14:17 GMT Received: from b03cxnp08028.gho.boulder.ibm.com (b03cxnp08028.gho.boulder.ibm.com [9.17.130.20]) by ppma04dal.us.ibm.com with ESMTP id 3bqpcbw99h-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 Oct 2021 15:14:16 +0000 Received: from b03ledav001.gho.boulder.ibm.com (b03ledav001.gho.boulder.ibm.com [9.17.130.232]) by b03cxnp08028.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 19JFEFo624641964 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 19 Oct 2021 15:14:15 GMT Received: from b03ledav001.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B52A66E052; Tue, 19 Oct 2021 15:14:15 +0000 (GMT) Received: from b03ledav001.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7B4006E05E; Tue, 19 Oct 2021 15:14:15 +0000 (GMT) Received: from localhost (unknown [9.160.109.161]) by b03ledav001.gho.boulder.ibm.com (Postfix) with ESMTP; Tue, 19 Oct 2021 15:14:15 +0000 (GMT) To: libc-alpha@sourceware.org Subject: [PATCH] [powerpc] Tighten contraints for asm constant parameters Date: Tue, 19 Oct 2021 10:14:13 -0500 Message-Id: <20211019151413.123039-1-pc@us.ibm.com> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: KxM4iU0FC7F9ILfHYRfr1kywOZnGf6G6 X-Proofpoint-GUID: KxM4iU0FC7F9ILfHYRfr1kywOZnGf6G6 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-10-19_01,2021-10-19_01,2020-04-07_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 suspectscore=0 mlxscore=0 priorityscore=1501 lowpriorityscore=0 mlxlogscore=884 bulkscore=0 spamscore=0 clxscore=1011 malwarescore=0 impostorscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2109230001 definitions=main-2110190090 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "Paul A. Clarke via Libc-alpha" From: "Paul A. Clarke" Reply-To: "Paul A. Clarke" Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Sender: "Libc-alpha" There are a few places where only constants are acceptable for `asm` parameters, yet the constraint "i" is used. "i" is for "any integer" including variables. Use "n" instead of "i" where constant integers are required. Suggested-by: Segher Boessenkool Reviewed-by: Tulio Magno Quites Machado Filho --- sysdeps/powerpc/fpu/fenv_libc.h | 8 ++++---- sysdeps/powerpc/test-get_hwcap.c | 8 ++++---- sysdeps/powerpc/tst-tlsifunc.c | 2 +- 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/sysdeps/powerpc/fpu/fenv_libc.h b/sysdeps/powerpc/fpu/fenv_libc.h index dc35b9dbe0d0..a04fb928cae2 100644 --- a/sysdeps/powerpc/fpu/fenv_libc.h +++ b/sysdeps/powerpc/fpu/fenv_libc.h @@ -73,7 +73,7 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden; if (__builtin_constant_p (rn)) \ __asm__ __volatile__ ( \ ".machine push; .machine \"power9\"; mffscrni %0,%1; .machine pop" \ - : "=f" (__fr.fenv) : "i" (rn)); \ + : "=f" (__fr.fenv) : "n" (rn)); \ else \ { \ __fr.l = (rn); \ @@ -135,8 +135,8 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden; /* Set/clear a particular FPSCR bit (for instance, reset_fpscr_bit(FPSCR_VE); prevents INVALID exceptions from being raised). */ -#define set_fpscr_bit(x) asm volatile ("mtfsb1 %0" : : "i"(x)) -#define reset_fpscr_bit(x) asm volatile ("mtfsb0 %0" : : "i"(x)) +#define set_fpscr_bit(x) asm volatile ("mtfsb1 %0" : : "n"(x)) +#define reset_fpscr_bit(x) asm volatile ("mtfsb0 %0" : : "n"(x)) typedef union { @@ -184,7 +184,7 @@ __fesetround_inline_nocheck (const int round) if (__glibc_likely (GLRO(dl_hwcap2) & PPC_FEATURE2_ARCH_3_00)) __fe_mffscrn (round); else - asm volatile ("mtfsfi 7,%0" : : "i" (round)); + asm volatile ("mtfsfi 7,%0" : : "n" (round)); #endif } diff --git a/sysdeps/powerpc/test-get_hwcap.c b/sysdeps/powerpc/test-get_hwcap.c index b5cef93cddd4..a64b63080756 100644 --- a/sysdeps/powerpc/test-get_hwcap.c +++ b/sysdeps/powerpc/test-get_hwcap.c @@ -63,16 +63,16 @@ uint64_t check_tcbhwcap (long tid) #ifdef __powerpc64__ __asm__ ("ld %0,%1(%2)\n" : "=r" (tcb_hwcap) - : "i" (__HWCAPOFF), "b" (__tp)); + : "n" (__HWCAPOFF), "b" (__tp)); #else uint64_t h1, h2; __asm__ ("lwz %0,%1(%2)\n" : "=r" (h1) - : "i" (__HWCAPOFF), "b" (__tp)); + : "n" (__HWCAPOFF), "b" (__tp)); __asm__ ("lwz %0,%1(%2)\n" : "=r" (h2) - : "i" (__HWCAP2OFF), "b" (__tp)); + : "n" (__HWCAP2OFF), "b" (__tp)); tcb_hwcap = (h1 >> 32) << 32 | (h2 >> 32); #endif @@ -117,7 +117,7 @@ uint64_t check_tcbhwcap (long tid) /* Same test for the platform number. */ __asm__ ("lwz %0,%1(%2)\n" : "=r" (tcb_at_platform) - : "i" (__ATPLATOFF), "b" (__tp)); + : "n" (__ATPLATOFF), "b" (__tp)); at_platform_string = (const char *) getauxval (AT_PLATFORM); at_platform = _dl_string_platform (at_platform_string); diff --git a/sysdeps/powerpc/tst-tlsifunc.c b/sysdeps/powerpc/tst-tlsifunc.c index c8c0bada4547..f2eaf11bb407 100644 --- a/sysdeps/powerpc/tst-tlsifunc.c +++ b/sysdeps/powerpc/tst-tlsifunc.c @@ -49,7 +49,7 @@ get_platform (void) __asm__ ("lwz %0,%1(%2)\n" : "=r" (tmp) - : "i" (__ATPLATOFF), "b" (tp)); + : "n" (__ATPLATOFF), "b" (tp)); return tmp; }