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[143.159.223.185]) by smtp.gmail.com with ESMTPSA id j2-20020a05600c1c0200b0041ac3e13f1esm12952471wms.37.2024.04.26.08.01.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Apr 2024 08:01:58 -0700 (PDT) From: Andrew Burgess To: gdb-patches@sourceware.org Cc: Andrew Burgess , felix.willgerodt@intel.com, John Baldwin Subject: [PATCHv5 01/11] gdbserver/ipa/x86: remove unneeded declarations Date: Fri, 26 Apr 2024 16:01:45 +0100 Message-Id: <451f76b4ea105af2def7e62d78662a647e809e73.1714143669.git.aburgess@redhat.com> X-Mailer: git-send-email 2.25.4 In-Reply-To: References: MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Spotted some declarations in gdbserver/linux-amd64-ipa.cc that are no longer needed. These are: 1. 'init_registers_amd64_linux' - the comment claims this function is auto generated, but I don't believe that this is still the case. Also the function is not used in this file, 2. 'tdesc_amd64_linux' - this variable doesn't seem to exist any more, I suspect this was renamed to 'tdesc_amd64_linux_no_xml', but neither are used in this file, so lets remove the declaration. The amd64 in-process-agent still builds fine after this commit. There should be no user visible changes after this commit. --- gdbserver/linux-amd64-ipa.cc | 4 ---- 1 file changed, 4 deletions(-) diff --git a/gdbserver/linux-amd64-ipa.cc b/gdbserver/linux-amd64-ipa.cc index 13c8a5bb360..a6346750f49 100644 --- a/gdbserver/linux-amd64-ipa.cc +++ b/gdbserver/linux-amd64-ipa.cc @@ -23,10 +23,6 @@ #include "linux-x86-tdesc.h" #include "gdbsupport/x86-xstate.h" -/* Defined in auto-generated file amd64-linux.c. */ -void init_registers_amd64_linux (void); -extern const struct target_desc *tdesc_amd64_linux; - /* fast tracepoints collect registers. */ #define FT_CR_RIP 0 From patchwork Fri Apr 26 15:01:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Burgess X-Patchwork-Id: 89043 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 13124384AB79 for ; Fri, 26 Apr 2024 15:03:07 +0000 (GMT) X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by sourceware.org (Postfix) with ESMTPS id 9C0673858C39 for ; Fri, 26 Apr 2024 15:02:07 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 9C0673858C39 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=redhat.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=redhat.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 9C0673858C39 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=170.10.129.124 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1714143738; cv=none; b=r7aJbpYBodNSgQqw8H0SXPgRtmRRwFIK/xWL9tAYunDAp3NOTVjjqIDNZ9m+m3d1av3fI+5CVdClhiMBxQB5Smwe5AZnTmnEss9NT1TExUmxJCi416loOf+JrXTxELOmQtgh2zryPZzMgE7dq1cNN4CxEaA8EOFs9DedkWUaSWE= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1714143738; c=relaxed/simple; bh=rk5rCJdkAz0rQ08JkGE8HgSK2gXWMGM7JXSDggVyj3c=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=gPFoYEBrRVSrUt4sEVBDbql7xkYmvfinmSSz9M5MEqo7aj73sTLpMUU2SWsy9SG2Smtf15Q9nQIRqYG0HpfIS7TMHMAkW8b0+RgQxOnztoouO2WciExWDdUTg0ByCkQL0xvOiEGQjW5BITyjttAJk5ScLiXlfUO/R1GO30jo9RA= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1714143727; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=YnLUqrCPFgs37uL+zBn3uKwKkMUwXBX9Z4c8kp9XO8s=; b=ajNRAYiR90PuMWRmN/wtsD1qe7AzVwG45a+8+RidweGEqyn/TX6xFk6KVDT7wZwERp99gZ Un8oRC9wJEUxPWrIvoAdnpWz2eps3WhIijIhym0YiBOg40JgpOES6yAN9W55xWlWMzGamm N5zEhQSQiSXnZLQjEqt00vSHB9HORxk= Received: from mail-wm1-f71.google.com (mail-wm1-f71.google.com [209.85.128.71]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-615-FNfzoovkMeix941b4H1Ycw-1; Fri, 26 Apr 2024 11:02:06 -0400 X-MC-Unique: FNfzoovkMeix941b4H1Ycw-1 Received: by mail-wm1-f71.google.com with SMTP id 5b1f17b1804b1-416e58bdc0eso10016955e9.0 for ; Fri, 26 Apr 2024 08:02:05 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714143724; x=1714748524; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=YnLUqrCPFgs37uL+zBn3uKwKkMUwXBX9Z4c8kp9XO8s=; b=KbRLxO/vkBbp0u8ncviL/qZ4XhBK2CkoQ7w1HsUSYtQ0ur5YtTqrj96RW0oSnguNLe 40jcvdFmdty1LNxHPstjf3bEjO4/2BHM3+Yfc9105vEezWVUkRhtTZEwQzuVS01lftMR 1cZXegkQsDV7Q6OFiPfwNq+k1kQNVjLYdM5G5VS4VEqc51ekz216ikrclu14KnlIe8Km HJe2ZGFGsXTYS7K1PmscwXzki3EU+NSLU+4nvT9RgHOaJrxuIQH3VOVbGWYZe+Jh133r bx8ThxgFNDdXV+mHgdOuQVcXUJhB03DWcosbbx7g7/IoXhyPIGWACesyadNvpJeUukeP e5KA== X-Gm-Message-State: AOJu0Yz3ik7t7vmAcv29kB1ekk9hNBbgIB/HfkcUdQMCGrve24P5RgeM BtjWQ0wiQl10IVvC3kpxDkEdYEy+il6y3cqN2G7uoZ5pRmnxaZZ2oXdqoHCCIjqNaPi/1XBQAim wXW0TismmcULsoJeYLVjPllpchAQ2H8hR2AZt6RC+G/Xii+f2oTX0t5AJORXz2LOOWF6LpkSej6 0BueOfi7hekCgPl5ihZcxPoVLpAKfgJppVcJWRDUUf/Sc= X-Received: by 2002:a05:600c:1c87:b0:41a:5958:d6ac with SMTP id k7-20020a05600c1c8700b0041a5958d6acmr2450246wms.21.1714143724004; Fri, 26 Apr 2024 08:02:04 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFKQ8vFx2ERa6zZHGrf4O/qgMt8jrHauGKfYv+xZxzIhk3bzQv1pB7izX24PlTOee6TVyTFqg== X-Received: by 2002:a05:600c:1c87:b0:41a:5958:d6ac with SMTP id k7-20020a05600c1c8700b0041a5958d6acmr2450211wms.21.1714143723517; Fri, 26 Apr 2024 08:02:03 -0700 (PDT) Received: from localhost (185.223.159.143.dyn.plus.net. [143.159.223.185]) by smtp.gmail.com with ESMTPSA id j13-20020a05600c190d00b00418a386c17bsm35031206wmq.12.2024.04.26.08.02.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Apr 2024 08:02:01 -0700 (PDT) From: Andrew Burgess To: gdb-patches@sourceware.org Cc: Andrew Burgess , felix.willgerodt@intel.com, John Baldwin Subject: [PATCHv5 02/11] gdbserver: convert have_ptrace_getregset to a tribool Date: Fri, 26 Apr 2024 16:01:46 +0100 Message-Id: <461c1ea75f7149b8d4ef431085cb7dbc0f9bd6b2.1714143669.git.aburgess@redhat.com> X-Mailer: git-send-email 2.25.4 In-Reply-To: References: MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Convert the have_ptrace_getregset global within gdbserver to a tribool. This brings the flag into alignment with the corresponding flag in GDB. The gdbserver have_ptrace_getregset variable is already used as a tribool, it just doesn't have the tribool type. In a future commit I plan to share more code between GDB and gdbserver, and having this variable be the same type in both code bases will make the sharing much easier. There should be no user visible changes after this commit. Approved-By: John Baldwin Reviewed-By: Felix Willgerodt --- gdbserver/linux-arm-low.cc | 6 +++--- gdbserver/linux-low.cc | 2 +- gdbserver/linux-low.h | 2 +- gdbserver/linux-x86-low.cc | 10 +++++----- 4 files changed, 10 insertions(+), 10 deletions(-) diff --git a/gdbserver/linux-arm-low.cc b/gdbserver/linux-arm-low.cc index 17b64c09aff..eec4649b235 100644 --- a/gdbserver/linux-arm-low.cc +++ b/gdbserver/linux-arm-low.cc @@ -1006,9 +1006,9 @@ arm_target::low_arch_setup () /* Check if PTRACE_GETREGSET works. */ if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov) == 0) - have_ptrace_getregset = 1; + have_ptrace_getregset = TRIBOOL_TRUE; else - have_ptrace_getregset = 0; + have_ptrace_getregset = TRIBOOL_FALSE; } bool @@ -1121,7 +1121,7 @@ arm_target::get_regs_info () { const struct target_desc *tdesc = current_process ()->tdesc; - if (have_ptrace_getregset == 1 + if (have_ptrace_getregset == TRIBOOL_TRUE && (is_aarch32_linux_description (tdesc) || arm_linux_get_tdesc_fp_type (tdesc) == ARM_FP_TYPE_VFPV3)) return ®s_info_aarch32; diff --git a/gdbserver/linux-low.cc b/gdbserver/linux-low.cc index 9614cd7150c..ac7f9807ecc 100644 --- a/gdbserver/linux-low.cc +++ b/gdbserver/linux-low.cc @@ -134,7 +134,7 @@ typedef struct #endif /* Does the current host support PTRACE_GETREGSET? */ -int have_ptrace_getregset = -1; +enum tribool have_ptrace_getregset = TRIBOOL_UNKNOWN; /* Return TRUE if THREAD is the leader thread of the process. */ diff --git a/gdbserver/linux-low.h b/gdbserver/linux-low.h index d34d2738238..eaf87527338 100644 --- a/gdbserver/linux-low.h +++ b/gdbserver/linux-low.h @@ -951,7 +951,7 @@ void thread_db_notice_clone (struct thread_info *parent_thr, ptid_t child_ptid); bool thread_db_thread_handle (ptid_t ptid, gdb_byte **handle, int *handle_len); -extern int have_ptrace_getregset; +extern enum tribool have_ptrace_getregset; /* Search for the value with type MATCH in the auxv vector, with entries of length WORDSIZE bytes, of process with pid PID. If found, store the diff --git a/gdbserver/linux-x86-low.cc b/gdbserver/linux-x86-low.cc index 2532603451a..2603fb2ac5d 100644 --- a/gdbserver/linux-x86-low.cc +++ b/gdbserver/linux-x86-low.cc @@ -898,7 +898,7 @@ x86_linux_read_description (void) if (ptrace (PTRACE_GETFPXREGS, tid, 0, (long) &fpxregs) < 0) { have_ptrace_getfpxregs = 0; - have_ptrace_getregset = 0; + have_ptrace_getregset = TRIBOOL_FALSE; return i386_linux_read_description (X86_XSTATE_X87); } else @@ -917,7 +917,7 @@ x86_linux_read_description (void) return tdesc_i386_linux_no_xml.get (); } - if (have_ptrace_getregset == -1) + if (have_ptrace_getregset == TRIBOOL_UNKNOWN) { uint64_t xstateregs[(X86_XSTATE_SSE_SIZE / sizeof (uint64_t))]; struct iovec iov; @@ -928,10 +928,10 @@ x86_linux_read_description (void) /* Check if PTRACE_GETREGSET works. */ if (ptrace (PTRACE_GETREGSET, tid, (unsigned int) NT_X86_XSTATE, (long) &iov) < 0) - have_ptrace_getregset = 0; + have_ptrace_getregset = TRIBOOL_FALSE; else { - have_ptrace_getregset = 1; + have_ptrace_getregset = TRIBOOL_TRUE; /* Get XCR0 from XSAVE extended state. */ xcr0 = xstateregs[(I386_LINUX_XSAVE_XCR0_OFFSET @@ -954,7 +954,7 @@ x86_linux_read_description (void) } /* Check the native XCR0 only if PTRACE_GETREGSET is available. */ - xcr0_features = (have_ptrace_getregset + xcr0_features = (have_ptrace_getregset == TRIBOOL_TRUE && (xcr0 & X86_XSTATE_ALL_MASK)); if (xcr0_features) From patchwork Fri Apr 26 15:01:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Burgess X-Patchwork-Id: 89042 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 7884E384AB6B for ; Fri, 26 Apr 2024 15:02:58 +0000 (GMT) X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by sourceware.org (Postfix) with ESMTPS id 368373858401 for ; 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[143.159.223.185]) by smtp.gmail.com with ESMTPSA id k41-20020a05600c1ca900b00417e8be070csm31445985wms.9.2024.04.26.08.02.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Apr 2024 08:02:06 -0700 (PDT) From: Andrew Burgess To: gdb-patches@sourceware.org Cc: Andrew Burgess , felix.willgerodt@intel.com, John Baldwin Subject: [PATCHv5 03/11] gdb/x86: move reading of cs and ds state into gdb/nat directory Date: Fri, 26 Apr 2024 16:01:47 +0100 Message-Id: X-Mailer: git-send-email 2.25.4 In-Reply-To: References: MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org This patch is part of a series that has the aim sharing the x86 Linux target description creation code between GDB and gdbserver. Within GDB part of this process involves reading the cs and ds state from the 'struct user_regs_struct' using a ptrace call. This isn't done by gdbserver, which is part of the motivation for this whole series; the approach gdbserver takes is inferior to the approach GDB takes (gdbserver relies on reading the file being debugged, and extracting similar information from the file headers). This commit moves the reading of cs and ds, which is used to figure out if a thread is 32-bit or 64-bit (or in x32 mode), into the gdb/nat directory so that the code can be shared with gdbserver, but at this point I'm not actually using the code in gdbserver, that will come later. As such there should be no user visible changes after this commit, GDB continues to do things as it did before (reading cs/ds), while gdbserver continues to use its own approach (which doesn't require reading cs/ds). Approved-By: John Baldwin --- gdb/nat/x86-linux.c | 47 +++++++++++++++++++++++++++++++++++++++++++++ gdb/nat/x86-linux.h | 28 +++++++++++++++++++++++++++ gdb/x86-linux-nat.c | 42 +++++----------------------------------- 3 files changed, 80 insertions(+), 37 deletions(-) diff --git a/gdb/nat/x86-linux.c b/gdb/nat/x86-linux.c index 7a21c8f2c26..ad3ed3c2289 100644 --- a/gdb/nat/x86-linux.c +++ b/gdb/nat/x86-linux.c @@ -19,6 +19,8 @@ #include "x86-linux.h" #include "x86-linux-dregs.h" +#include "nat/gdb_ptrace.h" +#include /* Per-thread arch-specific data we want to keep. */ @@ -79,3 +81,48 @@ x86_linux_prepare_to_resume (struct lwp_info *lwp) { x86_linux_update_debug_registers (lwp); } + +#ifdef __x86_64__ +/* Value of CS segment register: + 64bit process: 0x33 + 32bit process: 0x23 */ +#define AMD64_LINUX_USER64_CS 0x33 + +/* Value of DS segment register: + LP64 process: 0x0 + X32 process: 0x2b */ +#define AMD64_LINUX_X32_DS 0x2b +#endif + +/* See nat/x86-linux.h. */ + +x86_linux_arch_size +x86_linux_ptrace_get_arch_size (int tid) +{ +#ifdef __x86_64__ + unsigned long cs; + unsigned long ds; + + /* Get CS register. */ + errno = 0; + cs = ptrace (PTRACE_PEEKUSER, tid, + offsetof (struct user_regs_struct, cs), 0); + if (errno != 0) + perror_with_name (_("Couldn't get CS register")); + + bool is_64bit = cs == AMD64_LINUX_USER64_CS; + + /* Get DS register. */ + errno = 0; + ds = ptrace (PTRACE_PEEKUSER, tid, + offsetof (struct user_regs_struct, ds), 0); + if (errno != 0) + perror_with_name (_("Couldn't get DS register")); + + bool is_x32 = ds == AMD64_LINUX_X32_DS; + + return x86_linux_arch_size (is_64bit, is_x32); +#else + return x86_linux_arch_size (false, false); +#endif +} diff --git a/gdb/nat/x86-linux.h b/gdb/nat/x86-linux.h index 822882173f9..15153ea277e 100644 --- a/gdb/nat/x86-linux.h +++ b/gdb/nat/x86-linux.h @@ -47,4 +47,32 @@ extern void x86_linux_delete_thread (struct arch_lwp_info *arch_lwp); extern void x86_linux_prepare_to_resume (struct lwp_info *lwp); +/* Return value from x86_linux_ptrace_get_arch_size function. Indicates if + a thread is 32-bit, 64-bit, or x32. */ + +struct x86_linux_arch_size +{ + explicit x86_linux_arch_size (bool is_64bit, bool is_x32) + : m_is_64bit (is_64bit), + m_is_x32 (is_x32) + { + /* Nothing. */ + } + + bool is_64bit () const + { return m_is_64bit; } + + bool is_x32 () const + { return m_is_x32; } + +private: + bool m_is_64bit = false; + bool m_is_x32 = false; +}; + +/* Use ptrace calls to figure out if thread TID is 32-bit, 64-bit, or + 64-bit running in x32 mode. */ + +extern x86_linux_arch_size x86_linux_ptrace_get_arch_size (int tid); + #endif /* NAT_X86_LINUX_H */ diff --git a/gdb/x86-linux-nat.c b/gdb/x86-linux-nat.c index a3d8ffb60f1..f91db492d05 100644 --- a/gdb/x86-linux-nat.c +++ b/gdb/x86-linux-nat.c @@ -90,18 +90,6 @@ x86_linux_nat_target::post_startup_inferior (ptid_t ptid) linux_nat_target::post_startup_inferior (ptid); } -#ifdef __x86_64__ -/* Value of CS segment register: - 64bit process: 0x33 - 32bit process: 0x23 */ -#define AMD64_LINUX_USER64_CS 0x33 - -/* Value of DS segment register: - LP64 process: 0x0 - X32 process: 0x2b */ -#define AMD64_LINUX_X32_DS 0x2b -#endif - /* Get Linux/x86 target description from running target. */ const struct target_desc * @@ -121,31 +109,11 @@ x86_linux_nat_target::read_description () tid = inferior_ptid.pid (); #ifdef __x86_64__ - { - unsigned long cs; - unsigned long ds; - - /* Get CS register. */ - errno = 0; - cs = ptrace (PTRACE_PEEKUSER, tid, - offsetof (struct user_regs_struct, cs), 0); - if (errno != 0) - perror_with_name (_("Couldn't get CS register")); - - is_64bit = cs == AMD64_LINUX_USER64_CS; - - /* Get DS register. */ - errno = 0; - ds = ptrace (PTRACE_PEEKUSER, tid, - offsetof (struct user_regs_struct, ds), 0); - if (errno != 0) - perror_with_name (_("Couldn't get DS register")); - - is_x32 = ds == AMD64_LINUX_X32_DS; - - if (sizeof (void *) == 4 && is_64bit && !is_x32) - error (_("Can't debug 64-bit process with 32-bit GDB")); - } + + x86_linux_arch_size arch_size = x86_linux_ptrace_get_arch_size (tid); + is_64bit = arch_size.is_64bit (); + is_x32 = arch_size.is_x32 (); + #elif HAVE_PTRACE_GETFPXREGS if (have_ptrace_getfpxregs == -1) { From patchwork Fri Apr 26 15:01:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Burgess X-Patchwork-Id: 89045 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 6643F3849AE1 for ; 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[143.159.223.185]) by smtp.gmail.com with ESMTPSA id c7-20020a05600c0a4700b0041b434e5869sm6150930wmq.43.2024.04.26.08.02.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Apr 2024 08:02:08 -0700 (PDT) From: Andrew Burgess To: gdb-patches@sourceware.org Cc: Andrew Burgess , felix.willgerodt@intel.com, John Baldwin Subject: [PATCHv5 04/11] gdb/x86: move have_ptrace_getfpxregs global into gdb/nat directory Date: Fri, 26 Apr 2024 16:01:48 +0100 Message-Id: <507f550b0c19075e7a7f90f1df82d3b9c211199c.1714143669.git.aburgess@redhat.com> X-Mailer: git-send-email 2.25.4 In-Reply-To: References: MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00, DKIM_INVALID, DKIM_SIGNED, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_SHORT, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org The have_ptrace_getfpxregs global tracks whether GDB or gdbserver is running on a kernel that supports the GETFPXREGS ptrace request. Currently this global is declared twice (once in GDB and once in gdbserver), but it makes sense to move this global into the nat/ directory, and have a single declaration and definition. This is a refactor, there should be no user visible changes after this commit. --- gdb/Makefile.in | 1 - gdb/i386-linux-nat.c | 18 +----------------- gdb/i386-linux-nat.h | 26 -------------------------- gdb/nat/x86-linux.c | 9 +++++++++ gdb/nat/x86-linux.h | 16 ++++++++++++++++ gdb/x86-linux-nat.c | 3 --- gdbserver/linux-x86-low.cc | 11 ----------- 7 files changed, 26 insertions(+), 58 deletions(-) delete mode 100644 gdb/i386-linux-nat.h diff --git a/gdb/Makefile.in b/gdb/Makefile.in index 23894ea4a4d..353e45b3cec 100644 --- a/gdb/Makefile.in +++ b/gdb/Makefile.in @@ -1396,7 +1396,6 @@ HFILES_NO_SRCDIR = \ hppa-tdep.h \ i386-bsd-nat.h \ i386-darwin-tdep.h \ - i386-linux-nat.h \ i386-linux-tdep.h \ i386-tdep.h \ i387-tdep.h \ diff --git a/gdb/i386-linux-nat.c b/gdb/i386-linux-nat.c index 7278dd91ff0..32d9d998beb 100644 --- a/gdb/i386-linux-nat.c +++ b/gdb/i386-linux-nat.c @@ -26,7 +26,7 @@ #include "gregset.h" #include "gdb_proc_service.h" -#include "i386-linux-nat.h" +#include "nat/x86-linux.h" #include "i387-tdep.h" #include "i386-tdep.h" #include "i386-linux-tdep.h" @@ -80,22 +80,6 @@ int have_ptrace_getregs = 0 #endif ; - -/* Does the current host support the GETFPXREGS request? The header - file may or may not define it, and even if it is defined, the - kernel will return EIO if it's running on a pre-SSE processor. - - My instinct is to attach this to some architecture- or - target-specific data structure, but really, a particular GDB - process can only run on top of one kernel at a time. So it's okay - for this to be a simple variable. */ -int have_ptrace_getfpxregs = -#ifdef HAVE_PTRACE_GETFPXREGS - -1 -#else - 0 -#endif -; /* Accessing registers through the U area, one at a time. */ diff --git a/gdb/i386-linux-nat.h b/gdb/i386-linux-nat.h deleted file mode 100644 index c3d32aff1be..00000000000 --- a/gdb/i386-linux-nat.h +++ /dev/null @@ -1,26 +0,0 @@ -/* Native-dependent code for GNU/Linux i386. - - Copyright (C) 1999-2024 Free Software Foundation, Inc. - - This file is part of GDB. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . */ - -#ifndef I386_LINUX_NAT_H -#define I386_LINUX_NAT_H 1 - -/* Does the current host support the GETFPXREGS request? */ -extern int have_ptrace_getfpxregs; - -#endif diff --git a/gdb/nat/x86-linux.c b/gdb/nat/x86-linux.c index ad3ed3c2289..35a3e960946 100644 --- a/gdb/nat/x86-linux.c +++ b/gdb/nat/x86-linux.c @@ -22,6 +22,15 @@ #include "nat/gdb_ptrace.h" #include +/* See nat/x86-linux.h. */ +int have_ptrace_getfpxregs = +#ifdef HAVE_PTRACE_GETFPXREGS + -1 +#else + 0 +#endif +; + /* Per-thread arch-specific data we want to keep. */ struct arch_lwp_info diff --git a/gdb/nat/x86-linux.h b/gdb/nat/x86-linux.h index 15153ea277e..061b3c2e394 100644 --- a/gdb/nat/x86-linux.h +++ b/gdb/nat/x86-linux.h @@ -22,6 +22,22 @@ #include "nat/linux-nat.h" +/* Does the current host support the GETFPXREGS request? The system header + file may or may not define it, but even if it is defined, the kernel + will return EIO if it's running on a pre-SSE processor. + + A value of -1 indicates that we don't know yet, we've not yet tried the + ptrace call; a value of 0 indicates we've previously tried the ptrace + call and it failed, indicating this request is not supported; and a + value of 1 indicates that we've previously tried the ptrace call and it + has been successful. + + My instinct is to attach this to some architecture- or target-specific + data structure, but really, a particular GDB process can only run on top + of one kernel at a time. So it's okay - for this to be a global + variable. */ +extern int have_ptrace_getfpxregs; + /* Set whether our local mirror of LWP's debug registers has been changed since the values were last written to the thread. Nonzero indicates that a change has been made, zero indicates no change. */ diff --git a/gdb/x86-linux-nat.c b/gdb/x86-linux-nat.c index f91db492d05..12965c7a21b 100644 --- a/gdb/x86-linux-nat.c +++ b/gdb/x86-linux-nat.c @@ -26,9 +26,6 @@ #include #include "x86-nat.h" -#ifndef __x86_64__ -#include "i386-linux-nat.h" -#endif #include "x86-linux-nat.h" #include "i386-linux-tdep.h" #ifdef __x86_64__ diff --git a/gdbserver/linux-x86-low.cc b/gdbserver/linux-x86-low.cc index 2603fb2ac5d..8199b0ccc09 100644 --- a/gdbserver/linux-x86-low.cc +++ b/gdbserver/linux-x86-low.cc @@ -852,17 +852,6 @@ static int use_xml; the process/thread is in. */ #define I386_LINUX_XSAVE_XCR0_OFFSET 464 -/* Does the current host support the GETFPXREGS request? The header - file may or may not define it, and even if it is defined, the - kernel will return EIO if it's running on a pre-SSE processor. */ -int have_ptrace_getfpxregs = -#ifdef HAVE_PTRACE_GETFPXREGS - -1 -#else - 0 -#endif -; - /* Get Linux/x86 target description from running target. */ static const struct target_desc * From patchwork Fri Apr 26 15:01:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Burgess X-Patchwork-Id: 89044 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 4C8A4384A06B for ; Fri, 26 Apr 2024 15:03:23 +0000 (GMT) X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by sourceware.org (Postfix) with ESMTPS id B329F3858402 for ; Fri, 26 Apr 2024 15:02:17 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org B329F3858402 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=redhat.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=redhat.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org B329F3858402 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=170.10.129.124 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1714143740; cv=none; b=pgLMTIqrGYl9YjEySFi6Cto92lt7BObLLvejPJShGctJSJ1LOdH1smsI4u5MU3602gkM8oZD1oZDQE4MFZgwXX4XGXIks3mrzCeOO+TbxAxeyUPLH/zzHnLM+UOCuSBv+oZiV5emlGHkM7hr/YahlZDuf/m1LBJwh51CBOCqafQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1714143740; c=relaxed/simple; bh=/5tbOj13nRkJvuVQtpBvXHD4FPkft2rbryqqkBUX83g=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=wx3m9E/Ch9BR/IWF+vYRopUqOPc25scnYAjwdgXnERotxe5ky95o7TN9n9Fidlq0se/yA1Dx0QPv4kmLa5VdsgtLwpa+fBkjE+tuTjbRmGyR2MK9RXg0Af7FRhAhD0PgCbw/hpNij+i60HwmVrAv+23AOZzxPo7LOYlmBV8PG5k= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1714143737; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=WVFb0+RqsdC/kcf1Gc+n5Q+YTVV2revazB7y8+kCJ3Y=; b=GoTzftgazSKXJ1zVcvxIBgDCHWlN84zRM6mr2z4Z+E1asG8TVHvnptQgiMTD7HtgeQu/6D 0EDsdDp+MhD0HxSsnEHhZoFbJaK4AB/wj0uCzvm0qCYcdaMdjFShdYIFRhcxolFsJNUbAi mPMrpLh6o7kn5pwM30IbJ4XgwitRskg= Received: from mail-wr1-f70.google.com (mail-wr1-f70.google.com [209.85.221.70]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-149-W6zfR-0CPReawM5gN_hS8A-1; Fri, 26 Apr 2024 11:02:16 -0400 X-MC-Unique: W6zfR-0CPReawM5gN_hS8A-1 Received: by mail-wr1-f70.google.com with SMTP id ffacd0b85a97d-34b40e8482aso1785696f8f.0 for ; Fri, 26 Apr 2024 08:02:15 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714143734; x=1714748534; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WVFb0+RqsdC/kcf1Gc+n5Q+YTVV2revazB7y8+kCJ3Y=; b=U3KQxICe/fHnF8eGzmVVNZZNjtJ0kq2OXG11Jnxx/ZufdZ+wG/uwjmPOPWY6I6006U l5KfjfkCwZodHTt7YQ5k/BtIeKlb8p6uLU443ghAVeJ42iIKMV9hkzIF9wKP0hrBM3s/ 3c8zsm0EGtAL0SXQYQgmzdK7FrUBX/Ri/X5FSvANv0wsIx8SP1jYvxBTB1VawejWeRFy FgYHSMuoerMJ3Bj34FUnoBgq8t9iT9dFXZMXae8FdBmMCb01Vb2G1Lld1k3PYsCRp4s/ Xj2Cyci8IVYP+tS4pXHWeJb5B4K9CX/E5QKfPPWG/l1b8iig3IDYHQDOObRROZlD1xIb b2RQ== X-Gm-Message-State: AOJu0YyJlf3VWjsj7lF9aiu5UKLHONHJ/RfIMQoz1A4oxntJv6wBEiWZ ocBQcpXam0xxwlFbfJKAOjC2BonclI7Nan/qI9QRtXPjW7KMeyNCCRJH5o7S1fJF9nrYgux0nof i5RZmHDm26fFP+T7BmZpFPiNV56CxCQAYLCLkbS9IV9AmZmcWKjDidYfcslzikyxH3hUaaOJH+Y pFdTw8QEhpadj6a2nCNKPbNS2P4psb+ffQ1lAWlgc9O0c= X-Received: by 2002:adf:fecf:0:b0:343:734e:73d1 with SMTP id q15-20020adffecf000000b00343734e73d1mr2294640wrs.37.1714143733986; Fri, 26 Apr 2024 08:02:13 -0700 (PDT) X-Google-Smtp-Source: AGHT+IH5nkk/x54rYquCUkcYWr9v5LiNFnbqjTW8lhhevxYD4/ftywT+NLObRxuXYMTc4k1iwyeQsw== X-Received: by 2002:adf:fecf:0:b0:343:734e:73d1 with SMTP id q15-20020adffecf000000b00343734e73d1mr2294600wrs.37.1714143733260; Fri, 26 Apr 2024 08:02:13 -0700 (PDT) Received: from localhost (185.223.159.143.dyn.plus.net. [143.159.223.185]) by smtp.gmail.com with ESMTPSA id b7-20020adff907000000b0034b3394f0e1sm12112808wrr.10.2024.04.26.08.02.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Apr 2024 08:02:11 -0700 (PDT) From: Andrew Burgess To: gdb-patches@sourceware.org Cc: Andrew Burgess , felix.willgerodt@intel.com, John Baldwin Subject: [PATCHv5 05/11] gdbserver/x86: move no-xml code earlier in x86_linux_read_description Date: Fri, 26 Apr 2024 16:01:49 +0100 Message-Id: <6e7440d3bb04135432f9f18e0630ee1bca23e4d6.1714143669.git.aburgess@redhat.com> X-Mailer: git-send-email 2.25.4 In-Reply-To: References: MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org This commit is part of a series that aims to share more of the x86 target description reading/generation code between GDB and gdbserver. There are a huge number of similarities between the code in gdbserver's x86_linux_read_description function and GDB's x86_linux_nat_target::read_description function, and it is this similarity that I plan, in a later commit, to share between GDB and gdbserver. However, one thing that is different in x86_linux_read_description is the code inside the '!use_xml' block. This is the code that handles the case where gdbserver is not allowed to send an XML target description back to GDB. In this case gdbserver uses some predefined, fixed, target descriptions. First, it's worth noting that I suspect this code is not tested any more. I couldn't find anything in the testsuite that tries to disable XML target description support. And the idea of having a single "fixed" target description really doesn't work well when we think about all the various x86 extensions that exist. Part of me would like to rip out the no-xml support in gdbserver (at least for x86), and if a GDB connects that doesn't support XML target descriptions, gdbserver can just give an error and drop the connection. GDB has supported XML target descriptions for 16 years now, I think it would be reasonable for our shipped gdbserver to drop support for the old way of doing things. Anyway.... this commit doesn't do that. What I did notice was that, over time, the '!use_xml' block appears to have "drifted" within the x86_linux_read_description function; it's now not the first check we do. Instead we make some ptrace calls and return a target description generated based on the result of these ptrace calls. Surely it only makes sense to generate variable target descriptions if we can send these back to GDB? So in this commit I propose to move the '!use_xml' block earlier in the x86_linux_read_description function. The benefit of this is that this leaves the later half of x86_linux_read_description much more similar to the GDB function x86_linux_nat_target::read_description and sets us up for potentially sharing code between GDB and gdbserver in a later commit. Approved-By: John Baldwin --- gdbserver/linux-x86-low.cc | 27 ++++++++++++++++----------- 1 file changed, 16 insertions(+), 11 deletions(-) diff --git a/gdbserver/linux-x86-low.cc b/gdbserver/linux-x86-low.cc index 8199b0ccc09..ffb2a90731d 100644 --- a/gdbserver/linux-x86-low.cc +++ b/gdbserver/linux-x86-low.cc @@ -879,6 +879,22 @@ x86_linux_read_description (void) #endif } + /* If we are not allowed to send an XML target description then we need + to use the hard-wired target descriptions. This corresponds to GDB's + default machine for x86. + + This check needs to occur before any returns statements that might + generate some alternative target descriptions. */ + if (!use_xml) + { +#ifdef __x86_64__ + if (machine == EM_X86_64) + return tdesc_amd64_linux_no_xml.get (); + else +#endif + return tdesc_i386_linux_no_xml.get (); + } + #if !defined __x86_64__ && defined HAVE_PTRACE_GETFPXREGS if (machine == EM_386 && have_ptrace_getfpxregs == -1) { @@ -895,17 +911,6 @@ x86_linux_read_description (void) } #endif - if (!use_xml) - { - /* Don't use XML. */ -#ifdef __x86_64__ - if (machine == EM_X86_64) - return tdesc_amd64_linux_no_xml.get (); - else -#endif - return tdesc_i386_linux_no_xml.get (); - } - if (have_ptrace_getregset == TRIBOOL_UNKNOWN) { uint64_t xstateregs[(X86_XSTATE_SSE_SIZE / sizeof (uint64_t))]; From patchwork Fri Apr 26 15:01:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Burgess X-Patchwork-Id: 89048 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 9D024384AB70 for ; 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[143.159.223.185]) by smtp.gmail.com with ESMTPSA id u17-20020a05600c19d100b00416b163e52bsm34682832wmq.14.2024.04.26.08.02.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Apr 2024 08:02:15 -0700 (PDT) From: Andrew Burgess To: gdb-patches@sourceware.org Cc: Andrew Burgess , felix.willgerodt@intel.com, John Baldwin Subject: [PATCHv5 06/11] gdb/gdbserver: share I386_LINUX_XSAVE_XCR0_OFFSET definition Date: Fri, 26 Apr 2024 16:01:50 +0100 Message-Id: X-Mailer: git-send-email 2.25.4 In-Reply-To: References: MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00, DKIM_INVALID, DKIM_SIGNED, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Share the definition of I386_LINUX_XSAVE_XCR0_OFFSET between GDB and gdbserver. This commit is part of a series that aims to share more of the x86 target description creation code between GDB and gdbserver. The I386_LINUX_XSAVE_XCR0_OFFSET #define is used as part of the target description creation, and I noticed that this constant is defined separately for GDB and gdbserver. This commit moves the definition into gdbsupport/x86-xstate.h, which allows the #define to be shared. There should be no user visible changes after this commit. --- gdb/i386-linux-tdep.h | 20 -------------------- gdbserver/linux-x86-low.cc | 21 --------------------- gdbsupport/x86-xstate.h | 20 ++++++++++++++++++++ 3 files changed, 20 insertions(+), 41 deletions(-) diff --git a/gdb/i386-linux-tdep.h b/gdb/i386-linux-tdep.h index 5891747572b..07593c6a8ec 100644 --- a/gdb/i386-linux-tdep.h +++ b/gdb/i386-linux-tdep.h @@ -58,26 +58,6 @@ extern void i386_linux_report_signal_info (struct gdbarch *gdbarch, /* Return the target description according to XCR0. */ extern const struct target_desc *i386_linux_read_description (uint64_t xcr0); -/* Format of XSAVE extended state is: - struct - { - fxsave_bytes[0..463] - sw_usable_bytes[464..511] - xstate_hdr_bytes[512..575] - extended state regions (AVX, MPX, AVX512, PKRU, etc.) - }; - - Same memory layout will be used for the coredump NT_X86_XSTATE - representing the XSAVE extended state registers. - - The first 8 bytes of the sw_usable_bytes[464..467] is the OS enabled - extended state mask, which is the same as the extended control register - 0 (the XFEATURE_ENABLED_MASK register), XCR0. We can use this mask - together with the mask saved in the xstate_hdr_bytes to determine what - states the processor/OS supports and what state, used or initialized, - the process/thread is in. */ -#define I386_LINUX_XSAVE_XCR0_OFFSET 464 - extern int i386_linux_gregset_reg_offset[]; /* Return x86 siginfo type. */ diff --git a/gdbserver/linux-x86-low.cc b/gdbserver/linux-x86-low.cc index ffb2a90731d..62612773a87 100644 --- a/gdbserver/linux-x86-low.cc +++ b/gdbserver/linux-x86-low.cc @@ -831,27 +831,6 @@ x86_target::low_siginfo_fixup (siginfo_t *ptrace, gdb_byte *inf, int direction) static int use_xml; -/* Format of XSAVE extended state is: - struct - { - fxsave_bytes[0..463] - sw_usable_bytes[464..511] - xstate_hdr_bytes[512..575] - avx_bytes[576..831] - future_state etc - }; - - Same memory layout will be used for the coredump NT_X86_XSTATE - representing the XSAVE extended state registers. - - The first 8 bytes of the sw_usable_bytes[464..467] is the OS enabled - extended state mask, which is the same as the extended control register - 0 (the XFEATURE_ENABLED_MASK register), XCR0. We can use this mask - together with the mask saved in the xstate_hdr_bytes to determine what - states the processor/OS supports and what state, used or initialized, - the process/thread is in. */ -#define I386_LINUX_XSAVE_XCR0_OFFSET 464 - /* Get Linux/x86 target description from running target. */ static const struct target_desc * diff --git a/gdbsupport/x86-xstate.h b/gdbsupport/x86-xstate.h index 89c1143fbe1..11b37544aa3 100644 --- a/gdbsupport/x86-xstate.h +++ b/gdbsupport/x86-xstate.h @@ -120,4 +120,24 @@ constexpr bool operator!= (const x86_xsave_layout &lhs, #define I387_MXCSR_INIT_VAL 0x1f80 +/* Format of XSAVE extended state is: + struct + { + fxsave_bytes[0..463] + sw_usable_bytes[464..511] + xstate_hdr_bytes[512..575] + extended state regions (AVX, MPX, AVX512, PKRU, etc.) + }; + + Same memory layout will be used for the coredump NT_X86_XSTATE + representing the XSAVE extended state registers. + + The first 8 bytes of the sw_usable_bytes[464..467] is the OS enabled + extended state mask, which is the same as the extended control register + 0 (the XFEATURE_ENABLED_MASK register), XCR0. We can use this mask + together with the mask saved in the xstate_hdr_bytes to determine what + states the processor/OS supports and what state, used or initialized, + the process/thread is in. */ +#define I386_LINUX_XSAVE_XCR0_OFFSET 464 + #endif /* COMMON_X86_XSTATE_H */ From patchwork Fri Apr 26 15:01:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Burgess X-Patchwork-Id: 89046 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id E579B384601F for ; Fri, 26 Apr 2024 15:03:59 +0000 (GMT) X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by sourceware.org (Postfix) with ESMTPS id 2F9F7384AB73 for ; Fri, 26 Apr 2024 15:02:25 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 2F9F7384AB73 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=redhat.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=redhat.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 2F9F7384AB73 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=170.10.133.124 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1714143750; cv=none; b=TcyI5WeU0yn5f/7BDJ2xEzt7/GeX8dHEqazh+iHdaLGwn9+QOr/j3Nqceaszg2K7BL8aaYc660DlMlcvafJJBEMxXJ0KNQtiBtBnIxNorUzQvoFUMYTxS6dbxbd9oMz1i277cyCQ3ETPb5BZzOcwVEywYy+27HJkkw7vI2rkFcc= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1714143750; c=relaxed/simple; bh=dblr1cpTwHLirMOUQm9p0BCtTGcrFNyljOM37UtYfGE=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=SU90l3N+5HL8oglvzIPZee45q+5oJSAsrxq/hVuhOyZF9w2F1U4tXzu08Z9qMynkQ6/lGBEOEbd7rV88S8RpTElW8ccsHvgscGG5Wq0Nz5JRZvAWbiFAUCtNmKL+Ka80pID1UhdAXLpvrSXVAcpiFl3LlUPdhjsKQp1l+khSd7s= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1714143744; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=QysgJTgLK4AI8PnnbdQLsEDEtb+jQaBIZfBjxSZUcmg=; b=A575PDSaFSGYbG7vqttvVosLf6Ep1sGk+ddW8th/EdQxrrgeLPQMbXi/WL0kr+HcPGXtoP hoQMCscf9/8sXFPCsjwFW070v3gbtkuVFi1pH54sX4OsF5rbvSOQynpVdZpehov3hgFLoB l/ZsjlGFWuwQKWrEorSWy9NuvI6g8HI= Received: from mail-wm1-f69.google.com (mail-wm1-f69.google.com [209.85.128.69]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-74-HyyCHSHmOvCDZkd5T8Odhg-1; Fri, 26 Apr 2024 11:02:23 -0400 X-MC-Unique: HyyCHSHmOvCDZkd5T8Odhg-1 Received: by mail-wm1-f69.google.com with SMTP id 5b1f17b1804b1-418f8271081so9194675e9.3 for ; Fri, 26 Apr 2024 08:02:23 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714143742; x=1714748542; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=bpZBYOw+D57hKT1E/ciXzNRUxnALJ7zncvI3teiM83Q=; b=OkDMa8InJekTHGr3RR63yvwnSZjJpf8/pEbYwoBKAtCdj26vzc7ngg+KKm1cXlIj+n ddE4+Ai/Nc1CeQnkChn11mBLj/XpYau7c0jgQ9Ya/daJXJ3f97ccUtRYdr9xr1yJ2Z9k QQvIWvdtwlZ24Kph9yfBv4EibrFiNiHsmFxrULPMdcaWXL6skrCJu5j1ZA/NQsEgjiNK UrsJpA3QmleAB4eZi3TX5QxzVAGt5l37a4hcspurd60agd4l3rWw5Vd2t3Moc/OO7Z3V tuXrRP4hoOkMwiajQpe9QDTVZgfRr+WNDGEAuoyLHVoCMLteyrpddsr6c06IkWFjOIhs 2Xwg== X-Gm-Message-State: AOJu0Yx4XjYJFuWjYq+Hs92cC60aFUzuav42ht8tHt9w/8JwfqK9YinZ uo41NtwLzQnk8YRo5Wj0+KYKwSQBvyBxomr/A7SPrcyNXVzkjC+lEVGeIngDX1QsZq0cvq0IMyT B7nb0rOwQh/C0To8o11xahGuFXZHIed1NDYe8+l5pXkOii/mowxmJMC7aggPy0jac6XUZjkYLaC XQrA2hd9VoY0x2EQ+Sjy1mvv00F2ElXHvbOhk5mM8X6yw= X-Received: by 2002:a05:600c:1e2a:b0:41b:a281:675 with SMTP id ay42-20020a05600c1e2a00b0041ba2810675mr1361206wmb.41.1714143741116; Fri, 26 Apr 2024 08:02:21 -0700 (PDT) X-Google-Smtp-Source: AGHT+IH3jKVeR1ocM62Z5WdAkgIA6UiCCD6W9+LC60BHRMxRwiK0mQpKmU5TNPKjwoP6WqzVxoTg2w== X-Received: by 2002:a05:600c:1e2a:b0:41b:a281:675 with SMTP id ay42-20020a05600c1e2a00b0041ba2810675mr1361132wmb.41.1714143739781; Fri, 26 Apr 2024 08:02:19 -0700 (PDT) Received: from localhost (185.223.159.143.dyn.plus.net. [143.159.223.185]) by smtp.gmail.com with ESMTPSA id bh25-20020a05600c3d1900b0041ba0439a78sm1743550wmb.45.2024.04.26.08.02.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Apr 2024 08:02:17 -0700 (PDT) From: Andrew Burgess To: gdb-patches@sourceware.org Cc: Andrew Burgess , felix.willgerodt@intel.com, John Baldwin Subject: [PATCHv5 07/11] gdb/gdbserver: share some code relating to target description creation Date: Fri, 26 Apr 2024 16:01:51 +0100 Message-Id: <885b8258b5651b4a4d70cd4cdcdb0c004ecd9fef.1714143669.git.aburgess@redhat.com> X-Mailer: git-send-email 2.25.4 In-Reply-To: References: MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00, DKIM_INVALID, DKIM_SIGNED, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_SHORT, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org This commit is part of a series to share more of the x86 target description creation code between GDB and gdbserver. Unlike previous commits which were mostly refactoring, this commit is the first that makes a real change, though that change should mostly be for gdbserver; I've largely adopted the "GDB" way of doing things for gdbserver, and this fixes a real gdbserver bug. On a x86-64 Linux target, running the test: gdb.server/connect-with-no-symbol-file.exp results in two core files being created. Both of these core files are from the inferior process, created after gdbserver has detached. In this test a gdbserver process is started and then, after gdbserver has started, but before GDB attaches, we either delete the inferior executable, or change its permissions so it can't be read. Only after doing this do we attempt to connect with GDB. As GDB connects to gdbserver, gdbserver attempts to figure out the target description so that it can send the description to GDB, this involves a call to x86_linux_read_description. In x86_linux_read_description one of the first things we do is try to figure out if the process is 32-bit or 64-bit. To do this we look up the executable via the thread-id, and then attempt to read the architecture size from the executable. This isn't going to work if the executable has been deleted, or is no longer readable. And so, as we can't read the executable, we default to an i386 target and use an i386 target description. A consequence of using an i386 target description is that addresses are assumed to be 32-bits. Here's an example session that shows the problems this causes. This is run on an x86-64 machine, and the test binary (xx.x) is a standard 64-bit x86-64 binary: shell_1$ gdbserver --once localhost :54321 /tmp/xx.x shell_2$ gdb -q (gdb) set sysroot (gdb) shell chmod 000 /tmp/xx.x (gdb) target remote :54321 Remote debugging using :54321 warning: /tmp/xx.x: Permission denied. 0xf7fd3110 in ?? () (gdb) show architecture The target architecture is set to "auto" (currently "i386"). (gdb) p/x $pc $1 = 0xf7fd3110 (gdb) info proc mappings process 2412639 Mapped address spaces: Start Addr End Addr Size Offset Perms objfile 0x400000 0x401000 0x1000 0x0 r--p /tmp/xx.x 0x401000 0x402000 0x1000 0x1000 r-xp /tmp/xx.x 0x402000 0x403000 0x1000 0x2000 r--p /tmp/xx.x 0x403000 0x405000 0x2000 0x2000 rw-p /tmp/xx.x 0xf7fcb000 0xf7fcf000 0x4000 0x0 r--p [vvar] 0xf7fcf000 0xf7fd1000 0x2000 0x0 r-xp [vdso] 0xf7fd1000 0xf7fd3000 0x2000 0x0 r--p /usr/lib64/ld-2.30.so 0xf7fd3000 0xf7ff3000 0x20000 0x2000 r-xp /usr/lib64/ld-2.30.so 0xf7ff3000 0xf7ffb000 0x8000 0x22000 r--p /usr/lib64/ld-2.30.so 0xf7ffc000 0xf7ffe000 0x2000 0x2a000 rw-p /usr/lib64/ld-2.30.so 0xf7ffe000 0xf7fff000 0x1000 0x0 rw-p 0xfffda000 0xfffff000 0x25000 0x0 rw-p [stack] 0xff600000 0xff601000 0x1000 0x0 r-xp [vsyscall] (gdb) info inferiors Num Description Connection Executable * 1 process 2412639 1 (remote :54321) (gdb) shell cat /proc/2412639/maps 00400000-00401000 r--p 00000000 fd:03 45907133 /tmp/xx.x 00401000-00402000 r-xp 00001000 fd:03 45907133 /tmp/xx.x 00402000-00403000 r--p 00002000 fd:03 45907133 /tmp/xx.x 00403000-00405000 rw-p 00002000 fd:03 45907133 /tmp/xx.x 7ffff7fcb000-7ffff7fcf000 r--p 00000000 00:00 0 [vvar] 7ffff7fcf000-7ffff7fd1000 r-xp 00000000 00:00 0 [vdso] 7ffff7fd1000-7ffff7fd3000 r--p 00000000 fd:00 143904 /usr/lib64/ld-2.30.so 7ffff7fd3000-7ffff7ff3000 r-xp 00002000 fd:00 143904 /usr/lib64/ld-2.30.so 7ffff7ff3000-7ffff7ffb000 r--p 00022000 fd:00 143904 /usr/lib64/ld-2.30.so 7ffff7ffc000-7ffff7ffe000 rw-p 0002a000 fd:00 143904 /usr/lib64/ld-2.30.so 7ffff7ffe000-7ffff7fff000 rw-p 00000000 00:00 0 7ffffffda000-7ffffffff000 rw-p 00000000 00:00 0 [stack] ffffffffff600000-ffffffffff601000 r-xp 00000000 00:00 0 [vsyscall] (gdb) Notice the difference between the mappings reported via GDB and those reported directly from the kernel via /proc/PID/maps, the addresses of every mapping is clamped to 32-bits for GDB, while the kernel reports real 64-bit addresses. Notice also that the $pc value is a 32-bit value. It appears to be within one of the mappings reported by GDB, but is outside any of the mappings reported from the kernel. And this is where the problem arises. When gdbserver detaches from the inferior we pass the inferior the address from which it should resume. Due to the 32/64 bit confusion we tell the inferior to resume from the 32-bit $pc value, which is not within any valid mapping, and so, as soon as the inferior resumes, it segfaults. If we look at how GDB (not gdbserver) figures out its target description then we see an interesting difference. GDB doesn't try to read the executable. Instead GDB uses ptrace to query the thread's state, and uses this to figure out the if the thread is 32 or 64 bit. If we update gdbserver to do it the "GDB" way then the above problem is resolved, gdbserver now sees the process as 64-bit, and when we detach from the inferior we give it the correct 64-bit address, and the inferior no longer segfaults. Now, I could just update the gdbserver code, but better, I think, to share one copy of the code between GDB and gdbserver in gdb/nat/. That is what this commit does. The cores of x86_linux_read_description from gdbserver and x86_linux_nat_target::read_description from GDB are moved into a new file gdb/nat/x86-linux-tdesc.c and combined into a single function x86_linux_tdesc_for_tid which is called from each location. This new function does things the GDB way, the only changes are to allow for the sharing; we now have a callback function to call the first time that the xcr0 state is read, this allows for GDB and gdbserver to perform their own initialisation as needed, and additionally, the new function takes a pointer for where to cache the xcr0 value, this isn't needed for this commit, but will be useful in a later commit where gdbserver will want to read this cached xcr0 value. Another thing to note about this commit is how the functions i386_linux_read_description and amd64_linux_read_description are handled. For now I've left these function as implemented separately in GDB and gdbserver. I've moved the declarations of these functions into gdb/arch/{i386,amd64}-linux-tdesc.h, but the implementations are left where they are. A later commit in this series will make these functions shared too, but doing this is not trivial, so I've left that for a separate commit. Merging the declarations as I've done here ensures that everyone implements the function to the same API, and once these functions are shared (in a later commit) we'll want a shared declaration anyway. --- gdb/Makefile.in | 3 + gdb/amd64-linux-tdep.c | 1 + gdb/amd64-linux-tdep.h | 6 -- gdb/arch/amd64-linux-tdesc.h | 30 +++++++ gdb/arch/i386-linux-tdesc.h | 29 +++++++ gdb/configure.nat | 4 +- gdb/i386-linux-tdep.c | 1 + gdb/i386-linux-tdep.h | 3 - gdb/nat/x86-linux-tdesc.c | 124 ++++++++++++++++++++++++++++ gdb/nat/x86-linux-tdesc.h | 60 ++++++++++++++ gdb/x86-linux-nat.c | 91 ++++----------------- gdbserver/configure.srv | 2 + gdbserver/linux-amd64-ipa.cc | 1 + gdbserver/linux-i386-ipa.cc | 1 + gdbserver/linux-x86-low.cc | 151 +++++++++++------------------------ gdbserver/linux-x86-tdesc.cc | 2 + gdbserver/linux-x86-tdesc.h | 7 -- 17 files changed, 317 insertions(+), 199 deletions(-) create mode 100644 gdb/arch/amd64-linux-tdesc.h create mode 100644 gdb/arch/i386-linux-tdesc.h create mode 100644 gdb/nat/x86-linux-tdesc.c create mode 100644 gdb/nat/x86-linux-tdesc.h diff --git a/gdb/Makefile.in b/gdb/Makefile.in index 353e45b3cec..a24b2232daa 100644 --- a/gdb/Makefile.in +++ b/gdb/Makefile.in @@ -1549,8 +1549,10 @@ HFILES_NO_SRCDIR = \ arch/aarch64-insn.h \ arch/aarch64-mte-linux.h \ arch/aarch64-scalable-linux.h \ + arch/amd64-linux-tdesc.h \ arch/arc.h \ arch/arm.h \ + arch/i386-linux-tdesc.h \ arch/i386.h \ arch/loongarch.h \ arch/ppc-linux-common.h \ @@ -1606,6 +1608,7 @@ HFILES_NO_SRCDIR = \ nat/x86-gcc-cpuid.h \ nat/x86-linux.h \ nat/x86-linux-dregs.h \ + nat/x86-linux-tdesc.h \ python/py-event.h \ python/py-events.h \ python/py-stopevent.h \ diff --git a/gdb/amd64-linux-tdep.c b/gdb/amd64-linux-tdep.c index 9d560ac4fbf..bcb9868e79e 100644 --- a/gdb/amd64-linux-tdep.c +++ b/gdb/amd64-linux-tdep.c @@ -41,6 +41,7 @@ #include "arch/amd64.h" #include "target-descriptions.h" #include "expop.h" +#include "arch/amd64-linux-tdesc.h" /* The syscall's XML filename for i386. */ #define XML_SYSCALL_FILENAME_AMD64 "syscalls/amd64-linux.xml" diff --git a/gdb/amd64-linux-tdep.h b/gdb/amd64-linux-tdep.h index 2003dcda78f..0ec49e7fe03 100644 --- a/gdb/amd64-linux-tdep.h +++ b/gdb/amd64-linux-tdep.h @@ -43,12 +43,6 @@ extern struct target_desc *tdesc_x32_linux; extern struct target_desc *tdesc_x32_avx_linux; extern struct target_desc *tdesc_x32_avx_avx512_linux; -/* Return the right amd64-linux target descriptions according to - XCR0_FEATURES_BIT and IS_X32. */ - -const target_desc *amd64_linux_read_description (uint64_t xcr0_features_bit, - bool is_x32); - /* Enum that defines the syscall identifiers for amd64 linux. Used for process record/replay, these will be translated into a gdb-canonical set of syscall ids in linux-record.c. */ diff --git a/gdb/arch/amd64-linux-tdesc.h b/gdb/arch/amd64-linux-tdesc.h new file mode 100644 index 00000000000..db425b60df6 --- /dev/null +++ b/gdb/arch/amd64-linux-tdesc.h @@ -0,0 +1,30 @@ +/* Target description related code for GNU/Linux x86-64. + + Copyright (C) 2024 Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ + +#ifndef ARCH_AMD64_LINUX_TDESC_H +#define ARCH_AMD64_LINUX_TDESC_H + +struct target_desc; + +/* Return the AMD64 target descriptions corresponding to XCR0 and IS_X32. */ + +extern const target_desc *amd64_linux_read_description (uint64_t xcr0, + bool is_x32); + +#endif /* ARCH_AMD64_LINUX_TDESC_H */ diff --git a/gdb/arch/i386-linux-tdesc.h b/gdb/arch/i386-linux-tdesc.h new file mode 100644 index 00000000000..0b736337a75 --- /dev/null +++ b/gdb/arch/i386-linux-tdesc.h @@ -0,0 +1,29 @@ +/* Target description related code for GNU/Linux i386. + + Copyright (C) 2024 Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ + +#ifndef ARCH_I386_LINUX_TDESC_H +#define ARCH_I386_LINUX_TDESC_H + +struct target_desc; + +/* Return the i386 target description corresponding to XCR0. */ + +extern const struct target_desc *i386_linux_read_description (uint64_t xcr0); + +#endif /* ARCH_I386_LINUX_TDESC_H */ diff --git a/gdb/configure.nat b/gdb/configure.nat index 8b98511cef7..4bcc0696027 100644 --- a/gdb/configure.nat +++ b/gdb/configure.nat @@ -256,7 +256,7 @@ case ${gdb_host} in NATDEPFILES="${NATDEPFILES} x86-nat.o nat/x86-dregs.o \ nat/x86-xstate.o \ i386-linux-nat.o x86-linux-nat.o nat/linux-btrace.o \ - nat/x86-linux.o nat/x86-linux-dregs.o" + nat/x86-linux.o nat/x86-linux-dregs.o nat/x86-linux-tdesc.o" ;; ia64) # Host: Intel IA-64 running GNU/Linux @@ -322,7 +322,7 @@ case ${gdb_host} in NATDEPFILES="${NATDEPFILES} x86-nat.o nat/x86-dregs.o \ nat/x86-xstate.o amd64-nat.o amd64-linux-nat.o x86-linux-nat.o \ nat/linux-btrace.o \ - nat/x86-linux.o nat/x86-linux-dregs.o \ + nat/x86-linux.o nat/x86-linux-dregs.o nat/x86-linux-tdesc.o \ nat/amd64-linux-siginfo.o" ;; sparc) diff --git a/gdb/i386-linux-tdep.c b/gdb/i386-linux-tdep.c index 44730f204db..78ebc99d3df 100644 --- a/gdb/i386-linux-tdep.c +++ b/gdb/i386-linux-tdep.c @@ -39,6 +39,7 @@ #include "i387-tdep.h" #include "gdbsupport/x86-xstate.h" +#include "arch/i386-linux-tdesc.h" /* The syscall's XML filename for i386. */ #define XML_SYSCALL_FILENAME_I386 "syscalls/i386-linux.xml" diff --git a/gdb/i386-linux-tdep.h b/gdb/i386-linux-tdep.h index 07593c6a8ec..e8691cd778e 100644 --- a/gdb/i386-linux-tdep.h +++ b/gdb/i386-linux-tdep.h @@ -55,9 +55,6 @@ extern void i386_linux_report_signal_info (struct gdbarch *gdbarch, struct ui_out *uiout, enum gdb_signal siggnal); -/* Return the target description according to XCR0. */ -extern const struct target_desc *i386_linux_read_description (uint64_t xcr0); - extern int i386_linux_gregset_reg_offset[]; /* Return x86 siginfo type. */ diff --git a/gdb/nat/x86-linux-tdesc.c b/gdb/nat/x86-linux-tdesc.c new file mode 100644 index 00000000000..c2301e6a873 --- /dev/null +++ b/gdb/nat/x86-linux-tdesc.c @@ -0,0 +1,124 @@ +/* Target description related code for GNU/Linux x86 (i386 and x86-64). + + Copyright (C) 2024 Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ + +#include "nat/x86-linux-tdesc.h" +#ifdef __x86_64__ +#include "arch/amd64.h" +#include "arch/amd64-linux-tdesc.h" +#endif +#include "arch/i386.h" +#include "arch/i386-linux-tdesc.h" + +#include "nat/x86-linux.h" +#include "nat/gdb_ptrace.h" +#include "nat/x86-xstate.h" + +#ifndef __x86_64__ +#include +#endif + +#include +#include + +#ifndef IN_PROCESS_AGENT + +/* See nat/x86-linux-tdesc.h. */ + +const target_desc * +x86_linux_tdesc_for_tid (int tid, enum tribool *have_ptrace_getregset, + gdb::function_view xcr0_init_cb, + const char *error_msg, uint64_t *xcr0_storage) +{ +#ifdef __x86_64__ + + x86_linux_arch_size arch_size = x86_linux_ptrace_get_arch_size (tid); + bool is_64bit = arch_size.is_64bit (); + bool is_x32 = arch_size.is_x32 (); + + if (sizeof (void *) == 4 && is_64bit && !is_x32) + error ("%s", error_msg); + +#elif HAVE_PTRACE_GETFPXREGS + if (have_ptrace_getfpxregs == -1) + { + elf_fpxregset_t fpxregs; + + if (ptrace (PTRACE_GETFPXREGS, tid, 0, (int) &fpxregs) < 0) + { + have_ptrace_getfpxregs = 0; + *have_ptrace_getregset = TRIBOOL_FALSE; + return i386_linux_read_description (X86_XSTATE_X87_MASK); + } + } +#endif + + if (*have_ptrace_getregset == TRIBOOL_UNKNOWN) + { + uint64_t xstateregs[(X86_XSTATE_SSE_SIZE / sizeof (uint64_t))]; + struct iovec iov; + + iov.iov_base = xstateregs; + iov.iov_len = sizeof (xstateregs); + + /* Check if PTRACE_GETREGSET works. */ + if (ptrace (PTRACE_GETREGSET, tid, + (unsigned int) NT_X86_XSTATE, &iov) < 0) + { + *have_ptrace_getregset = TRIBOOL_FALSE; + *xcr0_storage = 0; + } + else + { + *have_ptrace_getregset = TRIBOOL_TRUE; + + /* Get XCR0 from XSAVE extended state. */ + *xcr0_storage = xstateregs[(I386_LINUX_XSAVE_XCR0_OFFSET + / sizeof (uint64_t))]; + +#ifdef __x86_64__ + /* No MPX on x32. */ + if (is_64bit && is_x32) + *xcr0_storage &= ~X86_XSTATE_MPX; +#endif /* __x86_64__ */ + + xcr0_init_cb (*xcr0_storage); + } + } + + /* Check the native XCR0 only if PTRACE_GETREGSET is available. If + PTRACE_GETREGSET is not available then set xcr0_features_bits to + zero so that the "no-features" descriptions are returned by the + switches below. */ + uint64_t xcr0_features_bits; + if (*have_ptrace_getregset == TRIBOOL_TRUE) + xcr0_features_bits = *xcr0_storage & X86_XSTATE_ALL_MASK; + else + xcr0_features_bits = 0; + +#ifdef __x86_64__ + if (is_64bit) + { + return amd64_linux_read_description (xcr0_features_bits, is_x32); + } + else +#endif + return i386_linux_read_description (xcr0_features_bits); +} + +#endif /* !IN_PROCESS_AGENT */ diff --git a/gdb/nat/x86-linux-tdesc.h b/gdb/nat/x86-linux-tdesc.h new file mode 100644 index 00000000000..8c481609876 --- /dev/null +++ b/gdb/nat/x86-linux-tdesc.h @@ -0,0 +1,60 @@ +/* Target description related code for GNU/Linux x86 (i386 and x86-64). + + Copyright (C) 2024 Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ + +#ifndef NAT_X86_LINUX_TDESC_H +#define NAT_X86_LINUX_TDESC_H + +#include "gdbsupport/function-view.h" + +struct target_desc; + +/* Return the target description for Linux thread TID. + + When *HAVE_PTRACE_GETREGSET is TRIBOOL_UNKNOWN then the current value of + xcr0 is read using ptrace calls and stored into *XCR0_STORAGE. Then + XCR0_INIT_CB is called with the value of *XCR0_STORAGE and + *HAVE_PTRACE_GETREGSET is set to TRIBOOL_TRUE. + + If the attempt to read xcr0 using ptrace fails then *XCR0_STORAGE is set + to zero and *HAVE_PTRACE_GETREGSET is set to TRIBOOL_FALSE. + + The storage pointed to by XCR0_STORAGE must exist until the program + terminates, this storage is used to cache the xcr0 value. As such + XCR0_INIT_CB will only be called once if xcr0 is successfully read using + ptrace, or not at all if the ptrace call fails. + + This function returns a target description based on the extracted xcr0 + value along with other characteristics of the thread identified by TID. + + This function can return nullptr if we encounter a machine configuration + for which a target_desc cannot be created. Ideally this would not be + the case, we should be able to create a target description for every + possible machine configuration. See amd64_linux_read_description and + i386_linux_read_description for cases when nullptr might be + returned. + + ERROR_MSG is using in an error() call if we try to create a target + description for a 64-bit process but this is a 32-bit build of GDB. */ + +extern const target_desc * +x86_linux_tdesc_for_tid (int tid, enum tribool *have_ptrace_getregset, + gdb::function_view xcr0_init_cb, + const char *error_msg, uint64_t *xcr0_storage); + +#endif /* NAT_X86_LINUX_TDESC_H */ diff --git a/gdb/x86-linux-nat.c b/gdb/x86-linux-nat.c index 12965c7a21b..9fbccb28d21 100644 --- a/gdb/x86-linux-nat.c +++ b/gdb/x86-linux-nat.c @@ -38,6 +38,7 @@ #include "nat/x86-linux.h" #include "nat/x86-linux-dregs.h" #include "nat/linux-ptrace.h" +#include "nat/x86-linux-tdesc.h" /* linux_nat_target::low_new_fork implementation. */ @@ -92,90 +93,26 @@ x86_linux_nat_target::post_startup_inferior (ptid_t ptid) const struct target_desc * x86_linux_nat_target::read_description () { - int tid; - int is_64bit = 0; -#ifdef __x86_64__ - int is_x32; -#endif - static uint64_t xcr0; - uint64_t xcr0_features_bits; + static uint64_t xcr0_storage; if (inferior_ptid == null_ptid) return this->beneath ()->read_description (); - tid = inferior_ptid.pid (); - -#ifdef __x86_64__ - - x86_linux_arch_size arch_size = x86_linux_ptrace_get_arch_size (tid); - is_64bit = arch_size.is_64bit (); - is_x32 = arch_size.is_x32 (); - -#elif HAVE_PTRACE_GETFPXREGS - if (have_ptrace_getfpxregs == -1) - { - elf_fpxregset_t fpxregs; - - if (ptrace (PTRACE_GETFPXREGS, tid, 0, (int) &fpxregs) < 0) - { - have_ptrace_getfpxregs = 0; - have_ptrace_getregset = TRIBOOL_FALSE; - return i386_linux_read_description (X86_XSTATE_X87_MASK); - } - } -#endif - - if (have_ptrace_getregset == TRIBOOL_UNKNOWN) - { - uint64_t xstateregs[(X86_XSTATE_SSE_SIZE / sizeof (uint64_t))]; - struct iovec iov; - - iov.iov_base = xstateregs; - iov.iov_len = sizeof (xstateregs); - - /* Check if PTRACE_GETREGSET works. */ - if (ptrace (PTRACE_GETREGSET, tid, - (unsigned int) NT_X86_XSTATE, &iov) < 0) - have_ptrace_getregset = TRIBOOL_FALSE; - else - { - have_ptrace_getregset = TRIBOOL_TRUE; - - /* Get XCR0 from XSAVE extended state. */ - xcr0 = xstateregs[(I386_LINUX_XSAVE_XCR0_OFFSET - / sizeof (uint64_t))]; - - m_xsave_layout = x86_fetch_xsave_layout (xcr0, x86_xsave_length ()); - } - } - - /* Check the native XCR0 only if PTRACE_GETREGSET is available. If - PTRACE_GETREGSET is not available then set xcr0_features_bits to - zero so that the "no-features" descriptions are returned by the - switches below. */ - if (have_ptrace_getregset == TRIBOOL_TRUE) - xcr0_features_bits = xcr0 & X86_XSTATE_ALL_MASK; - else - xcr0_features_bits = 0; - - if (is_64bit) - { -#ifdef __x86_64__ - return amd64_linux_read_description (xcr0_features_bits, is_x32); -#endif - } - else - { - const struct target_desc * tdesc - = i386_linux_read_description (xcr0_features_bits); + int tid = inferior_ptid.pid (); - if (tdesc == NULL) - tdesc = i386_linux_read_description (X86_XSTATE_SSE_MASK); + const char *error_msg + = _("Can't debug 64-bit process with 32-bit GDB"); - return tdesc; - } + /* Callback that is triggered the first time x86_linux_tdesc_for_tid + reads the xcr0 register. Setup other bits of state. */ + auto cb = [&] (uint64_t xcr0) + { + this->m_xsave_layout + = x86_fetch_xsave_layout (xcr0, x86_xsave_length ()); + }; - gdb_assert_not_reached ("failed to return tdesc"); + return x86_linux_tdesc_for_tid (tid, &have_ptrace_getregset, cb, + error_msg, &xcr0_storage); } diff --git a/gdbserver/configure.srv b/gdbserver/configure.srv index 9e861a75088..7a2702d78bf 100644 --- a/gdbserver/configure.srv +++ b/gdbserver/configure.srv @@ -109,6 +109,7 @@ case "${gdbserver_host}" in srv_tgtobj="${srv_tgtobj} nat/linux-btrace.o" srv_tgtobj="${srv_tgtobj} nat/x86-linux.o" srv_tgtobj="${srv_tgtobj} nat/x86-linux-dregs.o" + srv_tgtobj="${srv_tgtobj} nat/x86-linux-tdesc.o" srv_linux_usrregs=yes srv_linux_regsets=yes srv_linux_thread_db=yes @@ -371,6 +372,7 @@ case "${gdbserver_host}" in srv_tgtobj="${srv_tgtobj} nat/linux-btrace.o" srv_tgtobj="${srv_tgtobj} nat/x86-linux.o" srv_tgtobj="${srv_tgtobj} nat/x86-linux-dregs.o" + srv_tgtobj="${srv_tgtobj} nat/x86-linux-tdesc.o" srv_tgtobj="${srv_tgtobj} nat/amd64-linux-siginfo.o" srv_linux_usrregs=yes # This is for i386 progs. srv_linux_regsets=yes diff --git a/gdbserver/linux-amd64-ipa.cc b/gdbserver/linux-amd64-ipa.cc index a6346750f49..df5e6aca081 100644 --- a/gdbserver/linux-amd64-ipa.cc +++ b/gdbserver/linux-amd64-ipa.cc @@ -22,6 +22,7 @@ #include "tracepoint.h" #include "linux-x86-tdesc.h" #include "gdbsupport/x86-xstate.h" +#include "arch/amd64-linux-tdesc.h" /* fast tracepoints collect registers. */ diff --git a/gdbserver/linux-i386-ipa.cc b/gdbserver/linux-i386-ipa.cc index 8f14e0937d4..aa346fc9bc3 100644 --- a/gdbserver/linux-i386-ipa.cc +++ b/gdbserver/linux-i386-ipa.cc @@ -22,6 +22,7 @@ #include "tracepoint.h" #include "linux-x86-tdesc.h" #include "gdbsupport/x86-xstate.h" +#include "arch/i386-linux-tdesc.h" /* GDB register numbers. */ diff --git a/gdbserver/linux-x86-low.cc b/gdbserver/linux-x86-low.cc index 62612773a87..68d2f13537c 100644 --- a/gdbserver/linux-x86-low.cc +++ b/gdbserver/linux-x86-low.cc @@ -29,8 +29,11 @@ #ifdef __x86_64__ #include "nat/amd64-linux-siginfo.h" +#include "arch/amd64-linux-tdesc.h" #endif +#include "arch/i386-linux-tdesc.h" + #include "gdb_proc_service.h" /* Don't include elf/common.h if linux/elf.h got included by gdb_proc_service.h. */ @@ -46,6 +49,7 @@ #include "nat/x86-linux.h" #include "nat/x86-linux-dregs.h" #include "linux-x86-tdesc.h" +#include "nat/x86-linux-tdesc.h" #ifdef __x86_64__ static target_desc_up tdesc_amd64_linux_no_xml; @@ -831,32 +835,20 @@ x86_target::low_siginfo_fixup (siginfo_t *ptrace, gdb_byte *inf, int direction) static int use_xml; +/* Cached xcr0 value. This is initialised the first time + x86_linux_read_description is called. */ + +static uint64_t xcr0_storage; + /* Get Linux/x86 target description from running target. */ static const struct target_desc * x86_linux_read_description (void) { - unsigned int machine; - int is_elf64; - int xcr0_features; - int tid; - static uint64_t xcr0; - static int xsave_len; - struct regset_info *regset; - - tid = lwpid_of (current_thread); - - is_elf64 = linux_pid_exe_is_elf_64_file (tid, &machine); + int tid = lwpid_of (current_thread); - if (sizeof (void *) == 4) - { - if (is_elf64 > 0) - error (_("Can't debug 64-bit process with 32-bit GDBserver")); -#ifndef __x86_64__ - else if (machine == EM_X86_64) - error (_("Can't debug x86-64 process with 32-bit GDBserver")); -#endif - } + const char *error_msg + = _("Can't debug 64-bit process with 32-bit GDBserver"); /* If we are not allowed to send an XML target description then we need to use the hard-wired target descriptions. This corresponds to GDB's @@ -866,103 +858,54 @@ x86_linux_read_description (void) generate some alternative target descriptions. */ if (!use_xml) { + x86_linux_arch_size arch_size = x86_linux_ptrace_get_arch_size (tid); + bool is_64bit = arch_size.is_64bit (); + bool is_x32 = arch_size.is_x32 (); + + if (sizeof (void *) == 4 && is_64bit && !is_x32) + error ("%s", error_msg); + #ifdef __x86_64__ - if (machine == EM_X86_64) + if (is_64bit && !is_x32) return tdesc_amd64_linux_no_xml.get (); else #endif return tdesc_i386_linux_no_xml.get (); } -#if !defined __x86_64__ && defined HAVE_PTRACE_GETFPXREGS - if (machine == EM_386 && have_ptrace_getfpxregs == -1) - { - elf_fpxregset_t fpxregs; - - if (ptrace (PTRACE_GETFPXREGS, tid, 0, (long) &fpxregs) < 0) - { - have_ptrace_getfpxregs = 0; - have_ptrace_getregset = TRIBOOL_FALSE; - return i386_linux_read_description (X86_XSTATE_X87); - } - else - have_ptrace_getfpxregs = 1; - } -#endif - - if (have_ptrace_getregset == TRIBOOL_UNKNOWN) - { - uint64_t xstateregs[(X86_XSTATE_SSE_SIZE / sizeof (uint64_t))]; - struct iovec iov; - - iov.iov_base = xstateregs; - iov.iov_len = sizeof (xstateregs); - - /* Check if PTRACE_GETREGSET works. */ - if (ptrace (PTRACE_GETREGSET, tid, - (unsigned int) NT_X86_XSTATE, (long) &iov) < 0) - have_ptrace_getregset = TRIBOOL_FALSE; - else - { - have_ptrace_getregset = TRIBOOL_TRUE; - - /* Get XCR0 from XSAVE extended state. */ - xcr0 = xstateregs[(I386_LINUX_XSAVE_XCR0_OFFSET - / sizeof (uint64_t))]; - - /* No MPX on x32. */ - if (machine == EM_X86_64 && !is_elf64) - xcr0 &= ~X86_XSTATE_MPX; - - xsave_len = x86_xsave_length (); - - /* Use PTRACE_GETREGSET if it is available. */ - for (regset = x86_regsets; - regset->fill_function != NULL; regset++) - if (regset->get_request == PTRACE_GETREGSET) - regset->size = xsave_len; - else if (regset->type != GENERAL_REGS) - regset->size = 0; - } - } - - /* Check the native XCR0 only if PTRACE_GETREGSET is available. */ - xcr0_features = (have_ptrace_getregset == TRIBOOL_TRUE - && (xcr0 & X86_XSTATE_ALL_MASK)); - - if (xcr0_features) - i387_set_xsave_mask (xcr0, xsave_len); + /* Callback that is triggered the first time x86_linux_tdesc_for_tid + reads the xcr0 register. Setup other bits of state */ + auto cb = [] (uint64_t xcr0) + { + i387_set_xsave_mask (xcr0, x86_xsave_length ()); + }; - if (machine == EM_X86_64) - { -#ifdef __x86_64__ - const target_desc *tdesc = NULL; + /* If have_ptrace_getregset is changed to true by calling + x86_linux_tdesc_for_tid then we will perform some additional + initialisation. */ + bool have_ptrace_getregset_is_unknown + = have_ptrace_getregset == TRIBOOL_UNKNOWN; - if (xcr0_features) - { - tdesc = amd64_linux_read_description (xcr0 & X86_XSTATE_ALL_MASK, - !is_elf64); - } + const target_desc *tdesc + = x86_linux_tdesc_for_tid (tid, &have_ptrace_getregset, cb, error_msg, + &xcr0_storage); - if (tdesc == NULL) - tdesc = amd64_linux_read_description (X86_XSTATE_SSE_MASK, !is_elf64); - return tdesc; -#endif - } - else + if (have_ptrace_getregset_is_unknown + && have_ptrace_getregset == TRIBOOL_TRUE) { - const target_desc *tdesc = NULL; - - if (xcr0_features) - tdesc = i386_linux_read_description (xcr0 & X86_XSTATE_ALL_MASK); - - if (tdesc == NULL) - tdesc = i386_linux_read_description (X86_XSTATE_SSE); - - return tdesc; + int xsave_len = x86_xsave_length (); + + /* Use PTRACE_GETREGSET if it is available. */ + for (regset_info *regset = x86_regsets; + regset->fill_function != nullptr; + regset++) + if (regset->get_request == PTRACE_GETREGSET) + regset->size = xsave_len; + else if (regset->type != GENERAL_REGS) + regset->size = 0; } - gdb_assert_not_reached ("failed to return tdesc"); + return tdesc; } /* Update all the target description of all processes; a new GDB diff --git a/gdbserver/linux-x86-tdesc.cc b/gdbserver/linux-x86-tdesc.cc index cd3b5d80e37..af3735aa895 100644 --- a/gdbserver/linux-x86-tdesc.cc +++ b/gdbserver/linux-x86-tdesc.cc @@ -23,8 +23,10 @@ #include "gdbsupport/x86-xstate.h" #ifdef __x86_64__ #include "arch/amd64.h" +#include "arch/amd64-linux-tdesc.h" #endif #include "x86-tdesc.h" +#include "arch/i386-linux-tdesc.h" /* Return the right x86_linux_tdesc index for a given XCR0. Return X86_TDESC_LAST if can't find a match. */ diff --git a/gdbserver/linux-x86-tdesc.h b/gdbserver/linux-x86-tdesc.h index f9561b129ae..576aaf5e165 100644 --- a/gdbserver/linux-x86-tdesc.h +++ b/gdbserver/linux-x86-tdesc.h @@ -46,11 +46,4 @@ int amd64_get_ipa_tdesc_idx (const struct target_desc *tdesc); const struct target_desc *i386_get_ipa_tdesc (int idx); -#ifdef __x86_64__ -const struct target_desc *amd64_linux_read_description (uint64_t xcr0, - bool is_x32); -#endif - -const struct target_desc *i386_linux_read_description (uint64_t xcr0); - #endif /* GDBSERVER_LINUX_X86_TDESC_H */ From patchwork Fri Apr 26 15:01:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Burgess X-Patchwork-Id: 89047 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id D0E88384AB59 for ; Fri, 26 Apr 2024 15:04:21 +0000 (GMT) X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by sourceware.org (Postfix) with ESMTPS id 356203858416 for ; Fri, 26 Apr 2024 15:02:26 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 356203858416 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=redhat.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=redhat.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 356203858416 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=170.10.133.124 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1714143749; cv=none; b=ay9Yt9nNnEw3tk6rCgiJeeJSoPj3xXroofDRuTtu6RxiEOP06AviVxsUM0h2j2cZz8hAG8aIE5sGfwF5v2riH37n2jhMQu4zx0fkeTsBuKAwLyV0T3qOILWMJNhZASpYzob94ZPL6NsMxraKIoDjRah1Dc3l3EV8kaWJBlrxNS0= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1714143749; c=relaxed/simple; bh=LVChTPs2mlXJ+9DSy2NHZ3IofYVJl3nKW6RWqyXy5sU=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=mlk/74Zoqq+DMBfBksFmQbZmobHTcQyM75O3ac0GwWKUeifdbjo/vmAytQi3JK7sKCyBlNjMqim9PE1jz5cdaBkAXIczDpTidLvEi7dFnjo0mT1G6ehIXDb6hgxEu24K4elGrje9CaEzCWjfjnPKexFUzgbvozdfey/1ui2Kvbk= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1714143745; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=FGXK8MNHbksShJw2aRkkwQP1sNkoss8ecPxgHYoGUOk=; b=d1cNhxDVFR6XobY8KAO5QmHcg6xEHs+byb+H07irlcr/CAV7d2BnNGizwsAmd1qWlUkJ4h tEgRd/I/tiRdvaEvsG7JohXlcnAHlf3XYKMZ16+b5x3+KhrIEzXrhtgTmMRWA0SHJiUID9 P5A/DA7jJa1Spvsv6j8ZRz0SK3DNBHE= Received: from mail-lj1-f198.google.com (mail-lj1-f198.google.com [209.85.208.198]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-168-M6L4Ib5lPdKveppe_WOZgg-1; Fri, 26 Apr 2024 11:02:24 -0400 X-MC-Unique: M6L4Ib5lPdKveppe_WOZgg-1 Received: by mail-lj1-f198.google.com with SMTP id 38308e7fff4ca-2d855c0362bso18139181fa.3 for ; Fri, 26 Apr 2024 08:02:24 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714143742; x=1714748542; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=FGXK8MNHbksShJw2aRkkwQP1sNkoss8ecPxgHYoGUOk=; b=rz6fduIUga8rHS4jg+I7SSs/ams+1Mo/L2pOkzAsuCyMf2gbn1YlZ9E0t8Pfd5SXet 8/qM4tp472U9xlXpgzmkcroUgur73RGgOuvCsdvIXNqho+4uzVE4dZPsG7zlEaGKbexj FboWsjVWMiYBFFRlueCFwxNS7oPToICZAB/o6WBSpBIVpyFKcUVl12k2MXRJ+v/OjY0B kMk/nc3cvNzfhyQTwsAzFxaz2TJiC8azakF8Orfyk9lxl9OcIktfvQKIlGA7Om8eRBXa Y6Tak5SZaDBFHM8wKAa40oPyUUWZlcDFbBewYlUwVAlWexgpv/0Z4ej3U6UjwUh0xoNN QO7w== X-Gm-Message-State: AOJu0YxnMELcBm4+HkHZeWFZunXeRAc2JE7lfWTWnWUoVA3saxGOdq7w sHeSEFTTG6I6T1cmEAi7Ufyn+legChP5MS/93/hvSXv/TUS3uXNpphsiIuc4NkFxlxs8iILuy5G tedLu/cnHDH0OWVqSBxgfGYgOZA8Yf9qtp9rSST4XrvukNvRcRV5a8y9GP+g6R1TWwtL70Rh6vS IbDiPzRpbrTwZHpu5wfnPhbE9IsDuOYXe+JDpW4g/s4bo= X-Received: by 2002:a2e:a99e:0:b0:2db:817d:2f1f with SMTP id x30-20020a2ea99e000000b002db817d2f1fmr2199874ljq.1.1714143742406; Fri, 26 Apr 2024 08:02:22 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHF71y7X720rwUM35jKergoV865y1tztH47EnGcOjFnWU3YnBRzf+Af/vdcbt5HFikbo2Ly0A== X-Received: by 2002:a2e:a99e:0:b0:2db:817d:2f1f with SMTP id x30-20020a2ea99e000000b002db817d2f1fmr2199828ljq.1.1714143741556; Fri, 26 Apr 2024 08:02:21 -0700 (PDT) Received: from localhost (185.223.159.143.dyn.plus.net. [143.159.223.185]) by smtp.gmail.com with ESMTPSA id p6-20020a05600c468600b0041563096e15sm35369689wmo.5.2024.04.26.08.02.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Apr 2024 08:02:20 -0700 (PDT) From: Andrew Burgess To: gdb-patches@sourceware.org Cc: Andrew Burgess , felix.willgerodt@intel.com, John Baldwin Subject: [PATCHv5 08/11] gdb/arch: assert that X86_XSTATE_MPX is not set for x32 Date: Fri, 26 Apr 2024 16:01:52 +0100 Message-Id: <79e267edd3cdd68d87fef81d2a5fdf73b22b25be.1714143669.git.aburgess@redhat.com> X-Mailer: git-send-email 2.25.4 In-Reply-To: References: MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-Spam-Status: No, score=-12.0 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_NUMSUBJECT, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org While rebasing this series past this commit: commit 4bb20a6244b7091a9a7a2ae35dfbd7e8db27550a Date: Wed Mar 20 04:13:18 2024 -0700 gdbserver: Clear X86_XSTATE_MPX bits in xcr0 on x32 I worried that there could be other paths that might result in an xcr0 value which has X86_XSTATE_MPX set in x32 mode. As everyone eventually calls amd64_create_target_description to build their target description, I figured we could assert in here that if X86_XSTATE_MPX is set then we should not be an x32 target, this will uncover any other bugs in this area. I'm not currently able to build/run any x32 binaries, so I have no way to test this, but the author of commit 4bb20a6244b7091 did test this series with that assert in place and didn't see any problems. Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=31511 --- gdb/arch/amd64.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/gdb/arch/amd64.c b/gdb/arch/amd64.c index cb9683c6931..94d55d72a4e 100644 --- a/gdb/arch/amd64.c +++ b/gdb/arch/amd64.c @@ -65,8 +65,12 @@ amd64_create_target_description (uint64_t xcr0, bool is_x32, bool is_linux, if (xcr0 & X86_XSTATE_AVX) regnum = create_feature_i386_64bit_avx (tdesc.get (), regnum); - if ((xcr0 & X86_XSTATE_MPX) && !is_x32) - regnum = create_feature_i386_64bit_mpx (tdesc.get (), regnum); + if (xcr0 & X86_XSTATE_MPX) + { + /* MPX is not available on x32. */ + gdb_assert (!is_x32); + regnum = create_feature_i386_64bit_mpx (tdesc.get (), regnum); + } if (xcr0 & X86_XSTATE_AVX512) regnum = create_feature_i386_64bit_avx512 (tdesc.get (), regnum); From patchwork Fri Apr 26 15:01:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Burgess X-Patchwork-Id: 89050 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 637E73858435 for ; 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[143.159.223.185]) by smtp.gmail.com with ESMTPSA id d14-20020adfe88e000000b0034b86548582sm9122155wrm.102.2024.04.26.08.02.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Apr 2024 08:02:23 -0700 (PDT) From: Andrew Burgess To: gdb-patches@sourceware.org Cc: Andrew Burgess , felix.willgerodt@intel.com, John Baldwin Subject: [PATCHv5 09/11] gdbserver: update target description creation for x86/linux Date: Fri, 26 Apr 2024 16:01:53 +0100 Message-Id: <7f0e5aac3e3f52b6119658af5c4e5237811aec56.1714143669.git.aburgess@redhat.com> X-Mailer: git-send-email 2.25.4 In-Reply-To: References: MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org This commit is part of a series which aims to share more of the target description creation between GDB and gdbserver for x86/Linux. After some refactoring earlier in this series the shared x86_linux_tdesc_for_tid function was added into nat/x86-linux-tdesc.c. However, this function still relies on amd64_linux_read_description and i386_linux_read_description which are implemented separately for both gdbserver and GDB. Given that at their core, all these functions do is: 1. take an xcr0 value as input, 2. mask out some feature bits, 3. look for a cached pre-generated target description and return it if found, 4. if no cached target description is found then call either amd64_create_target_description or i386_create_target_description to create a new target description, which is then added to the cache. Return the newly created target description. The inner functions amd64_create_target_description and i386_create_target_description are already shared between GDB and gdbserver (in the gdb/arch/ directory), so the only thing that the *_read_description functions really do is add the caching layer, and it feels like this really could be shared. However, we have a small problem. On the GDB side we create target descriptions using a different set of cpu features than on the gdbserver side! This means that for the exact same target, we might get a different target description when using native GDB vs using gdbserver. This surely feels like a mistake, I would expect to get the same target description on each. The table below shows the number of possible different target descriptions that we can create on the GDB side vs on the gdbserver side for each target type: | GDB | gdbserver ------|-----|---------- i386 | 64 | 7 amd64 | 32 | 7 x32 | 16 | 7 So in theory, all I want to do is move the GDB version of *_read_description into the arch/ directory and have gdbserver use that, then both GDB and gdbserver would be able to create any of the possible target descriptions. Unfortunately it's a little more complex than that due to the in process agent (IPA). When the IPA is in use, gdbserver sends a target description index to the IPA, and the IPA uses this to find the correct target description to use. ** START OF AN ASIDE ** Back in the day I suspect this approach made perfect sense. However since this commit: commit a8806230241d201f808d856eaae4d44088117b0c Date: Thu Dec 7 17:07:01 2017 +0000 Initialize target description early in IPA I think passing the index is now more trouble than its worth. We used to pass the index, and then use that index to lookup which target description to instantiate and use. However, the above commit fixed an issue where we can't call malloc() within (certain parts of) the IPA (apparently), so instead we now pre-compute _every_ possible target description within the IPA. The index is now only used to lookup which of the (many) pre-computed target descriptions to use. It would (I think) have been easier all around if the IPA just self-inspected, figured out its own xcr0 value, and used that to create the one target description that is required. So long as the xcr0 to target description code is shared (at compile time) with gdbserver, then we can be sure that the IPA will derive the same target description as gdbserver, and we would avoid all this index passing business, which has made this commit so very, very painful. ** END OF AN ASIDE ** Currently then for x86/linux, gdbserver sends a number between 0 and 7 to the IPA, and the IPA uses this to create a target description. However, I am proposing that gdbserver should now create one of (up to) 64 different target descriptions for i386, so this 0 to 7 index isn't going to be good enough any more (amd64 and x32 have slightly fewer possible target descriptions, but still more than 8, so the problem is the same). For a while I wondered if I was going to have to try and find some backward compatible solution for this mess. But after seeing how lightly the IPA is actually documented, I wonder if it is not the case that there is a tight coupling between a version of gdbserver and a version of the IPA? At least I'm hoping so. In this commit I have thrown out the old IPA target description index numbering scheme, and switched to a completely new numbering scheme. Instead of the index that is passed being arbitrary, the index is instead calculated from the set of cpu features that are present on the target. Within the IPA we can then reverse this logic to recreate the xcr0 value based on the index, and from the xcr0 value we can choose the correct target description. With the gdbserver to IPA numbering scheme issue resolved I have then update the gdbserver versions of amd64_linux_read_description and i386_linux_read_description so that they create target descriptions using the same set of cpu features as GDB itself. After this gdbserver should now always come up with the same target description as GDB does on any x86/Linux target. This commit does not introduce any new code sharing between GDB and gdbserver as previous commits in this series have done. Instead this commit is all about bringing GDB and gdbserver into alignment functionally so that the next commit(s) can merge the GDB and gdbserver versions of these functions. Approved-By: John Baldwin --- gdbserver/linux-amd64-ipa.cc | 43 +---- gdbserver/linux-i386-ipa.cc | 23 +-- gdbserver/linux-x86-low.cc | 15 +- gdbserver/linux-x86-tdesc.cc | 316 +++++++++++++++++++++++++---------- gdbserver/linux-x86-tdesc.h | 49 +++--- 5 files changed, 278 insertions(+), 168 deletions(-) diff --git a/gdbserver/linux-amd64-ipa.cc b/gdbserver/linux-amd64-ipa.cc index df5e6aca081..0c80812cc6f 100644 --- a/gdbserver/linux-amd64-ipa.cc +++ b/gdbserver/linux-amd64-ipa.cc @@ -164,47 +164,21 @@ supply_static_tracepoint_registers (struct regcache *regcache, #endif /* HAVE_UST */ -#if !defined __ILP32__ -/* Map the tdesc index to xcr0 mask. */ -static uint64_t idx2mask[X86_TDESC_LAST] = { - X86_XSTATE_X87_MASK, - X86_XSTATE_SSE_MASK, - X86_XSTATE_AVX_MASK, - X86_XSTATE_MPX_MASK, - X86_XSTATE_AVX_MPX_MASK, - X86_XSTATE_AVX_AVX512_MASK, - X86_XSTATE_AVX_MPX_AVX512_PKU_MASK, -}; -#endif - /* Return target_desc to use for IPA, given the tdesc index passed by gdbserver. */ const struct target_desc * get_ipa_tdesc (int idx) { - if (idx >= X86_TDESC_LAST) - { - internal_error ("unknown ipa tdesc index: %d", idx); - } + uint64_t xcr0 = x86_linux_tdesc_idx_to_xcr0 (idx); #if defined __ILP32__ - switch (idx) - { - case X86_TDESC_SSE: - return amd64_linux_read_description (X86_XSTATE_SSE_MASK, true); - case X86_TDESC_AVX: - return amd64_linux_read_description (X86_XSTATE_AVX_MASK, true); - case X86_TDESC_AVX_AVX512: - return amd64_linux_read_description (X86_XSTATE_AVX_AVX512_MASK, true); - default: - break; - } + bool is_x32 = true; #else - return amd64_linux_read_description (idx2mask[idx], false); + bool is_x32 = false; #endif - internal_error ("unknown ipa tdesc index: %d", idx); + return amd64_linux_read_description (xcr0, is_x32); } /* Allocate buffer for the jump pads. The branch instruction has a @@ -272,11 +246,10 @@ void initialize_low_tracepoint (void) { #if defined __ILP32__ - amd64_linux_read_description (X86_XSTATE_SSE_MASK, true); - amd64_linux_read_description (X86_XSTATE_AVX_MASK, true); - amd64_linux_read_description (X86_XSTATE_AVX_AVX512_MASK, true); + for (auto i = 0; i < x86_linux_x32_tdesc_count (); i++) + amd64_linux_read_description (x86_linux_tdesc_idx_to_xcr0 (i), true); #else - for (auto i = 0; i < X86_TDESC_LAST; i++) - amd64_linux_read_description (idx2mask[i], false); + for (auto i = 0; i < x86_linux_amd64_tdesc_count (); i++) + amd64_linux_read_description (x86_linux_tdesc_idx_to_xcr0 (i), false); #endif } diff --git a/gdbserver/linux-i386-ipa.cc b/gdbserver/linux-i386-ipa.cc index aa346fc9bc3..c1c3152fb04 100644 --- a/gdbserver/linux-i386-ipa.cc +++ b/gdbserver/linux-i386-ipa.cc @@ -245,28 +245,15 @@ initialize_fast_tracepoint_trampoline_buffer (void) } } -/* Map the tdesc index to xcr0 mask. */ -static uint64_t idx2mask[X86_TDESC_LAST] = { - X86_XSTATE_X87_MASK, - X86_XSTATE_SSE_MASK, - X86_XSTATE_AVX_MASK, - X86_XSTATE_MPX_MASK, - X86_XSTATE_AVX_MPX_MASK, - X86_XSTATE_AVX_AVX512_MASK, - X86_XSTATE_AVX_MPX_AVX512_PKU_MASK, -}; - /* Return target_desc to use for IPA, given the tdesc index passed by gdbserver. */ const struct target_desc * get_ipa_tdesc (int idx) { - if (idx >= X86_TDESC_LAST) - { - internal_error ("unknown ipa tdesc index: %d", idx); - } - return i386_linux_read_description (idx2mask[idx]); + uint64_t xcr0 = x86_linux_tdesc_idx_to_xcr0 (idx); + + return i386_linux_read_description (xcr0); } /* Allocate buffer for the jump pads. On i386, we can reach an arbitrary @@ -288,6 +275,6 @@ void initialize_low_tracepoint (void) { initialize_fast_tracepoint_trampoline_buffer (); - for (auto i = 0; i < X86_TDESC_LAST; i++) - i386_linux_read_description (idx2mask[i]); + for (auto i = 0; i < x86_linux_i386_tdesc_count (); i++) + i386_linux_read_description (x86_linux_tdesc_idx_to_xcr0 (i)); } diff --git a/gdbserver/linux-x86-low.cc b/gdbserver/linux-x86-low.cc index 68d2f13537c..6e23a53118b 100644 --- a/gdbserver/linux-x86-low.cc +++ b/gdbserver/linux-x86-low.cc @@ -2882,14 +2882,17 @@ x86_target::get_ipa_tdesc_idx () struct regcache *regcache = get_thread_regcache (current_thread, 0); const struct target_desc *tdesc = regcache->tdesc; + if (!use_xml) + { + if (tdesc == tdesc_i386_linux_no_xml.get () #ifdef __x86_64__ - return amd64_get_ipa_tdesc_idx (tdesc); -#endif - - if (tdesc == tdesc_i386_linux_no_xml.get ()) - return X86_TDESC_SSE; + || tdesc == tdesc_amd64_linux_no_xml.get () +#endif /* __x86_64__ */ + ) + return x86_linux_xcr0_to_tdesc_idx (X86_XSTATE_SSE_MASK); + } - return i386_get_ipa_tdesc_idx (tdesc); + return x86_linux_xcr0_to_tdesc_idx (xcr0_storage); } /* The linux target ops object. */ diff --git a/gdbserver/linux-x86-tdesc.cc b/gdbserver/linux-x86-tdesc.cc index af3735aa895..5e12526bf17 100644 --- a/gdbserver/linux-x86-tdesc.cc +++ b/gdbserver/linux-x86-tdesc.cc @@ -28,96 +28,278 @@ #include "x86-tdesc.h" #include "arch/i386-linux-tdesc.h" -/* Return the right x86_linux_tdesc index for a given XCR0. Return - X86_TDESC_LAST if can't find a match. */ +/* A structure used to describe a single cpu feature that might, or might + not, be checked for when creating a target description for one of i386, + amd64, or x32. */ -static enum x86_linux_tdesc -xcr0_to_tdesc_idx (uint64_t xcr0, bool is_x32) +struct x86_tdesc_feature { + /* The cpu feature mask. This is a mask against an xcr0 value. */ + uint64_t feature; + + /* Is this feature checked when creating an i386 target description. */ + bool is_i386; + + /* Is this feature checked when creating an amd64 target description. */ + bool is_amd64; + + /* Is this feature checked when creating an x32 target description. */ + bool is_x32; +}; + +/* A constant table that describes all of the cpu features that are + checked when building a target description for i386, amd64, or x32. */ + +static constexpr x86_tdesc_feature x86_linux_all_tdesc_features[] = { + /* Feature, i386, amd64, x32. */ + { X86_XSTATE_PKRU, true, true, true }, + { X86_XSTATE_AVX512, true, true, true }, + { X86_XSTATE_AVX, true, true, true }, + { X86_XSTATE_MPX, true, true, false }, + { X86_XSTATE_SSE, true, false, false }, + { X86_XSTATE_X87, true, false, false } +}; + +/* Return a compile time constant which is a mask of all the cpu features + that are checked for when building an i386 target description. */ + +static constexpr uint64_t +x86_linux_i386_tdesc_feature_mask () { - if (xcr0 & X86_XSTATE_PKRU) - { - if (is_x32) - { - /* No x32 MPX and PKU, fall back to avx_avx512. */ - return X86_TDESC_AVX_AVX512; - } - else - return X86_TDESC_AVX_MPX_AVX512_PKU; - } - else if (xcr0 & X86_XSTATE_AVX512) - return X86_TDESC_AVX_AVX512; - else if ((xcr0 & X86_XSTATE_AVX_MPX_MASK) == X86_XSTATE_AVX_MPX_MASK) + uint64_t mask = 0; + + for (const auto &entry : x86_linux_all_tdesc_features) + if (entry.is_i386) + mask |= entry.feature; + + return mask; +} + +/* Return a compile time constant which is a mask of all the cpu features + that are checked for when building an amd64 target description. */ + +static constexpr uint64_t +x86_linux_amd64_tdesc_feature_mask () +{ + uint64_t mask = 0; + + for (const auto &entry : x86_linux_all_tdesc_features) + if (entry.is_amd64) + mask |= entry.feature; + + return mask; +} + +/* Return a compile time constant which is a mask of all the cpu features + that are checked for when building an x32 target description. */ + +static constexpr uint64_t +x86_linux_x32_tdesc_feature_mask () +{ + uint64_t mask = 0; + + for (const auto &entry : x86_linux_all_tdesc_features) + if (entry.is_x32) + mask |= entry.feature; + + return mask; +} + +/* Return a compile time constant which is a count of the number of cpu + features that are checked for when building an i386 target description. */ + +static constexpr int +x86_linux_i386_tdesc_count_1 () +{ + uint64_t count = 0; + + for (const auto &entry : x86_linux_all_tdesc_features) + if (entry.is_i386) + ++count; + + gdb_assert (count > 0); + + return (1 << count); +} + +/* Return a compile time constant which is a count of the number of cpu + features that are checked for when building an amd64 target description. */ + +static constexpr int +x86_linux_amd64_tdesc_count_1 () +{ + uint64_t count = 0; + + for (const auto &entry : x86_linux_all_tdesc_features) + if (entry.is_amd64) + ++count; + + gdb_assert (count > 0); + + return (1 << count); +} + +/* Return a compile time constant which is a count of the number of cpu + features that are checked for when building an x32 target description. */ + +static constexpr int +x86_linux_x32_tdesc_count_1 () +{ + uint64_t count = 0; + + for (const auto &entry : x86_linux_all_tdesc_features) + if (entry.is_x32) + ++count; + + gdb_assert (count > 0); + + return (1 << count); +} + +#ifdef IN_PROCESS_AGENT + +/* See linux-x86-tdesc.h. */ + +int +x86_linux_amd64_tdesc_count () +{ + return x86_linux_amd64_tdesc_count_1 (); +} + +/* See linux-x86-tdesc.h. */ + +int +x86_linux_x32_tdesc_count () +{ + return x86_linux_x32_tdesc_count_1 (); +} + +/* See linux-x86-tdesc.h. */ + +int +x86_linux_i386_tdesc_count () +{ + return x86_linux_i386_tdesc_count_1 (); +} + +#endif /* IN_PROCESS_AGENT */ + +/* Convert an xcr0 value into an integer. The integer will be passed to + the in-process-agent where it will then be passed to + x86_linux_tdesc_idx_to_xcr0 to get back the xcr0 value. */ + +int +x86_linux_xcr0_to_tdesc_idx (uint64_t xcr0) +{ + /* The following table shows which features are checked for when creating + the target descriptions (see nat/x86-linux-tdesc.c), the feature order + represents the bit order within the generated index number. + + i386 | x87 sse mpx avx avx512 pkru + amd64 | mpx avx avx512 pkru + i32 | avx avx512 pkru + + The features are ordered so that for each mode (i386, amd64, i32) the + generated index will form a continuous range. */ + + int idx = 0; + + for (int i = 0; i < ARRAY_SIZE (x86_linux_all_tdesc_features); ++i) { - if (is_x32) /* No MPX on x32. */ - return X86_TDESC_AVX; - else - return X86_TDESC_AVX_MPX; + if ((xcr0 & x86_linux_all_tdesc_features[i].feature) + == x86_linux_all_tdesc_features[i].feature) + idx |= (1 << i); } - else if (xcr0 & X86_XSTATE_MPX) + + return idx; +} + + +#ifdef IN_PROCESS_AGENT + +/* Convert an index number (as returned from x86_linux_xcr0_to_tdesc_idx) + into an xcr0 value which can then be used to create a target + description. */ + +uint64_t +x86_linux_tdesc_idx_to_xcr0 (int idx) +{ + uint64_t xcr0 = 0; + + for (int i = 0; i < ARRAY_SIZE (x86_linux_all_tdesc_features); ++i) { - if (is_x32) /* No MPX on x32. */ - return X86_TDESC_AVX; - else - return X86_TDESC_MPX; + if ((idx & (1 << i)) != 0) + xcr0 |= x86_linux_all_tdesc_features[i].feature; } - else if (xcr0 & X86_XSTATE_AVX) - return X86_TDESC_AVX; - else if (xcr0 & X86_XSTATE_SSE) - return X86_TDESC_SSE; - else if (xcr0 & X86_XSTATE_X87) - return X86_TDESC_MMX; - else - return X86_TDESC_LAST; + + return xcr0; } +#endif /* IN_PROCESS_AGENT */ + #if defined __i386__ || !defined IN_PROCESS_AGENT -static struct target_desc *i386_tdescs[X86_TDESC_LAST] = { }; +/* A cache of all possible i386 target descriptions. */ -/* Return the target description according to XCR0. */ +static struct target_desc *i386_tdescs[x86_linux_i386_tdesc_count_1 ()] = { }; + +/* See nat/x86-linux-tdesc.h. */ const struct target_desc * i386_linux_read_description (uint64_t xcr0) { - enum x86_linux_tdesc idx = xcr0_to_tdesc_idx (xcr0, false); + xcr0 &= x86_linux_i386_tdesc_feature_mask (); + int idx = x86_linux_xcr0_to_tdesc_idx (xcr0); - if (idx == X86_TDESC_LAST) - return NULL; + gdb_assert (idx >= 0 && idx < x86_linux_i386_tdesc_count_1 ()); - struct target_desc **tdesc = &i386_tdescs[idx]; + target_desc **tdesc = &i386_tdescs[idx]; - if (*tdesc == NULL) + if (*tdesc == nullptr) { *tdesc = i386_create_target_description (xcr0, true, false); init_target_desc (*tdesc, i386_expedite_regs); } - return *tdesc;; + return *tdesc; } #endif #ifdef __x86_64__ -static target_desc *amd64_tdescs[X86_TDESC_LAST] = { }; -static target_desc *x32_tdescs[X86_TDESC_LAST] = { }; +/* A cache of all possible amd64 target descriptions. */ + +static target_desc *amd64_tdescs[x86_linux_amd64_tdesc_count_1 ()] = { }; + +/* A cache of all possible x32 target descriptions. */ + +static target_desc *x32_tdescs[x86_linux_x32_tdesc_count_1 ()] = { }; + +/* See nat/x86-linux-tdesc.h. */ const struct target_desc * amd64_linux_read_description (uint64_t xcr0, bool is_x32) { - enum x86_linux_tdesc idx = xcr0_to_tdesc_idx (xcr0, is_x32); + if (is_x32) + xcr0 &= x86_linux_x32_tdesc_feature_mask (); + else + xcr0 &= x86_linux_amd64_tdesc_feature_mask (); + + int idx = x86_linux_xcr0_to_tdesc_idx (xcr0); - if (idx == X86_TDESC_LAST) - return NULL; + if (is_x32) + gdb_assert (idx >= 0 && idx < x86_linux_x32_tdesc_count_1 ()); + else + gdb_assert (idx >= 0 && idx < x86_linux_amd64_tdesc_count_1 ()); - struct target_desc **tdesc = NULL; + target_desc **tdesc = nullptr; if (is_x32) tdesc = &x32_tdescs[idx]; else tdesc = &amd64_tdescs[idx]; - if (*tdesc == NULL) + if (*tdesc == nullptr) { *tdesc = amd64_create_target_description (xcr0, is_x32, true, true); @@ -127,39 +309,3 @@ amd64_linux_read_description (uint64_t xcr0, bool is_x32) } #endif - -#ifndef IN_PROCESS_AGENT - -int -i386_get_ipa_tdesc_idx (const struct target_desc *tdesc) -{ - for (int i = 0; i < X86_TDESC_LAST; i++) - { - if (tdesc == i386_tdescs[i]) - return i; - } - - /* If none tdesc is found, return the one with minimum features. */ - return X86_TDESC_MMX; -} - -#if defined __x86_64__ -int -amd64_get_ipa_tdesc_idx (const struct target_desc *tdesc) -{ - for (int i = 0; i < X86_TDESC_LAST; i++) - { - if (tdesc == amd64_tdescs[i]) - return i; - } - for (int i = 0; i < X86_TDESC_LAST; i++) - { - if (tdesc == x32_tdescs[i]) - return i; - } - - return X86_TDESC_SSE; -} - -#endif -#endif diff --git a/gdbserver/linux-x86-tdesc.h b/gdbserver/linux-x86-tdesc.h index 576aaf5e165..3d6e0e51833 100644 --- a/gdbserver/linux-x86-tdesc.h +++ b/gdbserver/linux-x86-tdesc.h @@ -21,29 +21,30 @@ #ifndef GDBSERVER_LINUX_X86_TDESC_H #define GDBSERVER_LINUX_X86_TDESC_H -/* Note: since IPA obviously knows what ABI it's running on (i386 vs x86_64 - vs x32), it's sufficient to pass only the register set here. This, - together with the ABI known at IPA compile time, maps to a tdesc. */ - -enum x86_linux_tdesc { - X86_TDESC_MMX = 0, - X86_TDESC_SSE = 1, - X86_TDESC_AVX = 2, - X86_TDESC_MPX = 3, - X86_TDESC_AVX_MPX = 4, - X86_TDESC_AVX_AVX512 = 5, - X86_TDESC_AVX_MPX_AVX512_PKU = 6, - X86_TDESC_LAST = 7, -}; - -#if defined __i386__ || !defined IN_PROCESS_AGENT -int i386_get_ipa_tdesc_idx (const struct target_desc *tdesc); -#endif - -#if defined __x86_64__ && !defined IN_PROCESS_AGENT -int amd64_get_ipa_tdesc_idx (const struct target_desc *tdesc); -#endif - -const struct target_desc *i386_get_ipa_tdesc (int idx); +/* Convert an xcr0 value into an integer. The integer will be passed to + the in-process-agent where it will then be passed to + x86_linux_tdesc_idx_to_xcr0 to get back the xcr0 value. */ + +extern int x86_linux_xcr0_to_tdesc_idx (uint64_t xcr0); + +#ifdef IN_PROCESS_AGENT + +/* Convert an index number (as returned from x86_linux_xcr0_to_tdesc_idx) + into an xcr0 value which can then be used to create a target + description. */ + +extern uint64_t x86_linux_tdesc_idx_to_xcr0 (int idx); + +/* Within the in-process-agent we need to pre-initialise all of the target + descriptions, to do this we need to know how many target descriptions + there are for each different target type. These functions return the + target description count for the relevant target. */ + +extern int x86_linux_amd64_tdesc_count (); +extern int x86_linux_x32_tdesc_count (); +extern int x86_linux_i386_tdesc_count (); + + +#endif /* IN_PROCESS_AGENT */ #endif /* GDBSERVER_LINUX_X86_TDESC_H */ From patchwork Fri Apr 26 15:01:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Burgess X-Patchwork-Id: 89049 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id A1C173849AC4 for ; Fri, 26 Apr 2024 15:04:36 +0000 (GMT) X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by sourceware.org (Postfix) with ESMTPS id B7FF33849AD0 for ; Fri, 26 Apr 2024 15:02:34 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org B7FF33849AD0 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=redhat.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=redhat.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org B7FF33849AD0 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=170.10.129.124 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1714143756; cv=none; b=BuImyggHMSdxLpsh7lHxPs8+jWL+/n7HL1skbGMPIc2xuLILVi2G0YrV1aP+VX6yEOHrsbtpFcl51T/MuvYfDu3DJg0VQjxJGvIYy57t1Q7rx9bghJNFLcxfWWzxfteWK1qROqwexbVv92jYUP3Ys3AWTy2Qg0E2Z2Dy3Z7lvlM= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1714143756; c=relaxed/simple; bh=jwtmJ3AERcM+yZlyq0wC3FPaIBTZ7cKuFY6EcxW3/y8=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=YiddN/APgflrG87Ed+TORhPE+t5zzafuOWwVRTZrqnOVeNNaP+wAa9PhtvQolFCehyqPsq7gBnFOuE7CCk8umWEdoMoc9KVqnuRsZzYMcVTWsHnqwDD5mP/AEzcMiKrGt/m5d7BUK5udfawNRHa/gmCDtT+4631ek8Kja3nBITQ= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1714143754; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=VvXjm+PoO7xR+CXDNQC+A+vEIkpYKgcRLR719kSMIpo=; b=SkmH9y+jyzWY3z40mQYB6HC5iNSeaebnHMrc76BTGTjbDVFpWIm9zwbYpAm6+KwFSaVuZZ xWbzYzu0H3U3jXx5HMBAGQACPhn71cxqCDAvc+oo4YqT7nACb0Oz5/6p0ZkW1ZfeRWo/FP 4Q783O4DprxB1zwLVCiYaAEJNIaGtaU= Received: from mail-lj1-f198.google.com (mail-lj1-f198.google.com [209.85.208.198]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-679-evhV_PmUM6O3jIuUVJooHg-1; Fri, 26 Apr 2024 11:02:32 -0400 X-MC-Unique: evhV_PmUM6O3jIuUVJooHg-1 Received: by mail-lj1-f198.google.com with SMTP id 38308e7fff4ca-2d87dad1640so20491031fa.3 for ; Fri, 26 Apr 2024 08:02:30 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714143749; x=1714748549; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VvXjm+PoO7xR+CXDNQC+A+vEIkpYKgcRLR719kSMIpo=; b=idKb3NHxWaTssGa36xd/gpGp/dtuVcqC1jvBuiVa1AHjfO8Dy8XAHFsElAdaAVey21 w1aXylNggPeNMd7jnKV3mnygngtBBOWC6cOEOJdKmEn7xzv1U6X1hZyec0nxe5D0mt5y FtmWPBO79vy1WJZR84PJnr1GC3b/o2PXFEifaaP5hoOSLP2WFAzp32IgpbFuE/QwwQ4z tE43ixVYAm80rQidxqFLnZ+JfQo63b4h8qKilS4llxda0+7p0QyqYam6/wHjd8S6PXhI QiImhUJa3LMnvb8g9bc9OyrZF2dy5cacLPyLw8iv8CJ2h5A6//TrI/p/I4uIG4lxvzdm vGew== X-Gm-Message-State: AOJu0Yzhv4gsegVbzG5eLjEDVSB/xJYON97GuUxfLQwGXS6GUY/MM7Ym Kj/ZUUIhVIdK5lvdmaubuG5oo4xj0HHKVX5G2zjNFDM17iElYFB/2HP7CVFlUmzlr4kgsRFlzG4 0EC4JnQHOgyhpZQIYc0xKdCwSNBS+fN3feENoDZnefeEwvKt9Yo8kF3YBAHdnHe5de5dKG0mIS0 tXg//0tn+4JIWiqCRfGBbU58oOnpydljl09caIbvG9ifI= X-Received: by 2002:a2e:a783:0:b0:2de:be5c:5196 with SMTP id c3-20020a2ea783000000b002debe5c5196mr2234152ljf.41.1714143748721; Fri, 26 Apr 2024 08:02:28 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEKcMURKgy5YU5Fo0+QzGY8K/r/5PPZHH4CeBXNQm7dftF3uVGRP9RJo/SnKP7z+r7fn9HImg== X-Received: by 2002:a2e:a783:0:b0:2de:be5c:5196 with SMTP id c3-20020a2ea783000000b002debe5c5196mr2234127ljf.41.1714143748205; Fri, 26 Apr 2024 08:02:28 -0700 (PDT) Received: from localhost (185.223.159.143.dyn.plus.net. [143.159.223.185]) by smtp.gmail.com with ESMTPSA id t15-20020a1c770f000000b0041902ebc85bsm1310742wmi.1.2024.04.26.08.02.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Apr 2024 08:02:26 -0700 (PDT) From: Andrew Burgess To: gdb-patches@sourceware.org Cc: Andrew Burgess , felix.willgerodt@intel.com, John Baldwin Subject: [PATCHv5 10/11] gdb: move xcr0 == 0 check into i386_linux_core_read_description Date: Fri, 26 Apr 2024 16:01:54 +0100 Message-Id: <4c91c9b8910c57ee5f81c76b06f059373dd49c50.1714143669.git.aburgess@redhat.com> X-Mailer: git-send-email 2.25.4 In-Reply-To: References: MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Currently, in i386_linux_core_read_description, if GDB fails to extract an xcr0 value from the core file, then we will have a default zero value for the xcr0 variable, we still call the i386_linux_read_description function, which checks for this zero value and returns nullptr. Back in i386_linux_core_read_description we spot the nullptr return value from i386_linux_read_description and call i386_linux_read_description again, but this time passing a default value for xcr0. In the next commit I plan to rework i386_linux_read_description, and in so doing I will remove the check for xcr0 == 0, this is inline with how the amd64 code is written. However, this means that the 'xcr0 == 0' check needs to move up the stack to i386_linux_core_read_description, again, this brings the i386 code into line with the amd64 code. This is just a refactor in preparation for the next commit, there should be no user visible changes after this commit. --- gdb/i386-linux-tdep.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/gdb/i386-linux-tdep.c b/gdb/i386-linux-tdep.c index 78ebc99d3df..c796f87780b 100644 --- a/gdb/i386-linux-tdep.c +++ b/gdb/i386-linux-tdep.c @@ -714,15 +714,16 @@ i386_linux_core_read_description (struct gdbarch *gdbarch, /* Linux/i386. */ x86_xsave_layout layout; uint64_t xcr0 = i386_linux_core_read_xsave_info (abfd, layout); - const struct target_desc *tdesc = i386_linux_read_description (xcr0); - if (tdesc != NULL) - return tdesc; + if (xcr0 == 0) + { + if (bfd_get_section_by_name (abfd, ".reg-xfp") != nullptr) + xcr0 = X86_XSTATE_SSE_MASK; + else + xcr0 = X86_XSTATE_X87_MASK; + } - if (bfd_get_section_by_name (abfd, ".reg-xfp") != NULL) - return i386_linux_read_description (X86_XSTATE_SSE_MASK); - else - return i386_linux_read_description (X86_XSTATE_X87_MASK); + return i386_linux_read_description (xcr0); } /* Similar to i386_supply_fpregset, but use XSAVE extended state. */ From patchwork Fri Apr 26 15:01:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Burgess X-Patchwork-Id: 89051 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id BB257384AB4D for ; Fri, 26 Apr 2024 15:04:56 +0000 (GMT) X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by sourceware.org (Postfix) with ESMTPS id 4AEB23861001 for ; Fri, 26 Apr 2024 15:02:39 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 4AEB23861001 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=redhat.com Authentication-Results: sourceware.org; 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[143.159.223.185]) by smtp.gmail.com with ESMTPSA id p9-20020a05600c358900b00419f7b73c55sm22956792wmq.0.2024.04.26.08.02.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Apr 2024 08:02:29 -0700 (PDT) From: Andrew Burgess To: gdb-patches@sourceware.org Cc: Andrew Burgess , felix.willgerodt@intel.com, John Baldwin Subject: [PATCHv5 11/11] gdb/gdbserver: share x86/linux tdesc caching Date: Fri, 26 Apr 2024 16:01:55 +0100 Message-Id: X-Mailer: git-send-email 2.25.4 In-Reply-To: References: MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org This commit builds on the previous series of commits to share the target description caching code between GDB and gdbserver for x86/Linux targets. The objective of this commit is to move the four functions (2 each of) i386_linux_read_description and amd64_linux_read_description into the gdb/arch/ directory and combine them so we have just a single copy of each. Then GDB, gdbserver, and the in-process-agent (IPA) will link against these shared functions. It is worth reading the description of the previous commit(s) to see why this merging is not as simple as it seems, but in summary, gdbserver used to generate a different set of possible target descriptions than GDB. The previous commit(s) fixed this, so now it should be simpler to share the functions. One curiosity with this patch is the function x86_linux_post_init_tdesc. On the gdbserver side the two functions amd64_linux_read_description and i386_linux_read_description have some functionality that is not present on the GDB side, that is some additional configuration that is performed as each target description is created to setup the expedited registers. To support this I've added the function x86_linux_post_init_tdesc. This function is called from the two *_linux_read_description functions, but is implemented separately for GDB and gdbserver. An alternative approach that avoids adding x86_linux_post_init_tdesc would be to have x86_linux_tdesc_for_tid return a non-const target description, in x86_target::low_arch_setup we could then inspect the target description to figure out if it is 64-bit or not, and modify the target description as needed. In the end I figured that adding the x86_linux_post_init_tdesc function was good enough, so went with that solution. The contents of gdbserver/linux-x86-low.cc have moved to gdb/arch/x86-linux-tdesc-features.c, and gdbserver/linux-x86-tdesc.h has moved to gdb/arch/x86-linux-tdesc-features.h, this change leads to some updates in the #includes in the gdbserver/ directory. For testing I've done the following: - Built on x86-64 GNU/Linux for all targets, and just for the native target, - Build on i386 GNU/Linux for all targets, and just for the native target, - Build on a 64-bit, non-x86 GNU/Linux for all targets, just for the native target, and for targets x86_64-*-linux and i386-*-linux. This did flush out a bunch of build issues where I'd failed to add a required file in a configure.* file, but I think everything should now be good. --- gdb/Makefile.in | 5 + gdb/amd64-linux-tdep.c | 31 -- gdb/arch/amd64-linux-tdesc.c | 61 ++++ gdb/arch/i386-linux-tdesc.c | 51 +++ gdb/arch/x86-linux-tdesc-features.c | 247 +++++++++++++++ .../arch/x86-linux-tdesc-features.h | 50 +-- gdb/arch/x86-linux-tdesc.h | 37 +++ gdb/configure.nat | 6 +- gdb/configure.tgt | 11 +- gdb/i386-linux-tdep.c | 26 +- gdbserver/configure.srv | 9 + gdbserver/linux-amd64-ipa.cc | 2 +- gdbserver/linux-i386-ipa.cc | 2 +- gdbserver/linux-x86-low.cc | 2 +- gdbserver/linux-x86-tdesc.cc | 292 +----------------- 15 files changed, 469 insertions(+), 363 deletions(-) create mode 100644 gdb/arch/amd64-linux-tdesc.c create mode 100644 gdb/arch/i386-linux-tdesc.c create mode 100644 gdb/arch/x86-linux-tdesc-features.c rename gdbserver/linux-x86-tdesc.h => gdb/arch/x86-linux-tdesc-features.h (52%) create mode 100644 gdb/arch/x86-linux-tdesc.h diff --git a/gdb/Makefile.in b/gdb/Makefile.in index a24b2232daa..1e49ae396f4 100644 --- a/gdb/Makefile.in +++ b/gdb/Makefile.in @@ -748,6 +748,7 @@ ALL_64_TARGET_OBS = \ arch/aarch64-insn.o \ arch/aarch64-mte-linux.o \ arch/aarch64-scalable-linux.o \ + arch/amd64-linux-tdesc.o \ arch/amd64.o \ arch/riscv.o \ bpf-tdep.o \ @@ -788,9 +789,11 @@ ALL_TARGET_OBS = \ arch/arm.o \ arch/arm-get-next-pcs.o \ arch/arm-linux.o \ + arch/i386-linux-tdesc.o \ arch/i386.o \ arch/loongarch.o \ arch/ppc-linux-common.o \ + arch/x86-linux-tdesc-features.o \ arm-bsd-tdep.o \ arm-fbsd-tdep.o \ arm-linux-tdep.o \ @@ -1558,6 +1561,8 @@ HFILES_NO_SRCDIR = \ arch/ppc-linux-common.h \ arch/ppc-linux-tdesc.h \ arch/riscv.h \ + arch/x86-linux-tdesc-features.h \ + arch/x86-linux-tdesc.h \ cli/cli-cmds.h \ cli/cli-decode.h \ cli/cli-script.h \ diff --git a/gdb/amd64-linux-tdep.c b/gdb/amd64-linux-tdep.c index bcb9868e79e..c707745cd9a 100644 --- a/gdb/amd64-linux-tdep.c +++ b/gdb/amd64-linux-tdep.c @@ -1577,37 +1577,6 @@ amd64_linux_record_signal (struct gdbarch *gdbarch, return 0; } -const target_desc * -amd64_linux_read_description (uint64_t xcr0_features_bit, bool is_x32) -{ - static target_desc *amd64_linux_tdescs \ - [2/*AVX*/][2/*MPX*/][2/*AVX512*/][2/*PKRU*/] = {}; - static target_desc *x32_linux_tdescs \ - [2/*AVX*/][2/*AVX512*/][2/*PKRU*/] = {}; - - target_desc **tdesc; - - if (is_x32) - { - tdesc = &x32_linux_tdescs[(xcr0_features_bit & X86_XSTATE_AVX) ? 1 : 0 ] - [(xcr0_features_bit & X86_XSTATE_AVX512) ? 1 : 0] - [(xcr0_features_bit & X86_XSTATE_PKRU) ? 1 : 0]; - } - else - { - tdesc = &amd64_linux_tdescs[(xcr0_features_bit & X86_XSTATE_AVX) ? 1 : 0] - [(xcr0_features_bit & X86_XSTATE_MPX) ? 1 : 0] - [(xcr0_features_bit & X86_XSTATE_AVX512) ? 1 : 0] - [(xcr0_features_bit & X86_XSTATE_PKRU) ? 1 : 0]; - } - - if (*tdesc == NULL) - *tdesc = amd64_create_target_description (xcr0_features_bit, is_x32, - true, true); - - return *tdesc; -} - /* Get Linux/x86 target description from core dump. */ static const struct target_desc * diff --git a/gdb/arch/amd64-linux-tdesc.c b/gdb/arch/amd64-linux-tdesc.c new file mode 100644 index 00000000000..63b5ddfcece --- /dev/null +++ b/gdb/arch/amd64-linux-tdesc.c @@ -0,0 +1,61 @@ +/* Target description related code for GNU/Linux x86-64. + + Copyright (C) 2024 Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ + +#include "arch/x86-linux-tdesc.h" +#include "arch/amd64-linux-tdesc.h" +#include "arch/amd64.h" +#include "arch/x86-linux-tdesc-features.h" + + +/* See arch/amd64-linux-tdesc.h. */ + +const struct target_desc * +amd64_linux_read_description (uint64_t xcr0, bool is_x32) +{ + /* The type used for the amd64 and x32 target description caches. */ + using tdesc_cache_type = std::unordered_map; + + /* Caches for the previously seen amd64 and x32 target descriptions, + indexed by the xcr0 value that created the target description. These + need to be static within this function to ensure they are initialised + before first use. */ + static tdesc_cache_type amd64_tdesc_cache, x32_tdesc_cache; + + tdesc_cache_type &tdesc_cache = is_x32 ? x32_tdesc_cache : amd64_tdesc_cache; + + xcr0 &= is_x32 + ? x86_linux_x32_tdesc_feature_mask () + : x86_linux_amd64_tdesc_feature_mask (); + + const auto it = tdesc_cache.find (xcr0); + if (it != tdesc_cache.end ()) + return it->second.get (); + + /* Create the previously unseen target description. */ + target_desc_up tdesc (amd64_create_target_description (xcr0, is_x32, + true, true)); + x86_linux_post_init_tdesc (tdesc.get (), true); + + /* Add to the cache, and return a pointer borrowed from the + target_desc_up. This is safe as the cache (and the pointers contained + within it) are not deleted until GDB exits. */ + target_desc *ptr = tdesc.get (); + tdesc_cache.emplace (xcr0, std::move (tdesc)); + return ptr; +} diff --git a/gdb/arch/i386-linux-tdesc.c b/gdb/arch/i386-linux-tdesc.c new file mode 100644 index 00000000000..6d1f1793457 --- /dev/null +++ b/gdb/arch/i386-linux-tdesc.c @@ -0,0 +1,51 @@ +/* Target description related code for GNU/Linux i386. + + Copyright (C) 2024 Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ + +#include "arch/x86-linux-tdesc.h" +#include "arch/i386-linux-tdesc.h" +#include "arch/i386.h" +#include "arch/x86-linux-tdesc-features.h" + +/* See arch/i386-linux-tdesc.h. */ + +const target_desc * +i386_linux_read_description (uint64_t xcr0) +{ + /* Cache of previously seen i386 target descriptions, indexed by the xcr0 + value that created the target description. This needs to be static + within this function to ensure it is initialised before first use. */ + static std::unordered_map i386_tdesc_cache; + + xcr0 &= x86_linux_i386_tdesc_feature_mask (); + + const auto it = i386_tdesc_cache.find (xcr0); + if (it != i386_tdesc_cache.end ()) + return it->second.get (); + + /* Create the previously unseen target description. */ + target_desc_up tdesc (i386_create_target_description (xcr0, true, false)); + x86_linux_post_init_tdesc (tdesc.get (), false); + + /* Add to the cache, and return a pointer borrowed from the + target_desc_up. This is safe as the cache (and the pointers contained + within it) are not deleted until GDB exits. */ + target_desc *ptr = tdesc.get (); + i386_tdesc_cache.emplace (xcr0, std::move (tdesc)); + return ptr; +} diff --git a/gdb/arch/x86-linux-tdesc-features.c b/gdb/arch/x86-linux-tdesc-features.c new file mode 100644 index 00000000000..91abd9b1928 --- /dev/null +++ b/gdb/arch/x86-linux-tdesc-features.c @@ -0,0 +1,247 @@ +/* Target description related code for GNU/Linux x86 (i386 and x86-64). + + Copyright (C) 2024 Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ + +#include "arch/x86-linux-tdesc-features.h" + +/* A structure used to describe a single cpu feature that might, or might + not, be checked for when creating a target description for one of i386, + amd64, or x32. */ + +struct x86_tdesc_feature { + /* The cpu feature mask. This is a mask against an xcr0 value. */ + uint64_t feature; + + /* Is this feature checked when creating an i386 target description. */ + bool is_i386; + + /* Is this feature checked when creating an amd64 target description. */ + bool is_amd64; + + /* Is this feature checked when creating an x32 target description. */ + bool is_x32; +}; + +/* A constant table that describes all of the cpu features that are + checked when building a target description for i386, amd64, or x32. */ + +static constexpr x86_tdesc_feature x86_linux_all_tdesc_features[] = { + /* Feature, i386, amd64, x32. */ + { X86_XSTATE_PKRU, true, true, true }, + { X86_XSTATE_AVX512, true, true, true }, + { X86_XSTATE_AVX, true, true, true }, + { X86_XSTATE_MPX, true, true, false }, + { X86_XSTATE_SSE, true, false, false }, + { X86_XSTATE_X87, true, false, false } +}; + +/* Return a compile time constant which is a mask of all the cpu features + that are checked for when building an i386 target description. */ + +static constexpr uint64_t +x86_linux_i386_tdesc_feature_mask_1 () +{ + uint64_t mask = 0; + + for (const auto &entry : x86_linux_all_tdesc_features) + if (entry.is_i386) + mask |= entry.feature; + + return mask; +} + +/* Return a compile time constant which is a mask of all the cpu features + that are checked for when building an amd64 target description. */ + +static constexpr uint64_t +x86_linux_amd64_tdesc_feature_mask_1 () +{ + uint64_t mask = 0; + + for (const auto &entry : x86_linux_all_tdesc_features) + if (entry.is_amd64) + mask |= entry.feature; + + return mask; +} + +/* Return a compile time constant which is a mask of all the cpu features + that are checked for when building an x32 target description. */ + +static constexpr uint64_t +x86_linux_x32_tdesc_feature_mask_1 () +{ + uint64_t mask = 0; + + for (const auto &entry : x86_linux_all_tdesc_features) + if (entry.is_x32) + mask |= entry.feature; + + return mask; +} + +/* See arch/x86-linux-tdesc-features.h. */ + +uint64_t +x86_linux_amd64_tdesc_feature_mask () +{ + return x86_linux_amd64_tdesc_feature_mask_1 (); +} + +/* See arch/x86-linux-tdesc-features.h. */ + +uint64_t +x86_linux_x32_tdesc_feature_mask () +{ + return x86_linux_x32_tdesc_feature_mask_1 (); +} + +/* See arch/x86-linux-tdesc-features.h. */ + +uint64_t +x86_linux_i386_tdesc_feature_mask () +{ + return x86_linux_i386_tdesc_feature_mask_1 (); +} + +#ifdef GDBSERVER + +/* See arch/x86-linux-tdesc-features.h. */ + +int +x86_linux_xcr0_to_tdesc_idx (uint64_t xcr0) +{ + /* The following table shows which features are checked for when creating + the target descriptions (see nat/x86-linux-tdesc.c), the feature order + represents the bit order within the generated index number. + + i386 | x87 sse mpx avx avx512 pkru + amd64 | mpx avx avx512 pkru + i32 | avx avx512 pkru + + The features are ordered so that for each mode (i386, amd64, i32) the + generated index will form a continuous range. */ + + int idx = 0; + + for (int i = 0; i < ARRAY_SIZE (x86_linux_all_tdesc_features); ++i) + { + if ((xcr0 & x86_linux_all_tdesc_features[i].feature) + == x86_linux_all_tdesc_features[i].feature) + idx |= (1 << i); + } + + return idx; +} + +#endif /* GDBSERVER */ + +#ifdef IN_PROCESS_AGENT + +/* Return a compile time constant which is a count of the number of cpu + features that are checked for when building an i386 target description. */ + +static constexpr int +x86_linux_i386_tdesc_count_1 () +{ + uint64_t count = 0; + + for (const auto &entry : x86_linux_all_tdesc_features) + if (entry.is_i386) + ++count; + + gdb_assert (count > 0); + + return (1 << count); +} + +/* Return a compile time constant which is a count of the number of cpu + features that are checked for when building an amd64 target description. */ + +static constexpr int +x86_linux_amd64_tdesc_count_1 () +{ + uint64_t count = 0; + + for (const auto &entry : x86_linux_all_tdesc_features) + if (entry.is_amd64) + ++count; + + gdb_assert (count > 0); + + return (1 << count); +} + +/* Return a compile time constant which is a count of the number of cpu + features that are checked for when building an x32 target description. */ + +static constexpr int +x86_linux_x32_tdesc_count_1 () +{ + uint64_t count = 0; + + for (const auto &entry : x86_linux_all_tdesc_features) + if (entry.is_x32) + ++count; + + gdb_assert (count > 0); + + return (1 << count); +} + +/* See arch/x86-linux-tdesc-features.h. */ + +int +x86_linux_amd64_tdesc_count () +{ + return x86_linux_amd64_tdesc_count_1 (); +} + +/* See arch/x86-linux-tdesc-features.h. */ + +int +x86_linux_x32_tdesc_count () +{ + return x86_linux_x32_tdesc_count_1 (); +} + +/* See arch/x86-linux-tdesc-features.h. */ + +int +x86_linux_i386_tdesc_count () +{ + return x86_linux_i386_tdesc_count_1 (); +} + +/* See arch/x86-linux-tdesc-features.h. */ + +uint64_t +x86_linux_tdesc_idx_to_xcr0 (int idx) +{ + uint64_t xcr0 = 0; + + for (int i = 0; i < ARRAY_SIZE (x86_linux_all_tdesc_features); ++i) + { + if ((idx & (1 << i)) != 0) + xcr0 |= x86_linux_all_tdesc_features[i].feature; + } + + return xcr0; +} + +#endif /* IN_PROCESS_AGENT */ diff --git a/gdbserver/linux-x86-tdesc.h b/gdb/arch/x86-linux-tdesc-features.h similarity index 52% rename from gdbserver/linux-x86-tdesc.h rename to gdb/arch/x86-linux-tdesc-features.h index 3d6e0e51833..0d3db587174 100644 --- a/gdbserver/linux-x86-tdesc.h +++ b/gdb/arch/x86-linux-tdesc-features.h @@ -1,7 +1,6 @@ -/* Low level support for x86 (i386 and x86-64), shared between gdbserver - and IPA. +/* Target description related code for GNU/Linux x86 (i386 and x86-64). - Copyright (C) 2016-2024 Free Software Foundation, Inc. + Copyright (C) 2024 Free Software Foundation, Inc. This file is part of GDB. @@ -18,33 +17,46 @@ You should have received a copy of the GNU General Public License along with this program. If not, see . */ -#ifndef GDBSERVER_LINUX_X86_TDESC_H -#define GDBSERVER_LINUX_X86_TDESC_H +#ifndef ARCH_X86_LINUX_TDESC_FEATURES_H +#define ARCH_X86_LINUX_TDESC_FEATURES_H -/* Convert an xcr0 value into an integer. The integer will be passed to - the in-process-agent where it will then be passed to - x86_linux_tdesc_idx_to_xcr0 to get back the xcr0 value. */ +#include "gdbsupport/x86-xstate.h" +#include "gdbsupport/gdb_assert.h" -extern int x86_linux_xcr0_to_tdesc_idx (uint64_t xcr0); +/* Return a mask of X86_STATE_* feature flags. The returned mask indicates + the set of features which are checked for when creating the target + description for each of amd64, x32, and i386. */ -#ifdef IN_PROCESS_AGENT +extern uint64_t x86_linux_amd64_tdesc_feature_mask (); +extern uint64_t x86_linux_x32_tdesc_feature_mask (); +extern uint64_t x86_linux_i386_tdesc_feature_mask (); -/* Convert an index number (as returned from x86_linux_xcr0_to_tdesc_idx) - into an xcr0 value which can then be used to create a target - description. */ +#ifdef GDBSERVER -extern uint64_t x86_linux_tdesc_idx_to_xcr0 (int idx); +/* Convert an xcr0 value into an integer. The integer will be passed from + gdbserver to the in-process-agent where it will then be passed through + x86_linux_tdesc_idx_to_xcr0 to get back the original xcr0 value. */ + +extern int x86_linux_xcr0_to_tdesc_idx (uint64_t xcr0); -/* Within the in-process-agent we need to pre-initialise all of the target - descriptions, to do this we need to know how many target descriptions - there are for each different target type. These functions return the - target description count for the relevant target. */ +#endif /* GDBSERVER */ + +#ifdef IN_PROCESS_AGENT + +/* Return the maximum possible number of target descriptions for each of + amd64, x32, and i386. These are used by the in-process-agent to + generate every possible target description. */ extern int x86_linux_amd64_tdesc_count (); extern int x86_linux_x32_tdesc_count (); extern int x86_linux_i386_tdesc_count (); +/* Convert an index number (as returned from x86_linux_xcr0_to_tdesc_idx) + into an xcr0 value which can then be used to create a target + description. */ + +extern uint64_t x86_linux_tdesc_idx_to_xcr0 (int idx); #endif /* IN_PROCESS_AGENT */ -#endif /* GDBSERVER_LINUX_X86_TDESC_H */ +#endif /* ARCH_X86_LINUX_TDESC_FEATURES_H */ diff --git a/gdb/arch/x86-linux-tdesc.h b/gdb/arch/x86-linux-tdesc.h new file mode 100644 index 00000000000..152592fcf76 --- /dev/null +++ b/gdb/arch/x86-linux-tdesc.h @@ -0,0 +1,37 @@ +/* Target description related code for GNU/Linux x86 (i386 and x86-64). + + Copyright (C) 2024 Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ + +#ifndef ARCH_X86_LINUX_TDESC_H +#define ARCH_X86_LINUX_TDESC_H + +struct target_desc; + +/* This function is called from amd64_linux_read_description and + i386_linux_read_description after a new target description has been + created, TDESC is the new target description, IS_64BIT will be true + when called from amd64_linux_read_description, otherwise IS_64BIT will + be false. If the *_linux_read_description functions found a cached + target description then this function will not be called. + + Both GDB and gdbserver have their own implementations of this + function. */ + +extern void x86_linux_post_init_tdesc (target_desc *tdesc, bool is_64bit); + +#endif /* ARCH_X86_LINUX_TDESC_H */ diff --git a/gdb/configure.nat b/gdb/configure.nat index 4bcc0696027..24e1824b01c 100644 --- a/gdb/configure.nat +++ b/gdb/configure.nat @@ -256,7 +256,8 @@ case ${gdb_host} in NATDEPFILES="${NATDEPFILES} x86-nat.o nat/x86-dregs.o \ nat/x86-xstate.o \ i386-linux-nat.o x86-linux-nat.o nat/linux-btrace.o \ - nat/x86-linux.o nat/x86-linux-dregs.o nat/x86-linux-tdesc.o" + nat/x86-linux.o nat/x86-linux-dregs.o nat/x86-linux-tdesc.o \ + arch/i386-linux-tdesc.o arch/x86-linux-tdesc-features.o" ;; ia64) # Host: Intel IA-64 running GNU/Linux @@ -323,7 +324,8 @@ case ${gdb_host} in nat/x86-xstate.o amd64-nat.o amd64-linux-nat.o x86-linux-nat.o \ nat/linux-btrace.o \ nat/x86-linux.o nat/x86-linux-dregs.o nat/x86-linux-tdesc.o \ - nat/amd64-linux-siginfo.o" + nat/amd64-linux-siginfo.o arch/x86-linux-tdesc-features.o \ + arch/i386-linux-tdesc.o arch/amd64-linux-tdesc.o" ;; sparc) # Host: GNU/Linux UltraSPARC diff --git a/gdb/configure.tgt b/gdb/configure.tgt index 47a674201f9..8326c458eb1 100644 --- a/gdb/configure.tgt +++ b/gdb/configure.tgt @@ -320,10 +320,13 @@ i[34567]86-*-linux*) gdb_target_obs="i386-linux-tdep.o \ glibc-tdep.o \ solib-svr4.o symfile-mem.o \ - linux-tdep.o linux-record.o" + linux-tdep.o linux-record.o \ + arch/i386-linux-tdesc.o \ + arch/x86-linux-tdesc-features.o" if test "x$enable_64_bit_bfd" = "xyes"; then # Target: GNU/Linux x86-64 - gdb_target_obs="amd64-linux-tdep.o ${gdb_target_obs}" + gdb_target_obs="amd64-linux-tdep.o \ + arch/amd64-linux-tdesc.o ${gdb_target_obs}" fi ;; i[34567]86-*-gnu*) @@ -718,7 +721,9 @@ x86_64-*-linux*) # Target: GNU/Linux x86-64 gdb_target_obs="amd64-linux-tdep.o ${i386_tobjs} \ i386-linux-tdep.o glibc-tdep.o \ - solib-svr4.o symfile-mem.o linux-tdep.o linux-record.o" + solib-svr4.o symfile-mem.o linux-tdep.o linux-record.o \ + arch/i386-linux-tdesc.o arch/amd64-linux-tdesc.o \ + arch/x86-linux-tdesc-features.o" ;; x86_64-*-freebsd* | x86_64-*-kfreebsd*-gnu) # Target: FreeBSD/amd64 diff --git a/gdb/i386-linux-tdep.c b/gdb/i386-linux-tdep.c index c796f87780b..d4d820b9f98 100644 --- a/gdb/i386-linux-tdep.c +++ b/gdb/i386-linux-tdep.c @@ -40,6 +40,7 @@ #include "i387-tdep.h" #include "gdbsupport/x86-xstate.h" #include "arch/i386-linux-tdesc.h" +#include "arch/x86-linux-tdesc.h" /* The syscall's XML filename for i386. */ #define XML_SYSCALL_FILENAME_I386 "syscalls/i386-linux.xml" @@ -679,29 +680,12 @@ i386_linux_core_read_x86_xsave_layout (struct gdbarch *gdbarch, layout) != 0; } -/* See i386-linux-tdep.h. */ +/* See arch/x86-linux-tdesc.h. */ -const struct target_desc * -i386_linux_read_description (uint64_t xcr0) +void +x86_linux_post_init_tdesc (target_desc *tdesc, bool is_64bit) { - if (xcr0 == 0) - return NULL; - - static struct target_desc *i386_linux_tdescs \ - [2/*X87*/][2/*SSE*/][2/*AVX*/][2/*MPX*/][2/*AVX512*/][2/*PKRU*/] = {}; - struct target_desc **tdesc; - - tdesc = &i386_linux_tdescs[(xcr0 & X86_XSTATE_X87) ? 1 : 0] - [(xcr0 & X86_XSTATE_SSE) ? 1 : 0] - [(xcr0 & X86_XSTATE_AVX) ? 1 : 0] - [(xcr0 & X86_XSTATE_MPX) ? 1 : 0] - [(xcr0 & X86_XSTATE_AVX512) ? 1 : 0] - [(xcr0 & X86_XSTATE_PKRU) ? 1 : 0]; - - if (*tdesc == NULL) - *tdesc = i386_create_target_description (xcr0, true, false); - - return *tdesc; + /* Nothing. */ } /* Get Linux/x86 target description from core dump. */ diff --git a/gdbserver/configure.srv b/gdbserver/configure.srv index 7a2702d78bf..e17b5cf280c 100644 --- a/gdbserver/configure.srv +++ b/gdbserver/configure.srv @@ -110,12 +110,16 @@ case "${gdbserver_host}" in srv_tgtobj="${srv_tgtobj} nat/x86-linux.o" srv_tgtobj="${srv_tgtobj} nat/x86-linux-dregs.o" srv_tgtobj="${srv_tgtobj} nat/x86-linux-tdesc.o" + srv_tgtobj="${srv_tgtobj} arch/x86-linux-tdesc-features.o" + srv_tgtobj="${srv_tgtobj} arch/i386-linux-tdesc.o" srv_linux_usrregs=yes srv_linux_regsets=yes srv_linux_thread_db=yes srv_linux_btrace=yes ipa_obj="linux-i386-ipa.o linux-x86-tdesc-ipa.o" ipa_obj="${ipa_obj} arch/i386-ipa.o" + ipa_obj="${ipa_obj} arch/x86-linux-tdesc-features-ipa.o" + ipa_obj="${ipa_obj} arch/i386-linux-tdesc-ipa.o" ;; i[34567]86-*-mingw*) srv_regobj="" srv_tgtobj="x86-low.o nat/x86-dregs.o win32-low.o" @@ -374,12 +378,17 @@ case "${gdbserver_host}" in srv_tgtobj="${srv_tgtobj} nat/x86-linux-dregs.o" srv_tgtobj="${srv_tgtobj} nat/x86-linux-tdesc.o" srv_tgtobj="${srv_tgtobj} nat/amd64-linux-siginfo.o" + srv_tgtobj="${srv_tgtobj} arch/x86-linux-tdesc-features.o" + srv_tgtobj="${srv_tgtobj} arch/amd64-linux-tdesc.o" + srv_tgtobj="${srv_tgtobj} arch/i386-linux-tdesc.o" srv_linux_usrregs=yes # This is for i386 progs. srv_linux_regsets=yes srv_linux_thread_db=yes srv_linux_btrace=yes ipa_obj="linux-amd64-ipa.o linux-x86-tdesc-ipa.o" ipa_obj="${ipa_obj} arch/amd64-ipa.o" + ipa_obj="${ipa_obj} arch/x86-linux-tdesc-features-ipa.o" + ipa_obj="${ipa_obj} arch/amd64-linux-tdesc-ipa.o" ;; x86_64-*-mingw*) srv_regobj="" srv_tgtobj="x86-low.o nat/x86-dregs.o" diff --git a/gdbserver/linux-amd64-ipa.cc b/gdbserver/linux-amd64-ipa.cc index 0c80812cc6f..89857f208b8 100644 --- a/gdbserver/linux-amd64-ipa.cc +++ b/gdbserver/linux-amd64-ipa.cc @@ -20,9 +20,9 @@ #include #include "tracepoint.h" -#include "linux-x86-tdesc.h" #include "gdbsupport/x86-xstate.h" #include "arch/amd64-linux-tdesc.h" +#include "arch/x86-linux-tdesc-features.h" /* fast tracepoints collect registers. */ diff --git a/gdbserver/linux-i386-ipa.cc b/gdbserver/linux-i386-ipa.cc index c1c3152fb04..8100c9f9840 100644 --- a/gdbserver/linux-i386-ipa.cc +++ b/gdbserver/linux-i386-ipa.cc @@ -20,9 +20,9 @@ #include #include "tracepoint.h" -#include "linux-x86-tdesc.h" #include "gdbsupport/x86-xstate.h" #include "arch/i386-linux-tdesc.h" +#include "arch/x86-linux-tdesc-features.h" /* GDB register numbers. */ diff --git a/gdbserver/linux-x86-low.cc b/gdbserver/linux-x86-low.cc index 6e23a53118b..b089e818211 100644 --- a/gdbserver/linux-x86-low.cc +++ b/gdbserver/linux-x86-low.cc @@ -33,6 +33,7 @@ #endif #include "arch/i386-linux-tdesc.h" +#include "arch/x86-linux-tdesc-features.h" #include "gdb_proc_service.h" /* Don't include elf/common.h if linux/elf.h got included by @@ -48,7 +49,6 @@ #include "nat/linux-nat.h" #include "nat/x86-linux.h" #include "nat/x86-linux-dregs.h" -#include "linux-x86-tdesc.h" #include "nat/x86-linux-tdesc.h" #ifdef __x86_64__ diff --git a/gdbserver/linux-x86-tdesc.cc b/gdbserver/linux-x86-tdesc.cc index 5e12526bf17..13c80762605 100644 --- a/gdbserver/linux-x86-tdesc.cc +++ b/gdbserver/linux-x86-tdesc.cc @@ -17,295 +17,19 @@ You should have received a copy of the GNU General Public License along with this program. If not, see . */ +#include "arch/x86-linux-tdesc.h" #include "tdesc.h" -#include "linux-x86-tdesc.h" -#include "arch/i386.h" -#include "gdbsupport/x86-xstate.h" -#ifdef __x86_64__ -#include "arch/amd64.h" -#include "arch/amd64-linux-tdesc.h" -#endif #include "x86-tdesc.h" -#include "arch/i386-linux-tdesc.h" - -/* A structure used to describe a single cpu feature that might, or might - not, be checked for when creating a target description for one of i386, - amd64, or x32. */ - -struct x86_tdesc_feature { - /* The cpu feature mask. This is a mask against an xcr0 value. */ - uint64_t feature; - - /* Is this feature checked when creating an i386 target description. */ - bool is_i386; - - /* Is this feature checked when creating an amd64 target description. */ - bool is_amd64; - - /* Is this feature checked when creating an x32 target description. */ - bool is_x32; -}; - -/* A constant table that describes all of the cpu features that are - checked when building a target description for i386, amd64, or x32. */ - -static constexpr x86_tdesc_feature x86_linux_all_tdesc_features[] = { - /* Feature, i386, amd64, x32. */ - { X86_XSTATE_PKRU, true, true, true }, - { X86_XSTATE_AVX512, true, true, true }, - { X86_XSTATE_AVX, true, true, true }, - { X86_XSTATE_MPX, true, true, false }, - { X86_XSTATE_SSE, true, false, false }, - { X86_XSTATE_X87, true, false, false } -}; - -/* Return a compile time constant which is a mask of all the cpu features - that are checked for when building an i386 target description. */ - -static constexpr uint64_t -x86_linux_i386_tdesc_feature_mask () -{ - uint64_t mask = 0; - - for (const auto &entry : x86_linux_all_tdesc_features) - if (entry.is_i386) - mask |= entry.feature; - - return mask; -} - -/* Return a compile time constant which is a mask of all the cpu features - that are checked for when building an amd64 target description. */ - -static constexpr uint64_t -x86_linux_amd64_tdesc_feature_mask () -{ - uint64_t mask = 0; - - for (const auto &entry : x86_linux_all_tdesc_features) - if (entry.is_amd64) - mask |= entry.feature; - - return mask; -} -/* Return a compile time constant which is a mask of all the cpu features - that are checked for when building an x32 target description. */ +/* See arch/x86-linux-tdesc.h. */ -static constexpr uint64_t -x86_linux_x32_tdesc_feature_mask () +void +x86_linux_post_init_tdesc (target_desc *tdesc, bool is_64bit) { - uint64_t mask = 0; - - for (const auto &entry : x86_linux_all_tdesc_features) - if (entry.is_x32) - mask |= entry.feature; - - return mask; -} - -/* Return a compile time constant which is a count of the number of cpu - features that are checked for when building an i386 target description. */ - -static constexpr int -x86_linux_i386_tdesc_count_1 () -{ - uint64_t count = 0; - - for (const auto &entry : x86_linux_all_tdesc_features) - if (entry.is_i386) - ++count; - - gdb_assert (count > 0); - - return (1 << count); -} - -/* Return a compile time constant which is a count of the number of cpu - features that are checked for when building an amd64 target description. */ - -static constexpr int -x86_linux_amd64_tdesc_count_1 () -{ - uint64_t count = 0; - - for (const auto &entry : x86_linux_all_tdesc_features) - if (entry.is_amd64) - ++count; - - gdb_assert (count > 0); - - return (1 << count); -} - -/* Return a compile time constant which is a count of the number of cpu - features that are checked for when building an x32 target description. */ - -static constexpr int -x86_linux_x32_tdesc_count_1 () -{ - uint64_t count = 0; - - for (const auto &entry : x86_linux_all_tdesc_features) - if (entry.is_x32) - ++count; - - gdb_assert (count > 0); - - return (1 << count); -} - -#ifdef IN_PROCESS_AGENT - -/* See linux-x86-tdesc.h. */ - -int -x86_linux_amd64_tdesc_count () -{ - return x86_linux_amd64_tdesc_count_1 (); -} - -/* See linux-x86-tdesc.h. */ - -int -x86_linux_x32_tdesc_count () -{ - return x86_linux_x32_tdesc_count_1 (); -} - -/* See linux-x86-tdesc.h. */ - -int -x86_linux_i386_tdesc_count () -{ - return x86_linux_i386_tdesc_count_1 (); -} - -#endif /* IN_PROCESS_AGENT */ - -/* Convert an xcr0 value into an integer. The integer will be passed to - the in-process-agent where it will then be passed to - x86_linux_tdesc_idx_to_xcr0 to get back the xcr0 value. */ - -int -x86_linux_xcr0_to_tdesc_idx (uint64_t xcr0) -{ - /* The following table shows which features are checked for when creating - the target descriptions (see nat/x86-linux-tdesc.c), the feature order - represents the bit order within the generated index number. - - i386 | x87 sse mpx avx avx512 pkru - amd64 | mpx avx avx512 pkru - i32 | avx avx512 pkru - - The features are ordered so that for each mode (i386, amd64, i32) the - generated index will form a continuous range. */ - - int idx = 0; - - for (int i = 0; i < ARRAY_SIZE (x86_linux_all_tdesc_features); ++i) - { - if ((xcr0 & x86_linux_all_tdesc_features[i].feature) - == x86_linux_all_tdesc_features[i].feature) - idx |= (1 << i); - } - - return idx; -} - - -#ifdef IN_PROCESS_AGENT - -/* Convert an index number (as returned from x86_linux_xcr0_to_tdesc_idx) - into an xcr0 value which can then be used to create a target - description. */ - -uint64_t -x86_linux_tdesc_idx_to_xcr0 (int idx) -{ - uint64_t xcr0 = 0; - - for (int i = 0; i < ARRAY_SIZE (x86_linux_all_tdesc_features); ++i) - { - if ((idx & (1 << i)) != 0) - xcr0 |= x86_linux_all_tdesc_features[i].feature; - } - - return xcr0; -} - -#endif /* IN_PROCESS_AGENT */ - -#if defined __i386__ || !defined IN_PROCESS_AGENT - -/* A cache of all possible i386 target descriptions. */ - -static struct target_desc *i386_tdescs[x86_linux_i386_tdesc_count_1 ()] = { }; - -/* See nat/x86-linux-tdesc.h. */ - -const struct target_desc * -i386_linux_read_description (uint64_t xcr0) -{ - xcr0 &= x86_linux_i386_tdesc_feature_mask (); - int idx = x86_linux_xcr0_to_tdesc_idx (xcr0); - - gdb_assert (idx >= 0 && idx < x86_linux_i386_tdesc_count_1 ()); - - target_desc **tdesc = &i386_tdescs[idx]; - - if (*tdesc == nullptr) - { - *tdesc = i386_create_target_description (xcr0, true, false); - - init_target_desc (*tdesc, i386_expedite_regs); - } - - return *tdesc; -} -#endif - #ifdef __x86_64__ - -/* A cache of all possible amd64 target descriptions. */ - -static target_desc *amd64_tdescs[x86_linux_amd64_tdesc_count_1 ()] = { }; - -/* A cache of all possible x32 target descriptions. */ - -static target_desc *x32_tdescs[x86_linux_x32_tdesc_count_1 ()] = { }; - -/* See nat/x86-linux-tdesc.h. */ - -const struct target_desc * -amd64_linux_read_description (uint64_t xcr0, bool is_x32) -{ - if (is_x32) - xcr0 &= x86_linux_x32_tdesc_feature_mask (); + if (is_64bit) + init_target_desc (tdesc, amd64_expedite_regs); else - xcr0 &= x86_linux_amd64_tdesc_feature_mask (); - - int idx = x86_linux_xcr0_to_tdesc_idx (xcr0); - - if (is_x32) - gdb_assert (idx >= 0 && idx < x86_linux_x32_tdesc_count_1 ()); - else - gdb_assert (idx >= 0 && idx < x86_linux_amd64_tdesc_count_1 ()); - - target_desc **tdesc = nullptr; - - if (is_x32) - tdesc = &x32_tdescs[idx]; - else - tdesc = &amd64_tdescs[idx]; - - if (*tdesc == nullptr) - { - *tdesc = amd64_create_target_description (xcr0, is_x32, true, true); - - init_target_desc (*tdesc, amd64_expedite_regs); - } - return *tdesc; -} - #endif + init_target_desc (tdesc, i386_expedite_regs); +}