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Lu" X-Patchwork-Id: 82299 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id BF7DB38618EF for ; Sat, 16 Dec 2023 16:54:10 +0000 (GMT) X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mail-pg1-x52e.google.com (mail-pg1-x52e.google.com [IPv6:2607:f8b0:4864:20::52e]) by sourceware.org (Postfix) with ESMTPS id 960F0385C409 for ; Sat, 16 Dec 2023 16:53:30 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 960F0385C409 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 960F0385C409 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2607:f8b0:4864:20::52e ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702745612; cv=none; b=c6brq4glcm43G0nZXOGB4Y7rept26fdp1XASt+CWBXxT13mdyG1Q7XpZ7Ak78+TlB43XgA7nBqeQZBCcw9DjHhnL0DbxcK0TZ/2Gp+rT3HxDTBJLab+/iLsYCXNjm29VX+n/5hYwhdvBGnyO1AlipzOSV0olhNT+4fQfxeojW/U= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702745612; c=relaxed/simple; bh=H4KfFPd84bQXsI8GrhD6soEt0+Vey8+mtaA3pb8NwX0=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=RXggYuPm4P6KNBvE30WFqdnQKBxVmw0cVVfDZuw2abXUCp2M2ofq+0QxJ4sxkOHz6cSmy4czclQqcJMOambVv0vhqhueC1O9UtDspKofp5Ey2ycBqtnQmpfmUrOpLEuq5UNbMuWNsUQ48EVXT3zGYJYBEIuwIe8RPk03jiG9Vk4= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-pg1-x52e.google.com with SMTP id 41be03b00d2f7-5c690c3d113so1387606a12.1 for ; Sat, 16 Dec 2023 08:53:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1702745609; x=1703350409; darn=sourceware.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qU8FFPMXeWsyvUwHHn3NNVq2DBg1l1VNH0MbIVzlRaY=; b=RrQ/aMwXo1gqoKsgFSyOYBbbXH1tqp+M7CDNuCiy1QopegKDzBCZiNo7WcIg4AvEd5 vTLg9mu/9HIXD8R4aKDHqMtGb5ZdkVWy/GYcrgZiPeSRzSAYdps2jsKakrriR7/nSkjh pGw6qdsqOJAhRRRAUnGdtlWO53YZNGVi6AmDcFe/ztaaIRKfIQu2DXPZRGSb/7DmRuVZ 1ViBHKneg0iAyYskDeLMVV6cCjaVWJwMQ3sdEEFjanFBbarWyu8ohPn9hpQGH8AO8RQo HtsObkoP/X+STWL2q582eBjXKN4W5PPgn3uYZD0SlAa6D9w8hcFvQnCZTc97CMaCG/pr t/Uw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702745609; x=1703350409; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qU8FFPMXeWsyvUwHHn3NNVq2DBg1l1VNH0MbIVzlRaY=; b=M3joqJlWIel6RFRwfJByZxxifr7OcVYAO38ybYAZnUe/71NcRZcZSqt1mCgxecjtKB FGubodwjZ9FIRz6p8FEs8BNWhL55qAsW+5rtFMFf6bqsSbXld+GoRkp5pKf6uKqUfak+ fNTsgDPbISjPwRvCFl5jrmWfzklkvEuPeytxjNm2c+MwbBm26XmHkiMdtc655npBRgNk 22a/xD6Pgfd1oYysm6huI4bwjjCp8CKNmVUrZQtN7P+ec3p61Gqi5pzF4oIsJflNPJW9 YjliyO0gOjqxR6E0+wsrTl75JXcFJbUah2VdJ2Jk8/WPlBuHhlbH/W1cztaiEs1JKI/e Oi4g== X-Gm-Message-State: AOJu0YxtnpmNS2c70eyRmBcjmQ29tU+N4FJiGFFQSUJ2zoYVfQDMz77r csQ1TMGzeQlHYuFzG78YOBVuEGCNCTg= X-Google-Smtp-Source: AGHT+IEDijFR2i3mmL7hRvKbFNZxhR/tf3hu4PHSE3Ibny8cylR8wQQWK3gQgTUxlW2yJeDDoF9d6A== X-Received: by 2002:a05:6a20:144d:b0:18f:97c:614f with SMTP id a13-20020a056a20144d00b0018f097c614fmr17392780pzi.76.1702745609406; Sat, 16 Dec 2023 08:53:29 -0800 (PST) Received: from gnu-cfl-3.localdomain ([172.59.129.147]) by smtp.gmail.com with ESMTPSA id f21-20020a056a00239500b006ce57f2a254sm15244204pfc.209.2023.12.16.08.53.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Dec 2023 08:53:27 -0800 (PST) Received: from gnu-cfl-3.. (localhost [IPv6:::1]) by gnu-cfl-3.localdomain (Postfix) with ESMTP id 58D3274041E; Sat, 16 Dec 2023 08:53:25 -0800 (PST) From: "H.J. Lu" To: libc-alpha@sourceware.org Cc: rick.p.edgecombe@intel.com Subject: [PATCH v2 01/16] x86/cet: Check user_shstk in /proc/cpuinfo Date: Sat, 16 Dec 2023 08:53:10 -0800 Message-ID: <20231216165325.2584919-2-hjl.tools@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231216165325.2584919-1-hjl.tools@gmail.com> References: <20231216165325.2584919-1-hjl.tools@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-3024.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Linux kernel reports CPU shadow stack feature in /proc/cpuinfo as user_shstk, instead of shstk. --- sysdeps/x86/tst-cpu-features-cpuinfo.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sysdeps/x86/tst-cpu-features-cpuinfo.c b/sysdeps/x86/tst-cpu-features-cpuinfo.c index 18d64375ca..1d6c647b70 100644 --- a/sysdeps/x86/tst-cpu-features-cpuinfo.c +++ b/sysdeps/x86/tst-cpu-features-cpuinfo.c @@ -246,7 +246,7 @@ do_test (int argc, char **argv) fails += CHECK_PROC (sgx, SGX); fails += CHECK_PROC (sgx_lc, SGX_LC); fails += CHECK_PROC (sha_ni, SHA); - fails += CHECK_PROC (shstk, SHSTK); + fails += CHECK_PROC (user_shstk, SHSTK); fails += CHECK_PROC (smap, SMAP); fails += CHECK_PROC (smep, SMEP); fails += CHECK_PROC (smx, SMX); From patchwork Sat Dec 16 16:53:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 82301 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 4E7D53864844 for ; Sat, 16 Dec 2023 16:54:44 +0000 (GMT) X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mail-pf1-x42a.google.com (mail-pf1-x42a.google.com [IPv6:2607:f8b0:4864:20::42a]) by sourceware.org (Postfix) with ESMTPS id E7516385C41B for ; Sat, 16 Dec 2023 16:53:30 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org E7516385C41B Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org E7516385C41B Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2607:f8b0:4864:20::42a ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702745613; cv=none; b=umHUrN2V3v9x5oxWSYF9eykxEMivrh9suH+Rtn2ejsItJtBO0NZpxC+81pVskK08TDKe1xifF+NR7Nf3Y57Oq0NI+/YJqx1OC8ql5n2ck0I0/wOiod7Rhw60KSEKfxdnLubVyRA4mr+IoMz9hZ7nsEt22sY8rwTv7S6livc+Ogk= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702745613; c=relaxed/simple; bh=jxW/SkrVn18D8mOS3FpGySqq7q/7HGgXbFvR43enobU=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=dd6VT2S5vml6OeTw04YLBaXUQ+8FVDNDEG8QPuEArv9FEv7GgFsyjPb91kNcTkWioXP8nfwoTBetlP+7UYz3J4ORiZwL+Sa70wb1+YCSoGc+CrrGBCHKJhGpoTp6Xi4D2B+9j/RehwsE9DY/xUcBO58j4QnTlR4GXVUalWwsKiY= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-pf1-x42a.google.com with SMTP id d2e1a72fcca58-6cea2a38b48so1611155b3a.3 for ; Sat, 16 Dec 2023 08:53:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1702745610; x=1703350410; darn=sourceware.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qMvtHogobq6JlLL5ALFhdAK3OmuMdJlleYsUArs3zhg=; b=Y1vwKhLPFk8bqXayy5O/BhdCeHzKgqelcteYX7iELTvU/OS5LcCP4rRm5gX4IYZ2V6 2rgF9Y1Wz7NqFDuTDb1lzZXJQDd42P0T2XkjYqW7Wa2jE5PxDwFmEY6ED3KlXSaiTG8q MrV6AmuiDysrJM6HZEQGDTFwuzUdT/QCeCVUOQhL+eWL4+TgRlpyzK2nBP1n1uUR9/L/ 9arzCVqTMjsHLIzYyxNlgDW3Fz6qGqIXugrBa11J1uS0PZbFR3Ae9/2voH/KilKT/ft1 rVHdsfEQ2WMvHnG7o+yhmCjR1GpqOjqVkFd4gvk7CbMohw2rRuOFq54CGP/I8Ny+MyS2 32Vw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702745610; x=1703350410; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qMvtHogobq6JlLL5ALFhdAK3OmuMdJlleYsUArs3zhg=; b=dxaplNl90/U6VVIKXVAJU0W7CG1lsy0p6N3gw1srPZwHw9cQyUo0SP8NeTqL/xNSx8 oxhml0XJ6cyo0SsXn10sSk1ANdJtBmIfcqoPjjnB4JVZOtk1pUU3lXixwoVuXJhtFnfi Pcw3gBWXy10SjjwYlXaIoiM/Z8U2l5h9IpPuEcIfy5Fg22WVFChgk4fKjETy6mOciWzW KfrPzlaLESaemE7VuPmYunrgf4rlxNKugabzVnFKy1H5CGbEDJO7vaPguBOr6MgtQGwn gk83IuX41eE8ddrAo3+G9vqUX3+ry6K7pqcaUtlynOWEMfwxPxP8lwUoqs5FvvEwDagD Eztg== X-Gm-Message-State: AOJu0YwwH9WdMjohZu7C2ac0QXKXjdFrayrCycNiWyOADEJXfl02mSGx fTNXEdzOtT8wco1l3HvVHpo= X-Google-Smtp-Source: AGHT+IHmhuxr05UPthpjpf285zsNsbyah1sTmwWcX/vQ+tzyKoVLMpb4I+4AdFhIHlNe2ulfWV592Q== X-Received: by 2002:a05:6a00:8cb:b0:6ce:2731:e868 with SMTP id s11-20020a056a0008cb00b006ce2731e868mr16194286pfu.47.1702745609719; Sat, 16 Dec 2023 08:53:29 -0800 (PST) Received: from gnu-cfl-3.localdomain ([172.59.129.147]) by smtp.gmail.com with ESMTPSA id n8-20020a654508000000b005c65fcca22csm13009263pgq.85.2023.12.16.08.53.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Dec 2023 08:53:27 -0800 (PST) Received: from gnu-cfl-3.. (localhost [IPv6:::1]) by gnu-cfl-3.localdomain (Postfix) with ESMTP id 63F6D74061E; Sat, 16 Dec 2023 08:53:25 -0800 (PST) From: "H.J. Lu" To: libc-alpha@sourceware.org Cc: rick.p.edgecombe@intel.com Subject: [PATCH v2 02/16] x86/cet: Update tst-cet-vfork-1 Date: Sat, 16 Dec 2023 08:53:11 -0800 Message-ID: <20231216165325.2584919-3-hjl.tools@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231216165325.2584919-1-hjl.tools@gmail.com> References: <20231216165325.2584919-1-hjl.tools@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-3024.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_NUMSUBJECT, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Change tst-cet-vfork-1.c to verify that vfork child return triggers SIGSEGV due to shadow stack mismatch. --- sysdeps/unix/sysv/linux/x86/tst-cet-vfork-1.c | 43 ++++++++----------- 1 file changed, 17 insertions(+), 26 deletions(-) diff --git a/sysdeps/unix/sysv/linux/x86/tst-cet-vfork-1.c b/sysdeps/unix/sysv/linux/x86/tst-cet-vfork-1.c index 9c4b6f4d42..c92ed9e737 100644 --- a/sysdeps/unix/sysv/linux/x86/tst-cet-vfork-1.c +++ b/sysdeps/unix/sysv/linux/x86/tst-cet-vfork-1.c @@ -18,34 +18,26 @@ . */ #include -#include #include #include #include #include #include #include -#include -#include __attribute__ ((noclone, noinline)) static void do_test_1 (void) { pid_t p1; - int fd[2]; - if (pipe (fd) == -1) - { - puts ("pipe failed"); - _exit (EXIT_FAILURE); - } + /* NB: Since child return pops shadow stack which is shared with + parent, child must not return after vfork. */ if ((p1 = vfork ()) == 0) { - pid_t p = getpid (); - TEMP_FAILURE_RETRY (write (fd[1], &p, sizeof (p))); - /* Child return should trigger SIGSEGV. */ + /* Child return should trigger SIGSEGV due to shadow stack + mismatch. */ return; } else if (p1 == -1) @@ -54,22 +46,22 @@ do_test_1 (void) _exit (EXIT_FAILURE); } - pid_t p2 = 0; - if (TEMP_FAILURE_RETRY (read (fd[0], &p2, sizeof (pid_t))) - != sizeof (pid_t)) - puts ("pipd read failed"); - else + int r; + if (TEMP_FAILURE_RETRY (waitpid (p1, &r, 0)) != p1) { - int r; - if (TEMP_FAILURE_RETRY (waitpid (p1, &r, 0)) != p1) - puts ("waitpid failed"); - else if (r != 0) - puts ("pip write in child failed"); + puts ("waitpid failed"); + _exit (EXIT_FAILURE); + } + + if (!WIFSIGNALED (r) || WTERMSIG (r) != SIGSEGV) + { + puts ("Child not terminated with SIGSEGV"); + _exit (EXIT_FAILURE); } /* Parent exits immediately so that parent returns without triggering - SIGSEGV when shadow stack isn't in use. */ - _exit (EXIT_FAILURE); + SIGSEGV when shadow stack is in use. */ + _exit (EXIT_SUCCESS); } static int @@ -80,9 +72,8 @@ do_test (void) return EXIT_UNSUPPORTED; do_test_1 (); /* Child exits immediately so that child returns without triggering - SIGSEGV when shadow stack isn't in use. */ + SIGSEGV when shadow stack is in use. */ _exit (EXIT_FAILURE); } -#define EXPECTED_SIGNAL (_get_ssp () == 0 ? 0 : SIGSEGV) #include From patchwork Sat Dec 16 16:53:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 82298 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 961A6384CBB1 for ; Sat, 16 Dec 2023 16:53:45 +0000 (GMT) X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mail-oo1-xc2d.google.com (mail-oo1-xc2d.google.com [IPv6:2607:f8b0:4864:20::c2d]) by sourceware.org (Postfix) with ESMTPS id B467A385AE54 for ; Sat, 16 Dec 2023 16:53:28 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org B467A385AE54 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org B467A385AE54 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2607:f8b0:4864:20::c2d ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702745610; cv=none; b=pAzzlNPDWrO2YrIB3ZXBYiYnkp6fOHxJ4MSeNFUCMzUAxlz0Vomrq3tMwrd41k0gJ2E1ypnIIH6tTCGL7eT7v7ldwcjeNHBVh3TZQzSCoB6x6OIRa7upTlB1wxZYXivsqH1fIgyZ3xEhpF1dJzYsJ//1tg8K4Bzw+MPAZH0PNXw= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702745610; c=relaxed/simple; bh=cnrWcTPwUalVeqTdLBteuaKuorK+oegrb+xM9H1KHaQ=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=aFI4IsmTgYwxhuQ9wS72wa3XteqQy+ZwFVy4omxEE3FZgyUQa4bZtIviJVHbnvq2GzlmgP3U7H+ei4qKPT8AcWQrAMXZ5EL+A0Y5Hb/+I7W8B2cn4KQbcX82l6QfFMlDS8b4iaxCbh+s82VCZDPJqLkh0fPZWN7YtBzc0Wfey2c= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-oo1-xc2d.google.com with SMTP id 006d021491bc7-591bc0f8467so376858eaf.1 for ; Sat, 16 Dec 2023 08:53:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1702745608; x=1703350408; darn=sourceware.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=RSN7kt8i3AWfo3iwC9EJUME3CnJ/sRnJMGrjihNbaok=; b=jW5IQYYuZ1x4kZKKDOhGwm4+BJMFV0PSl4aGOsPRxla79x5ovZlw7csEcCqKVXGam2 MdIT+fRxXzbqBufZ6FgtNeUOlTaw5DkvbzfktsdFTFj3cOgm/SeHJoUVV2hfqvy6FvTB HpkkJvCkY6YsVSWaj7xMDQn+LKpzL+OvYf+6r5ZFhy2dtGyTw6QUhQCc1daRXRzVA7Jj oDD7ZnIOBjmS4M69xD4EQ8ZDka0GMkXbP2C2OcAH190Pq56N/4V5gp3PaV7sg7LIpv70 HPkq5HxCj6FOTntOtIxX9NGXHvV7+1BEDE/ieZNWJNzYtuIajbnxP4AY/zRRj42EjgIv u9Og== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702745608; x=1703350408; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=RSN7kt8i3AWfo3iwC9EJUME3CnJ/sRnJMGrjihNbaok=; b=d1/XXJfqKtK4qb/X35X4GGsIo38GDvgcy26yj2TspNrYlxnKyJpmGggJHlDNbPvJGg 5Kvms0Of1iDJVw0rw8fSDu/Ubg9WCqdQSHdh54L0SXQpGjnFhH/F4VMxr7mumk8eiUqT VhZ4QHdt7zq/943HZRa4nk0qxSzOkWN2L0Nrk0VCqraQ/WA5XL21HYRGlwidrEt/GAni iBfZN6CG6N5e30UdR6n6AvsAoJ3XsJus3nJhmn5979HVPNAfI59+zYBdGhI3UCDotkJI 1Kj4sRnIkuWO+2G3u/H4R2cr02Kg5GiBVahSfkMLJ8tID9uX0CW1bJAjOTd9UkZF88Cf 7c8w== X-Gm-Message-State: AOJu0YzrKM7MgXz0/ntGR0HdqFoX0TIZfKGAX64igoIEydSbB1sj7oiF CVVLELOJLrPCwxCkXkrisppFfBbPcHE= X-Google-Smtp-Source: AGHT+IHE+Z7HwmMLbWF+cS0xhcdSBliTajH5XIO7l3vboH6iFq+OTb6GYJqk+U7Jwg0aBs3NLh8BBg== X-Received: by 2002:a05:6359:2d96:b0:170:17ea:f4e8 with SMTP id rn22-20020a0563592d9600b0017017eaf4e8mr10220112rwb.53.1702745607819; Sat, 16 Dec 2023 08:53:27 -0800 (PST) Received: from gnu-cfl-3.localdomain ([172.59.129.147]) by smtp.gmail.com with ESMTPSA id d21-20020a170902c19500b001d368c778d1sm5039001pld.213.2023.12.16.08.53.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Dec 2023 08:53:26 -0800 (PST) Received: from gnu-cfl-3.. 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Lu" To: libc-alpha@sourceware.org Cc: rick.p.edgecombe@intel.com Subject: [PATCH v2 03/16] x86/cet: Don't assume that SHSTK implies IBT Date: Sat, 16 Dec 2023 08:53:12 -0800 Message-ID: <20231216165325.2584919-4-hjl.tools@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231216165325.2584919-1-hjl.tools@gmail.com> References: <20231216165325.2584919-1-hjl.tools@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-3024.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Since shadow stack (SHSTK) is enabled in the Linux kernel without enabling indirect branch tracking (IBT), don't assume that SHSTK implies IBT. Use "CPU_FEATURE_ACTIVE (IBT)" to check if IBT is active and "CPU_FEATURE_ACTIVE (SHSTK)" to check if SHSTK is active. --- sysdeps/x86/Makefile | 1 - sysdeps/x86/tst-cet-legacy-10.c | 6 +++--- sysdeps/x86/tst-cet-legacy-8.c | 15 ++++++++------- 3 files changed, 11 insertions(+), 11 deletions(-) diff --git a/sysdeps/x86/Makefile b/sysdeps/x86/Makefile index 5631a59a26..3d936ed537 100644 --- a/sysdeps/x86/Makefile +++ b/sysdeps/x86/Makefile @@ -209,7 +209,6 @@ CFLAGS-tst-cet-legacy-mod-6a.c += -fcf-protection=branch CFLAGS-tst-cet-legacy-mod-6b.c += -fcf-protection CFLAGS-tst-cet-legacy-mod-6c.c += -fcf-protection CFLAGS-tst-cet-legacy-7.c += -fcf-protection=none -CFLAGS-tst-cet-legacy-8.c += -mshstk CFLAGS-tst-cet-legacy-10.c += -mshstk CFLAGS-tst-cet-legacy-10-static.c += -mshstk diff --git a/sysdeps/x86/tst-cet-legacy-10.c b/sysdeps/x86/tst-cet-legacy-10.c index a85cdc3171..ae2c34de3e 100644 --- a/sysdeps/x86/tst-cet-legacy-10.c +++ b/sysdeps/x86/tst-cet-legacy-10.c @@ -21,19 +21,19 @@ #include #include -/* Check that CPU_FEATURE_ACTIVE on IBT and SHSTK matches _get_ssp. */ +/* Check that CPU_FEATURE_ACTIVE on SHSTK matches _get_ssp. */ static int do_test (void) { if (_get_ssp () != 0) { - if (CPU_FEATURE_ACTIVE (IBT) && CPU_FEATURE_ACTIVE (SHSTK)) + if (CPU_FEATURE_ACTIVE (SHSTK)) return EXIT_SUCCESS; } else { - if (!CPU_FEATURE_ACTIVE (IBT) && !CPU_FEATURE_ACTIVE (SHSTK)) + if (!CPU_FEATURE_ACTIVE (SHSTK)) return EXIT_SUCCESS; } diff --git a/sysdeps/x86/tst-cet-legacy-8.c b/sysdeps/x86/tst-cet-legacy-8.c index 5d8d9ba7dc..77d77a5408 100644 --- a/sysdeps/x86/tst-cet-legacy-8.c +++ b/sysdeps/x86/tst-cet-legacy-8.c @@ -18,7 +18,7 @@ #include #include -#include +#include #include #include #include @@ -29,11 +29,6 @@ static int do_test (void) { - /* NB: This test should trigger SIGSEGV on CET platforms. If SHSTK - is disabled, assuming IBT is also disabled. */ - if (_get_ssp () == 0) - return EXIT_UNSUPPORTED; - void (*funcp) (void); funcp = xmmap (NULL, 0x1000, PROT_EXEC | PROT_READ | PROT_WRITE, MAP_ANONYMOUS | MAP_PRIVATE, -1); @@ -41,8 +36,14 @@ do_test (void) /* Write RET instruction. */ *(char *) funcp = 0xc3; funcp (); + + /* NB: This test should trigger SIGSEGV when IBT is active. We should + reach here if IBT isn't active. */ + if (!CPU_FEATURE_ACTIVE (IBT)) + return EXIT_UNSUPPORTED; + return EXIT_FAILURE; } -#define EXPECTED_SIGNAL (_get_ssp () == 0 ? 0 : SIGSEGV) +#define EXPECTED_SIGNAL (CPU_FEATURE_ACTIVE (IBT) ? SIGSEGV : 0) #include From patchwork Sat Dec 16 16:53:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. 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(localhost [IPv6:::1]) by gnu-cfl-3.localdomain (Postfix) with ESMTP id 7AB5474062E; Sat, 16 Dec 2023 08:53:25 -0800 (PST) From: "H.J. Lu" To: libc-alpha@sourceware.org Cc: rick.p.edgecombe@intel.com Subject: [PATCH v2 04/16] x86/cet: Check legacy shadow stack applications Date: Sat, 16 Dec 2023 08:53:13 -0800 Message-ID: <20231216165325.2584919-5-hjl.tools@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231216165325.2584919-1-hjl.tools@gmail.com> References: <20231216165325.2584919-1-hjl.tools@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-3024.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Add tests to verify that legacy shadow stack applications run properly when shadow stack is enabled in Linux kernel. --- sysdeps/x86/Makefile | 23 ++++++++++++++ sysdeps/x86/tst-shstk-legacy-1-extra.S | 35 ++++++++++++++++++++++ sysdeps/x86/tst-shstk-legacy-1a-static.c | 1 + sysdeps/x86/tst-shstk-legacy-1a.c | 32 ++++++++++++++++++++ sysdeps/x86/tst-shstk-legacy-1b-static.c | 1 + sysdeps/x86/tst-shstk-legacy-1b.c | 38 ++++++++++++++++++++++++ 6 files changed, 130 insertions(+) create mode 100644 sysdeps/x86/tst-shstk-legacy-1-extra.S create mode 100644 sysdeps/x86/tst-shstk-legacy-1a-static.c create mode 100644 sysdeps/x86/tst-shstk-legacy-1a.c create mode 100644 sysdeps/x86/tst-shstk-legacy-1b-static.c create mode 100644 sysdeps/x86/tst-shstk-legacy-1b.c diff --git a/sysdeps/x86/Makefile b/sysdeps/x86/Makefile index 3d936ed537..a41598adf9 100644 --- a/sysdeps/x86/Makefile +++ b/sysdeps/x86/Makefile @@ -162,6 +162,21 @@ tests-static += \ tst-cet-legacy-10-static \ # tests-static tst-cet-legacy-1a-ARGS = -- $(host-test-program-cmd) + +tests += \ + tst-shstk-legacy-1a \ + tst-shstk-legacy-1a-static \ + tst-shstk-legacy-1b \ + tst-shstk-legacy-1b-static \ +# tests +tests-static += \ + tst-shstk-legacy-1a-static \ + tst-shstk-legacy-1b-static \ +# tests-static +extra-objs += \ + tst-shstk-legacy-1-extra.o \ +# extra-objs + tests += \ tst-cet-legacy-4a \ tst-cet-legacy-4b \ @@ -212,6 +227,9 @@ CFLAGS-tst-cet-legacy-7.c += -fcf-protection=none CFLAGS-tst-cet-legacy-10.c += -mshstk CFLAGS-tst-cet-legacy-10-static.c += -mshstk +CFLAGS-tst-shstk-legacy-1a.c += -fcf-protection=none +CFLAGS-tst-shstk-legacy-1a-static.c += -fcf-protection=none + $(objpfx)tst-cet-legacy-1: $(objpfx)tst-cet-legacy-mod-1.so \ $(objpfx)tst-cet-legacy-mod-2.so $(objpfx)tst-cet-legacy-1a: $(objpfx)tst-cet-legacy-mod-1.so \ @@ -244,6 +262,11 @@ $(objpfx)tst-cet-legacy-6b.out: $(objpfx)tst-cet-legacy-mod-6a.so \ tst-cet-legacy-6b-ENV = GLIBC_TUNABLES=glibc.cpu.hwcaps=-IBT,-SHSTK tst-cet-legacy-9-ENV = GLIBC_TUNABLES=glibc.cpu.hwcaps=-IBT,-SHSTK tst-cet-legacy-9-static-ENV = GLIBC_TUNABLES=glibc.cpu.hwcaps=-IBT,-SHSTK + +$(objpfx)tst-shstk-legacy-1a: $(objpfx)tst-shstk-legacy-1-extra.o +$(objpfx)tst-shstk-legacy-1a-static: $(objpfx)tst-shstk-legacy-1-extra.o +$(objpfx)tst-shstk-legacy-1b: $(objpfx)tst-shstk-legacy-1-extra.o +$(objpfx)tst-shstk-legacy-1b-static: $(objpfx)tst-shstk-legacy-1-extra.o endif # Add -fcf-protection to CFLAGS when CET is enabled. diff --git a/sysdeps/x86/tst-shstk-legacy-1-extra.S b/sysdeps/x86/tst-shstk-legacy-1-extra.S new file mode 100644 index 0000000000..f3adb9f639 --- /dev/null +++ b/sysdeps/x86/tst-shstk-legacy-1-extra.S @@ -0,0 +1,35 @@ +/* Legacy shadow stack code. + Copyright (C) 2023 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + + .text + .globl legacy + .type legacy, @function +legacy: + .cfi_startproc +#ifdef __x86_64__ + movq (%rsp), %rax + addq $8, %rsp + jmp *%rax +#else + movl (%esp), %eax + addl $4, %esp + jmp *%eax +#endif + .cfi_endproc + .size legacy, .-legacy + .section .note.GNU-stack,"",@progbits diff --git a/sysdeps/x86/tst-shstk-legacy-1a-static.c b/sysdeps/x86/tst-shstk-legacy-1a-static.c new file mode 100644 index 0000000000..dd549890a0 --- /dev/null +++ b/sysdeps/x86/tst-shstk-legacy-1a-static.c @@ -0,0 +1 @@ +#include "tst-shstk-legacy-1a.c" diff --git a/sysdeps/x86/tst-shstk-legacy-1a.c b/sysdeps/x86/tst-shstk-legacy-1a.c new file mode 100644 index 0000000000..c6f5810838 --- /dev/null +++ b/sysdeps/x86/tst-shstk-legacy-1a.c @@ -0,0 +1,32 @@ +/* Check that legacy shadow stack code won't trigger segfault. + Copyright (C) 2023 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include +#include + +/* Check that legacy shadow stack code won't trigger segfault. */ +extern void legacy (void); + +static int +do_test (void) +{ + legacy (); + return EXIT_SUCCESS; +} + +#include diff --git a/sysdeps/x86/tst-shstk-legacy-1b-static.c b/sysdeps/x86/tst-shstk-legacy-1b-static.c new file mode 100644 index 0000000000..4945344675 --- /dev/null +++ b/sysdeps/x86/tst-shstk-legacy-1b-static.c @@ -0,0 +1 @@ +#include "tst-shstk-legacy-1b.c" diff --git a/sysdeps/x86/tst-shstk-legacy-1b.c b/sysdeps/x86/tst-shstk-legacy-1b.c new file mode 100644 index 0000000000..05231e60ae --- /dev/null +++ b/sysdeps/x86/tst-shstk-legacy-1b.c @@ -0,0 +1,38 @@ +/* Check that legacy shadow stack code will trigger segfault. + Copyright (C) 2023 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include +#include +#include +#include + +/* Check that legacy shadow stack code will trigger segfault. */ +extern void legacy (void); + +static int +do_test (void) +{ + if (!CPU_FEATURE_ACTIVE (SHSTK)) + return EXIT_UNSUPPORTED; + + legacy (); + return EXIT_FAILURE; +} + +#define EXPECTED_SIGNAL (CPU_FEATURE_ACTIVE (SHSTK) ? SIGSEGV : 0) +#include From patchwork Sat Dec 16 16:53:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. 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(localhost [IPv6:::1]) by gnu-cfl-3.localdomain (Postfix) with ESMTP id 85A68740633; Sat, 16 Dec 2023 08:53:25 -0800 (PST) From: "H.J. Lu" To: libc-alpha@sourceware.org Cc: rick.p.edgecombe@intel.com Subject: [PATCH v2 05/16] x86/cet: Check CPU_FEATURE_ACTIVE when CET is disabled Date: Sat, 16 Dec 2023 08:53:14 -0800 Message-ID: <20231216165325.2584919-6-hjl.tools@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231216165325.2584919-1-hjl.tools@gmail.com> References: <20231216165325.2584919-1-hjl.tools@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-3024.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Verify that CPU_FEATURE_ACTIVE (SHSTK) works properly when CET is disabled. --- sysdeps/x86/Makefile | 5 +++++ sysdeps/x86/tst-cet-legacy-10a-static.c | 2 ++ sysdeps/x86/tst-cet-legacy-10a.c | 2 ++ 3 files changed, 9 insertions(+) create mode 100644 sysdeps/x86/tst-cet-legacy-10a-static.c create mode 100644 sysdeps/x86/tst-cet-legacy-10a.c diff --git a/sysdeps/x86/Makefile b/sysdeps/x86/Makefile index a41598adf9..23f3ac1430 100644 --- a/sysdeps/x86/Makefile +++ b/sysdeps/x86/Makefile @@ -156,10 +156,13 @@ tests += \ tst-cet-legacy-9-static \ tst-cet-legacy-10 \ tst-cet-legacy-10-static \ + tst-cet-legacy-10a \ + tst-cet-legacy-10a-static \ # tests tests-static += \ tst-cet-legacy-9-static \ tst-cet-legacy-10-static \ + tst-cet-legacy-10a-static \ # tests-static tst-cet-legacy-1a-ARGS = -- $(host-test-program-cmd) @@ -226,6 +229,8 @@ CFLAGS-tst-cet-legacy-mod-6c.c += -fcf-protection CFLAGS-tst-cet-legacy-7.c += -fcf-protection=none CFLAGS-tst-cet-legacy-10.c += -mshstk CFLAGS-tst-cet-legacy-10-static.c += -mshstk +CFLAGS-tst-cet-legacy-10a.c += -fcf-protection=none +CFLAGS-tst-cet-legacy-10a-static.c += -fcf-protection=none CFLAGS-tst-shstk-legacy-1a.c += -fcf-protection=none CFLAGS-tst-shstk-legacy-1a-static.c += -fcf-protection=none diff --git a/sysdeps/x86/tst-cet-legacy-10a-static.c b/sysdeps/x86/tst-cet-legacy-10a-static.c new file mode 100644 index 0000000000..05073a5d1e --- /dev/null +++ b/sysdeps/x86/tst-cet-legacy-10a-static.c @@ -0,0 +1,2 @@ +#pragma GCC target ("shstk") +#include "tst-cet-legacy-10.c" diff --git a/sysdeps/x86/tst-cet-legacy-10a.c b/sysdeps/x86/tst-cet-legacy-10a.c new file mode 100644 index 0000000000..05073a5d1e --- /dev/null +++ b/sysdeps/x86/tst-cet-legacy-10a.c @@ -0,0 +1,2 @@ +#pragma GCC target ("shstk") +#include "tst-cet-legacy-10.c" From patchwork Sat Dec 16 16:53:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 82302 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 8EAB138618EF for ; Sat, 16 Dec 2023 16:54:59 +0000 (GMT) X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mail-oi1-x231.google.com (mail-oi1-x231.google.com [IPv6:2607:f8b0:4864:20::231]) by sourceware.org (Postfix) with ESMTPS id D7F66385C6C4 for ; Sat, 16 Dec 2023 16:53:31 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org D7F66385C6C4 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org D7F66385C6C4 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2607:f8b0:4864:20::231 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702745613; cv=none; b=aKh/1LeIlWlFj/YAcfl4zqvADSCTwQcJWNzg4Vr5ZHvyW+HJK2yN92eXFurTt5Ku5ijou4/A6s7za+cD6eB0PKCvt0LdJa1gu5xfqtLHh4nRxvAxc6i/W2UV6dhFzS5VN6JjKBNP+QdlVNXyp+FykaAXpQNeIPJa3fxdtR4JOfo= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702745613; c=relaxed/simple; bh=xuNW3G7fIcT5/riJEpyWSbNPrY0kfZDOrGhb6n5v9+k=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=i0MEvqgLmdxuq6QVKVTOTAvsvzdZSy4HU2xaiurMwLAU3oioj+/uKgd1+KkILFoBKuVma0dvkMwVsA1vKsReh2qhrwOrB0zPmBrDKOABdOzn59o9HAaq+h8X+Vjb3/l40A8ID3b8fg8LTpEkUr7CtHWefNf7zojEYFRXkF+csm8= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-oi1-x231.google.com with SMTP id 5614622812f47-3b9e07690ccso1267590b6e.3 for ; Sat, 16 Dec 2023 08:53:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1702745611; x=1703350411; darn=sourceware.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3uS4E9Itb6cZf7tnzps0O+lBjyy0WZr+iDAMZLzhkys=; b=Ogzo29TVSAFoZvqZ7JEkDV2hY7P/D+wC2UbR2oTj35Ej/EYa3sFDUWVd7zVrWVEsHU 32TsYo5TSqqr+47y7XGDkYa9wIV/jpgLDGPr+wdxOaVZ9AOKbZgcV1qCfQhixzefEAOp DxpQagpSCY1tUK5qyFG0cyr2sopbvNEllHt0S3GNexvxqmcbFiFmquUgv5J9fidzxB2H Da+nbH1moDWMeBQJoJ+htPu7KY9/cnM0oYkQKxYgK8S4jXKieqXLc2hc1IAEfvGAJ9Uo KnLGw6TabxxIl0IjmQUmJQOoSwYG1BJyODDHc/ew22RWFZCaxkRo4i61I+WfL68uqb3+ fIDg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702745611; x=1703350411; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3uS4E9Itb6cZf7tnzps0O+lBjyy0WZr+iDAMZLzhkys=; b=EbBH7k0F6vPOGwboZoIQm9l5Keb1PFxsIp4k0+JFcqxWMG4ztaBvsUwSvOOl2k3lBQ NECuafXfp1aqYRMm82n+K+tQZI9YMLidBG2V46H+I/Y52Gn5AtZEmCUc2bZW6+2WeMUn vNWqX7zWiex2FSOVD63nhvd778zGAxM4dUmEnUty7PO4m1Glf/h9TW2ILsVAEO9saSK0 qGhTzy4ldzlrEozfaFuwRcIiRY+k3TM1b6d50bRI6UxfvMhMnyOnQDvkrqp7IOEkLg3L Jv9kIjxwQHd8b1IyfxHL+G6PBTJcsw4kVkLcah3aIvPGi5qdTLFFWp+GY2CByIAUSMyR HEOg== X-Gm-Message-State: AOJu0YyHVyoJTao2zaoHPb3TArakHo8l4Xx3Uk4EkySvVpm8s1fDo+AQ kkypnxOYL2bbCk606qllTVxnVOg/6IM= X-Google-Smtp-Source: AGHT+IHlwo0I+iFMZOKXD8pnCj9FP1vac4Xd8a0VwFMCdZSWp3g2PxG9FgTH1TFgZmKym+rmOJQhvw== X-Received: by 2002:a05:6808:16aa:b0:3b9:f0f5:93c6 with SMTP id bb42-20020a05680816aa00b003b9f0f593c6mr15043576oib.41.1702745611104; Sat, 16 Dec 2023 08:53:31 -0800 (PST) Received: from gnu-cfl-3.localdomain ([172.59.129.147]) by smtp.gmail.com with ESMTPSA id y17-20020aa78551000000b006d0d4c87ccasm6517202pfn.159.2023.12.16.08.53.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Dec 2023 08:53:29 -0800 (PST) Received: from gnu-cfl-3.. (localhost [IPv6:::1]) by gnu-cfl-3.localdomain (Postfix) with ESMTP id 903D0740634; Sat, 16 Dec 2023 08:53:25 -0800 (PST) From: "H.J. Lu" To: libc-alpha@sourceware.org Cc: rick.p.edgecombe@intel.com Subject: [PATCH v2 06/16] x86/cet: Add tests for GLIBC_TUNABLES=glibc.cpu.hwcaps=-SHSTK Date: Sat, 16 Dec 2023 08:53:15 -0800 Message-ID: <20231216165325.2584919-7-hjl.tools@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231216165325.2584919-1-hjl.tools@gmail.com> References: <20231216165325.2584919-1-hjl.tools@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-3024.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Verify that GLIBC_TUNABLES=glibc.cpu.hwcaps=-SHSTK turns off shadow stack properly. --- sysdeps/x86/Makefile | 7 +++++++ sysdeps/x86/tst-shstk-legacy-1c-static.c | 1 + sysdeps/x86/tst-shstk-legacy-1c.c | 20 ++++++++++++++++++++ 3 files changed, 28 insertions(+) create mode 100644 sysdeps/x86/tst-shstk-legacy-1c-static.c create mode 100644 sysdeps/x86/tst-shstk-legacy-1c.c diff --git a/sysdeps/x86/Makefile b/sysdeps/x86/Makefile index 23f3ac1430..b857ad6ea6 100644 --- a/sysdeps/x86/Makefile +++ b/sysdeps/x86/Makefile @@ -171,10 +171,13 @@ tests += \ tst-shstk-legacy-1a-static \ tst-shstk-legacy-1b \ tst-shstk-legacy-1b-static \ + tst-shstk-legacy-1c \ + tst-shstk-legacy-1c-static \ # tests tests-static += \ tst-shstk-legacy-1a-static \ tst-shstk-legacy-1b-static \ + tst-shstk-legacy-1c-static \ # tests-static extra-objs += \ tst-shstk-legacy-1-extra.o \ @@ -272,6 +275,10 @@ $(objpfx)tst-shstk-legacy-1a: $(objpfx)tst-shstk-legacy-1-extra.o $(objpfx)tst-shstk-legacy-1a-static: $(objpfx)tst-shstk-legacy-1-extra.o $(objpfx)tst-shstk-legacy-1b: $(objpfx)tst-shstk-legacy-1-extra.o $(objpfx)tst-shstk-legacy-1b-static: $(objpfx)tst-shstk-legacy-1-extra.o +tst-shstk-legacy-1c-ENV = GLIBC_TUNABLES=glibc.cpu.hwcaps=-SHSTK +tst-shstk-legacy-1c-static-ENV = GLIBC_TUNABLES=glibc.cpu.hwcaps=-SHSTK +$(objpfx)tst-shstk-legacy-1c: $(objpfx)tst-shstk-legacy-1-extra.o +$(objpfx)tst-shstk-legacy-1c-static: $(objpfx)tst-shstk-legacy-1-extra.o endif # Add -fcf-protection to CFLAGS when CET is enabled. diff --git a/sysdeps/x86/tst-shstk-legacy-1c-static.c b/sysdeps/x86/tst-shstk-legacy-1c-static.c new file mode 100644 index 0000000000..91ea346aaf --- /dev/null +++ b/sysdeps/x86/tst-shstk-legacy-1c-static.c @@ -0,0 +1 @@ +#include "tst-shstk-legacy-1c.c" diff --git a/sysdeps/x86/tst-shstk-legacy-1c.c b/sysdeps/x86/tst-shstk-legacy-1c.c new file mode 100644 index 0000000000..eb218c6c70 --- /dev/null +++ b/sysdeps/x86/tst-shstk-legacy-1c.c @@ -0,0 +1,20 @@ +/* Check that legacy shadow stack code won't trigger segfault with + GLIBC_TUNABLES=glibc.cpu.hwcaps=-SHSTK + Copyright (C) 2023 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include "tst-shstk-legacy-1a.c" From patchwork Sat Dec 16 16:53:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 82306 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 176E7384DEEB for ; Sat, 16 Dec 2023 16:55:59 +0000 (GMT) X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mail-oa1-x34.google.com (mail-oa1-x34.google.com [IPv6:2001:4860:4864:20::34]) by sourceware.org (Postfix) with ESMTPS id 758B9384DEC1 for ; Sat, 16 Dec 2023 16:53:33 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 758B9384DEC1 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 758B9384DEC1 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2001:4860:4864:20::34 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702745616; cv=none; b=hwwycnzPANubuWQ9OYdeJ8wuV3v2rZ7mg8sEwkIqHXEUYhCpyMObbWZx/n3j4taYqw/9OP+2IiqfZVhr+1O4qRhAnnW8iU8dNh60hBalmpknwMiVbgfCrtCpuzhCgLrgqOnRPwC+IVwDAtZhF7mKqtrp77rGTEu73dGtK1RXmwc= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702745616; c=relaxed/simple; bh=p0ZvOuSbimM4SXK4ym/ijQ8GVPKpRo/etkx+gFf9180=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=W8RRYA95lBRCvKdhE/F3NNBVhkUAH3mAwSlR+7BTSkLQ4g4cxt81nzkuSVk9yETvhduJnIPWtUoheQRLLRzraA+O4QSXDdnvh2fwLuZZOVBOdjTZNsC6M151gzc/S3R9Lypa74UPuPRRduJREMmtHzhh5ux0qHj6XxvGK7+20rE= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-oa1-x34.google.com with SMTP id 586e51a60fabf-20292b5ca69so1251328fac.1 for ; Sat, 16 Dec 2023 08:53:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1702745613; x=1703350413; darn=sourceware.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=I1gQhLrx+72hDagwU5yD+beh7Wl47Kji5NmNxux6+wc=; b=ltP/QLEbJcwQKOm8OY2moZqyMqhXyQFsHCqHTVdeNF8nhVb86HxVg9q2tygEEU9468 5XUbwlEaSLnU6SbSd/bG/GKMngm2yhjtTD381MJxU7xUVJm6o4/JzidoKkLvUAqqCXvz nZeyS2ARd2pZlPIFNdx/wlv9t3eDKDFZR9JqoThpRG/G0u8gwATNLW5r0GzDWhWQK+Sa oSvJ9A+FcGZO9zdUbFkmeVszilcgjD44rAW4ZWZOkGhhp/j7bc1YCPQkovBG4WHbTLW4 q9Ny6bYuQhMG2T9dpzpA9IuD54mljn9ULEWceMiME8NVEA+dyXHGtAu2bIdlI+1zBRHd sOQA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702745613; x=1703350413; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=I1gQhLrx+72hDagwU5yD+beh7Wl47Kji5NmNxux6+wc=; b=DytpcBVlJ1s3YmYf6x1x9YD4FGEmoCcJh+AC3fdkW+LNdi0roZaTj1Uwx5U+jFMuA2 LvVIYV5ZfHJgSsJ83tkWoODPubuqOlMpWHIXOIxIhdSkhQvJzqkc0rrsfC8027hQPGO3 2T2zv6Kj7zcttG31yo/j+hrVxH17ialjK0QDDcgZ3OE8UjzwOm+riRY23DtAGxspEp1K yuZnn97Sio9LONAStp0kqArEuh5Git59UYtuxXVKGRKhIcjR85XJ30FnAGwa45G/XWhy n3+/mG8hu2Hp9jRXrmsSBHHwzTiZdCDOyNVIwJ5O82rBvhYXlo9U/76B4W7Mz8S4M0I+ DUdA== X-Gm-Message-State: AOJu0Yzj5wZGIT2vkccCocqPZqMmoF2b2DDAAhMuu8MEzS4vFiM9vgiM VjWUfVSiP7Iwopsh7TxJr7TU3xQkg2c= X-Google-Smtp-Source: AGHT+IFCXr7XfzA6iqLJfl8ofKUhq61o3N+ctjIfNNOfFD+p69IbamVU6ovTi1Kjt7qDr06RsIkQIw== X-Received: by 2002:a05:6870:f155:b0:1fb:412:c2eb with SMTP id l21-20020a056870f15500b001fb0412c2ebmr16419552oac.50.1702745612662; Sat, 16 Dec 2023 08:53:32 -0800 (PST) Received: from gnu-cfl-3.localdomain ([172.59.129.147]) by smtp.gmail.com with ESMTPSA id q4-20020a63e944000000b0058ee60f8e4dsm15029843pgj.34.2023.12.16.08.53.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Dec 2023 08:53:29 -0800 (PST) Received: from gnu-cfl-3.. (localhost [IPv6:::1]) by gnu-cfl-3.localdomain (Postfix) with ESMTP id 9B80E740635; Sat, 16 Dec 2023 08:53:25 -0800 (PST) From: "H.J. Lu" To: libc-alpha@sourceware.org Cc: rick.p.edgecombe@intel.com Subject: [PATCH v2 07/16] x86/cet: Check legacy shadow stack code in .init_array section Date: Sat, 16 Dec 2023 08:53:16 -0800 Message-ID: <20231216165325.2584919-8-hjl.tools@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231216165325.2584919-1-hjl.tools@gmail.com> References: <20231216165325.2584919-1-hjl.tools@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-3024.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Verify that legacy shadow stack code in .init_array section in application and shared library, which are marked as shadow stack enabled, will trigger segfault. --- sysdeps/x86/Makefile | 36 +++++++++++++++ sysdeps/x86/tst-shstk-legacy-1d-static.c | 1 + sysdeps/x86/tst-shstk-legacy-1d.c | 47 ++++++++++++++++++++ sysdeps/x86/tst-shstk-legacy-1e-static.c | 1 + sysdeps/x86/tst-shstk-legacy-1e-static.sh | 32 ++++++++++++++ sysdeps/x86/tst-shstk-legacy-1e.c | 53 +++++++++++++++++++++++ sysdeps/x86/tst-shstk-legacy-1e.sh | 34 +++++++++++++++ sysdeps/x86/tst-shstk-legacy-1f.c | 29 +++++++++++++ sysdeps/x86/tst-shstk-legacy-1g.c | 35 +++++++++++++++ sysdeps/x86/tst-shstk-legacy-1g.sh | 34 +++++++++++++++ sysdeps/x86/tst-shstk-legacy-mod-1.c | 28 ++++++++++++ 11 files changed, 330 insertions(+) create mode 100644 sysdeps/x86/tst-shstk-legacy-1d-static.c create mode 100644 sysdeps/x86/tst-shstk-legacy-1d.c create mode 100644 sysdeps/x86/tst-shstk-legacy-1e-static.c create mode 100755 sysdeps/x86/tst-shstk-legacy-1e-static.sh create mode 100644 sysdeps/x86/tst-shstk-legacy-1e.c create mode 100755 sysdeps/x86/tst-shstk-legacy-1e.sh create mode 100644 sysdeps/x86/tst-shstk-legacy-1f.c create mode 100644 sysdeps/x86/tst-shstk-legacy-1g.c create mode 100755 sysdeps/x86/tst-shstk-legacy-1g.sh create mode 100644 sysdeps/x86/tst-shstk-legacy-mod-1.c diff --git a/sysdeps/x86/Makefile b/sysdeps/x86/Makefile index b857ad6ea6..1bf6ff9e11 100644 --- a/sysdeps/x86/Makefile +++ b/sysdeps/x86/Makefile @@ -173,11 +173,22 @@ tests += \ tst-shstk-legacy-1b-static \ tst-shstk-legacy-1c \ tst-shstk-legacy-1c-static \ + tst-shstk-legacy-1d \ + tst-shstk-legacy-1d-static \ + tst-shstk-legacy-1e \ + tst-shstk-legacy-1e-static \ + tst-shstk-legacy-1f \ + tst-shstk-legacy-1g \ # tests +modules-names += \ + tst-shstk-legacy-mod-1 \ +# modules-names tests-static += \ tst-shstk-legacy-1a-static \ tst-shstk-legacy-1b-static \ tst-shstk-legacy-1c-static \ + tst-shstk-legacy-1d-static \ + tst-shstk-legacy-1e-static \ # tests-static extra-objs += \ tst-shstk-legacy-1-extra.o \ @@ -237,6 +248,9 @@ CFLAGS-tst-cet-legacy-10a-static.c += -fcf-protection=none CFLAGS-tst-shstk-legacy-1a.c += -fcf-protection=none CFLAGS-tst-shstk-legacy-1a-static.c += -fcf-protection=none +CFLAGS-tst-shstk-legacy-1d.c += -fcf-protection=none +CFLAGS-tst-shstk-legacy-1d-static.c += -fcf-protection=none +CFLAGS-tst-shstk-legacy-1f.c += -fcf-protection=none $(objpfx)tst-cet-legacy-1: $(objpfx)tst-cet-legacy-mod-1.so \ $(objpfx)tst-cet-legacy-mod-2.so @@ -279,6 +293,28 @@ tst-shstk-legacy-1c-ENV = GLIBC_TUNABLES=glibc.cpu.hwcaps=-SHSTK tst-shstk-legacy-1c-static-ENV = GLIBC_TUNABLES=glibc.cpu.hwcaps=-SHSTK $(objpfx)tst-shstk-legacy-1c: $(objpfx)tst-shstk-legacy-1-extra.o $(objpfx)tst-shstk-legacy-1c-static: $(objpfx)tst-shstk-legacy-1-extra.o +$(objpfx)tst-shstk-legacy-1d: $(objpfx)tst-shstk-legacy-1-extra.o +$(objpfx)tst-shstk-legacy-1d-static: $(objpfx)tst-shstk-legacy-1-extra.o +$(objpfx)tst-shstk-legacy-1e: $(objpfx)tst-shstk-legacy-1-extra.o +$(objpfx)tst-shstk-legacy-1e-static: $(objpfx)tst-shstk-legacy-1-extra.o +$(objpfx)tst-shstk-legacy-1e.out: \ + $(..)/sysdeps/x86/tst-shstk-legacy-1e.sh $(objpfx)tst-shstk-legacy-1e + $(SHELL) $< $(common-objpfx) '$(test-program-prefix)' 2> $@; \ + $(evaluate-test) +$(objpfx)tst-shstk-legacy-1e-static.out: \ + $(..)/sysdeps/x86/tst-shstk-legacy-1e-static.sh \ + $(objpfx)tst-shstk-legacy-1e-static + $(SHELL) $< $(common-objpfx) 2> $@; \ + $(evaluate-test) +$(objpfx)tst-shstk-legacy-1f: $(objpfx)tst-shstk-legacy-mod-1.so +$(objpfx)tst-shstk-legacy-mod-1.so: \ + $(objpfx)tst-shstk-legacy-mod-1.os \ + $(objpfx)tst-shstk-legacy-1-extra.os +$(objpfx)tst-shstk-legacy-1g: $(objpfx)tst-shstk-legacy-mod-1.so +$(objpfx)tst-shstk-legacy-1g.out: \ + $(..)/sysdeps/x86/tst-shstk-legacy-1g.sh $(objpfx)tst-shstk-legacy-1g + $(SHELL) $< $(common-objpfx) '$(test-program-prefix)' 2> $@; \ + $(evaluate-test) endif # Add -fcf-protection to CFLAGS when CET is enabled. diff --git a/sysdeps/x86/tst-shstk-legacy-1d-static.c b/sysdeps/x86/tst-shstk-legacy-1d-static.c new file mode 100644 index 0000000000..dca27a5482 --- /dev/null +++ b/sysdeps/x86/tst-shstk-legacy-1d-static.c @@ -0,0 +1 @@ +#include "tst-shstk-legacy-1d.c" diff --git a/sysdeps/x86/tst-shstk-legacy-1d.c b/sysdeps/x86/tst-shstk-legacy-1d.c new file mode 100644 index 0000000000..465cfab1db --- /dev/null +++ b/sysdeps/x86/tst-shstk-legacy-1d.c @@ -0,0 +1,47 @@ +/* Check that legacy shadow stack code in init_array won't trigger + segfault. + Copyright (C) 2023 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include +#include + +/* Check that legacy shadow stack code in init_array won't trigger + segfault. */ +extern void legacy (void); +int done; + +void +legacy_1 (void) +{ + legacy (); + done = 1; +} + +void (*init_array []) (void) + __attribute__ ((section (".init_array"), aligned (sizeof (void *)))) = +{ + &legacy_1 +}; + +static int +do_test (void) +{ + return EXIT_SUCCESS; +} + +#include diff --git a/sysdeps/x86/tst-shstk-legacy-1e-static.c b/sysdeps/x86/tst-shstk-legacy-1e-static.c new file mode 100644 index 0000000000..cb6ce0de00 --- /dev/null +++ b/sysdeps/x86/tst-shstk-legacy-1e-static.c @@ -0,0 +1 @@ +#include "tst-shstk-legacy-1e.c" diff --git a/sysdeps/x86/tst-shstk-legacy-1e-static.sh b/sysdeps/x86/tst-shstk-legacy-1e-static.sh new file mode 100755 index 0000000000..e943aec70e --- /dev/null +++ b/sysdeps/x86/tst-shstk-legacy-1e-static.sh @@ -0,0 +1,32 @@ +#!/bin/sh +# Check that legacy shadow stack code in init_array will trigger +# segfault. +# Copyright (C) 2023 Free Software Foundation, Inc. +# This file is part of the GNU C Library. + +# The GNU C Library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2.1 of the License, or (at your option) any later version. + +# The GNU C Library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# Lesser General Public License for more details. + +# You should have received a copy of the GNU Lesser General Public +# License along with the GNU C Library; if not, see +# . + +common_objpfx=$1; shift + +${common_objpfx}elf/tst-shstk-legacy-1e-static +# The exit status should only be unsupported (77) or segfault (139). +status=$? +if test $status -eq 77; then + exit 77 +elif test $status == 139; then + exit 0 +else + exit 1 +fi diff --git a/sysdeps/x86/tst-shstk-legacy-1e.c b/sysdeps/x86/tst-shstk-legacy-1e.c new file mode 100644 index 0000000000..e78a4b776e --- /dev/null +++ b/sysdeps/x86/tst-shstk-legacy-1e.c @@ -0,0 +1,53 @@ +/* Check that legacy shadow stack code in init_array will trigger + segfault. + Copyright (C) 2023 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include +#include +#include +#include + +/* Check that legacy shadow stack code in init_array will trigger + segfault. */ +extern void legacy (void); +int done; + +void +legacy_1 (void) +{ + legacy (); + done = 1; +} + +void (*init_array []) (void) + __attribute__ ((section (".init_array"), aligned (sizeof (void *)))) = +{ + &legacy_1 +}; + +static int +do_test (void) +{ + if (!CPU_FEATURE_ACTIVE (SHSTK)) + return EXIT_UNSUPPORTED; + + return EXIT_FAILURE; +} + +#define EXPECTED_SIGNAL (CPU_FEATURE_ACTIVE (SHSTK) ? SIGSEGV : 0) +#include diff --git a/sysdeps/x86/tst-shstk-legacy-1e.sh b/sysdeps/x86/tst-shstk-legacy-1e.sh new file mode 100755 index 0000000000..b0467aa899 --- /dev/null +++ b/sysdeps/x86/tst-shstk-legacy-1e.sh @@ -0,0 +1,34 @@ +#!/bin/sh +# Check that legacy shadow stack code in init_array will trigger +# segfault. +# Copyright (C) 2023 Free Software Foundation, Inc. +# This file is part of the GNU C Library. + +# The GNU C Library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2.1 of the License, or (at your option) any later version. + +# The GNU C Library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# Lesser General Public License for more details. + +# You should have received a copy of the GNU Lesser General Public +# License along with the GNU C Library; if not, see +# . + +common_objpfx=$1; shift +test_program_prefix=$1; shift + +${test_program_prefix} \ + ${common_objpfx}elf/tst-shstk-legacy-1e +# The exit status should only be unsupported (77) or segfault (139). +status=$? +if test $status -eq 77; then + exit 77 +elif test $status == 139; then + exit 0 +else + exit 1 +fi diff --git a/sysdeps/x86/tst-shstk-legacy-1f.c b/sysdeps/x86/tst-shstk-legacy-1f.c new file mode 100644 index 0000000000..27e01a229e --- /dev/null +++ b/sysdeps/x86/tst-shstk-legacy-1f.c @@ -0,0 +1,29 @@ +/* Check that legacy shadow stack code in init_array won't trigger + segfault. + Copyright (C) 2023 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include +#include + +static int +do_test (void) +{ + return EXIT_SUCCESS; +} + +#include diff --git a/sysdeps/x86/tst-shstk-legacy-1g.c b/sysdeps/x86/tst-shstk-legacy-1g.c new file mode 100644 index 0000000000..a1f3d242e9 --- /dev/null +++ b/sysdeps/x86/tst-shstk-legacy-1g.c @@ -0,0 +1,35 @@ +/* Check that legacy shadow stack code in init_array will trigger + segfault. + Copyright (C) 2023 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include +#include +#include +#include + +static int +do_test (void) +{ + if (!CPU_FEATURE_ACTIVE (SHSTK)) + return EXIT_UNSUPPORTED; + + return EXIT_FAILURE; +} + +#define EXPECTED_SIGNAL (CPU_FEATURE_ACTIVE (SHSTK) ? SIGSEGV : 0) +#include diff --git a/sysdeps/x86/tst-shstk-legacy-1g.sh b/sysdeps/x86/tst-shstk-legacy-1g.sh new file mode 100755 index 0000000000..c112bf6d8d --- /dev/null +++ b/sysdeps/x86/tst-shstk-legacy-1g.sh @@ -0,0 +1,34 @@ +#!/bin/sh +# Check that legacy shadow stack code in init_array will trigger +# segfault. +# Copyright (C) 2023 Free Software Foundation, Inc. +# This file is part of the GNU C Library. + +# The GNU C Library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2.1 of the License, or (at your option) any later version. + +# The GNU C Library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# Lesser General Public License for more details. + +# You should have received a copy of the GNU Lesser General Public +# License along with the GNU C Library; if not, see +# . + +common_objpfx=$1; shift +test_program_prefix=$1; shift + +${test_program_prefix} \ + ${common_objpfx}elf/tst-shstk-legacy-1g +# The exit status should only be unsupported (77) or segfault (139). +status=$? +if test $status -eq 77; then + exit 77 +elif test $status == 139; then + exit 0 +else + exit 1 +fi diff --git a/sysdeps/x86/tst-shstk-legacy-mod-1.c b/sysdeps/x86/tst-shstk-legacy-mod-1.c new file mode 100644 index 0000000000..b75b5484d9 --- /dev/null +++ b/sysdeps/x86/tst-shstk-legacy-mod-1.c @@ -0,0 +1,28 @@ +/* Check legacy shadow stack code in init_array. + Copyright (C) 2023 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include + +/* Check legacy shadow stack code in init_array. */ +extern void legacy (void) __attribute__ ((visibility ("hidden"))); + +void (*init_array []) (void) + __attribute__ ((section (".init_array"), aligned (sizeof (void *)))) = +{ + &legacy +}; From patchwork Sat Dec 16 16:53:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. 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Lu" To: libc-alpha@sourceware.org Cc: rick.p.edgecombe@intel.com Subject: [PATCH v2 08/16] x86/cet: Check CPU_FEATURE_ACTIVE in permissive mode Date: Sat, 16 Dec 2023 08:53:17 -0800 Message-ID: <20231216165325.2584919-9-hjl.tools@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231216165325.2584919-1-hjl.tools@gmail.com> References: <20231216165325.2584919-1-hjl.tools@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-3024.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Verify that CPU_FEATURE_ACTIVE works properly in permissive mode. --- sysdeps/x86/Makefile | 1 + sysdeps/x86/tst-cet-legacy-4.c | 5 +++++ 2 files changed, 6 insertions(+) diff --git a/sysdeps/x86/Makefile b/sysdeps/x86/Makefile index 1bf6ff9e11..6911a07a87 100644 --- a/sysdeps/x86/Makefile +++ b/sysdeps/x86/Makefile @@ -219,6 +219,7 @@ CFLAGS-tst-cet-legacy-mod-1.c += -fcf-protection=none CFLAGS-tst-cet-legacy-mod-2.c += -fcf-protection=none CFLAGS-tst-cet-legacy-3.c += -fcf-protection=none CFLAGS-tst-cet-legacy-4.c += -fcf-protection=branch +CPPFLAGS-tst-cet-legacy-4a.c += -DCET_IS_PERMISSIVE=1 CFLAGS-tst-cet-legacy-4a.c += -fcf-protection CFLAGS-tst-cet-legacy-4b.c += -fcf-protection CFLAGS-tst-cet-legacy-mod-4.c += -fcf-protection=none diff --git a/sysdeps/x86/tst-cet-legacy-4.c b/sysdeps/x86/tst-cet-legacy-4.c index d75fb0e61c..c098120253 100644 --- a/sysdeps/x86/tst-cet-legacy-4.c +++ b/sysdeps/x86/tst-cet-legacy-4.c @@ -21,6 +21,7 @@ #include #include #include +#include #include @@ -40,6 +41,10 @@ do_test (void) return 0; } +#ifdef CET_IS_PERMISSIVE + TEST_VERIFY (!CPU_FEATURE_ACTIVE (IBT) && !CPU_FEATURE_ACTIVE (SHSTK)); +#endif + fp = dlsym (h, "test"); if (fp == NULL) FAIL_EXIT1 ("cannot get symbol 'test': %s\n", dlerror ()); From patchwork Sat Dec 16 16:53:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. 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(localhost [IPv6:::1]) by gnu-cfl-3.localdomain (Postfix) with ESMTP id B4A4B740638; Sat, 16 Dec 2023 08:53:25 -0800 (PST) From: "H.J. Lu" To: libc-alpha@sourceware.org Cc: rick.p.edgecombe@intel.com Subject: [PATCH v2 09/16] x86: Modularize sysdeps/x86/dl-cet.c Date: Sat, 16 Dec 2023 08:53:18 -0800 Message-ID: <20231216165325.2584919-10-hjl.tools@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231216165325.2584919-1-hjl.tools@gmail.com> References: <20231216165325.2584919-1-hjl.tools@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-3024.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Improve readability and make maintenance easier for dl-feature.c by modularizing sysdeps/x86/dl-cet.c: 1. Support processors with: a. Only IBT. Or b. Only SHSTK. Or c. Both IBT and SHSTK. 2. Lock CET features only if IBT or SHSTK are enabled and are not enabled permissively. --- sysdeps/x86/dl-cet.c | 456 ++++++++++++++++++++++++++----------------- 1 file changed, 280 insertions(+), 176 deletions(-) diff --git a/sysdeps/x86/dl-cet.c b/sysdeps/x86/dl-cet.c index 60ea1cb558..67c51ee8c2 100644 --- a/sysdeps/x86/dl-cet.c +++ b/sysdeps/x86/dl-cet.c @@ -32,206 +32,310 @@ # error GNU_PROPERTY_X86_FEATURE_1_SHSTK != X86_FEATURE_1_SHSTK #endif -/* Check if object M is compatible with CET. */ +struct dl_cet_info +{ + const char *program; + + /* Check how IBT and SHSTK should be enabled. */ + enum dl_x86_cet_control enable_ibt_type; + enum dl_x86_cet_control enable_shstk_type; + + /* If IBT and SHSTK were previously enabled. */ + unsigned int feature_1_enabled; + + /* If IBT and SHSTK should be enabled. */ + unsigned int enable_feature_1; + + /* If there are any legacy shared object. */ + unsigned int feature_1_legacy; + + /* Which shared object is the first legacy shared object. */ + unsigned int feature_1_legacy_ibt; + unsigned int feature_1_legacy_shstk; +}; + +/* Check if the object M and its dependencies are legacy object. */ static void -dl_cet_check (struct link_map *m, const char *program) +dl_check_legacy_object (struct link_map *m, + struct dl_cet_info *info) { - /* Check how IBT should be enabled. */ - enum dl_x86_cet_control enable_ibt_type - = GL(dl_x86_feature_control).ibt; - /* Check how SHSTK should be enabled. */ - enum dl_x86_cet_control enable_shstk_type - = GL(dl_x86_feature_control).shstk; - - /* No legacy object check if both IBT and SHSTK are always on. */ - if (enable_ibt_type == cet_always_on - && enable_shstk_type == cet_always_on) + unsigned int i; + struct link_map *l = NULL; + + i = m->l_searchlist.r_nlist; + while (i-- > 0) { - THREAD_SETMEM (THREAD_SELF, header.feature_1, GL(dl_x86_feature_1)); - return; - } + /* Check each shared object to see if IBT and SHSTK are enabled. */ + l = m->l_initfini[i]; - /* Check if IBT is enabled by kernel. */ - bool ibt_enabled - = (GL(dl_x86_feature_1) & GNU_PROPERTY_X86_FEATURE_1_IBT) != 0; - /* Check if SHSTK is enabled by kernel. */ - bool shstk_enabled - = (GL(dl_x86_feature_1) & GNU_PROPERTY_X86_FEATURE_1_SHSTK) != 0; + if (l->l_init_called) + continue; - if (ibt_enabled || shstk_enabled) - { - struct link_map *l = NULL; - unsigned int ibt_legacy = 0, shstk_legacy = 0; - bool found_ibt_legacy = false, found_shstk_legacy = false; - - /* Check if IBT and SHSTK are enabled in object. */ - bool enable_ibt = (ibt_enabled - && enable_ibt_type != cet_always_off); - bool enable_shstk = (shstk_enabled - && enable_shstk_type != cet_always_off); - if (program) +#ifdef SHARED + /* Skip check for ld.so since it has the features enabled. The + features will be disabled later if they are not enabled in + executable. */ + if (l == &GL(dl_rtld_map) + || l->l_real == &GL(dl_rtld_map) + || (info->program != NULL && l == m)) + continue; +#endif + + /* IBT and SHSTK set only if enabled in executable and all DSOs. + NB: cet_always_on is handled outside of the loop. */ + info->enable_feature_1 &= ((l->l_x86_feature_1_and + & (GNU_PROPERTY_X86_FEATURE_1_IBT + | GNU_PROPERTY_X86_FEATURE_1_SHSTK)) + | ~(GNU_PROPERTY_X86_FEATURE_1_IBT + | GNU_PROPERTY_X86_FEATURE_1_SHSTK)); + if ((info->feature_1_legacy + & GNU_PROPERTY_X86_FEATURE_1_IBT) == 0 + && ((info->enable_feature_1 + & GNU_PROPERTY_X86_FEATURE_1_IBT) + != (info->feature_1_enabled + & GNU_PROPERTY_X86_FEATURE_1_IBT))) { - /* Enable IBT and SHSTK only if they are enabled in executable. - NB: IBT and SHSTK may be disabled by environment variable: - - GLIBC_TUNABLES=glibc.cpu.hwcaps=-IBT,-SHSTK - */ - enable_ibt &= (CPU_FEATURE_USABLE (IBT) - && (enable_ibt_type == cet_always_on - || (m->l_x86_feature_1_and - & GNU_PROPERTY_X86_FEATURE_1_IBT) != 0)); - enable_shstk &= (CPU_FEATURE_USABLE (SHSTK) - && (enable_shstk_type == cet_always_on - || (m->l_x86_feature_1_and - & GNU_PROPERTY_X86_FEATURE_1_SHSTK) != 0)); + info->feature_1_legacy_ibt = i; + info->feature_1_legacy |= GNU_PROPERTY_X86_FEATURE_1_IBT; } - /* ld.so is CET-enabled by kernel. But shared objects may not - support IBT nor SHSTK. */ - if (enable_ibt || enable_shstk) - { - unsigned int i; + if ((info->feature_1_legacy + & GNU_PROPERTY_X86_FEATURE_1_SHSTK) == 0 + && ((info->enable_feature_1 + & GNU_PROPERTY_X86_FEATURE_1_SHSTK) + != (info->feature_1_enabled + & GNU_PROPERTY_X86_FEATURE_1_SHSTK))) + { + info->feature_1_legacy_shstk = i; + info->feature_1_legacy |= GNU_PROPERTY_X86_FEATURE_1_SHSTK; + } + } - i = m->l_searchlist.r_nlist; - while (i-- > 0) - { - /* Check each shared object to see if IBT and SHSTK are - enabled. */ - l = m->l_initfini[i]; + /* Handle cet_always_on. */ + if ((info->feature_1_enabled + & GNU_PROPERTY_X86_FEATURE_1_IBT) != 0 + && info->enable_ibt_type == cet_always_on) + { + info->feature_1_legacy &= ~GNU_PROPERTY_X86_FEATURE_1_IBT; + info->enable_feature_1 |= GNU_PROPERTY_X86_FEATURE_1_IBT; + } - if (l->l_init_called) - continue; + if ((info->feature_1_enabled + & GNU_PROPERTY_X86_FEATURE_1_SHSTK) != 0 + && info->enable_shstk_type == cet_always_on) + { + info->feature_1_legacy &= ~GNU_PROPERTY_X86_FEATURE_1_SHSTK; + info->enable_feature_1 |= GNU_PROPERTY_X86_FEATURE_1_SHSTK; + } +} #ifdef SHARED - /* Skip CET check for ld.so since ld.so is CET-enabled. - CET will be disabled later if CET isn't enabled in - executable. */ - if (l == &GL(dl_rtld_map) - || l->l_real == &GL(dl_rtld_map) - || (program && l == m)) - continue; +/* Enable IBT and SHSTK only if they are enabled in executable. Set + feature bits properly at the start of the program. */ + +static void +dl_cet_check_startup (struct link_map *m, struct dl_cet_info *info) +{ + /* NB: IBT and SHSTK may be disabled by environment variable: + + GLIBC_TUNABLES=glibc.cpu.hwcaps=-IBT,-SHSTK. + */ + if (CPU_FEATURE_USABLE (IBT)) + { + if (info->enable_ibt_type == cet_always_on) + info->enable_feature_1 |= GNU_PROPERTY_X86_FEATURE_1_IBT; + else + info->enable_feature_1 &= ((m->l_x86_feature_1_and + & GNU_PROPERTY_X86_FEATURE_1_IBT) + | ~GNU_PROPERTY_X86_FEATURE_1_IBT); + } + else + info->enable_feature_1 &= ~GNU_PROPERTY_X86_FEATURE_1_IBT; + + if (CPU_FEATURE_USABLE (SHSTK)) + { + if (info->enable_shstk_type == cet_always_on) + info->enable_feature_1 |= GNU_PROPERTY_X86_FEATURE_1_SHSTK; + else + info->enable_feature_1 &= ((m->l_x86_feature_1_and + & GNU_PROPERTY_X86_FEATURE_1_SHSTK) + | ~GNU_PROPERTY_X86_FEATURE_1_SHSTK); + } + else + info->enable_feature_1 &= ~GNU_PROPERTY_X86_FEATURE_1_SHSTK; + + if (info->enable_feature_1 != 0) + dl_check_legacy_object (m, info); + + unsigned int disable_feature_1 + = info->enable_feature_1 ^ info->feature_1_enabled; + if (disable_feature_1 != 0) + { + /* Disable features in the kernel because of legacy objects or + cet_always_off. */ + if (dl_cet_disable_cet (disable_feature_1) != 0) + _dl_fatal_printf ("%s: can't disable x86 Features\n", + info->program); + + /* Clear the disabled bits. Sync dl_x86_feature_1 and + info->feature_1_enabled with info->enable_feature_1. */ + info->feature_1_enabled = info->enable_feature_1; + GL(dl_x86_feature_1) = info->enable_feature_1; + } + + if (HAS_CPU_FEATURE (IBT) || HAS_CPU_FEATURE (SHSTK)) + { + /* Lock CET features only if IBT or SHSTK are enabled and are not + enabled permissively. */ + unsigned int feature_1_lock = 0; + + if (((info->feature_1_enabled & GNU_PROPERTY_X86_FEATURE_1_IBT) + != 0) + && info->enable_ibt_type != cet_permissive) + feature_1_lock |= GNU_PROPERTY_X86_FEATURE_1_IBT; + + if (((info->feature_1_enabled & GNU_PROPERTY_X86_FEATURE_1_SHSTK) + != 0) + && info->enable_shstk_type != cet_permissive) + feature_1_lock |= GNU_PROPERTY_X86_FEATURE_1_SHSTK; + + if (feature_1_lock != 0 + && dl_cet_lock_cet () != 0) + _dl_fatal_printf ("%s: can't lock CET\n", info->program); + } + + THREAD_SETMEM (THREAD_SELF, header.feature_1, GL(dl_x86_feature_1)); +} #endif - /* IBT is enabled only if it is enabled in executable as - well as all shared objects. */ - enable_ibt &= (enable_ibt_type == cet_always_on - || (l->l_x86_feature_1_and - & GNU_PROPERTY_X86_FEATURE_1_IBT) != 0); - if (!found_ibt_legacy && enable_ibt != ibt_enabled) - { - found_ibt_legacy = true; - ibt_legacy = i; - } - - /* SHSTK is enabled only if it is enabled in executable as - well as all shared objects. */ - enable_shstk &= (enable_shstk_type == cet_always_on - || (l->l_x86_feature_1_and - & GNU_PROPERTY_X86_FEATURE_1_SHSTK) != 0); - if (enable_shstk != shstk_enabled) - { - found_shstk_legacy = true; - shstk_legacy = i; - } - } - } +/* Check feature bits when dlopening the shared object M. */ + +static void +dl_cet_check_dlopen (struct link_map *m, struct dl_cet_info *info) +{ + /* Check if there are any legacy objects loaded. */ + if (info->enable_feature_1 != 0) + { + dl_check_legacy_object (m, info); - bool cet_feature_changed = false; + /* Skip if there are no legacy shared objects loaded. */ + if (info->feature_1_legacy == 0) + return; + } - if (enable_ibt != ibt_enabled || enable_shstk != shstk_enabled) - { - if (!program) - { - if (enable_ibt_type != cet_permissive) - { - /* When IBT is enabled, we cannot dlopen a shared - object without IBT. */ - if (found_ibt_legacy) - _dl_signal_error (0, - m->l_initfini[ibt_legacy]->l_name, - "dlopen", - N_("rebuild shared object with IBT support enabled")); - } - - if (enable_shstk_type != cet_permissive) - { - /* When SHSTK is enabled, we cannot dlopen a shared - object without SHSTK. */ - if (found_shstk_legacy) - _dl_signal_error (0, - m->l_initfini[shstk_legacy]->l_name, - "dlopen", - N_("rebuild shared object with SHSTK support enabled")); - } - - if (enable_ibt_type != cet_permissive - && enable_shstk_type != cet_permissive) - return; - } - - /* Disable IBT and/or SHSTK if they are enabled by kernel, but - disabled in executable or shared objects. */ - unsigned int cet_feature = 0; - - if (!enable_ibt) - cet_feature |= GNU_PROPERTY_X86_FEATURE_1_IBT; - if (!enable_shstk) - cet_feature |= GNU_PROPERTY_X86_FEATURE_1_SHSTK; - - int res = dl_cet_disable_cet (cet_feature); - if (res != 0) - { - if (program) - _dl_fatal_printf ("%s: can't disable CET\n", program); - else - { - if (found_ibt_legacy) - l = m->l_initfini[ibt_legacy]; - else - l = m->l_initfini[shstk_legacy]; - _dl_signal_error (-res, l->l_name, "dlopen", - N_("can't disable CET")); - } - } - - /* Clear the disabled bits in dl_x86_feature_1. */ - GL(dl_x86_feature_1) &= ~cet_feature; - - cet_feature_changed = true; - } + unsigned int disable_feature_1 = 0; + unsigned int legacy_obj = 0; + const char *msg = NULL; -#ifdef SHARED - if (program && (ibt_enabled || shstk_enabled)) + if ((info->feature_1_enabled + & GNU_PROPERTY_X86_FEATURE_1_IBT) != 0 + && (info->feature_1_legacy + & GNU_PROPERTY_X86_FEATURE_1_IBT) != 0) + { + if (info->enable_ibt_type != cet_permissive) { - if ((!ibt_enabled - || enable_ibt_type != cet_permissive) - && (!shstk_enabled - || enable_shstk_type != cet_permissive)) - { - /* Lock CET if IBT or SHSTK is enabled in executable unless - IBT or SHSTK is enabled permissively. */ - int res = dl_cet_lock_cet (); - if (res != 0) - _dl_fatal_printf ("%s: can't lock CET\n", program); - } - - /* Set feature_1 if IBT or SHSTK is enabled in executable. */ - cet_feature_changed = true; + legacy_obj = info->feature_1_legacy_ibt; + msg = N_("rebuild shared object with IBT support enabled"); } -#endif + else + disable_feature_1 |= GNU_PROPERTY_X86_FEATURE_1_IBT; + } - if (cet_feature_changed) + /* Check the next feature only if there is no error. */ + if (msg == NULL + && (info->feature_1_enabled + & GNU_PROPERTY_X86_FEATURE_1_SHSTK) != 0 + && (info->feature_1_legacy + & GNU_PROPERTY_X86_FEATURE_1_SHSTK) != 0) + { + if (info->enable_shstk_type != cet_permissive) { - unsigned int feature_1 = 0; - if (enable_ibt) - feature_1 |= GNU_PROPERTY_X86_FEATURE_1_IBT; - if (enable_shstk) - feature_1 |= GNU_PROPERTY_X86_FEATURE_1_SHSTK; - struct pthread *self = THREAD_SELF; - THREAD_SETMEM (self, header.feature_1, feature_1); + legacy_obj = info->feature_1_legacy_shstk; + msg = N_("rebuild shared object with SHSTK support enabled"); } + else + disable_feature_1 |= GNU_PROPERTY_X86_FEATURE_1_SHSTK; + } + + /* If there is an error, long jump back to the caller. */ + if (msg != NULL) + _dl_signal_error (0, m->l_initfini[legacy_obj]->l_name, "dlopen", + msg); + + if (disable_feature_1 != 0) + { + int res = dl_cet_disable_cet (disable_feature_1); + if (res) + { + if ((disable_feature_1 + & GNU_PROPERTY_X86_FEATURE_1_IBT) != 0) + msg = N_("can't disable IBT"); + else + msg = N_("can't disable SHSTK"); + /* Long jump back to the caller on error. */ + _dl_signal_error (-res, m->l_initfini[legacy_obj]->l_name, + "dlopen", msg); + } + + /* Clear the disabled bits in dl_x86_feature_1. */ + GL(dl_x86_feature_1) &= ~disable_feature_1; + + THREAD_SETMEM (THREAD_SELF, header.feature_1, + GL(dl_x86_feature_1)); + } +} + +static void +dl_cet_check (struct link_map *m, const char *program) +{ + struct dl_cet_info info; + + /* Check how IBT and SHSTK should be enabled. */ + info.enable_ibt_type = GL(dl_x86_feature_control).ibt; + info.enable_shstk_type = GL(dl_x86_feature_control).shstk; + + info.feature_1_enabled = GL(dl_x86_feature_1); + + /* No legacy object check if IBT and SHSTK are always on. */ + if (info.enable_ibt_type == cet_always_on + && info.enable_shstk_type == cet_always_on) + { +#ifdef SHARED + /* Set it only during startup. */ + if (program != NULL) + THREAD_SETMEM (THREAD_SELF, header.feature_1, + info.feature_1_enabled); +#endif + return; } + + /* Check if IBT and SHSTK were enabled by kernel. */ + if (info.feature_1_enabled == 0) + return; + + info.program = program; + + /* Check which features should be enabled. */ + info.enable_feature_1 = 0; + if (info.enable_ibt_type != cet_always_off) + info.enable_feature_1 |= (info.feature_1_enabled + & GNU_PROPERTY_X86_FEATURE_1_IBT); + if (info.enable_shstk_type != cet_always_off) + info.enable_feature_1 |= (info.feature_1_enabled + & GNU_PROPERTY_X86_FEATURE_1_SHSTK); + + /* Start with no legacy objects. */ + info.feature_1_legacy = 0; + info.feature_1_legacy_ibt = 0; + info.feature_1_legacy_shstk = 0; + +#ifdef SHARED + if (program) + dl_cet_check_startup (m, &info); + else +#endif + dl_cet_check_dlopen (m, &info); } void From patchwork Sat Dec 16 16:53:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. 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(localhost [IPv6:::1]) by gnu-cfl-3.localdomain (Postfix) with ESMTP id C1DF6740639; Sat, 16 Dec 2023 08:53:25 -0800 (PST) From: "H.J. Lu" To: libc-alpha@sourceware.org Cc: rick.p.edgecombe@intel.com Subject: [PATCH v2 10/16] x86/cet: Sync with Linux kernel 6.6 shadow stack interface Date: Sat, 16 Dec 2023 08:53:19 -0800 Message-ID: <20231216165325.2584919-11-hjl.tools@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231216165325.2584919-1-hjl.tools@gmail.com> References: <20231216165325.2584919-1-hjl.tools@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-3024.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Sync with Linux kernel 6.6 shadow stack interface. Since only x86-64 is supported, i386 shadow stack codes are unchanged and CET shouldn't be enabled for i386. 1. When the shadow stack base in TCB is unset, the default shadow stack is in use. Use the current shadow stack pointer as the marker for the default shadow stack. It is used to identify if the current shadow stack is the same as the target shadow stack when switching ucontexts. If yes, INCSSP will be used to unwind shadow stack. Otherwise, shadow stack restore token will be used. 2. Allocate shadow stack with the map_shadow_stack syscall. Since there is no function to explicitly release ucontext, there is no place to release shadow stack allocated by map_shadow_stack in ucontext functions. Such shadow stacks will be leaked. 3. Rename arch_prctl CET commands to ARCH_SHSTK_XXX. 4. Rewrite the CET control functions with the current kernel shadow stack interface. Since CET is no longer enabled by kernel, a separate patch will enable shadow stack during startup. --- sysdeps/unix/sysv/linux/x86/Makefile | 1 + .../sysv/linux/x86/allocate-shadow-stack.c | 62 +++++++++++++++++++ .../sysv/linux/x86/allocate-shadow-stack.h | 27 ++++++++ sysdeps/unix/sysv/linux/x86/bits/mman.h | 5 ++ sysdeps/unix/sysv/linux/x86/cpu-features.c | 13 ++-- sysdeps/unix/sysv/linux/x86/dl-cet.h | 16 +++-- .../unix/sysv/linux/x86/include/asm/prctl.h | 37 +++++------ .../sysv/linux/x86/tst-cet-setcontext-1.c | 17 +++-- .../unix/sysv/linux/x86_64/__start_context.S | 38 +++--------- sysdeps/unix/sysv/linux/x86_64/getcontext.S | 30 ++------- sysdeps/unix/sysv/linux/x86_64/makecontext.c | 29 +++++---- sysdeps/unix/sysv/linux/x86_64/swapcontext.S | 22 ++----- sysdeps/x86/cpu-features.c | 15 +++-- sysdeps/x86/dl-cet.c | 2 +- sysdeps/x86_64/nptl/tls.h | 2 +- 15 files changed, 184 insertions(+), 132 deletions(-) create mode 100644 sysdeps/unix/sysv/linux/x86/allocate-shadow-stack.c create mode 100644 sysdeps/unix/sysv/linux/x86/allocate-shadow-stack.h diff --git a/sysdeps/unix/sysv/linux/x86/Makefile b/sysdeps/unix/sysv/linux/x86/Makefile index 9dfdd689a9..ed0d6500b9 100644 --- a/sysdeps/unix/sysv/linux/x86/Makefile +++ b/sysdeps/unix/sysv/linux/x86/Makefile @@ -44,6 +44,7 @@ CFLAGS-tst-cet-vfork-1.c += -mshstk endif ifeq ($(subdir),stdlib) +sysdep_routines += allocate-shadow-stack tests += tst-cet-setcontext-1 CFLAGS-tst-cet-setcontext-1.c += -mshstk endif diff --git a/sysdeps/unix/sysv/linux/x86/allocate-shadow-stack.c b/sysdeps/unix/sysv/linux/x86/allocate-shadow-stack.c new file mode 100644 index 0000000000..d7938b6ea9 --- /dev/null +++ b/sysdeps/unix/sysv/linux/x86/allocate-shadow-stack.c @@ -0,0 +1,62 @@ +/* Helper function to allocate shadow stack. + Copyright (C) 2023 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include +#include +#include +#include +#include +#include + +/* NB: This can be treated as a syscall by caller. */ + +#ifndef __x86_64__ +__attribute__ ((regparm (2))) +#endif +long int +__allocate_shadow_stack (size_t stack_size, + shadow_stack_size_t *child_stack) +{ +#ifdef __NR_map_shadow_stack + size_t shadow_stack_size + = stack_size >> STACK_SIZE_TO_SHADOW_STACK_SIZE_SHIFT; + /* Align shadow stack to 8 bytes. */ + shadow_stack_size = ALIGN_UP (shadow_stack_size, 8); + /* Since sigaltstack shares shadow stack with the current context in + the thread, add extra 20 stack frames in shadow stack for signal + handlers. */ +# ifdef __x86_64__ + shadow_stack_size += 20 * 8; +# else + shadow_stack_size += 20 * 4; +# endif + void *shadow_stack = (void *)INLINE_SYSCALL_CALL + (map_shadow_stack, NULL, shadow_stack_size, SHADOW_STACK_SET_TOKEN); + /* Report the map_shadow_stack error. */ + if (shadow_stack == MAP_FAILED) + return -errno; + + /* Save the shadow stack base and size on child stack. */ + child_stack[0] = (uintptr_t) shadow_stack; + child_stack[1] = shadow_stack_size; + + return 0; +#else + return -ENOSYS; +#endif +} diff --git a/sysdeps/unix/sysv/linux/x86/allocate-shadow-stack.h b/sysdeps/unix/sysv/linux/x86/allocate-shadow-stack.h new file mode 100644 index 0000000000..834373e0d3 --- /dev/null +++ b/sysdeps/unix/sysv/linux/x86/allocate-shadow-stack.h @@ -0,0 +1,27 @@ +/* Helper function to allocate shadow stack. + Copyright (C) 2023 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include + +typedef __typeof (((ucontext_t *) 0)->__ssp[0]) shadow_stack_size_t; + +extern long int __allocate_shadow_stack (size_t, shadow_stack_size_t *) +#ifndef __x86_64__ + __attribute__ ((regparm (2))) +#endif + attribute_hidden; diff --git a/sysdeps/unix/sysv/linux/x86/bits/mman.h b/sysdeps/unix/sysv/linux/x86/bits/mman.h index 3d356e86a0..221f7c82bd 100644 --- a/sysdeps/unix/sysv/linux/x86/bits/mman.h +++ b/sysdeps/unix/sysv/linux/x86/bits/mman.h @@ -27,6 +27,11 @@ #define MAP_32BIT 0x40 /* Only give out 32-bit addresses. */ #define MAP_ABOVE4G 0x80 /* Only map above 4GB. */ +#ifdef __USE_MISC +/* Set up a restore token in the newly allocatd shadow stack */ +# define SHADOW_STACK_SET_TOKEN 0x1 +#endif + #include /* Include generic Linux declarations. */ diff --git a/sysdeps/unix/sysv/linux/x86/cpu-features.c b/sysdeps/unix/sysv/linux/x86/cpu-features.c index 41e7600668..0e6e2bf855 100644 --- a/sysdeps/unix/sysv/linux/x86/cpu-features.c +++ b/sysdeps/unix/sysv/linux/x86/cpu-features.c @@ -23,10 +23,15 @@ static inline int __attribute__ ((always_inline)) get_cet_status (void) { - unsigned long long cet_status[3]; - if (INTERNAL_SYSCALL_CALL (arch_prctl, ARCH_CET_STATUS, cet_status) == 0) - return cet_status[0]; - return 0; + unsigned long long kernel_feature; + unsigned int status = 0; + if (INTERNAL_SYSCALL_CALL (arch_prctl, ARCH_SHSTK_STATUS, + &kernel_feature) == 0) + { + if ((kernel_feature & ARCH_SHSTK_SHSTK) != 0) + status = GNU_PROPERTY_X86_FEATURE_1_SHSTK; + } + return status; } # ifndef SHARED diff --git a/sysdeps/unix/sysv/linux/x86/dl-cet.h b/sysdeps/unix/sysv/linux/x86/dl-cet.h index c885bf1323..da220ac627 100644 --- a/sysdeps/unix/sysv/linux/x86/dl-cet.h +++ b/sysdeps/unix/sysv/linux/x86/dl-cet.h @@ -21,12 +21,20 @@ static inline int __attribute__ ((always_inline)) dl_cet_disable_cet (unsigned int cet_feature) { - return (int) INTERNAL_SYSCALL_CALL (arch_prctl, ARCH_CET_DISABLE, - cet_feature); + if (cet_feature != GNU_PROPERTY_X86_FEATURE_1_SHSTK) + return -1; + long long int kernel_feature = ARCH_SHSTK_SHSTK; + return (int) INTERNAL_SYSCALL_CALL (arch_prctl, ARCH_SHSTK_DISABLE, + kernel_feature); } static inline int __attribute__ ((always_inline)) -dl_cet_lock_cet (void) +dl_cet_lock_cet (unsigned int cet_feature) { - return (int) INTERNAL_SYSCALL_CALL (arch_prctl, ARCH_CET_LOCK, 0); + if (cet_feature != GNU_PROPERTY_X86_FEATURE_1_SHSTK) + return -1; + /* Lock all SHSTK features. */ + long long int kernel_feature = -1; + return (int) INTERNAL_SYSCALL_CALL (arch_prctl, ARCH_SHSTK_LOCK, + kernel_feature); } diff --git a/sysdeps/unix/sysv/linux/x86/include/asm/prctl.h b/sysdeps/unix/sysv/linux/x86/include/asm/prctl.h index 45ad0b052f..2f511321ad 100644 --- a/sysdeps/unix/sysv/linux/x86/include/asm/prctl.h +++ b/sysdeps/unix/sysv/linux/x86/include/asm/prctl.h @@ -4,24 +4,19 @@ #include_next -#ifndef ARCH_CET_STATUS -/* CET features: - IBT: GNU_PROPERTY_X86_FEATURE_1_IBT - SHSTK: GNU_PROPERTY_X86_FEATURE_1_SHSTK - */ -/* Return CET features in unsigned long long *addr: - features: addr[0]. - shadow stack base address: addr[1]. - shadow stack size: addr[2]. - */ -# define ARCH_CET_STATUS 0x3001 -/* Disable CET features in unsigned int features. */ -# define ARCH_CET_DISABLE 0x3002 -/* Lock all CET features. */ -# define ARCH_CET_LOCK 0x3003 -/* Allocate a new shadow stack with unsigned long long *addr: - IN: requested shadow stack size: *addr. - OUT: allocated shadow stack address: *addr. - */ -# define ARCH_CET_ALLOC_SHSTK 0x3004 -#endif /* ARCH_CET_STATUS */ +#ifndef ARCH_SHSTK_ENABLE +/* Enable SHSTK features in unsigned long int features. */ +# define ARCH_SHSTK_ENABLE 0x5001 +/* Disable SHSTK features in unsigned long int features. */ +# define ARCH_SHSTK_DISABLE 0x5002 +/* Lock SHSTK features in unsigned long int features. */ +# define ARCH_SHSTK_LOCK 0x5003 +/* Unlock SHSTK features in unsigned long int features. */ +# define ARCH_SHSTK_UNLOCK 0x5004 +/* Return SHSTK features in unsigned long int features. */ +# define ARCH_SHSTK_STATUS 0x5005 + +/* ARCH_SHSTK_ features bits */ +# define ARCH_SHSTK_SHSTK 0x1 +# define ARCH_SHSTK_WRSS 0x2 +#endif diff --git a/sysdeps/unix/sysv/linux/x86/tst-cet-setcontext-1.c b/sysdeps/unix/sysv/linux/x86/tst-cet-setcontext-1.c index 837a9fd0eb..2ea66c803b 100644 --- a/sysdeps/unix/sysv/linux/x86/tst-cet-setcontext-1.c +++ b/sysdeps/unix/sysv/linux/x86/tst-cet-setcontext-1.c @@ -87,15 +87,14 @@ do_test (void) ctx[4].uc_link = &ctx[0]; makecontext (&ctx[4], (void (*) (void)) f1, 0); - /* NB: When shadow stack is enabled, makecontext calls arch_prctl - with ARCH_CET_ALLOC_SHSTK to allocate a new shadow stack which - can be unmapped. The base address and size of the new shadow - stack are returned in __ssp[1] and __ssp[2]. makecontext is - called for CTX1, CTX3 and CTX4. But only CTX1 is used. New - shadow stacks are allocated in the order of CTX3, CTX1, CTX4. - It is very likely that CTX1's shadow stack is placed between - CTX3 and CTX4. We munmap CTX3's and CTX4's shadow stacks to - create gaps above and below CTX1's shadow stack. We check + /* NB: When shadow stack is enabled, makecontext calls map_shadow_stack + to allocate a new shadow stack which can be unmapped. The base + address and size of the new shadow stack are returned in __ssp[1] + and __ssp[2]. makecontext is called for CTX1, CTX3 and CTX4. But + only CTX1 is used. New shadow stacks are allocated in the order + of CTX3, CTX1, CTX4. It is very likely that CTX1's shadow stack is + placed between CTX3 and CTX4. We munmap CTX3's and CTX4's shadow + stacks to create gaps above and below CTX1's shadow stack. We check that setcontext CTX1 works correctly in this case. */ if (_get_ssp () != 0) { diff --git a/sysdeps/unix/sysv/linux/x86_64/__start_context.S b/sysdeps/unix/sysv/linux/x86_64/__start_context.S index f6436dd6bb..ae04203c90 100644 --- a/sysdeps/unix/sysv/linux/x86_64/__start_context.S +++ b/sysdeps/unix/sysv/linux/x86_64/__start_context.S @@ -24,20 +24,14 @@ /* Use CALL to push __start_context onto the new stack as well as the new shadow stack. RDI points to ucontext: Incoming: - __ssp[0]: The original caller's shadow stack pointer. - __ssp[1]: The size of the new shadow stack. - __ssp[2]: The size of the new shadow stack. - Outgoing: __ssp[0]: The new shadow stack pointer. __ssp[1]: The base address of the new shadow stack. __ssp[2]: The size of the new shadow stack. */ ENTRY(__push___start_context) - /* Save the pointer to ucontext. */ - movq %rdi, %r9 /* Get the original shadow stack pointer. */ - rdsspq %r8 + rdsspq %rcx /* Save the original stack pointer. */ movq %rsp, %rdx /* Load the top of the new stack into RSI. */ @@ -45,24 +39,12 @@ ENTRY(__push___start_context) /* Add 8 bytes to RSI since CALL will push the 8-byte return address onto stack. */ leaq 8(%rsi), %rsp - /* Allocate the new shadow stack. The size of the new shadow - stack is passed in __ssp[1]. */ - lea (oSSP + 8)(%rdi), %RSI_LP - movl $ARCH_CET_ALLOC_SHSTK, %edi - movl $__NR_arch_prctl, %eax - /* The new shadow stack base is returned in __ssp[1]. */ - syscall - testq %rax, %rax - jne L(hlt) /* This should never happen. */ - - /* Get the size of the new shadow stack. */ - movq 8(%rsi), %rdi - - /* Get the base address of the new shadow stack. */ - movq (%rsi), %rsi - + /* The size of the new shadow stack is stored in __ssp[2]. */ + mov (oSSP + 16)(%rdi), %RSI_LP + /* The new shadow stack base is stored in __ssp[1]. */ + mov (oSSP + 8)(%rdi), %RAX_LP /* Use the restore stoken to restore the new shadow stack. */ - rstorssp -8(%rsi, %rdi) + rstorssp -8(%rax, %rsi) /* Save the restore token on the original shadow stack. */ saveprevssp @@ -73,18 +55,12 @@ ENTRY(__push___start_context) jmp __start_context 1: - /* Get the new shadow stack pointer. */ - rdsspq %rdi - /* Use the restore stoken to restore the original shadow stack. */ - rstorssp -8(%r8) + rstorssp -8(%rcx) /* Save the restore token on the new shadow stack. */ saveprevssp - /* Store the new shadow stack pointer in __ssp[0]. */ - movq %rdi, oSSP(%r9) - /* Restore the original stack. */ mov %rdx, %rsp ret diff --git a/sysdeps/unix/sysv/linux/x86_64/getcontext.S b/sysdeps/unix/sysv/linux/x86_64/getcontext.S index a00e2f6290..71f3802dca 100644 --- a/sysdeps/unix/sysv/linux/x86_64/getcontext.S +++ b/sysdeps/unix/sysv/linux/x86_64/getcontext.S @@ -58,35 +58,15 @@ ENTRY(__getcontext) testl $X86_FEATURE_1_SHSTK, %fs:FEATURE_1_OFFSET jz L(no_shstk) - /* Save RDI in RDX which won't be clobbered by syscall. */ - movq %rdi, %rdx - xorl %eax, %eax cmpq %fs:SSP_BASE_OFFSET, %rax jnz L(shadow_stack_bound_recorded) - /* Get the base address and size of the default shadow stack - which must be the current shadow stack since nothing has - been recorded yet. */ - sub $24, %RSP_LP - mov %RSP_LP, %RSI_LP - movl $ARCH_CET_STATUS, %edi - movl $__NR_arch_prctl, %eax - syscall - testq %rax, %rax - jz L(continue_no_err) - - /* This should never happen. */ - hlt - -L(continue_no_err): - /* Record the base of the current shadow stack. */ - movq 8(%rsp), %rax + /* When the shadow stack base is unset, the default shadow + stack is in use. Use the current shadow stack pointer + as the marker for the default shadow stack. */ + rdsspq %rax movq %rax, %fs:SSP_BASE_OFFSET - add $24, %RSP_LP - - /* Restore RDI. */ - movq %rdx, %rdi L(shadow_stack_bound_recorded): /* Get the current shadow stack pointer. */ @@ -94,7 +74,7 @@ L(shadow_stack_bound_recorded): /* NB: Save the caller's shadow stack so that we can jump back to the caller directly. */ addq $8, %rax - movq %rax, oSSP(%rdx) + movq %rax, oSSP(%rdi) /* Save the current shadow stack base in ucontext. */ movq %fs:SSP_BASE_OFFSET, %rax diff --git a/sysdeps/unix/sysv/linux/x86_64/makecontext.c b/sysdeps/unix/sysv/linux/x86_64/makecontext.c index de9e03eb81..788b730132 100644 --- a/sysdeps/unix/sysv/linux/x86_64/makecontext.c +++ b/sysdeps/unix/sysv/linux/x86_64/makecontext.c @@ -24,6 +24,8 @@ # include # include # include +# include +# include #endif #include "ucontext_i.h" @@ -88,23 +90,24 @@ __makecontext (ucontext_t *ucp, void (*func) (void), int argc, ...) if ((feature_1 & X86_FEATURE_1_SHSTK) != 0) { /* Shadow stack is enabled. We need to allocate a new shadow - stack. */ - unsigned long ssp_size = (((uintptr_t) sp - - (uintptr_t) ucp->uc_stack.ss_sp) - >> STACK_SIZE_TO_SHADOW_STACK_SIZE_SHIFT); - /* Align shadow stack to 8 bytes. */ - ssp_size = ALIGN_UP (ssp_size, 8); - - ucp->__ssp[1] = ssp_size; - ucp->__ssp[2] = ssp_size; - - /* Call __push___start_context to allocate a new shadow stack, - push __start_context onto the new stack as well as the new - shadow stack. NB: After __push___start_context returns, + stack. NB: ucp->__ssp[0]: The new shadow stack pointer. ucp->__ssp[1]: The base address of the new shadow stack. ucp->__ssp[2]: The size of the new shadow stack. */ + long int ret + = __allocate_shadow_stack (((uintptr_t) sp + - (uintptr_t) ucp->uc_stack.ss_sp), + &ucp->__ssp[1]); + if (ret != 0) + { + /* FIXME: What should we do? */ + abort (); + } + + ucp->__ssp[0] = ucp->__ssp[1] + ucp->__ssp[2] - 8; + /* Call __push___start_context to push __start_context onto the new + stack as well as the new shadow stack. */ __push___start_context (ucp); } else diff --git a/sysdeps/unix/sysv/linux/x86_64/swapcontext.S b/sysdeps/unix/sysv/linux/x86_64/swapcontext.S index 5925752164..2f2fe9875b 100644 --- a/sysdeps/unix/sysv/linux/x86_64/swapcontext.S +++ b/sysdeps/unix/sysv/linux/x86_64/swapcontext.S @@ -109,25 +109,11 @@ ENTRY(__swapcontext) cmpq %fs:SSP_BASE_OFFSET, %rax jnz L(shadow_stack_bound_recorded) - /* Get the base address and size of the default shadow stack - which must be the current shadow stack since nothing has - been recorded yet. */ - sub $24, %RSP_LP - mov %RSP_LP, %RSI_LP - movl $ARCH_CET_STATUS, %edi - movl $__NR_arch_prctl, %eax - syscall - testq %rax, %rax - jz L(continue_no_err) - - /* This should never happen. */ - hlt - -L(continue_no_err): - /* Record the base of the current shadow stack. */ - movq 8(%rsp), %rax + /* When the shadow stack base is unset, the default shadow + stack is in use. Use the current shadow stack pointer + as the marker for the default shadow stack. */ + rdsspq %rax movq %rax, %fs:SSP_BASE_OFFSET - add $24, %RSP_LP L(shadow_stack_bound_recorded): /* If we unwind the stack, we can't undo stack unwinding. Just diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c index 0bf923d48b..f180f0d9a4 100644 --- a/sysdeps/x86/cpu-features.c +++ b/sysdeps/x86/cpu-features.c @@ -1121,8 +1121,9 @@ no_cpuid: # ifndef SHARED /* Check if IBT and SHSTK are enabled by kernel. */ - if ((cet_status & GNU_PROPERTY_X86_FEATURE_1_IBT) - || (cet_status & GNU_PROPERTY_X86_FEATURE_1_SHSTK)) + if ((cet_status + & (GNU_PROPERTY_X86_FEATURE_1_IBT + | GNU_PROPERTY_X86_FEATURE_1_SHSTK))) { /* Disable IBT and/or SHSTK if they are enabled by kernel, but disabled by environment variable: @@ -1131,9 +1132,11 @@ no_cpuid: */ unsigned int cet_feature = 0; if (!CPU_FEATURE_USABLE (IBT)) - cet_feature |= GNU_PROPERTY_X86_FEATURE_1_IBT; + cet_feature |= (cet_status + & GNU_PROPERTY_X86_FEATURE_1_IBT); if (!CPU_FEATURE_USABLE (SHSTK)) - cet_feature |= GNU_PROPERTY_X86_FEATURE_1_SHSTK; + cet_feature |= (cet_status + & GNU_PROPERTY_X86_FEATURE_1_SHSTK); if (cet_feature) { @@ -1148,7 +1151,9 @@ no_cpuid: lock CET if IBT or SHSTK is enabled permissively. */ if (GL(dl_x86_feature_control).ibt != cet_permissive && GL(dl_x86_feature_control).shstk != cet_permissive) - dl_cet_lock_cet (); + dl_cet_lock_cet (GL(dl_x86_feature_1) + & (GNU_PROPERTY_X86_FEATURE_1_IBT + | GNU_PROPERTY_X86_FEATURE_1_SHSTK)); } # endif } diff --git a/sysdeps/x86/dl-cet.c b/sysdeps/x86/dl-cet.c index 67c51ee8c2..8b911fd931 100644 --- a/sysdeps/x86/dl-cet.c +++ b/sysdeps/x86/dl-cet.c @@ -201,7 +201,7 @@ dl_cet_check_startup (struct link_map *m, struct dl_cet_info *info) feature_1_lock |= GNU_PROPERTY_X86_FEATURE_1_SHSTK; if (feature_1_lock != 0 - && dl_cet_lock_cet () != 0) + && dl_cet_lock_cet (feature_1_lock) != 0) _dl_fatal_printf ("%s: can't lock CET\n", info->program); } diff --git a/sysdeps/x86_64/nptl/tls.h b/sysdeps/x86_64/nptl/tls.h index 1403f939f7..4bcc2552a1 100644 --- a/sysdeps/x86_64/nptl/tls.h +++ b/sysdeps/x86_64/nptl/tls.h @@ -60,7 +60,7 @@ typedef struct void *__private_tm[4]; /* GCC split stack support. */ void *__private_ss; - /* The lowest address of shadow stack, */ + /* The marker for the current shadow stack. */ unsigned long long int ssp_base; /* Must be kept even if it is no longer used by glibc since programs, like AddressSanitizer, depend on the size of tcbhead_t. */ From patchwork Sat Dec 16 16:53:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. 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(localhost [IPv6:::1]) by gnu-cfl-3.localdomain (Postfix) with ESMTP id D1ADD74063B; Sat, 16 Dec 2023 08:53:25 -0800 (PST) From: "H.J. Lu" To: libc-alpha@sourceware.org Cc: rick.p.edgecombe@intel.com Subject: [PATCH v2 11/16] elf: Always provide _dl_get_dl_main_map in libc.a Date: Sat, 16 Dec 2023 08:53:20 -0800 Message-ID: <20231216165325.2584919-12-hjl.tools@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231216165325.2584919-1-hjl.tools@gmail.com> References: <20231216165325.2584919-1-hjl.tools@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-3024.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Always provide _dl_get_dl_main_map in libc.a. It will be used by x86 to process PT_GNU_PROPERTY segment. --- elf/dl-support.c | 2 -- sysdeps/generic/ldsodefs.h | 8 ++++---- 2 files changed, 4 insertions(+), 6 deletions(-) diff --git a/elf/dl-support.c b/elf/dl-support.c index 837fa1c836..70c5b3599a 100644 --- a/elf/dl-support.c +++ b/elf/dl-support.c @@ -344,7 +344,6 @@ _dl_non_dynamic_init (void) DL_SYSINFO_IMPLEMENTATION #endif -#if ENABLE_STATIC_PIE /* Since relocation to hidden _dl_main_map causes relocation overflow on aarch64, a function is used to get the address of _dl_main_map. */ @@ -353,7 +352,6 @@ _dl_get_dl_main_map (void) { return &_dl_main_map; } -#endif /* This is used by _dl_runtime_profile, not used on static code. */ void diff --git a/sysdeps/generic/ldsodefs.h b/sysdeps/generic/ldsodefs.h index 9b50ddd09f..0e8a008a49 100644 --- a/sysdeps/generic/ldsodefs.h +++ b/sysdeps/generic/ldsodefs.h @@ -1172,10 +1172,6 @@ void __libc_setup_tls (void); # if ENABLE_STATIC_PIE /* Relocate static executable with PIE. */ extern void _dl_relocate_static_pie (void) attribute_hidden; - -/* Get a pointer to _dl_main_map. */ -extern struct link_map * _dl_get_dl_main_map (void) - __attribute__ ((visibility ("hidden"))); # else # define _dl_relocate_static_pie() # endif @@ -1217,6 +1213,10 @@ rtld_hidden_proto (_dl_deallocate_tls) extern void _dl_nothread_init_static_tls (struct link_map *) attribute_hidden; +/* Get a pointer to _dl_main_map. */ +extern struct link_map * _dl_get_dl_main_map (void) + __attribute__ ((visibility ("hidden"))); + /* Find origin of the executable. */ extern const char *_dl_get_origin (void) attribute_hidden; From patchwork Sat Dec 16 16:53:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. 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Lu" To: libc-alpha@sourceware.org Cc: rick.p.edgecombe@intel.com Subject: [PATCH v2 12/16] x86/cet: Enable shadow stack during startup Date: Sat, 16 Dec 2023 08:53:21 -0800 Message-ID: <20231216165325.2584919-13-hjl.tools@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231216165325.2584919-1-hjl.tools@gmail.com> References: <20231216165325.2584919-1-hjl.tools@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-3024.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Previously, CET was enabled by kernel before passing control to user space and the startup code must disable CET if applications or shared libraries aren't CET enabled. Since the current kernel only supports shadow stack and won't enable shadow stack before passing control to user space, we need to enable shadow stack during startup if the application and all shared library are shadow stack enabled. There is no need to disable shadow stack at startup. Shadow stack can only be enabled in a function which will never return. Otherwise, shadow stack will underflow at the function return. 1. GL(dl_x86_feature_1) is set to the CET features which are supported by the processor and are not disabled by the tunable. Only non-zero features in GL(dl_x86_feature_1) should be enabled. After enabling shadow stack with ARCH_SHSTK_ENABLE, ARCH_SHSTK_STATUS is used to check if shadow stack is really enabled. 2. Use ARCH_SHSTK_ENABLE in RTLD_START in dynamic executable. It is safe since RTLD_START never returns. 3. Call arch_prctl (ARCH_SHSTK_ENABLE) from ARCH_SETUP_TLS in static executable. Since the start function using ARCH_SETUP_TLS never returns, it is safe to enable shadow stack in ARCH_SETUP_TLS. --- sysdeps/unix/sysv/linux/x86/cpu-features.c | 49 -------------- sysdeps/unix/sysv/linux/x86/dl-cet.h | 23 +++++++ sysdeps/unix/sysv/linux/x86_64/dl-cet.h | 47 +++++++++++++ sysdeps/x86/cpu-features-offsets.sym | 1 + sysdeps/x86/cpu-features.c | 51 -------------- sysdeps/x86/dl-cet.c | 77 +++++++++++----------- sysdeps/x86/get-cpuid-feature-leaf.c | 2 +- sysdeps/x86/include/cpu-features.h | 3 + sysdeps/x86/libc-start.h | 54 ++++++++++++++- sysdeps/x86_64/dl-machine.h | 12 +++- 10 files changed, 175 insertions(+), 144 deletions(-) delete mode 100644 sysdeps/unix/sysv/linux/x86/cpu-features.c create mode 100644 sysdeps/unix/sysv/linux/x86_64/dl-cet.h diff --git a/sysdeps/unix/sysv/linux/x86/cpu-features.c b/sysdeps/unix/sysv/linux/x86/cpu-features.c deleted file mode 100644 index 0e6e2bf855..0000000000 --- a/sysdeps/unix/sysv/linux/x86/cpu-features.c +++ /dev/null @@ -1,49 +0,0 @@ -/* Initialize CPU feature data for Linux/x86. - This file is part of the GNU C Library. - Copyright (C) 2018-2023 Free Software Foundation, Inc. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - . */ - -#if CET_ENABLED -# include -# include - -static inline int __attribute__ ((always_inline)) -get_cet_status (void) -{ - unsigned long long kernel_feature; - unsigned int status = 0; - if (INTERNAL_SYSCALL_CALL (arch_prctl, ARCH_SHSTK_STATUS, - &kernel_feature) == 0) - { - if ((kernel_feature & ARCH_SHSTK_SHSTK) != 0) - status = GNU_PROPERTY_X86_FEATURE_1_SHSTK; - } - return status; -} - -# ifndef SHARED -static inline void -x86_setup_tls (void) -{ - __libc_setup_tls (); - THREAD_SETMEM (THREAD_SELF, header.feature_1, GL(dl_x86_feature_1)); -} - -# define ARCH_SETUP_TLS() x86_setup_tls () -# endif -#endif - -#include diff --git a/sysdeps/unix/sysv/linux/x86/dl-cet.h b/sysdeps/unix/sysv/linux/x86/dl-cet.h index da220ac627..634c885d33 100644 --- a/sysdeps/unix/sysv/linux/x86/dl-cet.h +++ b/sysdeps/unix/sysv/linux/x86/dl-cet.h @@ -38,3 +38,26 @@ dl_cet_lock_cet (unsigned int cet_feature) return (int) INTERNAL_SYSCALL_CALL (arch_prctl, ARCH_SHSTK_LOCK, kernel_feature); } + +static inline unsigned int __attribute__ ((always_inline)) +dl_cet_get_cet_status (void) +{ + unsigned long long kernel_feature; + unsigned int status = 0; + if (INTERNAL_SYSCALL_CALL (arch_prctl, ARCH_SHSTK_STATUS, + &kernel_feature) == 0) + { + if ((kernel_feature & ARCH_SHSTK_SHSTK) != 0) + status = GNU_PROPERTY_X86_FEATURE_1_SHSTK; + } + return status; +} + +/* Enable shadow stack with a macro to avoid shadow stack underflow. */ +#define ENABLE_X86_CET(cet_feature) \ + if ((cet_feature & GNU_PROPERTY_X86_FEATURE_1_SHSTK)) \ + { \ + long long int kernel_feature = ARCH_SHSTK_SHSTK; \ + INTERNAL_SYSCALL_CALL (arch_prctl, ARCH_SHSTK_ENABLE, \ + kernel_feature); \ + } diff --git a/sysdeps/unix/sysv/linux/x86_64/dl-cet.h b/sysdeps/unix/sysv/linux/x86_64/dl-cet.h new file mode 100644 index 0000000000..e23e05c6b8 --- /dev/null +++ b/sysdeps/unix/sysv/linux/x86_64/dl-cet.h @@ -0,0 +1,47 @@ +/* Linux/x86-64 CET initializers function. + Copyright (C) 2023 Free Software Foundation, Inc. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include +#include_next + +#define X86_STRINGIFY_1(x) #x +#define X86_STRINGIFY(x) X86_STRINGIFY_1 (x) + +/* Enable shadow stack before calling _dl_init if it is enabled in + GL(dl_x86_feature_1). Call _dl_setup_x86_features to setup shadow + stack. */ +#define RTLD_START_ENABLE_X86_FEATURES \ +"\ + # Check if shadow stack is enabled in GL(dl_x86_feature_1).\n\ + movl _rtld_local+" X86_STRINGIFY (RTLD_GLOBAL_DL_X86_FEATURE_1_OFFSET) "(%rip), %edx\n\ + testl $" X86_STRINGIFY (X86_FEATURE_1_SHSTK) ", %edx\n\ + jz 1f\n\ + # Enable shadow stack if enabled in GL(dl_x86_feature_1).\n\ + movl $" X86_STRINGIFY (ARCH_SHSTK_SHSTK) ", %esi\n\ + movl $" X86_STRINGIFY (ARCH_SHSTK_ENABLE) ", %edi\n\ + movl $" X86_STRINGIFY (__NR_arch_prctl) ", %eax\n\ + syscall\n\ +1:\n\ + # Pass GL(dl_x86_feature_1) to _dl_cet_setup_features.\n\ + movl %edx, %edi\n\ + # Align stack for the _dl_cet_setup_features call.\n\ + andq $-16, %rsp\n\ + call _dl_cet_setup_features\n\ + # Restore %rax and %rsp from %r12 and %r13.\n\ + movq %r12, %rax\n\ + movq %r13, %rsp\n\ +" diff --git a/sysdeps/x86/cpu-features-offsets.sym b/sysdeps/x86/cpu-features-offsets.sym index 6d03cea8e8..5429f60632 100644 --- a/sysdeps/x86/cpu-features-offsets.sym +++ b/sysdeps/x86/cpu-features-offsets.sym @@ -4,3 +4,4 @@ RTLD_GLOBAL_RO_DL_X86_CPU_FEATURES_OFFSET offsetof (struct rtld_global_ro, _dl_x86_cpu_features) XSAVE_STATE_SIZE_OFFSET offsetof (struct cpu_features, xsave_state_size) +RTLD_GLOBAL_DL_X86_FEATURE_1_OFFSET offsetof (struct rtld_global, _dl_x86_feature_1) diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c index f180f0d9a4..097868c1d9 100644 --- a/sysdeps/x86/cpu-features.c +++ b/sysdeps/x86/cpu-features.c @@ -1106,57 +1106,6 @@ no_cpuid: TUNABLE_CALLBACK (set_x86_ibt)); TUNABLE_GET (x86_shstk, tunable_val_t *, TUNABLE_CALLBACK (set_x86_shstk)); - - /* Check CET status. */ - unsigned int cet_status = get_cet_status (); - - if ((cet_status & GNU_PROPERTY_X86_FEATURE_1_IBT) == 0) - CPU_FEATURE_UNSET (cpu_features, IBT) - if ((cet_status & GNU_PROPERTY_X86_FEATURE_1_SHSTK) == 0) - CPU_FEATURE_UNSET (cpu_features, SHSTK) - - if (cet_status) - { - GL(dl_x86_feature_1) = cet_status; - -# ifndef SHARED - /* Check if IBT and SHSTK are enabled by kernel. */ - if ((cet_status - & (GNU_PROPERTY_X86_FEATURE_1_IBT - | GNU_PROPERTY_X86_FEATURE_1_SHSTK))) - { - /* Disable IBT and/or SHSTK if they are enabled by kernel, but - disabled by environment variable: - - GLIBC_TUNABLES=glibc.cpu.hwcaps=-IBT,-SHSTK - */ - unsigned int cet_feature = 0; - if (!CPU_FEATURE_USABLE (IBT)) - cet_feature |= (cet_status - & GNU_PROPERTY_X86_FEATURE_1_IBT); - if (!CPU_FEATURE_USABLE (SHSTK)) - cet_feature |= (cet_status - & GNU_PROPERTY_X86_FEATURE_1_SHSTK); - - if (cet_feature) - { - int res = dl_cet_disable_cet (cet_feature); - - /* Clear the disabled bits in dl_x86_feature_1. */ - if (res == 0) - GL(dl_x86_feature_1) &= ~cet_feature; - } - - /* Lock CET if IBT or SHSTK is enabled in executable. Don't - lock CET if IBT or SHSTK is enabled permissively. */ - if (GL(dl_x86_feature_control).ibt != cet_permissive - && GL(dl_x86_feature_control).shstk != cet_permissive) - dl_cet_lock_cet (GL(dl_x86_feature_1) - & (GNU_PROPERTY_X86_FEATURE_1_IBT - | GNU_PROPERTY_X86_FEATURE_1_SHSTK)); - } -# endif - } #endif #ifndef SHARED diff --git a/sysdeps/x86/dl-cet.c b/sysdeps/x86/dl-cet.c index 8b911fd931..f40f8e17b0 100644 --- a/sysdeps/x86/dl-cet.c +++ b/sysdeps/x86/dl-cet.c @@ -172,40 +172,11 @@ dl_cet_check_startup (struct link_map *m, struct dl_cet_info *info) = info->enable_feature_1 ^ info->feature_1_enabled; if (disable_feature_1 != 0) { - /* Disable features in the kernel because of legacy objects or - cet_always_off. */ - if (dl_cet_disable_cet (disable_feature_1) != 0) - _dl_fatal_printf ("%s: can't disable x86 Features\n", - info->program); - /* Clear the disabled bits. Sync dl_x86_feature_1 and info->feature_1_enabled with info->enable_feature_1. */ info->feature_1_enabled = info->enable_feature_1; GL(dl_x86_feature_1) = info->enable_feature_1; } - - if (HAS_CPU_FEATURE (IBT) || HAS_CPU_FEATURE (SHSTK)) - { - /* Lock CET features only if IBT or SHSTK are enabled and are not - enabled permissively. */ - unsigned int feature_1_lock = 0; - - if (((info->feature_1_enabled & GNU_PROPERTY_X86_FEATURE_1_IBT) - != 0) - && info->enable_ibt_type != cet_permissive) - feature_1_lock |= GNU_PROPERTY_X86_FEATURE_1_IBT; - - if (((info->feature_1_enabled & GNU_PROPERTY_X86_FEATURE_1_SHSTK) - != 0) - && info->enable_shstk_type != cet_permissive) - feature_1_lock |= GNU_PROPERTY_X86_FEATURE_1_SHSTK; - - if (feature_1_lock != 0 - && dl_cet_lock_cet (feature_1_lock) != 0) - _dl_fatal_printf ("%s: can't lock CET\n", info->program); - } - - THREAD_SETMEM (THREAD_SELF, header.feature_1, GL(dl_x86_feature_1)); } #endif @@ -291,6 +262,15 @@ dl_cet_check (struct link_map *m, const char *program) { struct dl_cet_info info; + /* CET is enabled only if RTLD_START_ENABLE_X86_FEATURES is defined. */ +#if defined SHARED && defined RTLD_START_ENABLE_X86_FEATURES + /* Set dl_x86_feature_1 to features enabled in the executable. */ + if (program != NULL) + GL(dl_x86_feature_1) = (m->l_x86_feature_1_and + & (X86_FEATURE_1_IBT + | X86_FEATURE_1_SHSTK)); +#endif + /* Check how IBT and SHSTK should be enabled. */ info.enable_ibt_type = GL(dl_x86_feature_control).ibt; info.enable_shstk_type = GL(dl_x86_feature_control).shstk; @@ -300,17 +280,9 @@ dl_cet_check (struct link_map *m, const char *program) /* No legacy object check if IBT and SHSTK are always on. */ if (info.enable_ibt_type == cet_always_on && info.enable_shstk_type == cet_always_on) - { -#ifdef SHARED - /* Set it only during startup. */ - if (program != NULL) - THREAD_SETMEM (THREAD_SELF, header.feature_1, - info.feature_1_enabled); -#endif - return; - } + return; - /* Check if IBT and SHSTK were enabled by kernel. */ + /* Check if IBT and SHSTK were enabled. */ if (info.feature_1_enabled == 0) return; @@ -344,6 +316,33 @@ _dl_cet_open_check (struct link_map *l) dl_cet_check (l, NULL); } +/* Set GL(dl_x86_feature_1) to the enabled features and clear the + active bits of the disabled features. */ + +attribute_hidden +void +_dl_cet_setup_features (unsigned int cet_feature) +{ + /* NB: cet_feature == GL(dl_x86_feature_1) which is set to features + enabled from executable, not necessarily supported by kernel. */ + if (cet_feature) + { + cet_feature = dl_cet_get_cet_status (); + if (cet_feature) + { + THREAD_SETMEM (THREAD_SELF, header.feature_1, cet_feature); + + /* Lock CET if IBT or SHSTK is enabled in executable. Don't + lock CET if IBT or SHSTK is enabled permissively. */ + if (GL(dl_x86_feature_control).ibt != cet_permissive + && (GL(dl_x86_feature_control).shstk != cet_permissive)) + dl_cet_lock_cet (cet_feature); + } + /* Sync GL(dl_x86_feature_1) with kernel. */ + GL(dl_x86_feature_1) = cet_feature; + } +} + #ifdef SHARED # ifndef LINKAGE diff --git a/sysdeps/x86/get-cpuid-feature-leaf.c b/sysdeps/x86/get-cpuid-feature-leaf.c index 40a46cc79c..9317a6b494 100644 --- a/sysdeps/x86/get-cpuid-feature-leaf.c +++ b/sysdeps/x86/get-cpuid-feature-leaf.c @@ -24,7 +24,7 @@ __x86_get_cpuid_feature_leaf (unsigned int leaf) static const struct cpuid_feature feature = {}; if (leaf < CPUID_INDEX_MAX) return ((const struct cpuid_feature *) - &GLRO(dl_x86_cpu_features).features[leaf]); + &GLRO(dl_x86_cpu_features).features[leaf]); else return &feature; } diff --git a/sysdeps/x86/include/cpu-features.h b/sysdeps/x86/include/cpu-features.h index 2d7427a6c0..23bd8146a2 100644 --- a/sysdeps/x86/include/cpu-features.h +++ b/sysdeps/x86/include/cpu-features.h @@ -990,6 +990,9 @@ extern const struct cpu_features *_dl_x86_get_cpu_features (void) # define INIT_ARCH() # define _dl_x86_get_cpu_features() (&GLRO(dl_x86_cpu_features)) extern void _dl_x86_init_cpu_features (void) attribute_hidden; + +extern void _dl_cet_setup_features (unsigned int) + attribute_hidden; #endif #ifdef __x86_64__ diff --git a/sysdeps/x86/libc-start.h b/sysdeps/x86/libc-start.h index e93da6ef3d..856230daeb 100644 --- a/sysdeps/x86/libc-start.h +++ b/sysdeps/x86/libc-start.h @@ -19,7 +19,57 @@ #ifndef SHARED # define ARCH_SETUP_IREL() apply_irel () # define ARCH_APPLY_IREL() -# ifndef ARCH_SETUP_TLS -# define ARCH_SETUP_TLS() __libc_setup_tls () +# ifdef __CET__ +/* Get CET features enabled in the static executable. */ + +static inline unsigned int +get_cet_feature (void) +{ + /* Check if CET is supported and not disabled by tunables. */ + struct cpu_features *cpu_features + = (struct cpu_features *) __get_cpu_features (); + unsigned int cet_feature = 0; + if (CPU_FEATURE_USABLE_P (cpu_features, IBT)) + cet_feature |= GNU_PROPERTY_X86_FEATURE_1_IBT; + if (CPU_FEATURE_USABLE_P (cpu_features, SHSTK)) + cet_feature |= GNU_PROPERTY_X86_FEATURE_1_SHSTK; + if (!cet_feature) + return cet_feature; + + struct link_map *main_map = _dl_get_dl_main_map (); + + /* Scan program headers backward to check PT_GNU_PROPERTY early for + x86 feature bits on static executable. */ + const ElfW(Phdr) *phdr = GL(dl_phdr); + const ElfW(Phdr) *ph; + for (ph = phdr + GL(dl_phnum); ph != phdr; ph--) + if (ph[-1].p_type == PT_GNU_PROPERTY) + { + _dl_process_pt_gnu_property (main_map, -1, &ph[-1]); + /* Enable IBT and SHSTK only if they are enabled on static + executable. */ + cet_feature &= (main_map->l_x86_feature_1_and + & (GNU_PROPERTY_X86_FEATURE_1_IBT + | GNU_PROPERTY_X86_FEATURE_1_SHSTK)); + /* Set GL(dl_x86_feature_1) to the enabled CET features. */ + GL(dl_x86_feature_1) = cet_feature; + break; + } + + return cet_feature; +} + +/* The function using this macro to enable shadow stack must not return + to avoid shadow stack underflow. */ +# define ARCH_SETUP_TLS() \ + { \ + __libc_setup_tls (); \ + \ + unsigned int cet_feature = get_cet_feature (); \ + ENABLE_X86_CET (cet_feature); \ + _dl_cet_setup_features (cet_feature); \ + } +# else +# define ARCH_SETUP_TLS() __libc_setup_tls () # endif #endif /* !SHARED */ diff --git a/sysdeps/x86_64/dl-machine.h b/sysdeps/x86_64/dl-machine.h index 581a2f1a9e..faeae723cb 100644 --- a/sysdeps/x86_64/dl-machine.h +++ b/sysdeps/x86_64/dl-machine.h @@ -29,6 +29,11 @@ #include #include #include +#ifdef __CET__ +# include +#else +# define RTLD_START_ENABLE_X86_FEATURES +#endif /* Return nonzero iff ELF header is compatible with the running host. */ static inline int __attribute__ ((unused)) @@ -146,13 +151,16 @@ _start:\n\ _dl_start_user:\n\ # Save the user entry point address in %r12.\n\ movq %rax, %r12\n\ + # Save %rsp value in %r13.\n\ + movq %rsp, %r13\n\ +"\ + RTLD_START_ENABLE_X86_FEATURES \ +"\ # Read the original argument count.\n\ movq (%rsp), %rdx\n\ # Call _dl_init (struct link_map *main_map, int argc, char **argv, char **env)\n\ # argc -> rsi\n\ movq %rdx, %rsi\n\ - # Save %rsp value in %r13.\n\ - movq %rsp, %r13\n\ # And align stack for the _dl_init call. \n\ andq $-16, %rsp\n\ # _dl_loaded -> rdi\n\ From patchwork Sat Dec 16 16:53:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. 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(localhost [IPv6:::1]) by gnu-cfl-3.localdomain (Postfix) with ESMTP id EFD4774063D; Sat, 16 Dec 2023 08:53:25 -0800 (PST) From: "H.J. Lu" To: libc-alpha@sourceware.org Cc: rick.p.edgecombe@intel.com Subject: [PATCH v2 13/16] x86/cet: Check feature_1 in TCB for active IBT and SHSTK Date: Sat, 16 Dec 2023 08:53:22 -0800 Message-ID: <20231216165325.2584919-14-hjl.tools@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231216165325.2584919-1-hjl.tools@gmail.com> References: <20231216165325.2584919-1-hjl.tools@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-3024.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Initially, IBT and SHSTK are marked as active when CPU supports them and CET are enabled in glibc. They can be disabled early by tunables before relocation. Since after relocation, GLRO(dl_x86_cpu_features) becomes read-only, we can't update GLRO(dl_x86_cpu_features) to mark IBT and SHSTK as inactive. Instead, check the feature_1 field in TCB to decide if IBT and SHST are active. --- sysdeps/x86/bits/platform/x86.h | 8 ++++++++ sysdeps/x86/get-cpuid-feature-leaf.c | 11 ++++++++++- sysdeps/x86/sys/platform/x86.h | 17 +++++++++++++++++ 3 files changed, 35 insertions(+), 1 deletion(-) diff --git a/sysdeps/x86/bits/platform/x86.h b/sysdeps/x86/bits/platform/x86.h index 1e23d53ba2..1575ae53fb 100644 --- a/sysdeps/x86/bits/platform/x86.h +++ b/sysdeps/x86/bits/platform/x86.h @@ -337,3 +337,11 @@ enum x86_cpu_AVX10_YMM = x86_cpu_index_24_ecx_0_ebx + 17, x86_cpu_AVX10_ZMM = x86_cpu_index_24_ecx_0_ebx + 18, }; + +/* Bits in the feature_1 field in TCB. */ + +enum +{ + x86_feature_1_ibt = 1U << 0, + x86_feature_1_shstk = 1U << 1 +}; diff --git a/sysdeps/x86/get-cpuid-feature-leaf.c b/sysdeps/x86/get-cpuid-feature-leaf.c index 9317a6b494..f69936b31e 100644 --- a/sysdeps/x86/get-cpuid-feature-leaf.c +++ b/sysdeps/x86/get-cpuid-feature-leaf.c @@ -15,9 +15,18 @@ License along with the GNU C Library; if not, see . */ - +#include +#include #include +#ifdef __x86_64__ +# ifdef __LP64__ +_Static_assert (FEATURE_1_OFFSET == 72, "FEATURE_1_OFFSET != 72"); +# else +_Static_assert (FEATURE_1_OFFSET == 40, "FEATURE_1_OFFSET != 40"); +# endif +#endif + const struct cpuid_feature * __x86_get_cpuid_feature_leaf (unsigned int leaf) { diff --git a/sysdeps/x86/sys/platform/x86.h b/sysdeps/x86/sys/platform/x86.h index 1ea2c5fc0b..89b1b16f22 100644 --- a/sysdeps/x86/sys/platform/x86.h +++ b/sysdeps/x86/sys/platform/x86.h @@ -45,6 +45,23 @@ x86_cpu_present (unsigned int __index) static __inline__ _Bool x86_cpu_active (unsigned int __index) { + if (__index == x86_cpu_IBT || __index == x86_cpu_SHSTK) + { +#ifdef __x86_64__ + unsigned int __feature_1; +# ifdef __LP64__ + __asm__ ("mov %%fs:72, %0" : "=r" (__feature_1)); +# else + __asm__ ("mov %%fs:40, %0" : "=r" (__feature_1)); +# endif + if (__index == x86_cpu_IBT) + return __feature_1 & x86_feature_1_ibt; + else + return __feature_1 & x86_feature_1_shstk; +#else + return false; +#endif + } const struct cpuid_feature *__ptr = __x86_get_cpuid_feature_leaf (__index / (8 * sizeof (unsigned int) * 4)); unsigned int __reg From patchwork Sat Dec 16 16:53:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. 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Lu" To: libc-alpha@sourceware.org Cc: rick.p.edgecombe@intel.com Subject: [PATCH v2 14/16] x86/cet: Don't disable CET if not single threaded Date: Sat, 16 Dec 2023 08:53:23 -0800 Message-ID: <20231216165325.2584919-15-hjl.tools@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231216165325.2584919-1-hjl.tools@gmail.com> References: <20231216165325.2584919-1-hjl.tools@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-3024.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org In permissive mode, don't disable IBT nor SHSTK when dlopening a legacy shared library if not single threaded since IBT and SHSTK may be still enabled in other threads. Other threads with IBT or SHSTK enabled will crash when calling functions in the legacy shared library. Instead, an error will be issued. --- sysdeps/x86/dl-cet.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/sysdeps/x86/dl-cet.c b/sysdeps/x86/dl-cet.c index f40f8e17b0..25add215f2 100644 --- a/sysdeps/x86/dl-cet.c +++ b/sysdeps/x86/dl-cet.c @@ -20,6 +20,7 @@ #include #include #include +#include /* GNU_PROPERTY_X86_FEATURE_1_IBT and GNU_PROPERTY_X86_FEATURE_1_SHSTK are defined in , which are only available for C sources. @@ -204,7 +205,10 @@ dl_cet_check_dlopen (struct link_map *m, struct dl_cet_info *info) && (info->feature_1_legacy & GNU_PROPERTY_X86_FEATURE_1_IBT) != 0) { - if (info->enable_ibt_type != cet_permissive) + /* Don't disable IBT if not single threaded since IBT may be still + enabled in other threads. */ + if (info->enable_ibt_type != cet_permissive + || !SINGLE_THREAD_P) { legacy_obj = info->feature_1_legacy_ibt; msg = N_("rebuild shared object with IBT support enabled"); @@ -220,7 +224,10 @@ dl_cet_check_dlopen (struct link_map *m, struct dl_cet_info *info) && (info->feature_1_legacy & GNU_PROPERTY_X86_FEATURE_1_SHSTK) != 0) { - if (info->enable_shstk_type != cet_permissive) + /* Don't disable SHSTK if not single threaded since SHSTK may be + still enabled in other threads. */ + if (info->enable_shstk_type != cet_permissive + || !SINGLE_THREAD_P) { legacy_obj = info->feature_1_legacy_shstk; msg = N_("rebuild shared object with SHSTK support enabled"); From patchwork Sat Dec 16 16:53:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. 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(localhost [IPv6:::1]) by gnu-cfl-3.localdomain (Postfix) with ESMTP id 13F1574063F; Sat, 16 Dec 2023 08:53:26 -0800 (PST) From: "H.J. Lu" To: libc-alpha@sourceware.org Cc: rick.p.edgecombe@intel.com Subject: [PATCH v2 15/16] x86/cet: Don't set CET active by default Date: Sat, 16 Dec 2023 08:53:24 -0800 Message-ID: <20231216165325.2584919-16-hjl.tools@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231216165325.2584919-1-hjl.tools@gmail.com> References: <20231216165325.2584919-1-hjl.tools@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-3024.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Not all CET enabled applications and libraries have been properly tested in CET enabled environments. Some CET enabled applications or libraries will crash or misbehave when CET is enabled. Don't set CET active by default so that all applications and libraries will run normally regardless of whether CET is active or not. Shadow stack can be enabled by $ export GLIBC_TUNABLES=glibc.cpu.hwcaps=SHSTK at run-time if shadow stack can be enabled by kernel. NB: This commit can be reverted if it is OK to enable CET by default for all applications and libraries. --- sysdeps/x86/cpu-features.c | 2 +- sysdeps/x86/cpu-tunables.c | 17 ++++++++++++++++- 2 files changed, 17 insertions(+), 2 deletions(-) diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c index 097868c1d9..80a07ac589 100644 --- a/sysdeps/x86/cpu-features.c +++ b/sysdeps/x86/cpu-features.c @@ -110,7 +110,7 @@ update_active (struct cpu_features *cpu_features) if (!CPU_FEATURES_CPU_P (cpu_features, RTM_ALWAYS_ABORT)) CPU_FEATURE_SET_ACTIVE (cpu_features, RTM); -#if CET_ENABLED +#if CET_ENABLED && 0 CPU_FEATURE_SET_ACTIVE (cpu_features, IBT); CPU_FEATURE_SET_ACTIVE (cpu_features, SHSTK); #endif diff --git a/sysdeps/x86/cpu-tunables.c b/sysdeps/x86/cpu-tunables.c index 5697885226..8f4f25efb0 100644 --- a/sysdeps/x86/cpu-tunables.c +++ b/sysdeps/x86/cpu-tunables.c @@ -34,6 +34,18 @@ break; \ } +#define CHECK_GLIBC_IFUNC_CPU_BOTH(f, cpu_features, name, \ + disable, len) \ + _Static_assert (sizeof (#name) - 1 == len, #name " != " #len); \ + if (memcmp (f, #name, len) == 0) \ + { \ + if (disable) \ + CPU_FEATURE_UNSET (cpu_features, name) \ + else \ + CPU_FEATURE_SET_ACTIVE (cpu_features, name) \ + break; \ + } + /* Disable a preferred feature NAME. We don't enable a preferred feature which isn't available. */ #define CHECK_GLIBC_IFUNC_PREFERRED_OFF(f, cpu_features, name, len) \ @@ -149,11 +161,14 @@ TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *valp) } break; case 5: + { + CHECK_GLIBC_IFUNC_CPU_BOTH (n, cpu_features, SHSTK, disable, + 5); + } if (disable) { CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, LZCNT, 5); CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, MOVBE, 5); - CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, SHSTK, 5); CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, SSSE3, 5); CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, XSAVE, 5); } From patchwork Sat Dec 16 16:53:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. 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(localhost [IPv6:::1]) by gnu-cfl-3.localdomain (Postfix) with ESMTP id 205F0740640; Sat, 16 Dec 2023 08:53:26 -0800 (PST) From: "H.J. Lu" To: libc-alpha@sourceware.org Cc: rick.p.edgecombe@intel.com Subject: [PATCH v2 16/16] x86/cet: Run some CET tests with shadow stack Date: Sat, 16 Dec 2023 08:53:25 -0800 Message-ID: <20231216165325.2584919-17-hjl.tools@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231216165325.2584919-1-hjl.tools@gmail.com> References: <20231216165325.2584919-1-hjl.tools@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-3024.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org When CET is disabled by default, run some CET tests with shadow stack enabled using $ export GLIBC_TUNABLES=glibc.cpu.hwcaps=SHSTK --- sysdeps/x86/Makefile | 14 ++++++++++++++ sysdeps/x86/tst-shstk-legacy-1e-static.sh | 1 + sysdeps/x86/tst-shstk-legacy-1e.sh | 1 + sysdeps/x86/tst-shstk-legacy-1g.sh | 1 + 4 files changed, 17 insertions(+) diff --git a/sysdeps/x86/Makefile b/sysdeps/x86/Makefile index 6911a07a87..d751eaedf4 100644 --- a/sysdeps/x86/Makefile +++ b/sysdeps/x86/Makefile @@ -247,6 +247,13 @@ CFLAGS-tst-cet-legacy-10-static.c += -mshstk CFLAGS-tst-cet-legacy-10a.c += -fcf-protection=none CFLAGS-tst-cet-legacy-10a-static.c += -fcf-protection=none +tst-cet-legacy-4-ENV = GLIBC_TUNABLES=glibc.cpu.hwcaps=SHSTK +tst-cet-legacy-6-ENV = GLIBC_TUNABLES=glibc.cpu.hwcaps=SHSTK +tst-cet-legacy-10-ENV = GLIBC_TUNABLES=glibc.cpu.hwcaps=SHSTK +tst-cet-legacy-10-static-ENV = GLIBC_TUNABLES=glibc.cpu.hwcaps=SHSTK +tst-cet-legacy-10a-ENV = GLIBC_TUNABLES=glibc.cpu.hwcaps=SHSTK +tst-cet-legacy-10a-static-ENV = GLIBC_TUNABLES=glibc.cpu.hwcaps=SHSTK + CFLAGS-tst-shstk-legacy-1a.c += -fcf-protection=none CFLAGS-tst-shstk-legacy-1a-static.c += -fcf-protection=none CFLAGS-tst-shstk-legacy-1d.c += -fcf-protection=none @@ -286,14 +293,20 @@ tst-cet-legacy-6b-ENV = GLIBC_TUNABLES=glibc.cpu.hwcaps=-IBT,-SHSTK tst-cet-legacy-9-ENV = GLIBC_TUNABLES=glibc.cpu.hwcaps=-IBT,-SHSTK tst-cet-legacy-9-static-ENV = GLIBC_TUNABLES=glibc.cpu.hwcaps=-IBT,-SHSTK +tst-shstk-legacy-1a-ENV = GLIBC_TUNABLES=glibc.cpu.hwcaps=SHSTK +tst-shstk-legacy-1a-static-ENV = GLIBC_TUNABLES=glibc.cpu.hwcaps=SHSTK $(objpfx)tst-shstk-legacy-1a: $(objpfx)tst-shstk-legacy-1-extra.o $(objpfx)tst-shstk-legacy-1a-static: $(objpfx)tst-shstk-legacy-1-extra.o +tst-shstk-legacy-1b-ENV = GLIBC_TUNABLES=glibc.cpu.hwcaps=SHSTK +tst-shstk-legacy-1b-static-ENV = GLIBC_TUNABLES=glibc.cpu.hwcaps=SHSTK $(objpfx)tst-shstk-legacy-1b: $(objpfx)tst-shstk-legacy-1-extra.o $(objpfx)tst-shstk-legacy-1b-static: $(objpfx)tst-shstk-legacy-1-extra.o tst-shstk-legacy-1c-ENV = GLIBC_TUNABLES=glibc.cpu.hwcaps=-SHSTK tst-shstk-legacy-1c-static-ENV = GLIBC_TUNABLES=glibc.cpu.hwcaps=-SHSTK $(objpfx)tst-shstk-legacy-1c: $(objpfx)tst-shstk-legacy-1-extra.o $(objpfx)tst-shstk-legacy-1c-static: $(objpfx)tst-shstk-legacy-1-extra.o +tst-shstk-legacy-1d-ENV = GLIBC_TUNABLES=glibc.cpu.hwcaps=SHSTK +tst-shstk-legacy-1d-static-ENV = GLIBC_TUNABLES=glibc.cpu.hwcaps=SHSTK $(objpfx)tst-shstk-legacy-1d: $(objpfx)tst-shstk-legacy-1-extra.o $(objpfx)tst-shstk-legacy-1d-static: $(objpfx)tst-shstk-legacy-1-extra.o $(objpfx)tst-shstk-legacy-1e: $(objpfx)tst-shstk-legacy-1-extra.o @@ -307,6 +320,7 @@ $(objpfx)tst-shstk-legacy-1e-static.out: \ $(objpfx)tst-shstk-legacy-1e-static $(SHELL) $< $(common-objpfx) 2> $@; \ $(evaluate-test) +tst-shstk-legacy-1f-ENV = GLIBC_TUNABLES=glibc.cpu.hwcaps=SHSTK $(objpfx)tst-shstk-legacy-1f: $(objpfx)tst-shstk-legacy-mod-1.so $(objpfx)tst-shstk-legacy-mod-1.so: \ $(objpfx)tst-shstk-legacy-mod-1.os \ diff --git a/sysdeps/x86/tst-shstk-legacy-1e-static.sh b/sysdeps/x86/tst-shstk-legacy-1e-static.sh index e943aec70e..008c50dae3 100755 --- a/sysdeps/x86/tst-shstk-legacy-1e-static.sh +++ b/sysdeps/x86/tst-shstk-legacy-1e-static.sh @@ -20,6 +20,7 @@ common_objpfx=$1; shift +GLIBC_TUNABLES=glibc.cpu.hwcaps=SHSTK \ ${common_objpfx}elf/tst-shstk-legacy-1e-static # The exit status should only be unsupported (77) or segfault (139). status=$? diff --git a/sysdeps/x86/tst-shstk-legacy-1e.sh b/sysdeps/x86/tst-shstk-legacy-1e.sh index b0467aa899..82f2acbf75 100755 --- a/sysdeps/x86/tst-shstk-legacy-1e.sh +++ b/sysdeps/x86/tst-shstk-legacy-1e.sh @@ -21,6 +21,7 @@ common_objpfx=$1; shift test_program_prefix=$1; shift +GLIBC_TUNABLES=glibc.cpu.hwcaps=SHSTK \ ${test_program_prefix} \ ${common_objpfx}elf/tst-shstk-legacy-1e # The exit status should only be unsupported (77) or segfault (139). diff --git a/sysdeps/x86/tst-shstk-legacy-1g.sh b/sysdeps/x86/tst-shstk-legacy-1g.sh index c112bf6d8d..261eef7cac 100755 --- a/sysdeps/x86/tst-shstk-legacy-1g.sh +++ b/sysdeps/x86/tst-shstk-legacy-1g.sh @@ -21,6 +21,7 @@ common_objpfx=$1; shift test_program_prefix=$1; shift +GLIBC_TUNABLES=glibc.cpu.hwcaps=SHSTK \ ${test_program_prefix} \ ${common_objpfx}elf/tst-shstk-legacy-1g # The exit status should only be unsupported (77) or segfault (139).