From patchwork Wed Sep 27 14:18:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Chopin X-Patchwork-Id: 76764 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id E5D323861820 for ; Wed, 27 Sep 2023 14:19:04 +0000 (GMT) X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from smtp-relay-internal-1.canonical.com (smtp-relay-internal-1.canonical.com [185.125.188.123]) by sourceware.org (Postfix) with ESMTPS id 9BC9D3857B93 for ; Wed, 27 Sep 2023 14:18:49 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 9BC9D3857B93 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=canonical.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=canonical.com Received: from mail-wr1-f71.google.com (mail-wr1-f71.google.com [209.85.221.71]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id A4B863F36F for ; Wed, 27 Sep 2023 14:18:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1695824328; bh=1ztPZBVRU3Kd+4PZHOcN8g/397mr7Tukm1IhPwlELvE=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=RQ2/zP7iFn1a9wSS7q11yBp+qBFDRmoUBHmwn9+/dsG7rGM0CVGJNfXGtB7mPwZPu 9ptcOs1NZDTL10MV7wq2KjJ2P5+SyUwGQfEzdvzbpJ8wN3wsF3awgtbPrn7Xnpfrin lgwTt/j1l7edEXFaXYR2doIcDOEhrfjHHZw83r1EboKsiHsrPdi2VrxGdTRHpCkMbJ S8AYyzP6jSgA666R1QFfgBUIH04a+DuYrz/cYKdtyOIQBbxq71AQov8B/501Rs8cVN rUhTgNhe5P8vJkVNMZAIa6Gb2LEAk8DN3wt4FMG3atuv5upAq5nxlJvHftZA/eaG39 lBJWcdWrodYRg== Received: by mail-wr1-f71.google.com with SMTP id ffacd0b85a97d-320004980a2so9175429f8f.1 for ; Wed, 27 Sep 2023 07:18:48 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1695824327; x=1696429127; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=1ztPZBVRU3Kd+4PZHOcN8g/397mr7Tukm1IhPwlELvE=; b=J4AiSMF9qdcDd5NTjO/fjcewaJIUa2bxFC7GBUQ0pEjbbKDh2fM3f5QETLApYw1IU0 SXY5XOG6LmVekVO3LPhXVCIusP/XopFF+Gfap4UZbY+nmztZaXpeuV9JjSBSj0TISrY6 i/s8FPFt7YmAf3Lke/1eHtXudeCYqC3qNjkqKvlPVkxAWAyD1l22c7D2V7oLbfMg6/zw Q/x1ViTlB8e4PP8eUQKWSqKdYUGk3cRFYE5Bdcz+rfvXtkhXPtde97zocEYXq9rGQ2yr HwKshLmtvTQO3nSz+YAnjO02RRgVFFukb/FroE6Hm7HCfIIBvx+CajGL4Azj2IPUE3xp o23g== X-Gm-Message-State: AOJu0YxHdjFJt7gFfBhcgUy4Q85ImP7PGbuAtMFXigra2JJAntbfAjfp 72AlJ044fw/DE2tGXwKf7AES7fI8iiPpWu17VbzdSr9G86uvPV7BBm3QKHkhuOLw3A+HLUxtiQP IQ5SGnO2gTHU/W11It48Q90l6Z5Yq10JhsZnfoeYMMouvNg== X-Received: by 2002:adf:e74e:0:b0:321:67d8:c3e7 with SMTP id c14-20020adfe74e000000b0032167d8c3e7mr1944802wrn.12.1695824327261; Wed, 27 Sep 2023 07:18:47 -0700 (PDT) X-Google-Smtp-Source: AGHT+IF9u0J6XLdmVdT3tchCq1PzMWdG2PjhKgAy9h+22YHgyWIM9l2Tp7EkcmR95lfS0QfH5GB55g== X-Received: by 2002:adf:e74e:0:b0:321:67d8:c3e7 with SMTP id c14-20020adfe74e000000b0032167d8c3e7mr1944783wrn.12.1695824326890; Wed, 27 Sep 2023 07:18:46 -0700 (PDT) Received: from localhost ([2a01:e0a:169:7380:f5e8:22a0:4e89:9c30]) by smtp.gmail.com with ESMTPSA id t3-20020a5d5343000000b0030ae53550f5sm17085830wrv.51.2023.09.27.07.18.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Sep 2023 07:18:46 -0700 (PDT) From: Simon Chopin To: libc-alpha@sourceware.org Cc: Joe Ramsay , Simon Chopin Subject: [RFC PATCH] arm64/math-vec.h: guard off the vector types with CPP constants Date: Wed, 27 Sep 2023 16:18:39 +0200 Message-Id: <20230927141839.57421-1-simon.chopin@canonical.com> X-Mailer: git-send-email 2.40.1 MIME-Version: 1.0 X-Spam-Status: No, score=-10.8 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org When implementing a C parser, it's apparently common to use GCC as preprocessor. However, those programs don't necessarily define the SIMD intrinsic types exposed by GCC, resulting in failed compilations. This patch adds a way for those users to bypass entirely the vector types, as they usually aren't interested in libmvec anyway. They can just add -D__ARM_VEC_MATH_DISABLED=1 to the CPP_FLAGS they pass on to GCC. Fixes: BZ #25422 Signed-off-by: Simon Chopin --- sysdeps/aarch64/fpu/bits/math-vector.h | 32 ++++++++++++++------------ 1 file changed, 17 insertions(+), 15 deletions(-) base-commit: 64b1a44183a3094672ed304532bedb9acc707554 diff --git a/sysdeps/aarch64/fpu/bits/math-vector.h b/sysdeps/aarch64/fpu/bits/math-vector.h index 7c200599c1..c739e6bc5d 100644 --- a/sysdeps/aarch64/fpu/bits/math-vector.h +++ b/sysdeps/aarch64/fpu/bits/math-vector.h @@ -25,29 +25,30 @@ /* Get default empty definitions for simd declarations. */ #include -#if __GNUC_PREREQ(9, 0) -# define __ADVSIMD_VEC_MATH_SUPPORTED +#if defined __ARM_ARCH_8A && !defined __ARM_VEC_MATH_DISABLED +# if __GNUC_PREREQ(9, 0) +# define __ADVSIMD_VEC_MATH_SUPPORTED typedef __Float32x4_t __f32x4_t; typedef __Float64x2_t __f64x2_t; -#elif __glibc_clang_prereq(8, 0) -# define __ADVSIMD_VEC_MATH_SUPPORTED +# elif __glibc_clang_prereq(8, 0) +# define __ADVSIMD_VEC_MATH_SUPPORTED typedef __attribute__ ((__neon_vector_type__ (4))) float __f32x4_t; typedef __attribute__ ((__neon_vector_type__ (2))) double __f64x2_t; -#endif +# endif -#if __GNUC_PREREQ(10, 0) || __glibc_clang_prereq(11, 0) -# define __SVE_VEC_MATH_SUPPORTED +# if __GNUC_PREREQ(10, 0) || __glibc_clang_prereq(11, 0) +# define __SVE_VEC_MATH_SUPPORTED typedef __SVFloat32_t __sv_f32_t; typedef __SVFloat64_t __sv_f64_t; typedef __SVBool_t __sv_bool_t; -#endif +# endif /* If vector types and vector PCS are unsupported in the working compiler, no choice but to omit vector math declarations. */ -#ifdef __ADVSIMD_VEC_MATH_SUPPORTED +# ifdef __ADVSIMD_VEC_MATH_SUPPORTED -# define __vpcs __attribute__ ((__aarch64_vector_pcs__)) +# define __vpcs __attribute__ ((__aarch64_vector_pcs__)) __vpcs __f32x4_t _ZGVnN4v_cosf (__f32x4_t); __vpcs __f32x4_t _ZGVnN4v_expf (__f32x4_t); @@ -59,10 +60,10 @@ __vpcs __f64x2_t _ZGVnN2v_exp (__f64x2_t); __vpcs __f64x2_t _ZGVnN2v_log (__f64x2_t); __vpcs __f64x2_t _ZGVnN2v_sin (__f64x2_t); -# undef __ADVSIMD_VEC_MATH_SUPPORTED -#endif /* __ADVSIMD_VEC_MATH_SUPPORTED */ +# undef __ADVSIMD_VEC_MATH_SUPPORTED +# endif /* __ADVSIMD_VEC_MATH_SUPPORTED */ -#ifdef __SVE_VEC_MATH_SUPPORTED +# ifdef __SVE_VEC_MATH_SUPPORTED __sv_f32_t _ZGVsMxv_cosf (__sv_f32_t, __sv_bool_t); __sv_f32_t _ZGVsMxv_expf (__sv_f32_t, __sv_bool_t); @@ -74,5 +75,6 @@ __sv_f64_t _ZGVsMxv_exp (__sv_f64_t, __sv_bool_t); __sv_f64_t _ZGVsMxv_log (__sv_f64_t, __sv_bool_t); __sv_f64_t _ZGVsMxv_sin (__sv_f64_t, __sv_bool_t); -# undef __SVE_VEC_MATH_SUPPORTED -#endif /* __SVE_VEC_MATH_SUPPORTED */ +# undef __SVE_VEC_MATH_SUPPORTED +# endif /* __SVE_VEC_MATH_SUPPORTED */ +#endif /* _ARM_ARCH_8A && !__ARM_VEC_MATH_DISABLED */