From patchwork Tue Sep 12 08:27:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manjunath Matti X-Patchwork-Id: 75710 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 44BF73858296 for ; Tue, 12 Sep 2023 08:28:12 +0000 (GMT) X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by sourceware.org (Postfix) with ESMTPS id 7E0453858D3C for ; Tue, 12 Sep 2023 08:27:53 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 7E0453858D3C Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linux.ibm.com Received: from pps.filterd (m0353726.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 38C8ACeM025422 for ; Tue, 12 Sep 2023 08:27:52 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding; s=pp1; bh=EBNRVK1a+o7QSjTTQPYU7BGrIra3n2arL7I4zdSa40Y=; b=pcdZVdOAFFrZIchuobAefVUSNPjMzgWqPQu0cfZAhMcDmtCyQGmNF3/LUtPX2JFhgGY5 7kNaXiActHs4ggcUJ7FjFLsBCZ4A6jVX2vst5lDMxTi0j5/wYUeuTZnni+dpOD7e8rca iO6XLYmYLs2eOb61gJs8GCJRmRjwkgOAnxoX+2qWqDLhKV/ui2FDPphgPdGHlAocvBUX YipjQ0Z8ybPFvA3OpN32q1Py/9lT+h8Z/L5DEa1/VsCu8HCh95PZJE6a1rup/pMqIAUq dTKn4UtszB0P8eEi7yGvcImLPIAj1sz2fz1woQmDEnbQchHI3nxcYZl7hyFQfBOwmP5m QA== Received: from ppma22.wdc07v.mail.ibm.com (5c.69.3da9.ip4.static.sl-reverse.com [169.61.105.92]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3t2kts94uc-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Tue, 12 Sep 2023 08:27:52 +0000 Received: from pps.filterd (ppma22.wdc07v.mail.ibm.com [127.0.0.1]) by ppma22.wdc07v.mail.ibm.com (8.17.1.19/8.17.1.19) with ESMTP id 38C7hAvc012069 for ; Tue, 12 Sep 2023 08:27:50 GMT Received: from smtprelay06.fra02v.mail.ibm.com ([9.218.2.230]) by ppma22.wdc07v.mail.ibm.com (PPS) with ESMTPS id 3t13dyhtmc-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Tue, 12 Sep 2023 08:27:50 +0000 Received: from smtpav03.fra02v.mail.ibm.com (smtpav03.fra02v.mail.ibm.com [10.20.54.102]) by smtprelay06.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 38C8Rl3f45089176 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 12 Sep 2023 08:27:47 GMT Received: from smtpav03.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 9A37C2004B; Tue, 12 Sep 2023 08:27:47 +0000 (GMT) Received: from smtpav03.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B119020043; Tue, 12 Sep 2023 08:27:46 +0000 (GMT) Received: from ltcden2-lp1.aus.stglabs.ibm.com (unknown [9.3.90.43]) by smtpav03.fra02v.mail.ibm.com (Postfix) with ESMTP; Tue, 12 Sep 2023 08:27:46 +0000 (GMT) From: Manjunath Matti To: libc-alpha@sourceware.org Cc: rajis@linux.ibm.com, Manjunath Matti , Carl Love Subject: [PATCH] [powerpc] fegetenv_and_set_rn now uses the builtins provided by GCC. Date: Tue, 12 Sep 2023 03:27:30 -0500 Message-Id: <20230912082730.3951006-1-mmatti@linux.ibm.com> X-Mailer: git-send-email 2.39.3 MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: cfYMtBRljO7BeFGUnqsKG8UMgiPRvray X-Proofpoint-GUID: cfYMtBRljO7BeFGUnqsKG8UMgiPRvray X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.601,FMLib:17.11.176.26 definitions=2023-09-12_06,2023-09-05_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 mlxlogscore=665 clxscore=1011 suspectscore=0 lowpriorityscore=0 spamscore=0 phishscore=0 mlxscore=0 malwarescore=0 adultscore=0 priorityscore=1501 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2308100000 definitions=main-2309120068 X-Spam-Status: No, score=-12.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org On powerpc, SET_RESTORE_ROUND uses inline assembly to optimize the prologue get/save/set rounding mode operations for POWER9 and later by using 'mffscrn' where possible, this was introduced by commit f1c56cdff09f650ad721fae026eb6a3651631f3d. GCC version 14 onwards supports builtins as __builtin_set_fpscr_rn which now returns the FPSCR fields in a double. This feature is available on Power9 when the __SET_FPSCR_RN_RETURNS_FPSCR__ macro is defined along with __builtin_set_fpscr_rn enabled. GCC commit ef3bbc69d15707e4db6e2f198c621effb636cc26 adds this feature. Changes are done to use __builtin_set_fpscr_rn instead of mffscrn or mffscrni in __fe_mffscrn(rn). Suggested-by: Carl Love --- sysdeps/powerpc/fpu/fenv_libc.h | 23 ++++++++++++++++++++--- 1 file changed, 20 insertions(+), 3 deletions(-) diff --git a/sysdeps/powerpc/fpu/fenv_libc.h b/sysdeps/powerpc/fpu/fenv_libc.h index fa5e1c697e..55484eb229 100644 --- a/sysdeps/powerpc/fpu/fenv_libc.h +++ b/sysdeps/powerpc/fpu/fenv_libc.h @@ -84,8 +84,15 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden; __fr.fenv; \ }) +/* GCC version 14 onwards supports builtins as __builtin_set_fpscr_rn and + now returns the FPSCR fields in a double. This support is available + on Power9 when the __SET_FPSCR_RN_RETURNS_FPSCR__ macro is defined. + To retain backward compatibility with older GCC, we still retain the + old inline assembly implementation. */ +#if defined _ARCH_PWR9 && defined __SET_FPSCR_RN_RETURNS_FPSCR__ +#define fegetenv_and_set_rn(rn) __builtin_set_fpscr_rn (rn) +#elif defined _ARCH_PWR9 /* Like fegetenv_control, but also sets the rounding mode. */ -#ifdef _ARCH_PWR9 #define fegetenv_and_set_rn(rn) __fe_mffscrn (rn) #else /* 'mffscrn' will decode to 'mffs' on ARCH < 3_00, which is still necessary @@ -148,7 +155,12 @@ typedef union static inline int __fesetround_inline (int round) { -#ifdef _ARCH_PWR9 +/* GCC version 14 onwards supports builtins as __builtin_set_fpscr_rn and + now returns the FPSCR fields in a double. This support is available + on Power9 when the __SET_FPSCR_RN_RETURNS_FPSCR__ macro is defined. */ +#if defined _ARCH_PWR9 && defined __SET_FPSCR_RN_RETURNS_FPSCR__ + __builtin_set_fpscr_rn (round); +#elif defined _ARCH_PWR9 __fe_mffscrn (round); #else if (__glibc_likely (GLRO(dl_hwcap2) & PPC_FEATURE2_ARCH_3_00)) @@ -178,7 +190,12 @@ __fesetround_inline (int round) static inline void __fesetround_inline_nocheck (const int round) { -#ifdef _ARCH_PWR9 +/* GCC version 14 onwards supports builtins as __builtin_set_fpscr_rn and + now returns the FPSCR fields in a double. This support is available + on Power9 when the __SET_FPSCR_RN_RETURNS_FPSCR__ macro is defined. */ +#if defined _ARCH_PWR9 && defined __SET_FPSCR_RN_RETURNS_FPSCR__ + __builtin_set_fpscr_rn (round); +#elif defined _ARCH_PWR9 __fe_mffscrn (round); #else if (__glibc_likely (GLRO(dl_hwcap2) & PPC_FEATURE2_ARCH_3_00))