From patchwork Wed Jun 23 21:36:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 43987 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 3CBA83890410 for ; Wed, 23 Jun 2021 21:37:39 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 3CBA83890410 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1624484259; bh=JISPv34GX6uNAv2+xRQnc9W1FSDP/DmJDOdb1yOMuGU=; h=References:In-Reply-To:Date:Subject:To:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=VUlurnEaBEhfztUyCh8SCYRuq9A/P1WGbojFqiddhLdKd1nd9ztzMuzXM5r1Vgd2s 9kl5XPp//N8VcTwogUUo2kAShlcndVmmA89NtANLS601LpDV+8fmRVxtstbAUHG/6n zTizEAwbUXLkZKuMIj8e8BsAaT1b4pPLjperv5w0= X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mail-pl1-x635.google.com (mail-pl1-x635.google.com [IPv6:2607:f8b0:4864:20::635]) by sourceware.org (Postfix) with ESMTPS id DB89F3855002 for ; Wed, 23 Jun 2021 21:37:17 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org DB89F3855002 Received: by mail-pl1-x635.google.com with SMTP id y13so1849148plc.8 for ; Wed, 23 Jun 2021 14:37:17 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=JISPv34GX6uNAv2+xRQnc9W1FSDP/DmJDOdb1yOMuGU=; b=ALiebX3QPDQ54n+bfNgQP8zwrN9aowGmqDHXS0OVvK0o8D2IkkvQGsPerE7+g36Oij F8Gd5NzkfNob3lgLLg90v2RtHQPODJuqKavI/UktlCg5KA1lT7EDLKnnxKbVKrAjlmll 269t0cUELB4u5IZaNQLDFhXEO35fqfdKhIPHELY5ueaKpaqIYpf5EPPaT6eqR2jYPr9l d8dbV+XJseK61OPKumijKfsjxKdGJoa+hwydHqpj8Zos2zRnXJGVz9AuHCGYz3NyKCS6 pnXhKg4ZGMOpfwE8JO4hPC/uX6ogTIMbYFEiNB/ZbLXSN/uLdxx4rv39hDAK5KKH8oB2 rjaQ== X-Gm-Message-State: AOAM533Hgb69JeNm9mSfZtGzWCnJ/ErwiBNVOUprm4dtGUla1vLelWrX gD63kqHr9f3Zn3CYlbCt91AqZG9057MirZC6D1QIeOKd47o= X-Google-Smtp-Source: ABdhPJz51uVch/c6i1hGxgMMbnH8vtJ9NwMKXukivugrz6l5c+Pu2JuBSRckFjmE0UwnxR8+DhGnJu9+EXXshxHiEwI= X-Received: by 2002:a17:90a:4d84:: with SMTP id m4mr11713773pjh.136.1624484236899; Wed, 23 Jun 2021 14:37:16 -0700 (PDT) MIME-Version: 1.0 References: <20210623145419.3025540-1-adhemerval.zanella@linaro.org> <7b2557a7-9b86-7121-a366-5fee330f8364@linaro.org> In-Reply-To: <7b2557a7-9b86-7121-a366-5fee330f8364@linaro.org> Date: Wed, 23 Jun 2021 14:36:41 -0700 Message-ID: Subject: [PATCH] x86: Copy IBT and SHSTK usable only if CET is enabled To: Adhemerval Zanella X-Spam-Status: No, score=-3031.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "H.J. Lu via Libc-alpha" From: "H.J. Lu" Reply-To: "H.J. Lu" Cc: GNU C Library Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Sender: "Libc-alpha" On Wed, Jun 23, 2021 at 2:15 PM Adhemerval Zanella wrote: > > > > On 23/06/2021 17:41, H.J. Lu wrote: > >> @@ -216,12 +233,15 @@ do_test (int argc, char **argv) > >> fails += CHECK_PROC (sgx, SGX); > >> fails += CHECK_PROC (sgx_lc, SGX_LC); > >> fails += CHECK_PROC (sha_ni, SHA); > >> - fails += CHECK_PROC (shstk, SHSTK); > >> + fails += CHECK_PROC_OPTIN (shstk, SHSTK); > > > > Why do you need this? If kernel doesn't support SHSTK, it will be > > turned off: > > > > /* Check CET status. */ > > unsigned int cet_status = get_cet_status (); > > > > if ((cet_status & GNU_PROPERTY_X86_FEATURE_1_IBT) == 0) > > CPU_FEATURE_UNSET (cpu_features, IBT) > > if ((cet_status & GNU_PROPERTY_X86_FEATURE_1_SHSTK) == 0) > > CPU_FEATURE_UNSET (cpu_features, SHSTK) > > The problem is this is only enabled for CET_ENABLED, the configuration I am using > does not define __CET__. So the CPU I am using does support SHSTK, but the bit > ended up not being cleared by glibc. IBT and SHSTK usable bits are copied from CPUID feature bits and later cleared if kernel doesn't support CET. Copy IBT and SHSTK usable only if CET is enabled so that they aren't set on CET capable processors with non-CET enabled glibc. Can you try this? Reviewed-by: H.J. Lu From 976f4e2b9cb6e0766123a1cc3c2dc4c4339e0e75 Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Wed, 23 Jun 2021 14:27:58 -0700 Subject: [PATCH] x86: Copy IBT and SHSTK usable only if CET is enabled IBT and SHSTK usable bits are copied from CPUID feature bits and later cleared if kernel doesn't support CET. Copy IBT and SHSTK usable only if CET is enabled so that they aren't set on CET capable processors with non-CET enabled glibc. --- sysdeps/x86/cpu-features.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c index 81275dbdfa..a1d8d11cc4 100644 --- a/sysdeps/x86/cpu-features.c +++ b/sysdeps/x86/cpu-features.c @@ -76,7 +76,6 @@ update_usable (struct cpu_features *cpu_features) CPU_FEATURE_SET_USABLE (cpu_features, PREFETCHWT1); CPU_FEATURE_SET_USABLE (cpu_features, OSPKE); CPU_FEATURE_SET_USABLE (cpu_features, WAITPKG); - CPU_FEATURE_SET_USABLE (cpu_features, SHSTK); CPU_FEATURE_SET_USABLE (cpu_features, GFNI); CPU_FEATURE_SET_USABLE (cpu_features, RDPID); CPU_FEATURE_SET_USABLE (cpu_features, RDRAND); @@ -86,7 +85,6 @@ update_usable (struct cpu_features *cpu_features) CPU_FEATURE_SET_USABLE (cpu_features, FSRM); CPU_FEATURE_SET_USABLE (cpu_features, SERIALIZE); CPU_FEATURE_SET_USABLE (cpu_features, TSXLDTRK); - CPU_FEATURE_SET_USABLE (cpu_features, IBT); CPU_FEATURE_SET_USABLE (cpu_features, LAHF64_SAHF64); CPU_FEATURE_SET_USABLE (cpu_features, LZCNT); CPU_FEATURE_SET_USABLE (cpu_features, SSE4A); @@ -99,6 +97,11 @@ update_usable (struct cpu_features *cpu_features) CPU_FEATURE_SET_USABLE (cpu_features, FSRCS); CPU_FEATURE_SET_USABLE (cpu_features, PTWRITE); +#if CET_ENABLED + CPU_FEATURE_SET_USABLE (cpu_features, IBT); + CPU_FEATURE_SET_USABLE (cpu_features, SHSTK); +#endif + /* Can we call xgetbv? */ if (CPU_FEATURES_CPU_P (cpu_features, OSXSAVE)) { -- 2.31.1