From patchwork Wed Feb 3 15:09:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 41917 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id D613139AC85D; Wed, 3 Feb 2021 15:10:22 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org D613139AC85D DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1612365022; bh=RvLT8HUd9JJUD3b2HCZMz+O385M1AH3IW/eAeE2dK5Y=; h=References:In-Reply-To:Date:Subject:To:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=ZNEqDT/TYwBKXj0uPjPmwKoFgor0tPogu2RWmdm208v4g1wxUHnQpV3TkLL/cPfpT mobonVXfOTPXQT2b4ndR3oFItzihsCXmfl1JdhY29E73yW2bBGS0V2nmkMW5tMSNS5 DOq2fDjdpkN+AFsgWeWDKhIrnGoRTzwI1LtT+kRY= X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mail-oi1-x22c.google.com (mail-oi1-x22c.google.com [IPv6:2607:f8b0:4864:20::22c]) by sourceware.org (Postfix) with ESMTPS id 1F35E39960F7 for ; Wed, 3 Feb 2021 15:10:17 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 1F35E39960F7 Received: by mail-oi1-x22c.google.com with SMTP id w8so198380oie.2 for ; Wed, 03 Feb 2021 07:10:17 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=RvLT8HUd9JJUD3b2HCZMz+O385M1AH3IW/eAeE2dK5Y=; b=s0mWehHL6M7fMaPr5FbTVqMP5/aEFUxvhjDvUFmpiFUyyl5I/rFNU8pj4WJw339Z9O 7KEVTenP6dH3nppLQ58EyCFDLMlvSRrewarCLvWUyKW2Y6DFtknKqD0UUrlM1osqE9fl 5bS65dNI17Gn3NsQj8i8jAs9V8vHZ0vxKWwQro89G15x7TTBcW0P1rZauaWxdVOOAB69 jNyT0/CIlV0emVyDIr0poHtuVVJiXsPP1iLM7DDEmx2U9aVPDj7dTX/6l7bOC6tb0LtP vOcbktKa91BhTwMJR8qQ+nv2Y0qers3469ICwWFRbj/jD/r2otH8/DVKhL1ql9JWStlX J9zA== X-Gm-Message-State: AOAM532emT57eXIyzz8kMqFFsPnnkqjnZBDeGHRuXKLouhDHdyVJgAdv j0q1NEQG1yfh6pz+ka8iPsXbG0tF/xUxtsqdTfwItFQXUW0= X-Google-Smtp-Source: ABdhPJyh1FGquPdryHDYMhwP6ylkfpb9krZc+PK6erUjrhO6swTIymTXux+0gi3zVUfZ+IU/7G0dt9G1t3FC7I3PotI= X-Received: by 2002:aca:f503:: with SMTP id t3mr2330620oih.79.1612365016149; Wed, 03 Feb 2021 07:10:16 -0800 (PST) MIME-Version: 1.0 References: <20210202215112.1002416-1-hjl.tools@gmail.com> In-Reply-To: Date: Wed, 3 Feb 2021 07:09:40 -0800 Message-ID: Subject: [PATCH v2] x86: Require full ISA support for x86-64 level marker [BZ #27318] To: Joseph Myers X-Spam-Status: No, score=-3035.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, URIBL_BLACK autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "H.J. Lu via Libc-alpha" From: "H.J. Lu" Reply-To: "H.J. Lu" Cc: GNU C Library Errors-To: libc-alpha-bounces@sourceware.org Sender: "Libc-alpha" On Wed, Feb 3, 2021 at 6:14 AM Joseph Myers wrote: > > On Tue, 2 Feb 2021, H.J. Lu wrote: > > > On Tue, Feb 2, 2021 at 3:11 PM Joseph Myers wrote: > > > > > > On Tue, 2 Feb 2021, H.J. Lu via Libc-alpha wrote: > > > > > > > Instead, we should require full ISA support for x86-64 level marker to > > > > detect such case: > > > > > > > > In file included from ../sysdeps/x86/abi-note.c:28: > > > > ../sysdeps/x86/isa-level.c:62:5: error: #error "Invalid ISAs for x86-64 ISA level v3" > > > > 62 | # error "Invalid ISAs for x86-64 ISA level v3" > > > > | ^~~~~ > > > > > > When does this error occur (what conditions for compilation / > > > configuration of glibc)? > > > > It happens at compile time when glibc is built with "-march=sandybridge". > > That's bad. Since glibc supports execution on Sandy Bridge processors, > compilation with -march=sandybridge should (a) work, with no special > configure options needed and (b) produce a glibc that works on Sandy > Bridge, with no special configure options needed. I understand that bug > 27318 is reporting that (b) fails at present. We need to fix (b) without > breaking (a). > > This is not specific at all to x86_64. It applies to all architectures > and processors supported by glibc: compiling with a compiler that defaults > to any such processor should just work, regardless of how that processor > relates to particular ISA levels in the glibc-hwcaps machinery. > > > We can add a configure option, --disable-isa-level, to unset > > INCLUDE_X86_ISA_LEVEL. The resulting libc.so doesn't have a marker > > and won't run on all machines. > > No special configure option should be needed for (a) and (b) to hold. > They are general principles for any processor supported by glibc, for any > architecture. Here is the updated patch to disable x86-64 level marker for -march=sandybridge which enables ISAs between v2 and v3. From 7aa4117dabbd62d49f5b19ce36edd959d7bb260d Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Tue, 2 Feb 2021 13:45:58 -0800 Subject: [PATCH v2] x86: Require full ISA support for x86-64 level marker [BZ #27318] Since -march=sandybridge enables ISAs in x86-64 ISA level v3, the v3 marker is set on libc.so. We couldn't set the needed ISA marker to v2 since this libc won't run on all v2 machines. Technically, the v3 marker is correct. But the resulting libc.so won't run on Sandy Brigde, which is a v2 machine, even when libc is compiled with -march=sandybridge: $ ./elf/ld.so ./libc.so ./libc.so: (p) CPU ISA level is lower than required: needed: 7; got: 3 Instead, we require full ISA support for x86-64 level marker and disable x86-64 level marker for -march=sandybridge which enables ISAs between v2 and v3. --- sysdeps/x86/configure | 7 ++++++- sysdeps/x86/configure.ac | 2 +- sysdeps/x86/isa-level.c | 21 ++++++++++++++++++++- 3 files changed, 27 insertions(+), 3 deletions(-) diff --git a/sysdeps/x86/configure b/sysdeps/x86/configure index 5e32dc62b3..5b20646843 100644 --- a/sysdeps/x86/configure +++ b/sysdeps/x86/configure @@ -133,7 +133,12 @@ if { ac_try='${CC-cc} $CFLAGS $CPPFLAGS -nostartfiles -nostdlib -r -o conftest c $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; }; then count=`LC_ALL=C $READELF -n conftest | grep NT_GNU_PROPERTY_TYPE_0 | wc -l` - if test "$count" = 1; then + if test "$count" = 1 && { ac_try='${CC-cc} $CFLAGS $CPPFLAGS -DINCLUDE_X86_ISA_LEVEL -S -o conftest.s $srcdir/sysdeps/x86/isa-level.c' + { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5 + (eval $ac_try) 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; }; then libc_cv_include_x86_isa_level=yes fi fi diff --git a/sysdeps/x86/configure.ac b/sysdeps/x86/configure.ac index f94088f377..54ecd33d2c 100644 --- a/sysdeps/x86/configure.ac +++ b/sysdeps/x86/configure.ac @@ -100,7 +100,7 @@ EOF libc_cv_include_x86_isa_level=no if AC_TRY_COMMAND(${CC-cc} $CFLAGS $CPPFLAGS -nostartfiles -nostdlib -r -o conftest conftest1.S conftest2.S); then count=`LC_ALL=C $READELF -n conftest | grep NT_GNU_PROPERTY_TYPE_0 | wc -l` - if test "$count" = 1; then + if test "$count" = 1 && AC_TRY_COMMAND(${CC-cc} $CFLAGS $CPPFLAGS -DINCLUDE_X86_ISA_LEVEL -S -o conftest.s $srcdir/sysdeps/x86/isa-level.c); then libc_cv_include_x86_isa_level=yes fi fi diff --git a/sysdeps/x86/isa-level.c b/sysdeps/x86/isa-level.c index aaf524cb56..7f83449061 100644 --- a/sysdeps/x86/isa-level.c +++ b/sysdeps/x86/isa-level.c @@ -25,12 +25,17 @@ License along with the GNU C Library; if not, see . */ -#include +#ifdef _LIBC +# include +#endif /* ELF program property for x86 ISA level. */ #ifdef INCLUDE_X86_ISA_LEVEL # if defined __x86_64__ || defined __FXSR__ || !defined _SOFT_FLOAT \ || defined __MMX__ || defined __SSE__ || defined __SSE2__ +# if !defined __SSE__ || !defined __SSE2__ +# error "Missing ISAs for x86-64 ISA level baseline" +# endif # define ISA_BASELINE GNU_PROPERTY_X86_ISA_1_BASELINE # else # define ISA_BASELINE 0 @@ -40,6 +45,11 @@ || (defined __x86_64__ && defined __LAHF_SAHF__) \ || defined __POPCNT__ || defined __SSE3__ \ || defined __SSSE3__ || defined __SSE4_1__ || defined __SSE4_2__ +# if !defined __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16 \ + || !defined __POPCNT__ || !defined __SSE3__ \ + || !defined __SSSE3__ || !defined __SSE4_1__ || !defined __SSE4_2__ +# error "Missing ISAs for x86-64 ISA level v2" +# endif # define ISA_V2 GNU_PROPERTY_X86_ISA_1_V2 # else # define ISA_V2 0 @@ -48,6 +58,10 @@ # if defined __AVX__ || defined __AVX2__ || defined __F16C__ \ || defined __FMA__ || defined __LZCNT__ || defined __MOVBE__ \ || defined __XSAVE__ +# if !defined __AVX__ || !defined __AVX2__ || !defined __F16C__ \ + || !defined __FMA__ || !defined __LZCNT__ +# error "Missing ISAs for x86-64 ISA level v3" +# endif # define ISA_V3 GNU_PROPERTY_X86_ISA_1_V3 # else # define ISA_V3 0 @@ -55,6 +69,11 @@ # if defined __AVX512F__ || defined __AVX512BW__ || defined __AVX512CD__ \ || defined __AVX512DQ__ || defined __AVX512VL__ +# if !defined __AVX512F__ || !defined __AVX512BW__ \ + || !defined __AVX512CD__ || !defined __AVX512DQ__ \ + || !defined __AVX512VL__ +# error "Missing ISAs for x86-64 ISA level v4" +# endif # define ISA_V4 GNU_PROPERTY_X86_ISA_1_V4 # else # define ISA_V4 0 -- 2.29.2