From patchwork Tue May 26 12:54:21 2015
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From: Andreas Schwab <schwab@suse.de>
To: "Pinski\, Andrew" <Andrew.Pinski@caviumnetworks.com>
Cc: Andrew Pinski <apinski@cavium.com>,
	"libc-alpha\@sourceware.org" <libc-alpha@sourceware.org>
Subject: Re: [PATCH 00/29] Add Support for AARCH64:ILP32
References: <1414396793-9005-1-git-send-email-apinski@cavium.com>
	<mvmsiaj8qv7.fsf@hawking.suse.de>
	<2E4D3A8D-548B-4318-9CE5-C8871E7EFD46@caviumnetworks.com>
X-Yow: Does that mean I'm not a well-adjusted person??
Date: Tue, 26 May 2015 14:54:21 +0200
In-Reply-To: <2E4D3A8D-548B-4318-9CE5-C8871E7EFD46@caviumnetworks.com>
	(Andrew Pinski's message of "Tue, 26 May 2015 12:37:22 +0000")
Message-ID: <mvmoal78poi.fsf@hawking.suse.de>
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"Pinski, Andrew" <Andrew.Pinski@caviumnetworks.com> writes:

> The kernel uapi or elf abi?

The C ABI.

> You can find a "beta" version of the elf abi on arm's web site. I suspect there is a few assembly files that need to be changed to support ilp32. Memcpy.S is one of them. I can't dig up the patch to fix them tonight though. 

Something like this?

diff --git a/sysdeps/aarch64/memcmp.S b/sysdeps/aarch64/memcmp.S
index b0b34fa..51dcba9 100644
--- a/sysdeps/aarch64/memcmp.S
+++ b/sysdeps/aarch64/memcmp.S
@@ -47,6 +47,11 @@
 #define mask		x13
 
 ENTRY_ALIGN (memcmp, 6)
+#ifdef __ILP32__
+	uxtw	src1, src1
+	uxtw	src2, src2
+	uxtw	limit, limit
+#endif
 	cbz	limit, L(ret0)
 	eor	tmp1, src1, src2
 	tst	tmp1, #7
diff --git a/sysdeps/aarch64/memcpy.S b/sysdeps/aarch64/memcpy.S
index b3d550e..63b3e2d 100644
--- a/sysdeps/aarch64/memcpy.S
+++ b/sysdeps/aarch64/memcpy.S
@@ -47,6 +47,11 @@
 
 ENTRY_ALIGN (memcpy, 6)
 
+#ifdef __ILP32__
+	uxtw	dstin, dstin
+	uxtw	src, src
+	uxtw	count, count
+#endif
 	mov	dst, dstin
 	cmp	count, #64
 	b.ge	L(cpy_not_short)
diff --git a/sysdeps/aarch64/memmove.S b/sysdeps/aarch64/memmove.S
index 8d0b328..82b571a 100644
--- a/sysdeps/aarch64/memmove.S
+++ b/sysdeps/aarch64/memmove.S
@@ -47,6 +47,11 @@
 
 ENTRY_ALIGN (memmove, 6)
 
+#ifdef __ILP32__
+	uxtw	dstin, dstin
+	uxtw	src, src
+	uxtw	count, count
+#endif
 	cmp	dstin, src
 	b.lo	L(downwards)
 	add	tmp1, src, count
diff --git a/sysdeps/aarch64/memset.S b/sysdeps/aarch64/memset.S
index 816640a..2ea2ace 100644
--- a/sysdeps/aarch64/memset.S
+++ b/sysdeps/aarch64/memset.S
@@ -53,6 +53,10 @@
 
 ENTRY_ALIGN (__memset, 6)
 
+#ifdef __ILP32__
+	uxtw	dstin, dstin
+	uxtw	count, count
+#endif
 	mov	dst, dstin		/* Preserve return value.  */
 	ands	A_lw, val, #255
 #ifndef DONT_USE_DC