From patchwork Thu Aug 2 15:54:13 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joseph Myers X-Patchwork-Id: 28740 Received: (qmail 105883 invoked by alias); 2 Aug 2018 15:54:22 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 105498 invoked by uid 89); 2 Aug 2018 15:54:21 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-24.5 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS, URIBL_RED autolearn=ham version=3.3.2 spammy= X-HELO: relay1.mentorg.com Date: Thu, 2 Aug 2018 15:54:13 +0000 From: Joseph Myers To: Subject: Do not define various fenv.h macros for MIPS soft-float (bug 23479) [committed] Message-ID: User-Agent: Alpine 2.20 (DEB 67 2015-01-07) MIME-Version: 1.0 MIPS soft-float glibc does not support floating-point exceptions and rounding modes, and uses a different ABI from hard-float so a soft-float compilation cannot use a glibc that does support floating-point exceptions and rounding modes. Thus, bits/fenv.h should not, when compiling for soft-float, define macros for the unsupported features. This patch changes it accordingly to define those macros only for hard-float. None of the exception macros are defined for soft-float, with FE_ALL_EXCEPT defined to 0 in that case, and only FE_TONEAREST is defined of the rounding-mode macros, and FE_NOMASK_ENV is not defined; this is consistent with how architectures lacking exception and rounding mode support generally define things in this header. As well as making the header more correct for this case, this also means the generic math_private.h optimizations for this case automatically apply (inlining libm-internal fenv.h function calls that are trivial when exceptions and rounding modes are not supported). The mips64 sfp-machine.h then needs similar changes to disable more of the exception and rounding mode handling for soft-float. (The mips32 sfp-machine.h is already used only for soft-float, has no integration with hardware exceptions or rounding modes and so needs no changes.) Existing binaries might use the old FE_NOMASK_ENV value as an argument to fesetenv / feupdateenv and expect an error for it (given that it was defined in a header that also defined FE_ALL_EXCEPT to a nonzero value). To preserve that error, wrappers for the fallback fesetenv and feupdateenv are created in sysdeps/mips/nofpu/. Tested for mips64 (hard-float and soft-float, all three ABIs). Committed. 2018-08-02 Joseph Myers [BZ #23479] * sysdeps/mips/bits/fenv.h (FE_INEXACT): Define only if [__mips_hard_float]. (FE_UNDERFLOW): Likewise. (FE_OVERFLOW): Likewise. (FE_DIVBYZERO): Likewise. (FE_INVALID): Likewise. (FE_ALL_EXCEPT): Define to 0 if [!__mips_hard_float]. (FE_TOWARDZERO): Define only if [__mips_hard_float]. (FE_UPWARD): Likewise. (FE_DOWNWARD): Likewise. (__FE_UNDEFINED): Define if [!__mips_hard_float] (FE_NOMASK_ENV): Define only if [__mips_hard_float]. * sysdeps/mips/mips64/sfp-machine.h (_FP_DECL_EX): Define only if [__mips_hard_float]. (FP_ROUNDMODE): Likewise. (FP_RND_NEAREST): Likewise. (FP_RND_ZERO): Likewise. (FP_RND_PINF): Likewise. (FP_RND_MINF): Likewise. (FP_EX_INVALID): Likewise. (FP_EX_OVERFLOW): Likewise. (FP_EX_UNDERFLOW): Likewise. (FP_EX_DIVZERO): Likewise. (FP_EX_INEXACT): Likewise. (FP_INIT_ROUNDMODE): Likewise. * sysdeps/mips/nofpu/fesetenv.c: New file. * sysdeps/mips/nofpu/feupdateenv.c: Likewise. diff --git a/sysdeps/mips/bits/fenv.h b/sysdeps/mips/bits/fenv.h index 37d0a9e..767595d 100644 --- a/sysdeps/mips/bits/fenv.h +++ b/sysdeps/mips/bits/fenv.h @@ -20,28 +20,30 @@ #endif +#ifdef __mips_hard_float + /* Define bits representing the exception. We use the bit positions of the appropriate bits in the FPU control word. */ enum { FE_INEXACT = -#define FE_INEXACT 0x04 +# define FE_INEXACT 0x04 FE_INEXACT, FE_UNDERFLOW = -#define FE_UNDERFLOW 0x08 +# define FE_UNDERFLOW 0x08 FE_UNDERFLOW, FE_OVERFLOW = -#define FE_OVERFLOW 0x10 +# define FE_OVERFLOW 0x10 FE_OVERFLOW, FE_DIVBYZERO = -#define FE_DIVBYZERO 0x20 +# define FE_DIVBYZERO 0x20 FE_DIVBYZERO, FE_INVALID = -#define FE_INVALID 0x40 +# define FE_INVALID 0x40 FE_INVALID, }; -#define FE_ALL_EXCEPT \ +# define FE_ALL_EXCEPT \ (FE_INEXACT | FE_DIVBYZERO | FE_UNDERFLOW | FE_OVERFLOW | FE_INVALID) /* The MIPS FPU supports all of the four defined rounding modes. We @@ -50,19 +52,37 @@ enum enum { FE_TONEAREST = -#define FE_TONEAREST 0x0 +# define FE_TONEAREST 0x0 FE_TONEAREST, FE_TOWARDZERO = -#define FE_TOWARDZERO 0x1 +# define FE_TOWARDZERO 0x1 FE_TOWARDZERO, FE_UPWARD = -#define FE_UPWARD 0x2 +# define FE_UPWARD 0x2 FE_UPWARD, FE_DOWNWARD = -#define FE_DOWNWARD 0x3 +# define FE_DOWNWARD 0x3 FE_DOWNWARD }; +#else + +/* In the soft-float case, only rounding to nearest is supported, with + no exceptions. */ + +enum + { + __FE_UNDEFINED = -1, + + FE_TONEAREST = +# define FE_TONEAREST 0x0 + FE_TONEAREST + }; + +# define FE_ALL_EXCEPT 0 + +#endif + /* Type representing exception flags. */ typedef unsigned short int fexcept_t; @@ -79,7 +99,7 @@ fenv_t; /* If the default argument is used we use this value. */ #define FE_DFL_ENV ((const fenv_t *) -1) -#ifdef __USE_GNU +#if defined __USE_GNU && defined __mips_hard_float /* Floating-point environment where none of the exception is masked. */ # define FE_NOMASK_ENV ((const fenv_t *) -2) #endif diff --git a/sysdeps/mips/mips64/sfp-machine.h b/sysdeps/mips/mips64/sfp-machine.h index 35cc4dd..c769ee8 100644 --- a/sysdeps/mips/mips64/sfp-machine.h +++ b/sysdeps/mips/mips64/sfp-machine.h @@ -74,6 +74,10 @@ } while (0) #endif +#define _FP_TININESS_AFTER_ROUNDING 1 + +#ifdef __mips_hard_float + #define _FP_DECL_EX fpu_control_t _fcw #define FP_ROUNDMODE (_fcw & 0x3) @@ -89,9 +93,6 @@ #define FP_EX_DIVZERO FE_DIVBYZERO #define FP_EX_INEXACT FE_INEXACT -#define _FP_TININESS_AFTER_ROUNDING 1 - -#ifdef __mips_hard_float #define FP_INIT_ROUNDMODE \ do { \ _FPU_GETCW (_fcw); \ @@ -103,6 +104,4 @@ do { \ _FPU_SETCW (_fcw | _fex | (_fex << 10)); \ } while (0) #define FP_TRAPPING_EXCEPTIONS ((_fcw >> 5) & 0x7c) -#else -#define FP_INIT_ROUNDMODE _fcw = FP_RND_NEAREST #endif diff --git a/sysdeps/mips/nofpu/fesetenv.c b/sysdeps/mips/nofpu/fesetenv.c new file mode 100644 index 0000000..4667e76 --- /dev/null +++ b/sysdeps/mips/nofpu/fesetenv.c @@ -0,0 +1,8 @@ +/* MIPS bits/fenv.h used to define exception macros for soft-float + despite that not supporting exceptions. Ensure use of the old + FE_NOMASK_ENV value still produces errors (see bug 17088). */ +#include +#undef FE_ALL_EXCEPT +#define FE_ALL_EXCEPT 0x7c +#define FE_NOMASK_ENV ((const fenv_t *) -2) +#include diff --git a/sysdeps/mips/nofpu/feupdateenv.c b/sysdeps/mips/nofpu/feupdateenv.c new file mode 100644 index 0000000..9a7e316 --- /dev/null +++ b/sysdeps/mips/nofpu/feupdateenv.c @@ -0,0 +1,8 @@ +/* MIPS bits/fenv.h used to define exception macros for soft-float + despite that not supporting exceptions. Ensure use of the old + FE_NOMASK_ENV value still produces errors (see bug 17088). */ +#include +#undef FE_ALL_EXCEPT +#define FE_ALL_EXCEPT 0x7c +#define FE_NOMASK_ENV ((const fenv_t *) -2) +#include