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[06/12] Add fesetexcept: ia64

Message ID alpine.DEB.2.20.1608112100330.1591@digraph.polyomino.org.uk
State Committed
Headers

Commit Message

Joseph Myers Aug. 11, 2016, 9:01 p.m. UTC 
  This patch adds an IA64 version of fesetexcept.  Untested.

2016-08-11  Joseph Myers  <joseph@codesourcery.com>

	* sysdeps/ia64/fpu/fesetexcept.c: New file.
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Patch

diff --git a/sysdeps/ia64/fpu/fesetexcept.c b/sysdeps/ia64/fpu/fesetexcept.c
new file mode 100644
index 0000000..d6004b6
--- /dev/null
+++ b/sysdeps/ia64/fpu/fesetexcept.c
@@ -0,0 +1,31 @@ 
+/* Set given exception flags.  IA64 version.
+   Copyright (C) 2016 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <fenv.h>
+
+int
+fesetexcept (int excepts)
+{
+  fenv_t fpsr;
+
+  __asm__ __volatile__ ("mov.m %0=ar.fpsr" : "=r" (fpsr));
+  fpsr |= ((excepts & FE_ALL_EXCEPT) << 13);
+  __asm__ __volatile__ ("mov.m ar.fpsr=%0" :: "r" (fpsr) : "memory");
+
+  return 0;
+}