From patchwork Fri Oct 12 11:49:25 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xue Feng X-Patchwork-Id: 29719 Received: (qmail 16616 invoked by alias); 12 Oct 2018 11:49:34 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 16544 invoked by uid 89); 12 Oct 2018 11:49:31 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.0 required=5.0 tests=BAYES_00, FORGED_HOTMAIL_RCVD2, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, MIME_BASE64_BLANKS, RCVD_IN_DNSWL_NONE, SPF_HELO_PASS, SPF_PASS autolearn=ham version=3.3.2 spammy=H*c:gb2312, Hx-languages-length:2751 X-HELO: APC01-SG2-obe.outbound.protection.outlook.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=hotmail.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=qz8GhXcLBA1/vqWfZZzIbOdvalsFwIv49aeotpOj/V0=; b=nGBmrtRCE0deG4QTR4aHJljoSSnHqYwbkGd3kuBDnua5hpiCDr/hO4YPaiJJ2q76HAb12LqWde9sF5/wjHbvq4GB8cXYaA7Pg87WuCfIES6Z/zzpFVeoxsGtBwkM3wPo4Ka24WhFXP7XK0FP5+E5BZpFzXZ3pBgWnG51Wn45RLyL8glLNqV5zXBkBwEbH8GyJimOjyRIq7zp/WVDuXHSDZwk4h/qA0ZwiN75Sj/5iAeXuy/NjgIM1vhuM2sm9eN79ddLn0odcXDoSp+XobJdyfPHSXSHYftxvOGtnk9/B228PTvkMCcl9qSWmkOykFraC4QsnaOkMthFkJTCfZoa3w== From: Xue Feng To: "libc-alpha@sourceware.org" CC: Feng Xue Subject: [PATCH 1/3] aarch64: Add AmpereComputing skylark to tunable cpu list Date: Fri, 12 Oct 2018 11:49:25 +0000 Message-ID: MIME-Version: 1.0 I'm from AmpereComputing Corp, and working on adding support for Skylark processor to glibc. Feng --- Skylark is a 64-bit CPU core released by AmpereComputing. Add its name to cpu list, and corresponding macro as utilities for later IFUNC dispatch. * manual/tunables.texi (Tunable glibc.cpu.name): Add skylark. * sysdeps/unix/sysv/linux/aarch64/cpu-features.c (cpu_list): Add skylark. * sysdeps/unix/sysv/linux/aarch64/cpu-features.h (IS_SKYLARK): New macro. --- ChangeLog | 8 ++++++++ manual/tunables.texi | 2 +- sysdeps/unix/sysv/linux/aarch64/cpu-features.c | 1 + sysdeps/unix/sysv/linux/aarch64/cpu-features.h | 3 +++ 4 files changed, 13 insertions(+), 1 deletion(-) diff --git a/ChangeLog b/ChangeLog index 10b38cc..2533c9d 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,11 @@ +2018-10-11 Feng Xue + + * manual/tunables.texi (Tunable glibc.cpu.name): Add skylark. + * sysdeps/unix/sysv/linux/aarch64/cpu-features.c (cpu_list): + Add skylark. + * sysdeps/unix/sysv/linux/aarch64/cpu-features.h (IS_SKYLARK): + New macro. + 2018-10-10 Joseph Myers * sysdeps/unix/sysv/linux/bits/shm.h: Include . diff --git a/manual/tunables.texi b/manual/tunables.texi index 3345a23..4fa61fc 100644 --- a/manual/tunables.texi +++ b/manual/tunables.texi @@ -333,7 +333,7 @@ This tunable is specific to powerpc, powerpc64 and powerpc64le. The @code{glibc.cpu.name=xxx} tunable allows the user to tell @theglibc{} to assume that the CPU is @code{xxx} where xxx may have one of these values: @code{generic}, @code{falkor}, @code{thunderxt88}, @code{thunderx2t99}, -@code{thunderx2t99p1}. +@code{thunderx2t99p1}, @code{skylark}. This tunable is specific to aarch64. @end deftp diff --git a/sysdeps/unix/sysv/linux/aarch64/cpu-features.c b/sysdeps/unix/sysv/linux/aarch64/cpu-features.c index b4f3485..6448493 100644 --- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.c +++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.c @@ -36,6 +36,7 @@ static struct cpu_list cpu_list[] = { {"thunderx2t99", 0x431F0AF0}, {"thunderx2t99p1", 0x420F5160}, {"phecda", 0x680F0000}, + {"skylark", 0x503F0001}, {"generic", 0x0} }; diff --git a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h index eb35adf..c53b65d 100644 --- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h +++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h @@ -52,6 +52,9 @@ #define IS_PHECDA(midr) (MIDR_IMPLEMENTOR(midr) == 'h' \ && MIDR_PARTNUM(midr) == 0x000) +#define IS_SKYLARK(midr) (MIDR_IMPLEMENTOR(midr) == 'P' \ + && MIDR_PARTNUM(midr) == 0x000) + struct cpu_features { uint64_t midr_el1;