From patchwork Fri Aug 3 13:38:15 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 28750 Received: (qmail 9099 invoked by alias); 3 Aug 2018 13:38:20 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 9089 invoked by uid 89); 3 Aug 2018 13:38:20 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-25.3 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-oi0-f67.google.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=yUEil99O641uesR7gBUEJtrzj0k7xCC2wu4xsTDjElw=; b=UUfHk2DhjlqAqLrHtlafYoZefkhbHvsBIDLcGzXSoqb9CXACOWRe/i8nN2+rBXzVF2 fO+xVLMtAxlPZlfuTCSXVnvWaMGx7twgM1chyskHhJ3uL1fMpNYtcFFiY0I7t3rKzj5G I/9ibw4D+8lARV8RPnNdPg6EPvIBXiCSp9UmYbz3nbaI9LA1FDuKoqTU/HLEmG4S/7Ba +i6YH7i9mDfzi0cPvkS4T/lBdIv60DrLHbhWhZccI+RBZ3gmZPJoAVlg6SOHPyBWMqSE 69BP1qMd1fU4oPzIyyZvTe9lFa3QlQgao0qW/wW2FcgGA4zkdZpUG3a/WOdEjnylP19T e2hQ== MIME-Version: 1.0 In-Reply-To: <579a6027-db5b-d080-d970-ef8f3bda9d96@redhat.com> References: <20180801152033.17968-1-hjl.tools@gmail.com> <579a6027-db5b-d080-d970-ef8f3bda9d96@redhat.com> From: "H.J. Lu" Date: Fri, 3 Aug 2018 06:38:15 -0700 Message-ID: Subject: Re: [PATCH] x86: Don't include in assembly codes To: Florian Weimer Cc: GNU C Library On Fri, Aug 3, 2018 at 5:45 AM, Florian Weimer wrote: > On 08/01/2018 05:20 PM, H.J. Lu wrote: >> >> There is no need to include in assembly codes since all >> x86 IFUNC selector functions are written in C. Tested on i686 and >> x86-64. There is no code change in libc.so, ld.so and libmvec.so. >> --- >> sysdeps/i386/i686/multiarch/bzero-ia32.S | 1 - >> sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core-avx2.S | 1 - >> sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core-avx2.S | 1 - >> sysdeps/x86_64/multiarch/memset-sse2-unaligned-erms.S | 1 - >> 4 files changed, 4 deletions(-) > > > Needs a ChangeLog entry. Actual change looks okay. > Here is the updated patch I am checking in with ChangeLog entry. Thanks. From 849f4349150633c82ad82e52f699eeda537c3e35 Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Thu, 26 Jul 2018 08:37:31 -0700 Subject: [PATCH] x86: Don't include in assembly codes There is no need to include in assembly codes since all x86 IFUNC selector functions are written in C. Tested on i686 and x86-64. There is no code change in libc.so, ld.so and libmvec.so. * sysdeps/i386/i686/multiarch/bzero-ia32.S: Don't include . * sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core-avx2.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core-avx2.S: Likewise. * sysdeps/x86_64/multiarch/memset-sse2-unaligned-erms.S: Likewise. --- sysdeps/i386/i686/multiarch/bzero-ia32.S | 1 - sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core-avx2.S | 1 - sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core-avx2.S | 1 - sysdeps/x86_64/multiarch/memset-sse2-unaligned-erms.S | 1 - 4 files changed, 4 deletions(-) diff --git a/sysdeps/i386/i686/multiarch/bzero-ia32.S b/sysdeps/i386/i686/multiarch/bzero-ia32.S index 68ff9e1e90..94d13e88f7 100644 --- a/sysdeps/i386/i686/multiarch/bzero-ia32.S +++ b/sysdeps/i386/i686/multiarch/bzero-ia32.S @@ -17,7 +17,6 @@ . */ #include -#include #if IS_IN (libc) # define __bzero __bzero_ia32 diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core-avx2.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core-avx2.S index b64c3390d6..87536a06a3 100644 --- a/sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core-avx2.S +++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core-avx2.S @@ -17,7 +17,6 @@ . */ #include -#include #define _ZGVeN8v_sin _ZGVeN8v_sin_avx2_wrapper #include "../svml_d_sin8_core.S" diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core-avx2.S b/sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core-avx2.S index e0b7fd787f..16713ba714 100644 --- a/sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core-avx2.S +++ b/sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core-avx2.S @@ -17,7 +17,6 @@ . */ #include -#include #define _ZGVeN16v_expf _ZGVeN16v_expf_avx2_wrapper #include "../svml_s_expf16_core.S" diff --git a/sysdeps/x86_64/multiarch/memset-sse2-unaligned-erms.S b/sysdeps/x86_64/multiarch/memset-sse2-unaligned-erms.S index be6671759b..56b81f5cc5 100644 --- a/sysdeps/x86_64/multiarch/memset-sse2-unaligned-erms.S +++ b/sysdeps/x86_64/multiarch/memset-sse2-unaligned-erms.S @@ -19,7 +19,6 @@ #include #include -#include #if IS_IN (libc) # define MEMSET_SYMBOL(p,s) p##_sse2_##s -- 2.17.1