From patchwork Mon Apr 8 11:08:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Weimer X-Patchwork-Id: 88166 X-Patchwork-Delegate: szabolcs.nagy@arm.com Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 7F55A3858430 for ; Mon, 8 Apr 2024 11:08:58 +0000 (GMT) X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by sourceware.org (Postfix) with ESMTPS id F3C15385841E for ; Mon, 8 Apr 2024 11:08:23 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org F3C15385841E Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=redhat.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=redhat.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org F3C15385841E Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=170.10.129.124 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1712574507; cv=none; b=G2YDSfPTe/29uc7meUkuENEqisxkkh1XolFzEulHTLDVpTRZB8kzWkZEXCj5LKjO+YwTZigDt3y13rZI5thO5J8nXCwGb/857Klfla/hA26zIKYuvglh+bL4t35n4ocXaq8pBWPEPir14rq73napWgj1CfJ4dRinVpLJ3ehxS40= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1712574507; c=relaxed/simple; bh=3bmXFMu4BlveFeyywMxv6q4aDU/eVN+t9rPm0TMenw0=; h=DKIM-Signature:From:To:Subject:Message-ID:Date:MIME-Version; b=eQFhWNsR2DrVZRZWUD+Imzy/7iEr1z3GzALCvOif8cp+DN5lmX9R2ngOTcknOd3syOZec01l8VbCv9Q4WW0+Ss2rnr1afCdnfROLu0FvJRJOOJ0cBkDRrUOvbxZ0tqFTPWYaYJgLDj4VsGYcwujS5NUHrbSdbxl518mJyc/poec= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1712574503; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=7zW9IF3tnB0z4Rmj1qEamCpjvLUrvJ5sMjaHRWdFt0Q=; b=crKMhTkXkzGzKq+UK16quR2/fFpacz6kYy/ZC7OezrmtDDvedzAsN63ZCvfZKhCQQ6Y2yN ZFH9hMp+9xFisT7y3+bDr4IdoCOoNa9TB+IP5baRXKs8cesZBy/FIix1asq0DH2meBM7N9 7Og172XVxP2ipX8CVxtOt8LgM8GqYo4= Received: from mimecast-mx02.redhat.com (mx-ext.redhat.com [66.187.233.73]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-275-576NareyPOChDTyXbKQYWA-1; Mon, 08 Apr 2024 07:08:21 -0400 X-MC-Unique: 576NareyPOChDTyXbKQYWA-1 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.rdu2.redhat.com [10.11.54.5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 936BD3C02788 for ; Mon, 8 Apr 2024 11:08:21 +0000 (UTC) Received: from oldenburg.str.redhat.com (unknown [10.39.192.59]) by smtp.corp.redhat.com (Postfix) with ESMTPS id BBF8817B36 for ; Mon, 8 Apr 2024 11:08:20 +0000 (UTC) From: Florian Weimer To: libc-alpha@sourceware.org Subject: [PATCH v4 3/3] aarch64: Enhanced CPU diagnostics for ld.so In-Reply-To: Message-ID: <85f152292c8de61442f7ebc2ba0e50f949404b4d.1712574353.git.fweimer@redhat.com> References: X-From-Line: 85f152292c8de61442f7ebc2ba0e50f949404b4d Mon Sep 17 00:00:00 2001 Date: Mon, 08 Apr 2024 13:08:14 +0200 User-Agent: Gnus/5.13 (Gnus v5.13) MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.5 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org This prints some information from struct cpu_features, and the midr_el1 and dczid_el0 system register contents on every CPU. Reviewed-by: Szabolcs Nagy --- v4: Manual update. manual/dynlink.texi | 34 +++++++++++ sysdeps/aarch64/dl-diagnostics-cpu.c | 84 ++++++++++++++++++++++++++++ 2 files changed, 118 insertions(+) create mode 100644 sysdeps/aarch64/dl-diagnostics-cpu.c diff --git a/manual/dynlink.texi b/manual/dynlink.texi index f2f2341818..d71f7a30d6 100644 --- a/manual/dynlink.texi +++ b/manual/dynlink.texi @@ -224,6 +224,40 @@ reflect adjustment by @theglibc{}. These Linux-specific items show the values of @code{struct utsname}, as reported by the @code{uname} function. @xref{Platform Type}. +@item aarch64.cpu_features.@dots{} +These items are specific to the AArch64 architectures. They report data +@theglibc{} uses to activate conditionally supported features such as +BTI and MTE, and to select alternative function implementations. + +@item aarch64.processor[@var{index}].@dots{} +These are additional items for the AArch64 architecture and are +described below. + +@item aarch64.processor[@var{index}].requested=@var{kernel-cpu} +The kernel is told to run the subsequent probing on the CPU numbered +@var{kernel-cpu}. The values @var{kernel-cpu} and @var{index} can be +distinct if there are gaps in the process CPU affinity mask. This line +is not included if CPU affinity mask information is not available. + +@item aarch64.processor[@var{index}].observed=@var{kernel-cpu} +This line reports the kernel CPU number @var{kernel-cpu} on which the +probing code initially ran. If the CPU number cannot be obtained, +this line is not printed. + +@item aarch64.processor[@var{index}].observed_node=@var{node} +This reports the observed NUMA node number, as reported by the +@code{getcpu} system call. If this information cannot be obtained, this +line is not printed. + +@item aarch64.processor[@var{index}].midr_el1=@var{value} +The value of the @code{midr_el1} system register on the processor +@var{index}. This line is only printed if the kernel indicates that +this system register is supported. + +@item aarch64.processor[@var{index}].dczid_el0=@var{value} +The value of the @code{dczid_el0} system register on the processor +@var{index}. + @cindex CPUID (diagnostics) @item x86.cpu_features.@dots{} These items are specific to the i386 and x86-64 architectures. They diff --git a/sysdeps/aarch64/dl-diagnostics-cpu.c b/sysdeps/aarch64/dl-diagnostics-cpu.c new file mode 100644 index 0000000000..e037e6ea8c --- /dev/null +++ b/sysdeps/aarch64/dl-diagnostics-cpu.c @@ -0,0 +1,84 @@ +/* Print CPU diagnostics data in ld.so. AArch64 version. + Copyright (C) 2021-2024 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include + +#include +#include +#include +#include + +static void +print_cpu_features_value (const char *label, uint64_t value) +{ + _dl_printf ("aarch64.cpu_features."); + _dl_diagnostics_print_labeled_value (label, value); +} + +static void +print_per_cpu_value (const struct dl_iterate_cpu *dic, + const char *label, uint64_t value) +{ + _dl_printf ("aarch64.processor[0x%x].", dic->processor_index); + _dl_diagnostics_print_labeled_value (label, value); +} + +void +_dl_diagnostics_cpu (void) +{ + print_cpu_features_value ("bti", GLRO (dl_aarch64_cpu_features).bti); + print_cpu_features_value ("midr_el1", + GLRO (dl_aarch64_cpu_features).midr_el1); + print_cpu_features_value ("mops", GLRO (dl_aarch64_cpu_features).mops); + print_cpu_features_value ("mte_state", + GLRO (dl_aarch64_cpu_features).mte_state); + print_cpu_features_value ("prefer_sve_ifuncs", + GLRO (dl_aarch64_cpu_features).prefer_sve_ifuncs); + print_cpu_features_value ("sve", GLRO (dl_aarch64_cpu_features).sve); + print_cpu_features_value ("zva_size", + GLRO (dl_aarch64_cpu_features).zva_size); + + struct dl_iterate_cpu dic; + _dl_iterate_cpu_init (&dic); + + while (_dl_iterate_cpu_next (&dic)) + { + if (dic.requested_cpu >= 0) + _dl_printf ("aarch64.processor[0x%x].requested=0x%x\n", + dic.processor_index, dic.requested_cpu); + if (dic.actual_cpu >= 0) + _dl_printf ("aarch64.processor[0x%x].observed=0x%x\n", + dic.processor_index, dic.actual_cpu); + if (dic.actual_node >= 0) + _dl_printf ("aarch64.processor[0x%x].observed_node=0x%x\n", + dic.processor_index, dic.actual_node); + + if (GLRO (dl_hwcap) & HWCAP_CPUID) + { + uint64_t midr_el1; + asm ("mrs %0, midr_el1" : "=r" (midr_el1)); + print_per_cpu_value (&dic, "midr_el1", midr_el1); + } + + { + uint64_t dczid_el0; + asm ("mrs %0, dczid_el0" : "=r" (dczid_el0)); + print_per_cpu_value (&dic, "dczid_el0", dczid_el0); + } + } +}