From patchwork Sat Dec 1 03:10:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zong Li X-Patchwork-Id: 30501 Received: (qmail 125425 invoked by alias); 1 Dec 2018 03:13:39 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 125218 invoked by uid 89); 1 Dec 2018 03:13:38 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.9 required=5.0 tests=BAYES_00, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.2 spammy=H*r:sk:mail-pf, HX-HELO:sk:mail-pf, Hx-spam-relays-external:sk:mail-pf X-HELO: mail-pf1-f182.google.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=g3Vn+OcbvNVuY14U2F3YoYaIlmToneJyQZwONP6V/Wg=; b=HLQQvrCX0QohO9Elk9BtrO46f9rBX/ekmJ/OxBRqfmA2k3G4bFQUMaLDgbicY4JLaP fqwve5+6LewEnad2mqQWxzKgpxn0TzwRO4okw57CsTZ/bsJRO6kFHHK90jpOB0uXK+AM Dyri7UxQYaUCy6rgczg6JH52V6ilGbhcdnYUxj4xR342EOY6DwD7tpTPDbHADsXsRdAD g6RaApYUpB4WACRpD9e4rUTqWAB8IX+Fe6HxvMy/zPpg2cBjxD0CLOPXQejzAWZ0dpfL +pLsEAehanJNR0mpEnwilfEKAohCL0TZcSGv1kHXO4sJLPM5KMdyYroq81heQcN+VI9R Jl9w== Return-Path: From: Zong Li To: joseph@codesourcery.com, palmer@dabbelt.com, darius@bluespec.com, andrew@sifive.com, dj@redhat.com, libc-alpha@sourceware.org Cc: zong@andestech.com, Zong Li Subject: [PATCH v4 10/10] Add RISC-V 32-bit target to build-many-glibcs.py Date: Sat, 1 Dec 2018 11:10:53 +0800 Message-Id: <858a04037082f99ac74766df696f6a7c9c986ada.1543572707.git.zongbox@gmail.com> In-Reply-To: References: Support building three variant of 32 bit RISC-V glibc as follows: - riscv32-linux-gnu-rv32imac-ilp32 - riscv32-linux-gnu-rv32imafdc-ilp32 - riscv32-linux-gnu-rv32imafdc-ilp32d 2018-11-29 Zong Li * scripts/build-many-glibcs.py (Context): Add rv32 targets. --- ChangeLog | 1 + scripts/build-many-glibcs.py | 15 +++++++++++++++ 2 files changed, 16 insertions(+) diff --git a/ChangeLog b/ChangeLog index ee74249..c569cc3 100644 --- a/ChangeLog +++ b/ChangeLog @@ -43,6 +43,7 @@ * sysdeps/unix/sysv/linux/riscv/shlib-versions: Likewise. * sysdeps/riscv/preconfigure: Likewise. * sysdeps/riscv/rv32/fix-fp-int-convert-overflow.h: New file. + * scripts/build-many-glibcs.py (Context): Add rv32 targets. 2018-11-28 Florian Weimer diff --git a/scripts/build-many-glibcs.py b/scripts/build-many-glibcs.py index 98acabc..e322696 100755 --- a/scripts/build-many-glibcs.py +++ b/scripts/build-many-glibcs.py @@ -320,6 +320,21 @@ class Context(object): variant='e500v1', gcc_cfg=['--disable-multilib', '--enable-secureplt', '--enable-obsolete']) + self.add_config(arch='riscv32', + os_name='linux-gnu', + variant='rv32imac-ilp32', + gcc_cfg=['--with-arch=rv32imac', '--with-abi=ilp32', + '--disable-multilib']) + self.add_config(arch='riscv32', + os_name='linux-gnu', + variant='rv32imafdc-ilp32', + gcc_cfg=['--with-arch=rv32imafdc', '--with-abi=ilp32', + '--disable-multilib']) + self.add_config(arch='riscv32', + os_name='linux-gnu', + variant='rv32imafdc-ilp32d', + gcc_cfg=['--with-arch=rv32imafdc', '--with-abi=ilp32d', + '--disable-multilib']) self.add_config(arch='riscv64', os_name='linux-gnu', variant='rv64imac-lp64',