From patchwork Fri Dec 7 18:10:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rogerio Alves X-Patchwork-Id: 30583 Received: (qmail 86564 invoked by alias); 7 Dec 2018 18:10:18 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 86552 invoked by uid 89); 7 Dec 2018 18:10:17 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-27.6 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_SHORT, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 spammy=POWER X-HELO: mx0a-001b2d01.pphosted.com Subject: Re: [PATCH] power: Fix VSCR position on ucontext To: "Gabriel F. T. Gomes" , Florian Weimer Cc: libc-alpha@sourceware.org References: <8a619ad1-b7f2-04f8-f9a7-0a19cbf98f4c@linux.ibm.com> <87lg5va6a6.fsf@oldenburg.str.redhat.com> <20181116111825.43b60283@tereshkova.br.ibm.com> From: Rogerio Alves Date: Fri, 7 Dec 2018 16:10:06 -0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.4.0 MIME-Version: 1.0 In-Reply-To: <20181116111825.43b60283@tereshkova.br.ibm.com> x-cbid: 18120718-0052-0000-0000-00000363C1BF X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00010189; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000270; SDB=6.01128393; UDB=6.00586180; IPR=6.00908524; MB=3.00024577; MTD=3.00000008; XFM=3.00000015; UTC=2018-12-07 18:10:10 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18120718-0053-0000-0000-00005F06A3EC Message-Id: <5e1d1cab-7c91-90f8-82d2-fd38f8676f30@linux.ibm.com> Hi everyone, Here is patch v3 with the suggestions given. Sorry for take me that long to reply. Thanks for the review Regards Em 16-11-2018 11:18, Gabriel F. T. Gomes escreveu: > On Wed, 14 Nov 2018, Florian Weimer wrote: > >> * Rogerio Alves: >> >>> +#ifdef _ARCH_PWR8 >> >> Is it possible to perform run-time detection instead? Now I am using auxval to get if the arch is supported for the test > > That's a fair point. Even though we have bots that test powerpc64 > (big-endian) builds configured with `--with-cpu=power8', that's not the > default. Runtime detection could make this test work on default builds > (provided they are run on a POWER8 machine). > >> + /* Set SAT bit in VSCR register. */ >> + asm volatile ("vspltisb %0,0\n" >> + "vspltisb %1,-1\n" >> + "vpkudus %0,%0,%1\n" > > Also, if you replace `vpkudus' (only available since Power ISA 2.07) with > `vpkuwus' (available since PowerISA 2.03) the test remains valid and it > could be tested on older machines. > Done From f7d3468236f17f0d1c1ca5acf3865bc89ac27125 Mon Sep 17 00:00:00 2001 From: Rogerio Alves Date: Mon, 5 Nov 2018 10:18:38 -0600 Subject: [PATCH v3] powerpc: Fix VSCR position in ucontext. This patch fix VSCR position on ucontext. VSCR was read in the wrong position on ucontext structure because it was ignoring the machine endianess. 2018-11-05 Rogerio A. Cardoso * sysdeps/unix/sysv/linux/powerpc/sys/ucontext.h (struct _libc_vscr, vscr_t): Added ifdef to fix read of VSCR. * sysdeps/powerpc/powerpc64/Makefile: Add tst-ucontext-ppc64-vscr.c to test list. * sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c: New test file. --- Patch v3: fixed as per Florian and Gabriel review. Using getauxval to get if (runtime) the test is supported instead using ifdef. Changed vpkudus por vpkuwus since it's supported by POWER 5 or higher. Patch v2: fixed as per Gabriel and Segher review. Fix formating and changelog Change the assembly inline to a better version. Changed ifdef to POWER8. sysdeps/powerpc/powerpc64/Makefile | 5 ++ .../powerpc/powerpc64/tst-ucontext-ppc64-vscr.c | 82 ++++++++++++++++++++++ sysdeps/unix/sysv/linux/powerpc/sys/ucontext.h | 5 ++ 3 files changed, 92 insertions(+) create mode 100644 sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c diff --git a/sysdeps/powerpc/powerpc64/Makefile b/sysdeps/powerpc/powerpc64/Makefile index a0bd0c9..6e88df1 100644 --- a/sysdeps/powerpc/powerpc64/Makefile +++ b/sysdeps/powerpc/powerpc64/Makefile @@ -59,3 +59,8 @@ $(objpfx)tst-setjmp-bug21895-static.out: $(objpfx)setjmp-bug21895.so tst-setjmp-bug21895-static-ENV = \ LD_LIBRARY_PATH=$(objpfx):$(common-objpfx):$(common-objpfx)setjmp:$(common-objpfx)elf endif + +ifeq ($(subdir),stdlib) +CFLAGS-tst-ucontext-ppc64-vscr.c += -maltivec +tests += tst-ucontext-ppc64-vscr +endif diff --git a/sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c b/sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c new file mode 100644 index 0000000..be99108 --- /dev/null +++ b/sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c @@ -0,0 +1,82 @@ +/* Test if POWER vscr read by ucontext. + Copyright (C) 2018 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include +#include +#include +#include +#include +#include +#include + +#define SAT 0x1 + +/* This test is supported only on POWER 5 or higher. */ +#define PPC_CPU_SUPPORTED (PPC_FEATURE_POWER5 | PPC_FEATURE_POWER5_PLUS | \ + PPC_FEATURE_ARCH_2_05 | PPC_FEATURE_ARCH_2_06 | \ + PPC_FEATURE2_ARCH_2_07) +static int +do_test (void) +{ + + if (!(getauxval(AT_HWCAP2) & PPC_CPU_SUPPORTED)) + { + if (!(getauxval(AT_HWCAP) & PPC_CPU_SUPPORTED)) + FAIL_UNSUPPORTED("This test is unsupported on POWER < 5\n"); + } + + uint32_t vscr[4] __attribute__ ((aligned (16))); + uint32_t* vscr_ptr = vscr; + uint32_t vscr_word; + ucontext_t ucp; + __vector __int128_t v0 = {0}; + __vector __int128_t v1 = {0}; + + /* Set SAT bit in VSCR register. */ + asm volatile ("vspltisb %0,0\n" + "vspltisb %1,-1\n" + "vpkuwus %0,%0,%1\n" + "mfvscr %0\n" + "stvx %0,0,%2" + : "=v" (v0), "=v" (v1) + : "r" (vscr_ptr) + : "memory" + ); +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ + vscr_word = vscr[0]; +#else + vscr_word = vscr[3]; +#endif + + if ((vscr_word & SAT) != SAT) + { + FAIL_EXIT1("FAIL: SAT bit is not set.\n"); + } + + if (getcontext (&ucp)) + { + FAIL_EXIT1("FAIL: getcontext error\n"); + } + if (ucp.uc_mcontext.v_regs->vscr.vscr_word != vscr_word) + { + FAIL_EXIT1("FAIL: ucontext vscr does not match with vscr\n"); + } + return 0; +} + +#include diff --git a/sysdeps/unix/sysv/linux/powerpc/sys/ucontext.h b/sysdeps/unix/sysv/linux/powerpc/sys/ucontext.h index 1bb6e4c..49a92c5 100644 --- a/sysdeps/unix/sysv/linux/powerpc/sys/ucontext.h +++ b/sysdeps/unix/sysv/linux/powerpc/sys/ucontext.h @@ -98,8 +98,13 @@ typedef double fpregset_t[__NFPREG]; a whole quadword speedup save/restore. */ typedef struct _libc_vscr { +#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ unsigned int __pad[3]; unsigned int __ctx(vscr_word); +#else + unsigned int __ctx(vscr_word); + unsigned int __pad[3]; +#endif } vscr_t; /* Container for Altivec/VMX registers and status. -- 2.7.4