From patchwork Thu Jul 26 14:16:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zong Li X-Patchwork-Id: 28625 Received: (qmail 82979 invoked by alias); 26 Jul 2018 14:17:09 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 82874 invoked by uid 89); 26 Jul 2018 14:17:08 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.7 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: ATCSQR.andestech.com From: Zong Li To: , , , , CC: , , Zong Li Subject: [PATCH v3 2/8] RISC-V: Add dynamic loader for the 32 bit Date: Thu, 26 Jul 2018 22:16:22 +0800 Message-ID: <5b5e9c1b59c37e228b2625e320eb35d1f1e34687.1532587497.git.zong@andestech.com> In-Reply-To: References: MIME-Version: 1.0 X-DNSRBL: X-MAIL: ATCSQR.andestech.com w6QEGx7C027527 Add the LD_SO_ABI definition of the 32 bit RISC-V --- sysdeps/unix/sysv/linux/riscv/ldconfig.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sysdeps/unix/sysv/linux/riscv/ldconfig.h b/sysdeps/unix/sysv/linux/riscv/ldconfig.h index 0ca798a..088c201 100644 --- a/sysdeps/unix/sysv/linux/riscv/ldconfig.h +++ b/sysdeps/unix/sysv/linux/riscv/ldconfig.h @@ -24,7 +24,7 @@ #if __riscv_xlen == 64 # define LD_SO_ABI "riscv64-lp64" #else -# error "rv32i-based targets are not supported" +# define LD_SO_ABI "riscv32-ilp32" #endif #define SYSDEP_KNOWN_INTERPRETER_NAMES \