diff mbox

powerpc: Fix fesetexceptflag [BZ#17885]

Message ID 54C7881F.40600@linux.vnet.ibm.com
State Committed
Delegated to: Adhemerval Zanella Netto
Headers

Commit Message

Adhemerval Zanella Netto Jan. 27, 2015, 12:44 p.m. UTC 
  While working on 'powerpc: Fix inline feraiseexcept, feclearexcept macros'
testcase I found an issue introduced by my patch 18f2945ae9216cfc, where it 
optimizes the FPSCR set by just issuing a mtfs instruction if new flag is 
different from older one.  The issue is a typo, where the new flag should
the new value, instead of the old one.

I will work on additional testcases to stress it on 2.22.  Tested powerpc64
and powerpc64le.

Carlos, I would like to push it on 2.21.

--

	[BZ #17885]
	* sysdeps/powerpc/fpu/fsetexcptflg.c (__fesetexceptflag): Fix correct
	value to set as new flag.

--

Comments

Carlos O'Donell Jan. 27, 2015, 8:53 p.m. UTC | #1 
On 01/27/2015 07:44 AM, Adhemerval Zanella wrote:
> While working on 'powerpc: Fix inline feraiseexcept, feclearexcept macros'
> testcase I found an issue introduced by my patch 18f2945ae9216cfc, where it 
> optimizes the FPSCR set by just issuing a mtfs instruction if new flag is 
> different from older one.  The issue is a typo, where the new flag should
> the new value, instead of the old one.
> 
> I will work on additional testcases to stress it on 2.22.  Tested powerpc64
> and powerpc64le.
> 
> Carlos, I would like to push it on 2.21.

OK to push.
 
> --
> 
> 	[BZ #17885]
> 	* sysdeps/powerpc/fpu/fsetexcptflg.c (__fesetexceptflag): Fix correct
> 	value to set as new flag.
> 
> --
> 
> diff --git a/NEWS b/NEWS
> index 36b369f..57a614d 100644
> --- a/NEWS
> +++ b/NEWS
> @@ -18,7 +18,7 @@ Version 2.21
>    17658, 17664, 17665, 17668, 17682, 17702, 17717, 17719, 17722, 17723,
>    17724, 17725, 17732, 17733, 17744, 17745, 17746, 17747, 17748, 17775,
>    17777, 17780, 17781, 17782, 17791, 17793, 17796, 17797, 17803, 17806,
> -  17834, 17844, 17848, 17868, 17869, 17870
> +  17834, 17844, 17848, 17868, 17869, 17870, 17885
>  
>  * A new semaphore algorithm has been implemented in generic C code for all
>    machines. Previous custom assembly implementations of semaphore were
> diff --git a/sysdeps/powerpc/fpu/fsetexcptflg.c b/sysdeps/powerpc/fpu/fsetexcptflg.c
> index 5d99bf2..836d839 100644
> --- a/sysdeps/powerpc/fpu/fsetexcptflg.c
> +++ b/sysdeps/powerpc/fpu/fsetexcptflg.c
> @@ -40,7 +40,7 @@ __fesetexceptflag (const fexcept_t *flagp, int excepts)
>       This may cause floating-point exceptions if the restored state
>       requests it.  */
>    if (n.l != u.l)
> -    fesetenv_register (u.fenv);
> +    fesetenv_register (n.fenv);
>  
>    /* Deal with FE_INVALID_SOFTWARE not being implemented on some chips.  */
>    if (flag & FE_INVALID)
>
diff mbox

Patch

diff --git a/NEWS b/NEWS
index 36b369f..57a614d 100644
--- a/NEWS
+++ b/NEWS
@@ -18,7 +18,7 @@  Version 2.21
   17658, 17664, 17665, 17668, 17682, 17702, 17717, 17719, 17722, 17723,
   17724, 17725, 17732, 17733, 17744, 17745, 17746, 17747, 17748, 17775,
   17777, 17780, 17781, 17782, 17791, 17793, 17796, 17797, 17803, 17806,
-  17834, 17844, 17848, 17868, 17869, 17870
+  17834, 17844, 17848, 17868, 17869, 17870, 17885
 
 * A new semaphore algorithm has been implemented in generic C code for all
   machines. Previous custom assembly implementations of semaphore were
diff --git a/sysdeps/powerpc/fpu/fsetexcptflg.c b/sysdeps/powerpc/fpu/fsetexcptflg.c
index 5d99bf2..836d839 100644
--- a/sysdeps/powerpc/fpu/fsetexcptflg.c
+++ b/sysdeps/powerpc/fpu/fsetexcptflg.c
@@ -40,7 +40,7 @@  __fesetexceptflag (const fexcept_t *flagp, int excepts)
      This may cause floating-point exceptions if the restored state
      requests it.  */
   if (n.l != u.l)
-    fesetenv_register (u.fenv);
+    fesetenv_register (n.fenv);
 
   /* Deal with FE_INVALID_SOFTWARE not being implemented on some chips.  */
   if (flag & FE_INVALID)