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Mon, 25 Jan 2021 11:04:02 +0000 Received: from PA4PR08MB6320.eurprd08.prod.outlook.com ([fe80::941:f3b7:c753:21f8]) by PA4PR08MB6320.eurprd08.prod.outlook.com ([fe80::941:f3b7:c753:21f8%5]) with mapi id 15.20.3784.017; Mon, 25 Jan 2021 11:04:01 +0000 To: libc-alpha@sourceware.org Subject: [PATCH 2/2] aarch64: Fix the list of tested IFUNC variants [BZ #26818] Date: Mon, 25 Jan 2021 11:03:56 +0000 Message-Id: <224874374ec839e932d0a7d4e3d152fb5f74b30a.1611572339.git.szabolcs.nagy@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: X-Originating-IP: [217.140.106.55] X-ClientProxiedBy: LO4P123CA0079.GBRP123.PROD.OUTLOOK.COM (2603:10a6:600:190::12) To PA4PR08MB6320.eurprd08.prod.outlook.com (2603:10a6:102:e5::9) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (217.140.106.55) by LO4P123CA0079.GBRP123.PROD.OUTLOOK.COM (2603:10a6:600:190::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3784.12 via Frontend Transport; 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PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com; CAT:NONE; SFS:(4636009)(39860400002)(396003)(376002)(346002)(136003)(46966006)(47076005)(316002)(6666004)(336012)(956004)(6486002)(26005)(2616005)(8936002)(478600001)(5660300002)(83380400001)(36756003)(70586007)(6506007)(69590400011)(70206006)(44832011)(82310400003)(8676002)(186003)(16526019)(6916009)(81166007)(2906002)(82740400003)(86362001)(6512007)(356005); DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Jan 2021 11:04:08.8483 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 31919887-dd71-4099-47fc-08d8c120f06d X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: VE1EUR03FT054.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB6PR0802MB2502 X-Spam-Status: No, score=-14.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, GIT_PATCH_0, MSGID_FROM_MTA_HEADER, RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_PASS, TXREP, UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Szabolcs Nagy via Libc-alpha From: Szabolcs Nagy Reply-To: Szabolcs Nagy Errors-To: libc-alpha-bounces@sourceware.org Sender: "Libc-alpha" Some IFUNC variants are not compatible with BTI and MTE so don't set them as usable for testing and benchmarking on a BTI or MTE enabled system. As far as IFUNC selectors are concerned a system is BTI enabled if the cpu supports it and glibc was built with BTI branch protection. Most IFUNC variants are BTI compatible, but thunderx2 memcpy and memmove use a jump table with indirect jump, without a BTI j. Fixes bug 26818. --- sysdeps/aarch64/multiarch/ifunc-impl-list.c | 16 +++++++++------- sysdeps/aarch64/multiarch/init-arch.h | 2 ++ 2 files changed, 11 insertions(+), 7 deletions(-) diff --git a/sysdeps/aarch64/multiarch/ifunc-impl-list.c b/sysdeps/aarch64/multiarch/ifunc-impl-list.c index a69eae65f0..ce9e5e35bf 100644 --- a/sysdeps/aarch64/multiarch/ifunc-impl-list.c +++ b/sysdeps/aarch64/multiarch/ifunc-impl-list.c @@ -40,29 +40,31 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, /* Support sysdeps/aarch64/multiarch/memcpy.c and memmove.c. */ IFUNC_IMPL (i, name, memcpy, IFUNC_IMPL_ADD (array, i, memcpy, 1, __memcpy_thunderx) - IFUNC_IMPL_ADD (array, i, memcpy, 1, __memcpy_thunderx2) + IFUNC_IMPL_ADD (array, i, memcpy, !bti, __memcpy_thunderx2) IFUNC_IMPL_ADD (array, i, memcpy, 1, __memcpy_falkor) IFUNC_IMPL_ADD (array, i, memcpy, 1, __memcpy_simd) IFUNC_IMPL_ADD (array, i, memcpy, 1, __memcpy_generic)) IFUNC_IMPL (i, name, memmove, IFUNC_IMPL_ADD (array, i, memmove, 1, __memmove_thunderx) - IFUNC_IMPL_ADD (array, i, memmove, 1, __memmove_thunderx2) + IFUNC_IMPL_ADD (array, i, memmove, !bti, __memmove_thunderx2) IFUNC_IMPL_ADD (array, i, memmove, 1, __memmove_falkor) IFUNC_IMPL_ADD (array, i, memmove, 1, __memmove_simd) IFUNC_IMPL_ADD (array, i, memmove, 1, __memmove_generic)) IFUNC_IMPL (i, name, memset, /* Enable this on non-falkor processors too so that other cores can do a comparative analysis with __memset_generic. */ - IFUNC_IMPL_ADD (array, i, memset, (zva_size == 64), __memset_falkor) - IFUNC_IMPL_ADD (array, i, memset, (zva_size == 64), __memset_emag) - IFUNC_IMPL_ADD (array, i, memset, 1, __memset_kunpeng) + IFUNC_IMPL_ADD (array, i, memset, (zva_size == 64) && !mte, + __memset_falkor) + IFUNC_IMPL_ADD (array, i, memset, (zva_size == 64) && !mte, + __memset_emag) + IFUNC_IMPL_ADD (array, i, memset, !mte, __memset_kunpeng) IFUNC_IMPL_ADD (array, i, memset, 1, __memset_generic)) IFUNC_IMPL (i, name, memchr, - IFUNC_IMPL_ADD (array, i, memchr, 1, __memchr_nosimd) + IFUNC_IMPL_ADD (array, i, memchr, !mte, __memchr_nosimd) IFUNC_IMPL_ADD (array, i, memchr, 1, __memchr_generic)) IFUNC_IMPL (i, name, strlen, - IFUNC_IMPL_ADD (array, i, strlen, 1, __strlen_asimd) + IFUNC_IMPL_ADD (array, i, strlen, !mte, __strlen_asimd) IFUNC_IMPL_ADD (array, i, strlen, 1, __strlen_mte)) return i; diff --git a/sysdeps/aarch64/multiarch/init-arch.h b/sysdeps/aarch64/multiarch/init-arch.h index fce260d168..a167699e74 100644 --- a/sysdeps/aarch64/multiarch/init-arch.h +++ b/sysdeps/aarch64/multiarch/init-arch.h @@ -30,5 +30,7 @@ GLRO(dl_aarch64_cpu_features).midr_el1; \ unsigned __attribute__((unused)) zva_size = \ GLRO(dl_aarch64_cpu_features).zva_size; \ + bool __attribute__((unused)) bti = \ + HAVE_AARCH64_BTI && GLRO(dl_aarch64_cpu_features).bti; \ bool __attribute__((unused)) mte = \ MTE_ENABLED ();