From patchwork Fri Jan 12 09:26:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Cederman X-Patchwork-Id: 83972 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 49C9B3857C60 for ; Fri, 12 Jan 2024 09:28:31 +0000 (GMT) X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from smtp-out3.simply.com (smtp-out3.simply.com [94.231.106.210]) by sourceware.org (Postfix) with ESMTPS id 7E7FC3858C53 for ; Fri, 12 Jan 2024 09:26:45 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 7E7FC3858C53 Authentication-Results: sourceware.org; dmarc=pass (p=reject dis=none) header.from=gaisler.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gaisler.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 7E7FC3858C53 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=94.231.106.210 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1705051608; cv=none; b=R6L74Wj/sAy70Mmsdd/ACQJMnxjmOjQRqG+R9KEu+p2hEfW5e/L5i57Vn7DYqz6ibIeaVTETKx5zfmB6AfjTk41s+l+lNVhSI6TWwKiqRFwq9aKhbGLoI07lnaUIfyWnkDtRNpWqvAKcSnNy7NbqAqCCNPn0+h1dZ9XCW0yKlLs= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1705051608; c=relaxed/simple; bh=k+528E5QcAIcYbuMyp/Qk5z8gFzqbDcSXd/bG1jXLU0=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=U0J0unbvisJnAfwGHXa7msHCkxM1I2ZMpXVWxovdhK/qv0Ut5A6DKESK6O/YZkEQyJIeHFOnONmOGokdvbjQqOWlDAudiODlkyMr2+cjggGudNNDfg7KTIYQMzfFjGt+IeBUi0v+fduFaFjnuAqoH5MehhuCgDSFg+iHA8dJs4Q= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from localhost (localhost [127.0.0.1]) by smtp.simply.com (Simply.com) with ESMTP id 4TBGPw293hz680W; Fri, 12 Jan 2024 10:26:44 +0100 (CET) Received: from cederman.got.gaisler.com (h-98-128-223-123.NA.cust.bahnhof.se [98.128.223.123]) by smtp.simply.com (Simply.com) with ESMTPA id 4TBGPw0Q81z67yq; Fri, 12 Jan 2024 10:26:44 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gaisler.com; s=unoeuro; t=1705051604; bh=RRnpPdv6ncWm7BxGBOB4oXQJDXXtOD1b8qg85ftegok=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=V6zn/wnShY72zuVqGnmDtkNfUiyjTIdTdvgfNiYY7a9Y8eP23CzVxayx1Xm/mwUHm oP2DUE8OIeYIap8Y8uQLBsbz5O1iG7qPQgEhdolcbj7xKl+gbaQTVZ2JUAPngg6lNZ iVJRJiqxtEtdOHkXqRJ31P1vQFvkb6j9geN2PRbQ= From: Daniel Cederman To: libc-alpha@sourceware.org Cc: daniel@gaisler.com, andreas@gaisler.com Subject: [PATCH] sparc: Prevent stfsr from directly following floating-point instruction Date: Fri, 12 Jan 2024 10:26:24 +0100 Message-Id: <20240112092628.2464455-2-cederman@gaisler.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240112092628.2464455-1-cederman@gaisler.com> References: <20240112092628.2464455-1-cederman@gaisler.com> MIME-Version: 1.0 X-Spam-Status: No, score=-15.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_LOW, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org On LEON, if the stfsr instruction is immediately following a floating-point operation instruction in a running program, with no other instruction in between the two, the stfsr might behave as if the order was reversed between the two instructions and the stfsr occurred before the floating-point operation. Add a nop instruction before the stfsr to prevent this from happening. Signed-off-by: Daniel Cederman --- sysdeps/sparc/fpu/fenv_private.h | 6 +++++- sysdeps/sparc/fpu/fpu_control.h | 6 +++++- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/sysdeps/sparc/fpu/fenv_private.h b/sysdeps/sparc/fpu/fenv_private.h index da7c7fe332..a02af80d04 100644 --- a/sysdeps/sparc/fpu/fenv_private.h +++ b/sysdeps/sparc/fpu/fenv_private.h @@ -8,7 +8,11 @@ # define __fenv_stfsr(X) __asm__ __volatile__ ("stx %%fsr,%0" : "=m" (X)) # define __fenv_ldfsr(X) __asm__ __volatile__ ("ldx %0,%%fsr" : : "m" (X)) #else -# define __fenv_stfsr(X) __asm__ __volatile__ ("st %%fsr,%0" : "=m" (X)) +# ifdef __leon__ +# define __fenv_stfsr(X) __asm__ __volatile__ ("nop; st %%fsr,%0" : "=m" (X)) +# else +# define __fenv_stfsr(X) __asm__ __volatile__ ("st %%fsr,%0" : "=m" (X)) +# endif # define __fenv_ldfsr(X) __asm__ __volatile__ ("ld %0,%%fsr" : : "m" (X)) #endif diff --git a/sysdeps/sparc/fpu/fpu_control.h b/sysdeps/sparc/fpu/fpu_control.h index dd18789573..9313743f86 100644 --- a/sysdeps/sparc/fpu/fpu_control.h +++ b/sysdeps/sparc/fpu/fpu_control.h @@ -61,7 +61,11 @@ typedef unsigned long int fpu_control_t; # define _FPU_GETCW(cw) __asm__ __volatile__ ("stx %%fsr,%0" : "=m" (*&cw)) # define _FPU_SETCW(cw) __asm__ __volatile__ ("ldx %0,%%fsr" : : "m" (*&cw)) #else -# define _FPU_GETCW(cw) __asm__ __volatile__ ("st %%fsr,%0" : "=m" (*&cw)) +# ifdef __leon__ +# define _FPU_GETCW(cw) __asm__ __volatile__ ("nop; st %%fsr,%0" : "=m" (*&cw)) +# else +# define _FPU_GETCW(cw) __asm__ __volatile__ ("st %%fsr,%0" : "=m" (*&cw)) +# endif # define _FPU_SETCW(cw) __asm__ __volatile__ ("ld %0,%%fsr" : : "m" (*&cw)) #endif