From patchwork Wed Sep 27 22:09:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Thibault X-Patchwork-Id: 76815 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id DC67D38618E1 for ; Wed, 27 Sep 2023 22:10:08 +0000 (GMT) X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from sonata.ens-lyon.org (sonata.ens-lyon.org [140.77.166.138]) by sourceware.org (Postfix) with ESMTPS id DF3A13857C71 for ; Wed, 27 Sep 2023 22:09:56 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org DF3A13857C71 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=ens-lyon.org Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=bounce.ens-lyon.org Received: from localhost (localhost [127.0.0.1]) by sonata.ens-lyon.org (Postfix) with ESMTP id 6A72520108; Thu, 28 Sep 2023 00:09:55 +0200 (CEST) Received: from sonata.ens-lyon.org ([127.0.0.1]) by localhost (sonata.ens-lyon.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id JTDUo6eQeDaZ; Thu, 28 Sep 2023 00:09:55 +0200 (CEST) Received: from begin (lfbn-bor-1-1163-184.w92-158.abo.wanadoo.fr [92.158.138.184]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by sonata.ens-lyon.org (Postfix) with ESMTPSA id 3F8F2200D0; Thu, 28 Sep 2023 00:09:55 +0200 (CEST) Received: from samy by begin with local (Exim 4.97-RC0) (envelope-from ) id 1qlcjC-0000000EvpO-3Ogk; Thu, 28 Sep 2023 00:09:54 +0200 From: Samuel Thibault To: libc-alpha@sourceware.org Cc: luca@orpolo.org, Samuel Thibault , commit-hurd@gnu.org Subject: [hurd, commited] hurd: Drop REG_GSFS and REG_ESDS from x86_64's ucontext Date: Thu, 28 Sep 2023 00:09:52 +0200 Message-Id: <20230927220952.3558875-1-samuel.thibault@ens-lyon.org> X-Mailer: git-send-email 2.40.1 MIME-Version: 1.0 X-Spam-Status: No, score=-13.6 required=5.0 tests=BAYES_00, GIT_PATCH_0, JMQ_SPF_NEUTRAL, KAM_DMARC_STATUS, RCVD_IN_DNSWL_LOW, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org These are useless on x86_64, and __NGREG was actually wrong with them. --- sysdeps/mach/hurd/x86/trampoline.c | 4 ++-- sysdeps/mach/hurd/x86_64/bits/sigcontext.h | 8 +------- sysdeps/mach/x86/thread_state.h | 6 ++++-- sysdeps/x86_64/sys/ucontext.h | 6 +----- 4 files changed, 8 insertions(+), 16 deletions(-) diff --git a/sysdeps/mach/hurd/x86/trampoline.c b/sysdeps/mach/hurd/x86/trampoline.c index 6318c9528a..bc3f15e1e0 100644 --- a/sysdeps/mach/hurd/x86/trampoline.c +++ b/sysdeps/mach/hurd/x86/trampoline.c @@ -79,8 +79,8 @@ static void fill_ucontext (ucontext_t *uc, const struct sigcontext *sc) /* Registers. */ #ifdef __x86_64__ - memcpy (&uc->uc_mcontext.gregs[REG_GSFS], &sc->sc_gs, - (REG_ERR - REG_GSFS) * sizeof (long)); + memcpy (&uc->uc_mcontext.gregs[REG_R8], &sc->sc_r8, + (REG_ERR - REG_R8) * sizeof (long)); #else memcpy (&uc->uc_mcontext.gregs[REG_GS], &sc->sc_gs, (REG_TRAPNO - REG_GS) * sizeof (int)); diff --git a/sysdeps/mach/hurd/x86_64/bits/sigcontext.h b/sysdeps/mach/hurd/x86_64/bits/sigcontext.h index 6396054463..7facc587b8 100644 --- a/sysdeps/mach/hurd/x86_64/bits/sigcontext.h +++ b/sysdeps/mach/hurd/x86_64/bits/sigcontext.h @@ -59,13 +59,7 @@ struct sigcontext } trampoline.c knows this, so it must be changed if this changes. */ -#define sc_i386_thread_state sc_gs /* Beginning of correspondence. */ - /* Segment registers. */ - int sc_gs; - int sc_fs; - int sc_es; - int sc_ds; - +#define sc_i386_thread_state sc_r8 /* Beginning of correspondence. */ long sc_r8; long sc_r9; long sc_r10; diff --git a/sysdeps/mach/x86/thread_state.h b/sysdeps/mach/x86/thread_state.h index 8c419515f9..e237e46cb2 100644 --- a/sysdeps/mach/x86/thread_state.h +++ b/sysdeps/mach/x86/thread_state.h @@ -34,12 +34,13 @@ #define PC rip #define SP ursp #define SYSRETURN rax +#define MACHINE_THREAD_STATE_FIX_NEW(ts) do { \ + asm ("mov %%cs, %w0" : "=q" ((ts)->cs)); \ +} while(0) #else #define PC eip #define SP uesp #define SYSRETURN eax -#endif - #define MACHINE_THREAD_STATE_FIX_NEW(ts) do { \ asm ("mov %%cs, %w0" : "=q" ((ts)->cs)); \ asm ("mov %%ds, %w0" : "=q" ((ts)->ds)); \ @@ -47,6 +48,7 @@ asm ("mov %%fs, %w0" : "=q" ((ts)->fs)); \ asm ("mov %%gs, %w0" : "=q" ((ts)->gs)); \ } while(0) +#endif struct machine_thread_all_state { diff --git a/sysdeps/x86_64/sys/ucontext.h b/sysdeps/x86_64/sys/ucontext.h index d73a893795..f1b6be77a7 100644 --- a/sysdeps/x86_64/sys/ucontext.h +++ b/sysdeps/x86_64/sys/ucontext.h @@ -47,11 +47,7 @@ typedef greg_t gregset_t[__NGREG]; /* Number of each register in the `gregset_t' array. */ enum { - REG_GSFS = 0, /* Actually int gs, fs. */ -# define REG_GSFS REG_GSFS - REG_ESDS, /* Actually int es, ds. */ -# define REG_ESDS REG_ESDS - REG_R8, + REG_R8 = 0, # define REG_R8 REG_R8 REG_R9, # define REG_R9 REG_R9